Added ata_interface_device, ide_controller_device is now only for pc register mapping. Renamed ide_mass_storage_device to ata_mass_storage_device. Changed ide_hdd_device so it only picks up it's image from the harddisk_image_device, which does a lookup to see if there is a region itself. (nw)

2025-06-04 03:46:29 +03:00 · 2013-06-19 10:35:43 +00:00 · 2013-06-19 10:35:43 +00:00 · f89f73561b
commit f89f73561b
parent d8bf9eaac5
67 changed files with 1096 additions and 1016 deletions
--- a/.gitattributes
+++ b/.gitattributes
@ -1199,8 +1199,12 @@ src/emu/machine/at29040a.c svneol=native#text/plain
 src/emu/machine/at29040a.h svneol=native#text/plain
 src/emu/machine/at45dbxx.c svneol=native#text/plain
 src/emu/machine/at45dbxx.h svneol=native#text/plain
+src/emu/machine/atadev.c svneol=native#text/plain
+src/emu/machine/atadev.h svneol=native#text/plain
 src/emu/machine/ataflash.c svneol=native#text/plain
 src/emu/machine/ataflash.h svneol=native#text/plain
+src/emu/machine/ataintf.c svneol=native#text/plain
+src/emu/machine/ataintf.h svneol=native#text/plain
 src/emu/machine/ay31015.c svneol=native#text/plain
 src/emu/machine/ay31015.h svneol=native#text/plain
 src/emu/machine/bankdev.c svneol=native#text/plain
--- a/src/emu/imagedev/harddriv.c
+++ b/src/emu/imagedev/harddriv.c
@ -102,7 +102,7 @@ void harddisk_image_device::device_start()
 	m_chd = NULL;

 	// try to locate the CHD from a DISK_REGION
-	chd_file *handle = get_disk_handle(machine(), owner()->tag());
+	chd_file *handle = get_disk_handle(machine(), tag());
 	if (handle != NULL)
 	{
 		m_hard_disk_handle = hard_disk_open(handle);
--- a/src/emu/machine/atadev.c
+++ b/src/emu/machine/atadev.c
@ -0,0 +1,19 @@
+/***************************************************************************
+
+    ATA Device implementation.
+
+***************************************************************************/
+
+#include "atadev.h"
+
+//-------------------------------------------------
+//  ata_device_interface - constructor
+//-------------------------------------------------
+
+ata_device_interface::ata_device_interface(const machine_config &mconfig, device_t &device) :
+	m_master_password(NULL),
+	m_user_password(NULL),
+	m_irq_handler(device),
+	m_dmarq_handler(device)
+{
+}
--- a/src/emu/machine/atadev.h
+++ b/src/emu/machine/atadev.h
@ -0,0 +1,49 @@
+/***************************************************************************
+
+    atadev.h
+
+    ATA Device implementation.
+
+    Copyright Nicola Salmoria and the MAME Team.
+    Visit http://mamedev.org for licensing and usage restrictions.
+
+***************************************************************************/
+
+#pragma once
+
+#ifndef __ATADEV_H__
+#define __ATADEV_H__
+
+#include "emu.h"
+
+// ======================> ata_device_interface
+
+class ata_device_interface
+{
+public:
+	ata_device_interface(const machine_config &mconfig, device_t &device);
+	virtual ~ata_device_interface() {}
+
+	virtual UINT16 read_dma() = 0;
+	virtual DECLARE_READ16_MEMBER(read_cs0) = 0;
+	virtual DECLARE_READ16_MEMBER(read_cs1) = 0;
+
+	virtual void write_dma(UINT16 data) = 0;
+	virtual DECLARE_WRITE16_MEMBER(write_cs0) = 0;
+	virtual DECLARE_WRITE16_MEMBER(write_cs1) = 0;
+	virtual DECLARE_WRITE_LINE_MEMBER(write_dmack) = 0;
+	virtual DECLARE_WRITE_LINE_MEMBER(write_csel) = 0;
+	virtual DECLARE_WRITE_LINE_MEMBER(write_dasp) = 0;
+
+	virtual UINT8 *identify_device_buffer() = 0;
+
+	UINT8           m_master_password_enable;
+	UINT8           m_user_password_enable;
+	const UINT8 *   m_master_password;
+	const UINT8 *   m_user_password;
+
+	devcb2_write_line m_irq_handler;
+	devcb2_write_line m_dmarq_handler;
+};
+
+#endif
--- a/src/emu/machine/ataflash.h
+++ b/src/emu/machine/ataflash.h
@ -4,7 +4,7 @@
 #define __ATAFLASH_H__

 #include "pccard.h"
-#include "machine/idectrl.h"
+#include "machine/idehd.h"

 extern const device_type ATA_FLASH_PCCARD;

--- a/src/emu/machine/ataintf.c
+++ b/src/emu/machine/ataintf.c
@ -0,0 +1,281 @@
+/***************************************************************************
+
+    ataintf.c
+
+    ATA Interface implementation.
+
+    Copyright Nicola Salmoria and the MAME Team.
+    Visit http://mamedev.org for licensing and usage restrictions.
+
+***************************************************************************/
+
+#include "emu.h"
+#include "ataintf.h"
+#include "debugger.h"
+#include "idehd.h"
+
+/***************************************************************************
+    DEBUGGING
+***************************************************************************/
+
+#define VERBOSE                     0
+
+#define LOG(x)  do { if (VERBOSE) logerror x; } while (0)
+
+void ata_interface_device::set_irq(int state)
+{
+	if (state == ASSERT_LINE)
+		LOG(("ATA interrupt assert\n"));
+	else
+		LOG(("ATA interrupt clear\n"));
+
+	/* signal an interrupt */
+	m_irq_handler(state);
+}
+
+void ata_interface_device::set_dmarq(int state)
+{
+	m_dmarq_handler(state);
+}
+
+WRITE_LINE_MEMBER( ata_interface_device::irq0_write_line )
+{
+	m_irq[0] = state;
+
+	set_irq(m_irq[0] == ASSERT_LINE || m_irq[1] == ASSERT_LINE);
+}
+
+WRITE_LINE_MEMBER( ata_interface_device::irq1_write_line )
+{
+	m_irq[1] = state;
+
+	set_irq(m_irq[0] == ASSERT_LINE || m_irq[1] == ASSERT_LINE);
+}
+
+WRITE_LINE_MEMBER( ata_interface_device::dmarq0_write_line )
+{
+	m_dmarq[0] = state;
+
+	set_dmarq(m_dmarq[0] == ASSERT_LINE || m_dmarq[1] == ASSERT_LINE);
+}
+
+WRITE_LINE_MEMBER( ata_interface_device::dmarq1_write_line )
+{
+	m_dmarq[1] = state;
+
+	set_dmarq(m_dmarq[0] == ASSERT_LINE || m_dmarq[1] == ASSERT_LINE);
+}
+
+
+/***************************************************************************
+    INITIALIZATION AND RESET
+***************************************************************************/
+
+UINT8 *ata_interface_device::identify_device_buffer(int _drive)
+{
+	return m_slot[_drive]->dev()->identify_device_buffer();
+}
+
+void ata_interface_device::set_master_password(int _drive, const UINT8 *password)
+{
+	m_slot[_drive]->dev()->m_master_password = password;
+	m_slot[_drive]->dev()->m_master_password_enable = (password != NULL);
+}
+
+
+void ata_interface_device::set_user_password(int _drive, const UINT8 *password)
+{
+	m_slot[_drive]->dev()->m_user_password = password;
+	m_slot[_drive]->dev()->m_user_password_enable = (password != NULL);
+}
+
+/*************************************
+ *
+ *  ATA interface read
+ *
+ *************************************/
+
+UINT16 ata_interface_device::read_dma()
+{
+	UINT16 result = 0xffff;
+	for (int i = 0; i < 2; i++)
+		if (m_slot[i]->dev() != NULL)
+			result &= m_slot[i]->dev()->read_dma();
+
+//  printf( "read_dma %04x\n", result );
+	return result;
+}
+
+READ16_MEMBER( ata_interface_device::read_cs0 )
+{
+	UINT16 result = mem_mask;
+	for (int i = 0; i < 2; i++)
+		if (m_slot[i]->dev() != NULL)
+			result &= m_slot[i]->dev()->read_cs0(space, offset, mem_mask);
+
+//  printf( "read cs0 %04x %04x %04x\n", offset, result, mem_mask );
+
+	return result;
+}
+
+READ16_MEMBER( ata_interface_device::read_cs1 )
+{
+	UINT16 result = mem_mask;
+	for (int i = 0; i < 2; i++)
+		if (m_slot[i]->dev() != NULL)
+			result &= m_slot[i]->dev()->read_cs1(space, offset, mem_mask);
+
+//  printf( "read cs1 %04x %04x %04x\n", offset, result, mem_mask );
+
+	return result;
+}
+
+
+/*************************************
+ *
+ *  ATA interface write
+ *
+ *************************************/
+
+void ata_interface_device::write_dma( UINT16 data )
+{
+//  printf( "write_dma %04x\n", data );
+
+	for (int i = 0; i < 2; i++)
+		if (m_slot[i]->dev() != NULL)
+			m_slot[i]->dev()->write_dma(data);
+}
+
+WRITE16_MEMBER( ata_interface_device::write_cs0 )
+{
+//  printf( "write cs0 %04x %04x %04x\n", offset, data, mem_mask );
+
+	for (int i = 0; i < 2; i++)
+		if (m_slot[i]->dev() != NULL)
+			m_slot[i]->dev()->write_cs0(space, offset, data, mem_mask);
+}
+
+WRITE16_MEMBER( ata_interface_device::write_cs1 )
+{
+//  printf( "write cs1 %04x %04x %04x\n", offset, data, mem_mask );
+
+	for (int i = 0; i < 2; i++)
+		if (m_slot[i]->dev() != NULL)
+			m_slot[i]->dev()->write_cs1(space, offset, data, mem_mask);
+}
+
+WRITE_LINE_MEMBER( ata_interface_device::write_dmack )
+{
+//  printf( "write_dmack %04x\n", state );
+
+	for (int i = 0; i < 2; i++)
+		if (m_slot[i]->dev() != NULL)
+			m_slot[i]->dev()->write_dmack(state);
+}
+
+SLOT_INTERFACE_START(ata_devices)
+	SLOT_INTERFACE("hdd", IDE_HARDDISK)
+SLOT_INTERFACE_END
+
+ata_interface_device::ata_interface_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) :
+	device_t(mconfig, type, name, tag, owner, clock),
+	m_irq_handler(*this),
+	m_dmarq_handler(*this)
+{
+}
+
+
+const device_type ATA_INTERFACE = &device_creator<ata_interface_device>;
+
+ata_interface_device::ata_interface_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+	device_t(mconfig, ATA_INTERFACE, "ATA Interface", tag, owner, clock),
+	m_irq_handler(*this),
+	m_dmarq_handler(*this)
+{
+}
+
+//-------------------------------------------------
+//  device_start - device-specific startup
+//-------------------------------------------------
+
+void ata_interface_device::device_start()
+{
+	m_irq_handler.resolve_safe();
+	m_dmarq_handler.resolve_safe();
+
+	/* set MAME harddisk handle */
+	m_slot[0] = subdevice<ata_slot_device>("0");
+	m_slot[1] = subdevice<ata_slot_device>("1");
+
+	for (int i = 0; i < 2; i++)
+	{
+		m_irq[i] = 0;
+		m_dmarq[i] = 0;
+
+		ata_device_interface *dev = m_slot[i]->dev();
+		if (dev != NULL)
+		{
+			if (i == 0)
+			{
+				dev->m_irq_handler.set_callback(DEVCB2_DEVWRITELINE("^", ata_interface_device, irq0_write_line));
+				dev->m_dmarq_handler.set_callback(DEVCB2_DEVWRITELINE("^", ata_interface_device, dmarq0_write_line));
+			}
+			else
+			{
+				dev->m_irq_handler.set_callback(DEVCB2_DEVWRITELINE("^", ata_interface_device, irq1_write_line));
+				dev->m_dmarq_handler.set_callback(DEVCB2_DEVWRITELINE("^", ata_interface_device, dmarq1_write_line));
+			}
+
+			dev->write_csel(i);
+			dev->write_dasp(m_slot[1]->dev() != NULL);
+		}
+	}
+}
+
+//-------------------------------------------------
+//  device_reset - device-specific reset
+//-------------------------------------------------
+
+void ata_interface_device::device_reset()
+{
+	LOG(("ATA interface reset\n"));
+}
+
+
+
+//**************************************************************************
+//  ATA SLOT DEVICE
+//**************************************************************************
+
+// device type definition
+const device_type ATA_SLOT = &device_creator<ata_slot_device>;
+
+//-------------------------------------------------
+//  ata_slot_device - constructor
+//-------------------------------------------------
+
+ata_slot_device::ata_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+	: device_t(mconfig, ATA_SLOT, "ATA Connector", tag, owner, clock),
+		device_slot_interface(mconfig, *this),
+		m_dev(NULL)
+{
+}
+
+//-------------------------------------------------
+//  device_config_complete - perform any
+//  operations now that the configuration is
+//  complete
+//-------------------------------------------------
+
+void ata_slot_device::device_config_complete()
+{
+	m_dev = dynamic_cast<ata_device_interface *>(get_card_device());
+}
+
+//-------------------------------------------------
+//  device_start - device-specific startup
+//-------------------------------------------------
+
+void ata_slot_device::device_start()
+{
+}
--- a/src/emu/machine/ataintf.h
+++ b/src/emu/machine/ataintf.h
@ -0,0 +1,124 @@
+/***************************************************************************
+
+    ataintf.h
+
+    ATA Interface implementation.
+
+    Copyright Nicola Salmoria and the MAME Team.
+    Visit http://mamedev.org for licensing and usage restrictions.
+
+***************************************************************************/
+
+#pragma once
+
+#ifndef __ATAINTF_H__
+#define __ATAINTF_H__
+
+#include "atadev.h"
+
+/***************************************************************************
+    TYPE DEFINITIONS
+***************************************************************************/
+
+// ======================> ata_slot_device
+
+class ata_slot_device : public device_t,
+						public device_slot_interface
+{
+public:
+	// construction/destruction
+	ata_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+	ata_device_interface *dev() { return m_dev; }
+protected:
+	// device-level overrides
+	virtual void device_start();
+	virtual void device_config_complete();
+private:
+	ata_device_interface *m_dev;
+};
+
+// device type definition
+extern const device_type ATA_SLOT;
+
+/***************************************************************************
+    TYPE DEFINITIONS
+***************************************************************************/
+
+#define MCFG_ATA_INTERFACE_IRQ_HANDLER(_devcb) \
+	devcb = &ata_interface_device::set_irq_handler(*device, DEVCB2_##_devcb);
+
+#define MCFG_ATA_INTERFACE_DMARQ_HANDLER(_devcb) \
+	devcb = &ata_interface_device::set_dmarq_handler(*device, DEVCB2_##_devcb);
+
+SLOT_INTERFACE_EXTERN(ata_devices);
+
+/***************************************************************************
+    DEVICE CONFIGURATION MACROS
+***************************************************************************/
+
+#define MCFG_ATA_INTERFACE_ADD(_tag, _slotintf, _master, _slave, _fixed) \
+	MCFG_DEVICE_ADD(_tag, ATA_INTERFACE, 0) \
+	MCFG_ATA_SLOT_ADD(_tag ":0", _slotintf, _master, _fixed) \
+	MCFG_ATA_SLOT_ADD(_tag ":1", _slotintf, _slave, _fixed) \
+	MCFG_DEVICE_MODIFY(_tag)
+
+#define MCFG_ATA_SLOT_ADD(_tag, _slot_intf, _def_slot, _fixed) \
+	MCFG_DEVICE_ADD(_tag, ATA_SLOT, 0) \
+	MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, _fixed)
+
+/***************************************************************************
+    TYPE DEFINITIONS
+***************************************************************************/
+
+/* ----- device interface ----- */
+
+class ata_interface_device : public device_t
+{
+public:
+	ata_interface_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+	ata_interface_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
+
+	// static configuration helpers
+	template<class _Object> static devcb2_base &set_irq_handler(device_t &device, _Object object) { return downcast<ata_interface_device &>(device).m_irq_handler.set_callback(object); }
+	template<class _Object> static devcb2_base &set_dmarq_handler(device_t &device, _Object object) { return downcast<ata_interface_device &>(device).m_dmarq_handler.set_callback(object); }
+
+	UINT8 *identify_device_buffer(int drive);
+	void set_master_password(int drive, const UINT8 *password);
+	void set_user_password(int drive, const UINT8 *password);
+
+	UINT16 read_dma();
+	virtual DECLARE_READ16_MEMBER(read_cs0);
+	virtual DECLARE_READ16_MEMBER(read_cs1);
+
+	void write_dma(UINT16 data);
+	virtual DECLARE_WRITE16_MEMBER(write_cs0);
+	virtual DECLARE_WRITE16_MEMBER(write_cs1);
+	DECLARE_WRITE_LINE_MEMBER(write_dmack);
+
+protected:
+	// device-level overrides
+	virtual void device_start();
+	virtual void device_reset();
+
+	virtual void set_irq(int state);
+	virtual void set_dmarq(int state);
+
+private:
+	DECLARE_WRITE_LINE_MEMBER(irq0_write_line);
+	DECLARE_WRITE_LINE_MEMBER(dmarq0_write_line);
+
+	DECLARE_WRITE_LINE_MEMBER(irq1_write_line);
+	DECLARE_WRITE_LINE_MEMBER(dmarq1_write_line);
+
+	ata_slot_device *m_slot[2];
+	int m_irq[2];
+	int m_dmarq[2];
+
+	devcb2_write_line m_irq_handler;
+	devcb2_write_line m_dmarq_handler;
+};
+
+extern const device_type ATA_INTERFACE;
+
+#endif  /* __ATAINTF_H__ */
--- a/src/emu/machine/idectrl.c
+++ b/src/emu/machine/idectrl.c
@ -1,26 +1,25 @@
 /***************************************************************************

-    Generic (PC-style) IDE controller implementation
+    idectrl.c
+
+    Generic (PC-style) IDE controller implementation.
+
+    Copyright Nicola Salmoria and the MAME Team.
+    Visit http://mamedev.org for licensing and usage restrictions.

 ***************************************************************************/

-#include "emu.h"
 #include "idectrl.h"
-#include "debugger.h"
+

 /***************************************************************************
    DEBUGGING
 ***************************************************************************/

 #define VERBOSE                     0
-#define PRINTF_IDE_COMMANDS         0
-#define PRINTF_IDE_PASSWORD         0

 #define LOG(x)  do { if (VERBOSE) logerror x; } while (0)

-#define LOGPRINT(x) do { if (VERBOSE) logerror x; if (PRINTF_IDE_COMMANDS) mame_printf_debug x; } while (0)
-
-

 /***************************************************************************
    CONSTANTS
@ -30,113 +29,34 @@
 #define IDE_BANK2_CONFIG_REGISTER           8
 #define IDE_BANK2_CONFIG_DATA               0xc

+const device_type IDE_CONTROLLER = &device_creator<ide_controller_device>;

-void ide_controller_device::set_irq(int state)
+ide_controller_device::ide_controller_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+	ata_interface_device(mconfig, IDE_CONTROLLER, "IDE Controller", tag, owner, clock),
+	m_config_unknown(0),
+	m_config_register_num(0)
 {
-	if (state == ASSERT_LINE)
-		LOG(("IDE interrupt assert\n"));
-	else
-		LOG(("IDE interrupt clear\n"));
-
-	/* signal an interrupt */
-	m_irq_handler(state);
 }

-void ide_controller_device::set_dmarq(int state)
+ide_controller_device::ide_controller_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) :
+	ata_interface_device(mconfig, type, name, tag, owner, clock),
+	m_config_unknown(0),
+	m_config_register_num(0)
 {
-	m_dmarq_handler(state);
 }

-WRITE_LINE_MEMBER( ide_controller_device::irq0_write_line )
+//-------------------------------------------------
+//  device_start - device-specific startup
+//-------------------------------------------------
+
+void ide_controller_device::device_start()
 {
-	m_irq[0] = state;
+	ata_interface_device::device_start();

-	set_irq(m_irq[0] == ASSERT_LINE || m_irq[1] == ASSERT_LINE);
-}
-
-WRITE_LINE_MEMBER( ide_controller_device::irq1_write_line )
-{
-	m_irq[1] = state;
-
-	set_irq(m_irq[0] == ASSERT_LINE || m_irq[1] == ASSERT_LINE);
-}
-
-WRITE_LINE_MEMBER( ide_controller_device::dmarq0_write_line )
-{
-	m_dmarq[0] = state;
-
-	set_dmarq(m_dmarq[0] == ASSERT_LINE || m_dmarq[1] == ASSERT_LINE);
-}
-
-WRITE_LINE_MEMBER( ide_controller_device::dmarq1_write_line )
-{
-	m_dmarq[1] = state;
-
-	set_dmarq(m_dmarq[0] == ASSERT_LINE || m_dmarq[1] == ASSERT_LINE);
-}
-
-
-/***************************************************************************
-    INITIALIZATION AND RESET
-***************************************************************************/
-
-UINT8 *ide_controller_device::identify_device_buffer(int _drive)
-{
-	return m_slot[_drive]->dev()->identify_device_buffer();
-}
-
-void ide_controller_device::ide_set_master_password(int _drive, const UINT8 *password)
-{
-	m_slot[_drive]->dev()->m_master_password = password;
-	m_slot[_drive]->dev()->m_master_password_enable = (password != NULL);
-}
-
-
-void ide_controller_device::ide_set_user_password(int _drive, const UINT8 *password)
-{
-	m_slot[_drive]->dev()->m_user_password = password;
-	m_slot[_drive]->dev()->m_user_password_enable = (password != NULL);
-}
-
-/*************************************
- *
- *  IDE controller read
- *
- *************************************/
-
-UINT16 ide_controller_device::read_dma()
-{
-	UINT16 result = 0xffff;
-	for (int i = 0; i < 2; i++)
-		if (m_slot[i]->dev() != NULL)
-			result &= m_slot[i]->dev()->read_dma();
-
-//  printf( "read_dma %04x\n", result );
-	return result;
-}
-
-READ16_MEMBER( ide_controller_device::read_cs0 )
-{
-	UINT16 result = mem_mask;
-	for (int i = 0; i < 2; i++)
-		if (m_slot[i]->dev() != NULL)
-			result &= m_slot[i]->dev()->read_cs0(space, offset, mem_mask);
-
-//  printf( "read cs0 %04x %04x %04x\n", offset, result, mem_mask );
-
-	return result;
-}
-
-READ16_MEMBER( ide_controller_device::read_cs1 )
-{
-	UINT16 result = mem_mask;
-	for (int i = 0; i < 2; i++)
-		if (m_slot[i]->dev() != NULL)
-			result &= m_slot[i]->dev()->read_cs1(space, offset, mem_mask);
-
-//  printf( "read cs1 %04x %04x %04x\n", offset, result, mem_mask );
-
-	return result;
+	/* register ide states */
+	save_item(NAME(m_config_unknown));
+	save_item(NAME(m_config_register));
+	save_item(NAME(m_config_register_num));
 }

 READ8_MEMBER( ide_controller_device::read_via_config )
@ -173,74 +93,31 @@ READ8_MEMBER( ide_controller_device::read_via_config )
 	return result;
 }

-READ16_MEMBER( ide_controller_device::read_cs0_pc )
+READ16_MEMBER( ide_controller_device::read_cs0 )
 {
 	if (mem_mask == 0xffff && offset == 1 ) offset = 0; // hack for 32 bit read of data register
 	if (mem_mask == 0xff00)
 	{
-		return read_cs0(space, (offset * 2) + 1, 0xff) << 8;
+		return ata_interface_device::read_cs0(space, (offset * 2) + 1, 0xff) << 8;
 	}
 	else
 	{
-		return read_cs0(space, offset * 2, mem_mask);
+		return ata_interface_device::read_cs0(space, offset * 2, mem_mask);
 	}
 }

-READ16_MEMBER( ide_controller_device::read_cs1_pc )
+READ16_MEMBER( ide_controller_device::read_cs1 )
 {
 	if (mem_mask == 0xff00)
 	{
-		return read_cs1(space, (offset * 2) + 1, 0xff) << 8;
+		return ata_interface_device::read_cs1(space, (offset * 2) + 1, 0xff) << 8;
 	}
 	else
 	{
-		return read_cs1(space, offset * 2, mem_mask);
+		return ata_interface_device::read_cs1(space, offset * 2, mem_mask);
 	}
 }

-
-/*************************************
- *
- *  IDE controller write
- *
- *************************************/
-
-void ide_controller_device::write_dma( UINT16 data )
-{
-//  printf( "write_dma %04x\n", data );
-
-	for (int i = 0; i < 2; i++)
-		if (m_slot[i]->dev() != NULL)
-			m_slot[i]->dev()->write_dma(data);
-}
-
-WRITE16_MEMBER( ide_controller_device::write_cs0 )
-{
-//  printf( "write cs0 %04x %04x %04x\n", offset, data, mem_mask );
-
-	for (int i = 0; i < 2; i++)
-		if (m_slot[i]->dev() != NULL)
-			m_slot[i]->dev()->write_cs0(space, offset, data, mem_mask);
-}
-
-WRITE16_MEMBER( ide_controller_device::write_cs1 )
-{
-//  printf( "write cs1 %04x %04x %04x\n", offset, data, mem_mask );
-
-	for (int i = 0; i < 2; i++)
-		if (m_slot[i]->dev() != NULL)
-			m_slot[i]->dev()->write_cs1(space, offset, data, mem_mask);
-}
-
-WRITE_LINE_MEMBER( ide_controller_device::write_dmack )
-{
-//  printf( "write_dmack %04x\n", state );
-
-	for (int i = 0; i < 2; i++)
-		if (m_slot[i]->dev() != NULL)
-			m_slot[i]->dev()->write_dmack(state);
-}
-
 WRITE8_MEMBER( ide_controller_device::write_via_config )
 {
 //  printf( "write via config %04x %04x %04x\n", offset, data, mem_mask );
@ -268,149 +145,31 @@ WRITE8_MEMBER( ide_controller_device::write_via_config )
 	}
 }

-WRITE16_MEMBER( ide_controller_device::write_cs0_pc )
+WRITE16_MEMBER( ide_controller_device::write_cs0 )
 {
 	if (mem_mask == 0xffff && offset == 1 ) offset = 0; // hack for 32 bit write to data register
 	if (mem_mask == 0xff00)
 	{
-		return write_cs0(space, (offset * 2) + 1, data >> 8, 0xff);
+		return ata_interface_device::write_cs0(space, (offset * 2) + 1, data >> 8, 0xff);
 	}
 	else
 	{
-		return write_cs0(space, offset * 2, data, mem_mask);
+		return ata_interface_device::write_cs0(space, offset * 2, data, mem_mask);
 	}
 }

-WRITE16_MEMBER( ide_controller_device::write_cs1_pc )
+WRITE16_MEMBER( ide_controller_device::write_cs1 )
 {
 	if (mem_mask == 0xff00)
 	{
-		return write_cs1(space, (offset * 2) + 1, data >> 8, 0xff);
+		return ata_interface_device::write_cs1(space, (offset * 2) + 1, data >> 8, 0xff);
 	}
 	else
 	{
-		return write_cs1(space, offset * 2, data, mem_mask);
+		return ata_interface_device::write_cs1(space, offset * 2, data, mem_mask);
 	}
 }

-SLOT_INTERFACE_START(ide_devices)
-	SLOT_INTERFACE("hdd", IDE_HARDDISK)
-SLOT_INTERFACE_END
-
-ide_controller_device::ide_controller_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) :
-	device_t(mconfig, type, name, tag, owner, clock),
-	m_config_unknown(0),
-	m_config_register_num(0),
-	m_irq_handler(*this),
-	m_dmarq_handler(*this)
-{
-}
-
-
-const device_type IDE_CONTROLLER = &device_creator<ide_controller_device>;
-
-ide_controller_device::ide_controller_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
-	device_t(mconfig, IDE_CONTROLLER, "IDE Controller", tag, owner, clock),
-	m_config_unknown(0),
-	m_config_register_num(0),
-	m_irq_handler(*this),
-	m_dmarq_handler(*this)
-{
-}
-
-//-------------------------------------------------
-//  device_start - device-specific startup
-//-------------------------------------------------
-
-void ide_controller_device::device_start()
-{
-	m_irq_handler.resolve_safe();
-	m_dmarq_handler.resolve_safe();
-
-	/* set MAME harddisk handle */
-	m_slot[0] = subdevice<ide_slot_device>("0");
-	m_slot[1] = subdevice<ide_slot_device>("1");
-
-	for (int i = 0; i < 2; i++)
-	{
-		m_irq[i] = 0;
-		m_dmarq[i] = 0;
-
-		ide_device_interface *dev = m_slot[i]->dev();
-		if (dev != NULL)
-		{
-			if (i == 0)
-			{
-				dev->m_irq_handler.set_callback(DEVCB2_DEVWRITELINE("^", ide_controller_device, irq0_write_line));
-				dev->m_dmarq_handler.set_callback(DEVCB2_DEVWRITELINE("^", ide_controller_device, dmarq0_write_line));
-			}
-			else
-			{
-				dev->m_irq_handler.set_callback(DEVCB2_DEVWRITELINE("^", ide_controller_device, irq1_write_line));
-				dev->m_dmarq_handler.set_callback(DEVCB2_DEVWRITELINE("^", ide_controller_device, dmarq1_write_line));
-			}
-
-			dev->write_csel(i);
-			dev->write_dasp(m_slot[1]->dev() != NULL);
-		}
-	}
-
-	/* register ide states */
-	save_item(NAME(m_config_unknown));
-	save_item(NAME(m_config_register));
-	save_item(NAME(m_config_register_num));
-}
-
-//-------------------------------------------------
-//  device_reset - device-specific reset
-//-------------------------------------------------
-
-void ide_controller_device::device_reset()
-{
-	LOG(("IDE controller reset performed\n"));
-}
-
-
-
-//**************************************************************************
-//  IDE SLOT DEVICE
-//**************************************************************************
-
-// device type definition
-const device_type IDE_SLOT = &device_creator<ide_slot_device>;
-
-//-------------------------------------------------
-//  ide_slot_device - constructor
-//-------------------------------------------------
-
-ide_slot_device::ide_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
-	: device_t(mconfig, IDE_SLOT, "IDE Connector", tag, owner, clock),
-		device_slot_interface(mconfig, *this),
-		m_dev(NULL)
-{
-}
-
-//-------------------------------------------------
-//  device_config_complete - perform any
-//  operations now that the configuration is
-//  complete
-//-------------------------------------------------
-
-void ide_slot_device::device_config_complete()
-{
-	m_dev = dynamic_cast<ide_device_interface *>(get_card_device());
-}
-
-//-------------------------------------------------
-//  device_start - device-specific startup
-//-------------------------------------------------
-
-void ide_slot_device::device_start()
-{
-}
-
-
-
 #define IDE_BUSMASTER_STATUS_ACTIVE         0x01
 #define IDE_BUSMASTER_STATUS_ERROR          0x02
 #define IDE_BUSMASTER_STATUS_IRQ            0x04
@ -459,7 +218,7 @@ void bus_master_ide_controller_device::device_start()

 void bus_master_ide_controller_device::set_irq(int state)
 {
-	ide_controller_device::set_irq(state);
+	ata_interface_device::set_irq(state);

 	if (m_irq != state)
 	{
@ -472,7 +231,7 @@ void bus_master_ide_controller_device::set_irq(int state)

 void bus_master_ide_controller_device::set_dmarq(int state)
 {
-	ide_controller_device::set_dmarq(state);
+	ata_interface_device::set_dmarq(state);

 	if (m_dmarq != state)
 	{
--- a/src/emu/machine/idectrl.h
+++ b/src/emu/machine/idectrl.h
@ -14,46 +14,7 @@
 #ifndef __IDECTRL_H__
 #define __IDECTRL_H__

-#include "idehd.h"
-#include "harddisk.h"
-
-/***************************************************************************
-    TYPE DEFINITIONS
-***************************************************************************/
-
-// ======================> ide_slot_device
-
-class ide_slot_device : public device_t,
-						public device_slot_interface
-{
-public:
-	// construction/destruction
-	ide_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
-	ide_device_interface *dev() { return m_dev; }
-protected:
-	// device-level overrides
-	virtual void device_start();
-	virtual void device_config_complete();
-private:
-	ide_device_interface *m_dev;
-};
-
-// device type definition
-extern const device_type IDE_SLOT;
-
-/***************************************************************************
-    TYPE DEFINITIONS
-***************************************************************************/
-
-#define MCFG_IDE_CONTROLLER_IRQ_HANDLER(_devcb) \
-	devcb = &ide_controller_device::set_irq_handler(*device, DEVCB2_##_devcb);
-
-#define MCFG_IDE_CONTROLLER_DMARQ_HANDLER(_devcb) \
-	devcb = &ide_controller_device::set_dmarq_handler(*device, DEVCB2_##_devcb);
-
-SLOT_INTERFACE_EXTERN(ide_devices);
-SLOT_INTERFACE_EXTERN(ide_devices);
+#include "ataintf.h"

 /***************************************************************************
    DEVICE CONFIGURATION MACROS
@ -61,77 +22,32 @@ SLOT_INTERFACE_EXTERN(ide_devices);

 #define MCFG_IDE_CONTROLLER_ADD(_tag, _slotintf, _master, _slave, _fixed) \
 	MCFG_DEVICE_ADD(_tag, IDE_CONTROLLER, 0) \
-	MCFG_IDE_SLOT_ADD(_tag ":0", _slotintf, _master, _fixed) \
-	MCFG_IDE_SLOT_ADD(_tag ":1", _slotintf, _slave, _fixed) \
+	MCFG_ATA_SLOT_ADD(_tag ":0", _slotintf, _master, _fixed) \
+	MCFG_ATA_SLOT_ADD(_tag ":1", _slotintf, _slave, _fixed) \
 	MCFG_DEVICE_MODIFY(_tag)

-#define MCFG_IDE_SLOT_ADD(_tag, _slot_intf, _def_slot, _fixed) \
-	MCFG_DEVICE_ADD(_tag, IDE_SLOT, 0) \
-	MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, _fixed)
-
-/***************************************************************************
-    TYPE DEFINITIONS
-***************************************************************************/
-
 #define IDE_CONFIG_REGISTERS                0x10

-/* ----- device interface ----- */
-
-class ide_controller_device : public device_t
+class ide_controller_device : public ata_interface_device
 {
 public:
 	ide_controller_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
 	ide_controller_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);

-	// static configuration helpers
-	template<class _Object> static devcb2_base &set_irq_handler(device_t &device, _Object object) { return downcast<ide_controller_device &>(device).m_irq_handler.set_callback(object); }
-	template<class _Object> static devcb2_base &set_dmarq_handler(device_t &device, _Object object) { return downcast<ide_controller_device &>(device).m_dmarq_handler.set_callback(object); }
-
-	UINT8 *identify_device_buffer(int drive);
-	void ide_set_master_password(int drive, const UINT8 *password);
-	void ide_set_user_password(int drive, const UINT8 *password);
-
-	UINT16 read_dma();
-	DECLARE_READ16_MEMBER(read_cs0);
-	DECLARE_READ16_MEMBER(read_cs1);
-
-	void write_dma(UINT16 data);
-	DECLARE_WRITE16_MEMBER(write_cs0);
-	DECLARE_WRITE16_MEMBER(write_cs1);
-	DECLARE_WRITE_LINE_MEMBER(write_dmack);
-
 	DECLARE_READ8_MEMBER(read_via_config);
 	DECLARE_WRITE8_MEMBER(write_via_config);
-	DECLARE_READ16_MEMBER(read_cs0_pc);
-	DECLARE_READ16_MEMBER(read_cs1_pc);
-	DECLARE_WRITE16_MEMBER(write_cs0_pc);
-	DECLARE_WRITE16_MEMBER(write_cs1_pc);
+	virtual DECLARE_READ16_MEMBER(read_cs0);
+	virtual DECLARE_READ16_MEMBER(read_cs1);
+	virtual DECLARE_WRITE16_MEMBER(write_cs0);
+	virtual DECLARE_WRITE16_MEMBER(write_cs1);

 protected:
-	// device-level overrides
 	virtual void device_start();
-	virtual void device_reset();
-
-	virtual void set_irq(int state);
-	virtual void set_dmarq(int state);

 private:
-	DECLARE_WRITE_LINE_MEMBER(irq0_write_line);
-	DECLARE_WRITE_LINE_MEMBER(dmarq0_write_line);
-
-	DECLARE_WRITE_LINE_MEMBER(irq1_write_line);
-	DECLARE_WRITE_LINE_MEMBER(dmarq1_write_line);
-
 	UINT8           m_config_unknown;
 	UINT8           m_config_register[IDE_CONFIG_REGISTERS];
 	UINT8           m_config_register_num;
-
-	ide_slot_device *m_slot[2];
-	int m_irq[2];
-	int m_dmarq[2];
-
-	devcb2_write_line m_irq_handler;
-	devcb2_write_line m_dmarq_handler;
 };

 extern const device_type IDE_CONTROLLER;
@ -139,8 +55,8 @@ extern const device_type IDE_CONTROLLER;

 #define MCFG_BUS_MASTER_IDE_CONTROLLER_ADD(_tag, _slotintf, _master, _slave, _fixed) \
 	MCFG_DEVICE_ADD(_tag, BUS_MASTER_IDE_CONTROLLER, 0) \
-	MCFG_IDE_SLOT_ADD(_tag ":0", _slotintf, _master, _fixed) \
-	MCFG_IDE_SLOT_ADD(_tag ":1", _slotintf, _slave, _fixed) \
+	MCFG_ATA_SLOT_ADD(_tag ":0", _slotintf, _master, _fixed) \
+	MCFG_ATA_SLOT_ADD(_tag ":1", _slotintf, _slave, _fixed) \
 	MCFG_DEVICE_MODIFY(_tag)

 #define MCFG_BUS_MASTER_IDE_CONTROLLER_SPACE(bmcpu, bmspace) \
--- a/src/emu/machine/idehd.c
+++ b/src/emu/machine/idehd.c
@ -48,7 +48,7 @@
 #define IDE_COMMAND_IDENTIFY_DEVICE         0xec
 #define IDE_COMMAND_SET_FEATURES            0xef
 #define IDE_COMMAND_SECURITY_UNLOCK         0xf2
-#define IDE_COMMAND_UNKNOWN_F9              0xf9
+#define IDE_COMMAND_SET_MAX              0xf9
 #define IDE_COMMAND_VERIFY_SECTORS          0x40
 #define IDE_COMMAND_VERIFY_SECTORS_NORETRY  0x41
 #define IDE_COMMAND_ATAPI_IDENTIFY          0xa1
@ -70,25 +70,9 @@ enum
 	TID_WRITE_SECTOR_DONE_CALLBACK
 };

-//**************************************************************************
-//  IDE DEVICE INTERFACE
-//**************************************************************************
-
-//-------------------------------------------------
-//  ide_device_interface - constructor
-//-------------------------------------------------
-
-ide_device_interface::ide_device_interface(const machine_config &mconfig, device_t &device) :
-	m_master_password(NULL),
-	m_user_password(NULL),
-	m_irq_handler(device),
-	m_dmarq_handler(device)
-{
-}
-
-ide_mass_storage_device::ide_mass_storage_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock,const char *shortname, const char *source)
+ata_mass_storage_device::ata_mass_storage_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock,const char *shortname, const char *source)
 	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
-	ide_device_interface(mconfig, *this),
+	ata_device_interface(mconfig, *this),
 	device_slot_card_interface(mconfig, *this),
 	m_csel(0),
 	m_dasp(0),
@ -98,7 +82,7 @@ ide_mass_storage_device::ide_mass_storage_device(const machine_config &mconfig,
 {
 }

-void ide_mass_storage_device::update_irq()
+void ata_mass_storage_device::update_irq()
 {
 	if (device_selected() && (m_device_control & IDE_DEVICE_CONTROL_NIEN) == 0)
 		m_irq_handler(m_irq);
@ -106,7 +90,7 @@ void ide_mass_storage_device::update_irq()
 		m_irq_handler(CLEAR_LINE);
 }

-void ide_mass_storage_device::set_irq(int state)
+void ata_mass_storage_device::set_irq(int state)
 {
 	if (m_irq != state)
 	{
@ -121,7 +105,7 @@ void ide_mass_storage_device::set_irq(int state)
 	}
 }

-void ide_mass_storage_device::set_dmarq(int state)
+void ata_mass_storage_device::set_dmarq(int state)
 {
 	if (m_dmarq != state)
 	{
@ -131,17 +115,17 @@ void ide_mass_storage_device::set_dmarq(int state)
 	}
 }

-WRITE_LINE_MEMBER( ide_mass_storage_device::write_csel )
+WRITE_LINE_MEMBER( ata_mass_storage_device::write_csel )
 {
 	m_csel = state;
 }

-WRITE_LINE_MEMBER( ide_mass_storage_device::write_dasp )
+WRITE_LINE_MEMBER( ata_mass_storage_device::write_dasp )
 {
 	m_dasp = state;
 }

-WRITE_LINE_MEMBER( ide_mass_storage_device::write_dmack )
+WRITE_LINE_MEMBER( ata_mass_storage_device::write_dmack )
 {
 	m_dmack = state;
 }
@ -152,7 +136,7 @@ WRITE_LINE_MEMBER( ide_mass_storage_device::write_dmack )
 *
 *************************************/

-UINT32 ide_mass_storage_device::lba_address()
+UINT32 ata_mass_storage_device::lba_address()
 {
 	/* LBA direct? */
 	if (m_device_head & IDE_DEVICE_HEAD_L)
@ -183,7 +167,7 @@ static void swap_strncpy(UINT8 *dst, const char *src, int field_size_in_words)
 }


-void ide_mass_storage_device::ide_build_identify_device()
+void ata_mass_storage_device::ide_build_identify_device()
 {
 	memset(m_identify_device, 0, IDE_DISK_SECTOR_SIZE);
 	int total_sectors = m_num_cylinders * m_num_heads * m_num_sectors;
@ -343,7 +327,7 @@ void ide_mass_storage_device::ide_build_identify_device()
 //  device_start - device-specific startup
 //-------------------------------------------------

-void ide_mass_storage_device::device_start()
+void ata_mass_storage_device::device_start()
 {
 	m_irq_handler.resolve_safe();
 	m_dmarq_handler.resolve_safe();
@ -376,7 +360,7 @@ void ide_mass_storage_device::device_start()
 	m_reset_timer = timer_alloc(TID_RESET_CALLBACK);
 }

-void ide_mass_storage_device::device_reset()
+void ata_mass_storage_device::device_reset()
 {
 	m_buffer_offset = 0;
 	m_master_password_enable = (m_master_password != NULL);
@ -405,7 +389,7 @@ void ide_mass_storage_device::device_reset()
 	set_dmarq(CLEAR_LINE);
 }

-void ide_mass_storage_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
+void ata_mass_storage_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
 {
 	switch(id)
 	{
@ -442,7 +426,7 @@ void ide_mass_storage_device::device_timer(emu_timer &timer, device_timer_id id,
 *
 *************************************/

-void ide_mass_storage_device::next_sector()
+void ata_mass_storage_device::next_sector()
 {
 	UINT8 cur_head = m_device_head & IDE_DEVICE_HEAD_HS;

@ -495,7 +479,7 @@ void ide_mass_storage_device::next_sector()
 *
 *************************************/

-void ide_mass_storage_device::security_error()
+void ata_mass_storage_device::security_error()
 {
 	/* set error state */
 	m_status |= IDE_STATUS_ERR;
@ -511,7 +495,7 @@ void ide_mass_storage_device::security_error()
 *
 *************************************/

-void ide_mass_storage_device::read_buffer_empty()
+void ata_mass_storage_device::read_buffer_empty()
 {
 	/* reset the totals */
 	m_buffer_offset = 0;
@ -522,7 +506,7 @@ void ide_mass_storage_device::read_buffer_empty()
 	fill_buffer();
 }

-void ide_mass_storage_device::fill_buffer()
+void ata_mass_storage_device::fill_buffer()
 {
 	switch (m_command)
 	{
@ -548,7 +532,7 @@ void ide_mass_storage_device::fill_buffer()
 }


-void ide_mass_storage_device::read_sector_done()
+void ata_mass_storage_device::read_sector_done()
 {
 	int lba = lba_address(), count = 0;

@ -600,7 +584,7 @@ void ide_mass_storage_device::read_sector_done()
 }


-void ide_mass_storage_device::read_first_sector()
+void ata_mass_storage_device::read_first_sector()
 {
 	/* mark ourselves busy */
 	m_status |= IDE_STATUS_BSY;
@ -624,7 +608,7 @@ void ide_mass_storage_device::read_first_sector()
 }


-void ide_mass_storage_device::read_next_sector()
+void ata_mass_storage_device::read_next_sector()
 {
 	/* mark ourselves busy */
 	m_status |= IDE_STATUS_BSY;
@ -651,7 +635,7 @@ void ide_mass_storage_device::read_next_sector()
 *
 *************************************/

-void ide_mass_storage_device::continue_write()
+void ata_mass_storage_device::continue_write()
 {
 	/* reset the totals */
 	m_buffer_offset = 0;
@ -680,7 +664,7 @@ void ide_mass_storage_device::continue_write()
 }


-void ide_mass_storage_device::write_buffer_full()
+void ata_mass_storage_device::write_buffer_full()
 {
 	m_status &= ~IDE_STATUS_DRQ;
 	set_dmarq(CLEAR_LINE);
@ -688,7 +672,7 @@ void ide_mass_storage_device::write_buffer_full()
 	process_buffer();
 }

-void ide_mass_storage_device::process_buffer()
+void ata_mass_storage_device::process_buffer()
 {
 	if (m_command == IDE_COMMAND_SECURITY_UNLOCK)
 	{
@ -727,7 +711,7 @@ void ide_mass_storage_device::process_buffer()
 }


-void ide_mass_storage_device::write_sector_done()
+void ata_mass_storage_device::write_sector_done()
 {
 	int lba = lba_address(), count = 0;

@ -783,7 +767,7 @@ void ide_mass_storage_device::write_sector_done()
 *
 *************************************/

-bool ide_mass_storage_device::process_command()
+bool ata_mass_storage_device::process_command()
 {
 	switch (m_command)
 	{
@ -923,9 +907,8 @@ bool ide_mass_storage_device::process_command()
 		timer_set(MINIMUM_COMMAND_TIME, TID_DELAYED_INTERRUPT);
 		return true;

-	case IDE_COMMAND_UNKNOWN_F9:
-		/* only used by Killer Instinct AFAICT */
-		LOGPRINT(("IDE unknown command (F9)\n"));
+	case IDE_COMMAND_SET_MAX:
+		LOGPRINT(("IDE Set max (%02X %02X %02X %02X %02X)\n", m_feature, m_sector_count & 0xff, m_sector_number, m_cylinder_low, m_cylinder_high));

 		/* signal an interrupt */
 		set_irq(ASSERT_LINE);
@ -957,7 +940,7 @@ bool ide_mass_storage_device::process_command()
 	}
 }

-UINT16 ide_mass_storage_device::read_dma()
+UINT16 ata_mass_storage_device::read_dma()
 {
 	UINT16 result = 0xffff;

@ -995,7 +978,7 @@ UINT16 ide_mass_storage_device::read_dma()
 	return result;
 }

-READ16_MEMBER( ide_mass_storage_device::read_cs0 )
+READ16_MEMBER( ata_mass_storage_device::read_cs0 )
 {
 	/* logit */
 //  if (offset != IDE_CS0_DATA_RW && offset != IDE_CS0_STATUS_R)
@ -1131,7 +1114,7 @@ READ16_MEMBER( ide_mass_storage_device::read_cs0 )
 	return result;
 }

-READ16_MEMBER( ide_mass_storage_device::read_cs1 )
+READ16_MEMBER( ata_mass_storage_device::read_cs1 )
 {
 	/* logit */
 //  if (offset != IDE_CS1_ALTERNATE_STATUS_R)
@ -1178,7 +1161,7 @@ READ16_MEMBER( ide_mass_storage_device::read_cs1 )
 	return result;
 }

-void ide_mass_storage_device::write_dma( UINT16 data )
+void ata_mass_storage_device::write_dma( UINT16 data )
 {
 	if (device_selected())
 	{
@ -1213,7 +1196,7 @@ void ide_mass_storage_device::write_dma( UINT16 data )
 	}
 }

-WRITE16_MEMBER( ide_mass_storage_device::write_cs0 )
+WRITE16_MEMBER( ata_mass_storage_device::write_cs0 )
 {
 	/* logit */
 	if (offset != IDE_CS0_DATA_RW)
@ -1327,7 +1310,7 @@ WRITE16_MEMBER( ide_mass_storage_device::write_cs0 )
 	}
 }

-WRITE16_MEMBER( ide_mass_storage_device::write_cs1 )
+WRITE16_MEMBER( ata_mass_storage_device::write_cs1 )
 {
 	/* logit */
 	LOG(("%s:IDE cs1 write to %X = %08X, mem_mask=%d\n", machine().describe_context(), offset, data, mem_mask));
@ -1376,12 +1359,14 @@ const device_type IDE_HARDDISK = &device_creator<ide_hdd_device>;
 //-------------------------------------------------

 ide_hdd_device::ide_hdd_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
-	: ide_mass_storage_device(mconfig, IDE_HARDDISK, "IDE Hard Disk", tag, owner, clock, "hdd", __FILE__)
+	: ata_mass_storage_device(mconfig, IDE_HARDDISK, "IDE Hard Disk", tag, owner, clock, "hdd", __FILE__),
+	m_image(*this, "image")
 {
 }

 ide_hdd_device::ide_hdd_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
-	: ide_mass_storage_device(mconfig, type, name, tag, owner, clock, shortname, source)
+	: ata_mass_storage_device(mconfig, type, name, tag, owner, clock, shortname, source),
+	m_image(*this, "image")
 {
 }

@ -1391,19 +1376,10 @@ ide_hdd_device::ide_hdd_device(const machine_config &mconfig, device_type type,

 void ide_hdd_device::device_reset()
 {
-	m_handle = subdevice<harddisk_image_device>("harddisk")->get_chd_file();
+	ata_mass_storage_device::device_reset();

-	if (m_handle)
-	{
-		m_disk = subdevice<harddisk_image_device>("harddisk")->get_hard_disk_file();
-	}
-	else
-	{
-		m_handle = get_disk_handle(machine(), tag());
-		m_disk = hard_disk_open(m_handle);
-	}
-
-	ide_mass_storage_device::device_reset();
+	m_handle = m_image->get_chd_file();
+	m_disk = m_image->get_hard_disk_file();

 	if (m_disk != NULL)
 	{
@ -1416,6 +1392,7 @@ void ide_hdd_device::device_reset()
 			if (PRINTF_IDE_COMMANDS) mame_printf_debug("CHS: %d %d %d\n", m_num_cylinders, m_num_heads, m_num_sectors);
 			mame_printf_debug("CHS: %d %d %d\n", m_num_cylinders, m_num_heads, m_num_sectors);
 		}
+
 		// build the features page
 		UINT32 metalength;
 		if (m_handle->read_metadata (HARD_DISK_IDENT_METADATA_TAG, 0, m_identify_device, IDE_DISK_SECTOR_SIZE, metalength) != CHDERR_NONE)
@ -1430,7 +1407,7 @@ void ide_hdd_device::device_reset()
 //  machine configurations
 //-------------------------------------------------
 static MACHINE_CONFIG_FRAGMENT( hdd_image )
-	MCFG_HARDDISK_ADD( "harddisk" )
+	MCFG_HARDDISK_ADD( "image" )
 MACHINE_CONFIG_END

 machine_config_constructor ide_hdd_device::device_mconfig_additions() const
--- a/src/emu/machine/idehd.h
+++ b/src/emu/machine/idehd.h
@ -1,4 +1,6 @@
 #include "emu.h"
+#include "atadev.h"
+#include "harddisk.h"
 #include "imagedev/harddriv.h"

 #define IDE_DISK_SECTOR_SIZE            512
@ -42,43 +44,12 @@
 #define IDE_DEVICE_HEAD_DRV  0x10
 #define IDE_DEVICE_HEAD_L    0x40

-// ======================> ide_device_interface
-
-class ide_device_interface
-{
-public:
-	ide_device_interface(const machine_config &mconfig, device_t &device);
-	virtual ~ide_device_interface() {}
-
-	virtual UINT16 read_dma() = 0;
-	virtual DECLARE_READ16_MEMBER(read_cs0) = 0;
-	virtual DECLARE_READ16_MEMBER(read_cs1) = 0;
-
-	virtual void write_dma(UINT16 data) = 0;
-	virtual DECLARE_WRITE16_MEMBER(write_cs0) = 0;
-	virtual DECLARE_WRITE16_MEMBER(write_cs1) = 0;
-	virtual DECLARE_WRITE_LINE_MEMBER(write_dmack) = 0;
-	virtual DECLARE_WRITE_LINE_MEMBER(write_csel) = 0;
-	virtual DECLARE_WRITE_LINE_MEMBER(write_dasp) = 0;
-
-	virtual bool is_ready() { return true; }
-	virtual UINT8 *identify_device_buffer() = 0;
-
-	UINT8           m_master_password_enable;
-	UINT8           m_user_password_enable;
-	const UINT8 *   m_master_password;
-	const UINT8 *   m_user_password;
-
-	devcb2_write_line m_irq_handler;
-	devcb2_write_line m_dmarq_handler;
-};
-
-class ide_mass_storage_device : public device_t,
-	public ide_device_interface,
+class ata_mass_storage_device : public device_t,
+	public ata_device_interface,
 	public device_slot_card_interface
 {
 public:
-	ide_mass_storage_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock,const char *shortname = "", const char *source = __FILE__);
+	ata_mass_storage_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock,const char *shortname = "", const char *source = __FILE__);

 	virtual UINT16 read_dma();
 	virtual DECLARE_READ16_MEMBER(read_cs0);
@ -98,6 +69,7 @@ protected:
 	virtual void device_reset();
 	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);

+	virtual bool is_ready() { return true; }
 	virtual int read_sector(UINT32 lba, void *buffer) = 0;
 	virtual int write_sector(UINT32 lba, const void *buffer) = 0;

@ -163,7 +135,7 @@ private:

 // ======================> ide_hdd_device

-class ide_hdd_device : public ide_mass_storage_device
+class ide_hdd_device : public ata_mass_storage_device
 {
 public:
 	// construction/destruction
@ -182,6 +154,9 @@ protected:

 	chd_file       *m_handle;
 	hard_disk_file *m_disk;
+
+private:
+	required_device<harddisk_image_device> m_image;
 };

 // device type definition
--- a/src/emu/machine/machine.mak
+++ b/src/emu/machine/machine.mak
@ -473,6 +473,8 @@ endif
 #-------------------------------------------------

 ifneq ($(filter IDE,$(MACHINES)),)
+MACHINEOBJS += $(MACHINEOBJ)/ataintf.o
+MACHINEOBJS += $(MACHINEOBJ)/atadev.o
 MACHINEOBJS += $(MACHINEOBJ)/idectrl.o
 MACHINEOBJS += $(MACHINEOBJ)/idehd.o
 endif
--- a/src/mame/drivers/atlantis.c
+++ b/src/mame/drivers/atlantis.c
@ -142,7 +142,7 @@ static MACHINE_CONFIG_START( mwskins, atlantis_state )
 	MCFG_CPU_PROGRAM_MAP(main_map)


-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)

 	/* video hardware */
 	MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
@ -173,7 +173,7 @@ ROM_START( mwskins )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* 512k for R4310 code */
 	ROM_LOAD( "skins_game_u4_boot_1.00.u4", 0x000000, 0x080000, CRC(0fe87720) SHA1(4b24abbe662a2d7b61e6a3f079e28b73605ba19f) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "mwskins", 0, SHA1(5cb293a6fdb2478293f48ddfc93cdd018acb2bb5) )
 ROM_END

@ -181,7 +181,7 @@ ROM_START( mwskinsa )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* 512k for R4310 code */
 	ROM_LOAD( "skins_game_u4_boot_1.00.u4", 0x000000, 0x080000, CRC(0fe87720) SHA1(4b24abbe662a2d7b61e6a3f079e28b73605ba19f) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "mwskinsa", 0, SHA1(72497917b31156eb11a46bbcc6f22a254dcec044) )
 ROM_END

@ -189,7 +189,7 @@ ROM_START( mwskinso )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* 512k for R4310 code */
 	ROM_LOAD( "skins_game_u4_boot_1.00.u4", 0x000000, 0x080000, CRC(0fe87720) SHA1(4b24abbe662a2d7b61e6a3f079e28b73605ba19f) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "mwskins104", 0, SHA1(6917f66718999c144c854795c5856bf5659b85fa) )
 ROM_END

--- a/src/mame/drivers/calchase.c
+++ b/src/mame/drivers/calchase.c
@ -409,7 +409,7 @@ static ADDRESS_MAP_START( calchase_io, AS_IO, 32, calchase_state )
 	//AM_RANGE(0x00e8, 0x00eb) AM_NOP
 	AM_RANGE(0x00e8, 0x00ef) AM_NOP //AMI BIOS write to this ports as delays between I/O ports operations sending al value -> NEWIODELAY
 	AM_RANGE(0x0170, 0x0177) AM_NOP //To debug
-	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
+	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff)
 	AM_RANGE(0x0200, 0x021f) AM_NOP //To debug
 	AM_RANGE(0x0260, 0x026f) AM_NOP //To debug
 	AM_RANGE(0x0278, 0x027b) AM_WRITENOP//AM_WRITE(pnp_config_w)
@ -428,7 +428,7 @@ static ADDRESS_MAP_START( calchase_io, AS_IO, 32, calchase_state )
 	AM_RANGE(0x0378, 0x037f) AM_NOP //To debug
 	// AM_RANGE(0x0300, 0x03af) AM_NOP
 	// AM_RANGE(0x03b0, 0x03df) AM_NOP
-	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1_pc, write_cs1_pc, 0xffffffff)
+	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff)
 	AM_RANGE(0x03f8, 0x03ff) AM_NOP // To debug Serial Port COM1:
 	AM_RANGE(0x0a78, 0x0a7b) AM_WRITENOP//AM_WRITE(pnp_data_w)
 	AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
@ -644,8 +644,8 @@ static MACHINE_CONFIG_START( calchase, calchase_state )

 	MCFG_FRAGMENT_ADD( pcat_common )

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

 	MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
 	MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
@ -696,7 +696,7 @@ ROM_START( calchase )
 	ROM_REGION( 0x800, "nvram", 0 )
 	ROM_LOAD( "ds1220y_nv.bin", 0x000, 0x800, CRC(7912c070) SHA1(b4c55c7ca76bcd8dad1c4b50297233349ae02ed3) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE_READONLY( "calchase", 0,BAD_DUMP SHA1(6ae51a9b3f31cf4166322328a98c0235b0874eb3) )
 ROM_END

--- a/src/mame/drivers/chihiro.c
+++ b/src/mame/drivers/chihiro.c
@ -365,6 +365,7 @@ Thanks to Alex, Mr Mudkips, and Philip Burke for this info.
 #include "machine/pic8259.h"
 #include "machine/pit8253.h"
 #include "machine/idectrl.h"
+#include "machine/idehd.h"
 #include "machine/naomigd.h"
 #include "video/polynew.h"
 #include "bitmap.h"
@ -2656,7 +2657,7 @@ WRITE32_MEMBER( chihiro_state::dummy_w )

 // ======================> ide_baseboard_device

-class ide_baseboard_device : public ide_mass_storage_device
+class ide_baseboard_device : public ata_mass_storage_device
 {
 public:
 	// construction/destruction
@ -2666,7 +2667,6 @@ public:
 	virtual int  write_sector(UINT32 lba, const void *buffer);
 protected:
 	// device-level overrides
-	virtual void device_start();
 	virtual void device_reset();
 };

@ -2682,15 +2682,7 @@ const device_type IDE_BASEBOARD = &device_creator<ide_baseboard_device>;
 //-------------------------------------------------

 ide_baseboard_device::ide_baseboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
-	: ide_mass_storage_device(mconfig, IDE_BASEBOARD, "IDE Baseboard", tag, owner, clock, "ide_baseboard", __FILE__)
-{
-}
-
-//-------------------------------------------------
-//  device_start - device-specific startup
-//-------------------------------------------------
-
-void ide_baseboard_device::device_start()
+	: ata_mass_storage_device(mconfig, IDE_BASEBOARD, "IDE Baseboard", tag, owner, clock, "ide_baseboard", __FILE__)
 {
 }

@ -2700,6 +2692,8 @@ void ide_baseboard_device::device_start()

 void ide_baseboard_device::device_reset()
 {
+	ata_mass_storage_device::device_reset();
+
 	m_num_cylinders=65535;
 	m_num_sectors=255;
 	m_num_heads=255;
@ -2951,7 +2945,7 @@ static ADDRESS_MAP_START(xbox_map_io, AS_IO, 32, chihiro_state )
 	AM_RANGE(0x0020, 0x0023) AM_DEVREADWRITE8("pic8259_1", pic8259_device, read, write, 0xffffffff)
 	AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE8("pit8254", pit8254_device, read, write, 0xffffffff)
 	AM_RANGE(0x00a0, 0x00a3) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, 0xffffffff)
-	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", bus_master_ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
+	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", bus_master_ide_controller_device, read_cs0, write_cs0, 0xffffffff)
 	AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
 	AM_RANGE(0x8000, 0x80ff) AM_READWRITE(dummy_r, dummy_w)
 	AM_RANGE(0xc000, 0xc0ff) AM_READWRITE(smbus_r, smbus_w)
@ -3004,7 +2998,7 @@ static MACHINE_CONFIG_START( chihiro_base, chihiro_state )
 	MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
 	MCFG_PIT8254_ADD( "pit8254", chihiro_pit8254_config )
 	MCFG_BUS_MASTER_IDE_CONTROLLER_ADD( "ide", ide_baseboard, NULL, "bb", true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
 	MCFG_BUS_MASTER_IDE_CONTROLLER_SPACE("maincpu", AS_PROGRAM)

 	/* video hardware */
--- a/src/mame/drivers/cobra.c
+++ b/src/mame/drivers/cobra.c
@ -314,7 +314,7 @@
 #include "emu.h"
 #include "cpu/powerpc/ppc.h"
 #include "machine/pci.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "machine/timekpr.h"
 #include "machine/jvshost.h"
 #include "machine/jvsdev.h"
@ -609,7 +609,7 @@ public:
 		m_gfxcpu(*this, "gfxcpu"),
 		m_gfx_pagetable(*this, "pagetable"),
 		m_k001604(*this, "k001604"),
-		m_ide(*this, "ide")
+		m_ata(*this, "ata")
 	{
 	}

@ -618,7 +618,7 @@ public:
 	required_device<cpu_device> m_gfxcpu;
 	required_shared_ptr<UINT64> m_gfx_pagetable;
 	required_device<k001604_device> m_k001604;
-	required_device<ide_controller_device> m_ide;
+	required_device<ata_interface_device> m_ata;

 	DECLARE_READ64_MEMBER(main_comram_r);
 	DECLARE_WRITE64_MEMBER(main_comram_w);
@ -1819,7 +1819,7 @@ READ16_MEMBER(cobra_state::sub_ata0_r)
 {
 	mem_mask = ( mem_mask << 8 ) | ( mem_mask >> 8 );

-	UINT32 data = m_ide->read_cs0(space, offset, mem_mask);
+	UINT32 data = m_ata->read_cs0(space, offset, mem_mask);
 	data = ( data << 8 ) | ( data >> 8 );

 	return data;
@ -1830,14 +1830,14 @@ WRITE16_MEMBER(cobra_state::sub_ata0_w)
 	mem_mask = ( mem_mask << 8 ) | ( mem_mask >> 8 );
 	data = ( data << 8 ) | ( data >> 8 );

-	m_ide->write_cs0(space, offset, data, mem_mask);
+	m_ata->write_cs0(space, offset, data, mem_mask);
 }

 READ16_MEMBER(cobra_state::sub_ata1_r)
 {
 	mem_mask = ( mem_mask << 8 ) | ( mem_mask >> 8 );

-	UINT32 data = m_ide->read_cs1(space, offset, mem_mask);
+	UINT32 data = m_ata->read_cs1(space, offset, mem_mask);

 	return ( data << 8 ) | ( data >> 8 );
 }
@ -1847,7 +1847,7 @@ WRITE16_MEMBER(cobra_state::sub_ata1_w)
 	mem_mask = ( mem_mask << 8 ) | ( mem_mask >> 8 );
 	data = ( data << 8 ) | ( data >> 8 );

-	m_ide->write_cs1(space, offset, data, mem_mask);
+	m_ata->write_cs1(space, offset, data, mem_mask);
 }

 READ32_MEMBER(cobra_state::sub_comram_r)
@ -3163,7 +3163,7 @@ void cobra_state::machine_reset()
 {
 	m_sub_interrupt = 0xff;

-	UINT8 *identify_device = m_ide->identify_device_buffer(0);
+	UINT8 *identify_device = m_ata->identify_device_buffer(0);

 	// Cobra expects these settings or the BIOS fails
 	identify_device[51*2+0] = 0;           /* 51: PIO data transfer cycle timing mode */
@ -3204,8 +3204,8 @@ static MACHINE_CONFIG_START( cobra, cobra_state )
 	MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
 	MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, mpc106_pci_r, mpc106_pci_w)

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(WRITELINE(cobra_state, ide_interrupt))
+	MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(cobra_state, ide_interrupt))

 	/* video hardware */

@ -3487,7 +3487,7 @@ ROM_START(bujutsu)

 	ROM_REGION(0x1000000, "rfsnd", ROMREGION_ERASE00)

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE_READONLY( "645c04", 0, SHA1(c0aabe69f6eb4e4cf748d606ae50674297af6a04) )
 ROM_END

@ -3506,7 +3506,7 @@ ROM_START(racjamdx)

 	ROM_REGION(0x1000000, "rfsnd", ROMREGION_ERASE00)

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE_READONLY( "676a04", 0, SHA1(8e89d3e5099e871b99fccba13adaa3cf8a6b71f0) )
 ROM_END

--- a/src/mame/drivers/djmain.c
+++ b/src/mame/drivers/djmain.c
@ -65,7 +65,7 @@ hard drive  3.5 adapter     long 3.5 IDE cable      3.5 adapter   PCB

 #include "emu.h"
 #include "cpu/m68000/m68000.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "sound/k054539.h"
 #include "video/konicdev.h"
 #include "includes/djmain.h"
@ -416,11 +416,11 @@ static ADDRESS_MAP_START( memory_map, AS_PROGRAM, 32, djmain_state )
 	AM_RANGE(0x803800, 0x803fff) AM_READ(obj_rom_r)                     // OBJECT ROM readthrough (for POST)
 	AM_RANGE(0xc00000, 0xc01fff) AM_DEVREADWRITE_LEGACY("k056832", k056832_ram_long_r, k056832_ram_long_w)  // VIDEO RAM (tilemap) (beatmania)
 	AM_RANGE(0xc02000, 0xc02047) AM_WRITE(unknownc02000_w)                  // ??
-	AM_RANGE(0xd00000, 0xd0000f) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff) // IDE control regs (hiphopmania)
-	AM_RANGE(0xd40000, 0xd4000f) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff) // IDE status control reg (hiphopmania)
+	AM_RANGE(0xd00000, 0xd0000f) AM_DEVREADWRITE16("ata", ata_interface_device, read_cs0, write_cs0, 0xffffffff) // IDE control regs (hiphopmania)
+	AM_RANGE(0xd40000, 0xd4000f) AM_DEVREADWRITE16("ata", ata_interface_device, read_cs1, write_cs1, 0xffffffff) // IDE status control reg (hiphopmania)
 	AM_RANGE(0xe00000, 0xe01fff) AM_DEVREADWRITE_LEGACY("k056832", k056832_ram_long_r, k056832_ram_long_w)  // VIDEO RAM (tilemap) (hiphopmania)
-	AM_RANGE(0xf00000, 0xf0000f) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff) // IDE control regs (beatmania)
-	AM_RANGE(0xf40000, 0xf4000f) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff) // IDE status control reg (beatmania)
+	AM_RANGE(0xf00000, 0xf0000f) AM_DEVREADWRITE16("ata", ata_interface_device, read_cs0, write_cs0, 0xffffffff) // IDE control regs (beatmania)
+	AM_RANGE(0xf40000, 0xf4000f) AM_DEVREADWRITE16("ata", ata_interface_device, read_cs1, write_cs1, 0xffffffff) // IDE status control reg (beatmania)
 ADDRESS_MAP_END


@ -1354,10 +1354,10 @@ static const k054539_interface k054539_config =

 void djmain_state::machine_start()
 {
-	if (m_ide_master_password != NULL)
-		m_ide->ide_set_master_password(0, m_ide_master_password);
-	if (m_ide_user_password != NULL)
-		m_ide->ide_set_user_password(0, m_ide_user_password);
+	if (m_ata_master_password != NULL)
+		m_ata->set_master_password(0, m_ata_master_password);
+	if (m_ata_user_password != NULL)
+		m_ata->set_user_password(0, m_ata_user_password);

 	save_item(NAME(m_sndram_bank));
 	save_item(NAME(m_pending_vb_int));
@ -1374,9 +1374,6 @@ void djmain_state::machine_reset()
 	m_sndram_bank = 0;
 	sndram_set_bank();

-	/* reset the IDE controller */
-	m_ide->reset();
-
 	/* reset LEDs */
 	set_led_status(machine(), 0, 1);
 	set_led_status(machine(), 1, 1);
@ -1410,8 +1407,8 @@ static MACHINE_CONFIG_START( djmain, djmain_state )
 	MCFG_CPU_VBLANK_INT_DRIVER("screen", djmain_state,  vb_interrupt)


-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(WRITELINE(djmain_state, ide_interrupt))
+	MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(djmain_state, ide_interrupt))

 	/* video hardware */
 	MCFG_SCREEN_ADD("screen", RASTER)
@ -1466,7 +1463,7 @@ ROM_START( bm1stmix )
 	ROM_LOAD16_BYTE( "753jaa09.25d", 0x100000, 0x80000, CRC(B50C3DBB) SHA1(6022ea249aad0793b2279699e68087b4bc9b4ef1) )
 	ROM_LOAD16_BYTE( "753jaa10.27d", 0x100001, 0x80000, CRC(391F4BFD) SHA1(791c9889ea3ce639bbfb87934a1cad9aa3c9ccde) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "753jaa11", 0, SHA1(2e70cf31a853322f29f99b6f292c187a2cf33015) ) /* ver 1.00 JA */
 	// There is an alternate image
 	//DISK_IMAGE( "753jaa11", 0, MD5(260c9b72f4a03055e3abad61c6225324) SHA1(2cc3e149744516bf2353a2b47d33bc9d2072b6c4) ) /* ver 1.00 JA */
@ -1491,7 +1488,7 @@ ROM_START( bm2ndmix )
 	ROM_LOAD16_BYTE( "853jaa09.25d", 0x100000, 0x80000, CRC(8584E21E) SHA1(3d1ca6de00f9ac07bbe7cd1e67093cca7bf484bb) )
 	ROM_LOAD16_BYTE( "853jaa10.27d", 0x100001, 0x80000, CRC(9CB92D98) SHA1(6ace4492ba0b5a8f94a9e7b4f7126b31c6254637) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "853jaa11", 0, SHA1(9683ff8462491252b6eb2e5b3aa6496884c01506) ) /* ver 1.10 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1514,7 +1511,7 @@ ROM_START( bm2ndmxa )
 	ROM_LOAD16_BYTE( "853jaa09.25d", 0x100000, 0x80000, CRC(8584E21E) SHA1(3d1ca6de00f9ac07bbe7cd1e67093cca7bf484bb) )
 	ROM_LOAD16_BYTE( "853jaa10.27d", 0x100001, 0x80000, CRC(9CB92D98) SHA1(6ace4492ba0b5a8f94a9e7b4f7126b31c6254637) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "853jaa11", 0, SHA1(9683ff8462491252b6eb2e5b3aa6496884c01506) ) /* ver 1.10 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1537,7 +1534,7 @@ ROM_START( bm3rdmix )
 	ROM_LOAD16_BYTE( "825jaa09.25d", 0x100000, 0x80000, CRC(D3E65669) SHA1(51abf452da60794fa47c05d11c08b203dde563ff) )
 	ROM_LOAD16_BYTE( "825jaa10.27d", 0x100001, 0x80000, CRC(44D184F3) SHA1(28f3ec33a29164a6531f53db071272ccf015f66d) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "825jaa11", 0, SHA1(048919977232bbce046406a7212586cf39b77cf2) ) /* ver 1.00 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1560,7 +1557,7 @@ ROM_START( bmcompmx )
 	ROM_LOAD16_BYTE( "858jaa09.25d", 0x100000, 0x80000, CRC(0B4AD843) SHA1(c01e15053dd1975dc68db9f4e6da47062d8f9b54) )
 	ROM_LOAD16_BYTE( "858jaa10.27d", 0x100001, 0x80000, CRC(00B124EE) SHA1(435d28a327c2707833a8ddfe841104df65ffa3f8) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "858jaa11", 0, SHA1(bc590472046336a1000f29901fe3fd7b29747e47) ) /* ver 1.00 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1583,7 +1580,7 @@ ROM_START( hmcompmx )
 	ROM_LOAD16_BYTE( "858uaa09.25d", 0x100000, 0x80000, CRC(99519886) SHA1(664f6bd953201a6e2fc123cb8b3facf72766107d) )
 	ROM_LOAD16_BYTE( "858uaa10.27d", 0x100001, 0x80000, CRC(20AA7145) SHA1(eeff87eb9a9864985d751f45e843ee6e73db8cfd) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "858jaa11", 0, SHA1(bc590472046336a1000f29901fe3fd7b29747e47) ) /* ver 1.00 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1606,7 +1603,7 @@ ROM_START( bm4thmix )
 	ROM_LOAD16_BYTE( "847jab09.25d", 0x100000, 0x80000, CRC(2E4AC9FE) SHA1(bbd4c6e0c82fc0be88f851e901e5853b6bcf775f) )
 	ROM_LOAD16_BYTE( "847jab10.27d", 0x100001, 0x80000, CRC(C78516F5) SHA1(1adf5805c808dc55de14a9a9b20c3d2cf7bf414d) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "847jaa11", 0, SHA1(8cad631531b5616d6a4b0a99d988f4b525932dc7) ) /* ver 1.00 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1629,7 +1626,7 @@ ROM_START( bm5thmix )
 	ROM_LOAD16_BYTE( "981jaa09.25d", 0x100000, 0x80000, CRC(D96D4E1C) SHA1(379aa4e82cd06490645f54dab1724c827108735d) )
 	ROM_LOAD16_BYTE( "981jaa10.27d", 0x100001, 0x80000, CRC(06BEE0E4) SHA1(6eea8614cb01e7079393b9976b6fd6a52c14e3c0) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "981jaa11", 0, SHA1(dc7353fa436d96ae174a58d3a38ca9928a63727f) ) /* ver 1.00 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1652,7 +1649,7 @@ ROM_START( bmclubmx )
 	ROM_LOAD16_BYTE( "993jaa09.25d", 0x100000, 0x80000, CRC(E1A172DD) SHA1(42e850c055dc5bfccf6b6989f9f3a945fce13006) )
 	ROM_LOAD16_BYTE( "993jaa10.27d", 0x100001, 0x80000, CRC(9D113A2D) SHA1(eee94a5f7015c49aa630b8df0c8e9d137d238811) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "993hdda01", 0, SHA1(f5d4df1dd27ce6ee2d0897852342691d55b63bfb) )
 	// this image has not been verified
 	//  DISK_IMAGE( "993jaa11", 0, MD5(e26eb62d7cf3357585f5066da6063143) )  /* ver 1.00 JA */
@ -1677,7 +1674,7 @@ ROM_START( bmcompm2 )
 	ROM_LOAD16_BYTE( "988jaa09.25d", 0x100000, 0x80000, CRC(8F3BAE7F) SHA1(c4dac14f6c7f75a2b19153e05bfe969e9eb4aca0) )
 	ROM_LOAD16_BYTE( "988jaa10.27d", 0x100001, 0x80000, CRC(248BF0EE) SHA1(d89205ed57e771401bfc2c24043d200ecbd0b7fc) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "988jaa11", 0, SHA1(12a0988c631dd3331e54b8417a9659402afe168b) ) /* ver 1.00 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1700,7 +1697,7 @@ ROM_START( hmcompm2 )
 	ROM_LOAD16_BYTE( "988uaa09.25d", 0x100000, 0x80000, CRC(C2AD6810) SHA1(706388c5acf6718297fd90e10f8a673463a0893b) )
 	ROM_LOAD16_BYTE( "988uaa10.27d", 0x100001, 0x80000, CRC(DAB0F3C9) SHA1(6fd899e753e32f60262c54ab8553c686c7ef28de) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "988jaa11", 0, SHA1(12a0988c631dd3331e54b8417a9659402afe168b) ) /* ver 1.00 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1723,7 +1720,7 @@ ROM_START( bmdct )
 	ROM_LOAD16_BYTE( "995jaa09.25d", 0x100000, 0x80000, CRC(1510A9C2) SHA1(daf1ab26b7b6b0fe0123b3fbee68684157c2ce51) )
 	ROM_LOAD16_BYTE( "995jaa10.27d", 0x100001, 0x80000, CRC(F9E4E9F2) SHA1(fe91badf6b0baeea690d75399d8c66fabcf6d352) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "995jaa11", 0, SHA1(8fec3c4d97f64f48b9867230a97cda4347496075) ) /* ver 1.00 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1746,7 +1743,7 @@ ROM_START( bmcorerm )
 	ROM_LOAD16_BYTE( "a05jaa09.25d", 0x100000, 0x80000, CRC(1504D62C) SHA1(3c31c6625bc089235a96fe21021239f2d0c0f6e1) )
 	ROM_LOAD16_BYTE( "a05jaa10.27d", 0x100001, 0x80000, CRC(99D75C36) SHA1(9599420863aa0a9492d3caeb03f8ac5fd4c3cdb2) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "a05jaa11", 0, SHA1(7ebc41cc3e9a0a922b49201b34e29201522eb726) ) /* ver 1.00 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1769,7 +1766,7 @@ ROM_START( bm6thmix )
 	ROM_LOAD16_BYTE( "a21jaa09.25d", 0x100000, 0x80000, CRC(181E6F70) SHA1(82c7ca3068ace9a66b614ead4b90ea6fe4017d51) )
 	ROM_LOAD16_BYTE( "a21jaa10.27d", 0x100001, 0x80000, CRC(1AC33595) SHA1(3173bb8dc420487c4d427e779444a98aad37d51e) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "a21jaa11", 0, SHA1(ed0a07212a360e75934fc22c56265842cf0829b6) ) /* ver 1.00 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1792,7 +1789,7 @@ ROM_START( bm7thmix )
 	ROM_LOAD16_BYTE( "b07jaa09.25d", 0x100000, 0x80000, CRC(2530CEDB) SHA1(94b38b4fe198b26a2ff4d99d2cb28a0f935fe940) )
 	ROM_LOAD16_BYTE( "b07jaa10.27d", 0x100001, 0x80000, CRC(6B75BA9C) SHA1(aee922adc3bc0296ae6e08e461b20a9e5e72a2df) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "b07jaa11", 0, SHA1(e4925494f0a801abb4d3aa6524c379eb445d8dff) ) /* ver 1.00 JA */
 	// this image has not been verified
 	//DISK_IMAGE( "b07jab11", 0, MD5(0e9440787ca69567792095085e2a3619) )    /* ver 1.00 JA */
@ -1817,7 +1814,7 @@ ROM_START( bmfinal )
 	ROM_LOAD16_BYTE( "c01jaa09.25d", 0x100000, 0x80000, CRC(45CF93B1) SHA1(7c5082bcd1fe15761a0a965e25dda121904ff1bd) )
 	ROM_LOAD16_BYTE( "c01jaa10.27d", 0x100001, 0x80000, CRC(C9927749) SHA1(c2644877bda483e241381265e723ea8ab8357761) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "c01jaa11", 0, SHA1(0a53c4412a72a886f5fb98c12c529d056d625244) ) /* ver 1.00 JA */
 	// this image has not been verified
 	//DISK_IMAGE( "c01jaa11", 0, MD5(8bb7e6b6bc63cac8a4f2997307c25748) )    /* ver 1.00 JA */
@ -1842,7 +1839,7 @@ ROM_START( popn2 )
 	ROM_LOAD16_BYTE( "831jaa09.25d", 0x100000, 0x80000, CRC(AE7838D2) SHA1(4f8a6793065c6c1eb08161f65b1d6246987bf47e) )
 	ROM_LOAD16_BYTE( "831jaa10.27d", 0x100001, 0x80000, CRC(85173CB6) SHA1(bc4d86bf4654a9a0a58e624f77090854950f3993) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "831jhdda01", 0, SHA1(ef62d5fcc1a36235fc932e6ecef71dc845d1d72d) )

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1867,7 +1864,7 @@ ROM_START( bm3rdmxb )
 	ROM_LOAD16_BYTE( "825jab09.25d", 0x100000, 0x80000, CRC(1407BA5D) SHA1(e7a0d190326589f4d94e83cb7c85dd4e91f4efad) )
 	ROM_LOAD16_BYTE( "825jab10.27d", 0x100001, 0x80000, CRC(2AFD0A10) SHA1(1b8b868ac5720bb1b376f4eb8952efb190257bda) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "825jab11", 0, MD5(f4360da10a932ba90e93469df7426d1d) SHA1(1) )  /* ver 1.01 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1890,7 +1887,7 @@ ROM_START( popn1 )
 	ROM_LOAD16_BYTE( "803jaa09.25d", 0x100000, 0x80000, CRC(204D53EB) SHA1(349de147246b0ed08fb7e473d63e073b71fa30c9) )
 	ROM_LOAD16_BYTE( "803jaa10.27d", 0x100001, 0x80000, CRC(535A61A3) SHA1(b24c57601a7e3a349473af69114703133a46806d) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "803jaa11", 0, MD5(54a8ac87857d81740621c622e27736d7) )  /* ver 1.00 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1913,7 +1910,7 @@ ROM_START( popn3 )
 	ROM_LOAD16_BYTE( "980jaa09.25d", 0x100000, 0x80000, CRC(1CB4D84E) SHA1(9669585c6a2825aeae6e47dd03458624b4c44721) )
 	ROM_LOAD16_BYTE( "980jaa10.27d", 0x100001, 0x80000, CRC(7776B87E) SHA1(662b7cd7cb4fb8f8bab240ef543bf9a593e23a03) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "980jaa11", 0, MD5(6e5cc17a6bc75cac0256192cc700215c) )  /* ver 1.00 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1936,7 +1933,7 @@ ROM_START( popnstex )
 	ROM_LOAD16_BYTE( "970jba09.25d", 0x100000, 0x80000, CRC(5D2BDA52) SHA1(d03c135ac04437b54e4d267ae168fe7ebb9e5b65) )
 	ROM_LOAD16_BYTE( "970jba10.27d", 0x100001, 0x80000, CRC(EDC4A245) SHA1(30bbd7bf0299a064119c535abb9be69d725aa130) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "970jba11", 0, MD5(1616905838fdb2b521d53499c6c2a7a4) )  /* ver 1.00 JA */

 	ROM_REGION( 0x1000000, "shared", ROMREGION_ERASE00 )        /* K054539 RAM */
@ -1951,8 +1948,8 @@ ROM_END

 DRIVER_INIT_MEMBER(djmain_state,beatmania)
 {
-	m_ide_master_password = NULL;
-	m_ide_user_password = NULL;
+	m_ata_master_password = NULL;
+	m_ata_user_password = NULL;
 }

 static const UINT8 beatmania_master_password[2 + 32] =
@ -1977,8 +1974,8 @@ DRIVER_INIT_MEMBER(djmain_state,hmcompmx)

 	DRIVER_INIT_CALL(beatmania);

-	m_ide_master_password = beatmania_master_password;
-	m_ide_user_password = hmcompmx_user_password;
+	m_ata_master_password = beatmania_master_password;
+	m_ata_user_password = hmcompmx_user_password;
 }

 DRIVER_INIT_MEMBER(djmain_state,bm4thmix)
@ -1994,7 +1991,7 @@ DRIVER_INIT_MEMBER(djmain_state,bm4thmix)

 	DRIVER_INIT_CALL(beatmania);

-	m_ide_user_password = bm4thmix_user_password;
+	m_ata_user_password = bm4thmix_user_password;
 }

 DRIVER_INIT_MEMBER(djmain_state,bm5thmix)
@ -2010,8 +2007,8 @@ DRIVER_INIT_MEMBER(djmain_state,bm5thmix)

 	DRIVER_INIT_CALL(beatmania);

-	m_ide_master_password = beatmania_master_password;
-	m_ide_user_password = bm5thmix_user_password;
+	m_ata_master_password = beatmania_master_password;
+	m_ata_user_password = bm5thmix_user_password;
 }

 DRIVER_INIT_MEMBER(djmain_state,bmclubmx)
@ -2027,8 +2024,8 @@ DRIVER_INIT_MEMBER(djmain_state,bmclubmx)

 	DRIVER_INIT_CALL(beatmania);

-	m_ide_master_password = beatmania_master_password;
-	m_ide_user_password = bmclubmx_user_password;
+	m_ata_master_password = beatmania_master_password;
+	m_ata_user_password = bmclubmx_user_password;
 }


@ -2045,8 +2042,8 @@ DRIVER_INIT_MEMBER(djmain_state,bmcompm2)

 	DRIVER_INIT_CALL(beatmania);

-	m_ide_master_password = beatmania_master_password;
-	m_ide_user_password = bmcompm2_user_password;
+	m_ata_master_password = beatmania_master_password;
+	m_ata_user_password = bmcompm2_user_password;
 }

 DRIVER_INIT_MEMBER(djmain_state,hmcompm2)
@ -2062,8 +2059,8 @@ DRIVER_INIT_MEMBER(djmain_state,hmcompm2)

 	DRIVER_INIT_CALL(beatmania);

-	m_ide_master_password = beatmania_master_password;
-	m_ide_user_password = hmcompm2_user_password;
+	m_ata_master_password = beatmania_master_password;
+	m_ata_user_password = hmcompm2_user_password;
 }

 DRIVER_INIT_MEMBER(djmain_state,bmdct)
@ -2079,8 +2076,8 @@ DRIVER_INIT_MEMBER(djmain_state,bmdct)

 	DRIVER_INIT_CALL(beatmania);

-	m_ide_master_password = beatmania_master_password;
-	m_ide_user_password = bmdct_user_password;
+	m_ata_master_password = beatmania_master_password;
+	m_ata_user_password = bmdct_user_password;
 }

 DRIVER_INIT_MEMBER(djmain_state,bmcorerm)
@ -2096,8 +2093,8 @@ DRIVER_INIT_MEMBER(djmain_state,bmcorerm)

 	DRIVER_INIT_CALL(beatmania);

-	m_ide_master_password = beatmania_master_password;
-	m_ide_user_password = bmcorerm_user_password;
+	m_ata_master_password = beatmania_master_password;
+	m_ata_user_password = bmcorerm_user_password;
 }

 DRIVER_INIT_MEMBER(djmain_state,bm6thmix)
@ -2113,8 +2110,8 @@ DRIVER_INIT_MEMBER(djmain_state,bm6thmix)

 	DRIVER_INIT_CALL(beatmania);

-	m_ide_master_password = beatmania_master_password;
-	m_ide_user_password = bm6thmix_user_password;
+	m_ata_master_password = beatmania_master_password;
+	m_ata_user_password = bm6thmix_user_password;
 }

 DRIVER_INIT_MEMBER(djmain_state,bm7thmix)
@ -2130,8 +2127,8 @@ DRIVER_INIT_MEMBER(djmain_state,bm7thmix)

 	DRIVER_INIT_CALL(beatmania);

-	m_ide_master_password = beatmania_master_password;
-	m_ide_user_password = bm7thmix_user_password;
+	m_ata_master_password = beatmania_master_password;
+	m_ata_user_password = bm7thmix_user_password;
 }

 DRIVER_INIT_MEMBER(djmain_state,bmfinal)
@ -2147,8 +2144,8 @@ DRIVER_INIT_MEMBER(djmain_state,bmfinal)

 	DRIVER_INIT_CALL(beatmania);

-	m_ide_master_password = beatmania_master_password;
-	m_ide_user_password = bmfinal_user_password;
+	m_ata_master_password = beatmania_master_password;
+	m_ata_user_password = bmfinal_user_password;
 }


--- a/src/mame/drivers/extrema.c
+++ b/src/mame/drivers/extrema.c
@ -64,7 +64,7 @@ ROM_START( maski )
 ROM_END

 #define MISSING_DISK \
-	DISK_REGION( "ide" ) \
+	DISK_REGION( "ata:0:hdd:image" ) \
 	DISK_IMAGE( "extrema_hdd", 0, NO_DUMP )

 ROM_START( adults )
--- a/src/mame/drivers/fruitpc.c
+++ b/src/mame/drivers/fruitpc.c
@ -70,12 +70,12 @@ ADDRESS_MAP_END

 static ADDRESS_MAP_START( fruitpc_io, AS_IO, 32, fruitpc_state )
 	AM_IMPORT_FROM(pcat32_io_common)
-	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
+	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff)
 	AM_RANGE(0x0310, 0x0313) AM_READ8(fruit_inp_r, 0xffffffff)
 	AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
 	AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
 	AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
-	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1_pc, write_cs1_pc, 0xffffffff)
+	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff)
 ADDRESS_MAP_END

 #define AT_KEYB_HELPER(bit, text, key1) \
@ -157,8 +157,8 @@ static MACHINE_CONFIG_START( fruitpc, fruitpc_state )

 	MCFG_FRAGMENT_ADD( pcat_common )

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

 	/* video hardware */
 	MCFG_FRAGMENT_ADD( pcvideo_vga )
@ -175,7 +175,7 @@ ROM_START( fruitpc )
 	ROM_REGION( 0x20000, "bios", 0 )
 	ROM_LOAD( "at-gs001.bin", 0x000000, 0x020000, CRC(7dec34d0) SHA1(81d194d67fef9f6531bd3cd1ee0baacb5c2558bf) )

-	DISK_REGION( "ide:0:hdd" )    // 8 MB Compact Flash card
+	DISK_REGION( "ide:0:hdd:image" )    // 8 MB Compact Flash card
 	DISK_IMAGE( "fruit", 0,SHA1(df250ff06a97fa141a4144034f7035ac2947c53c) )
 ROM_END

--- a/src/mame/drivers/funkball.c
+++ b/src/mame/drivers/funkball.c
@ -401,8 +401,8 @@ static ADDRESS_MAP_START(funkball_io, AS_IO, 32, funkball_state)
 	AM_IMPORT_FROM(pcat32_io_common)
 	AM_RANGE(0x00e8, 0x00ef) AM_NOP

-	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
-	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1_pc, write_cs1_pc, 0xffffffff)
+	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff)
+	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff)
 	AM_RANGE(0x03f8, 0x03ff) AM_READWRITE8(serial_r,serial_w,0xffffffff)

 	AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
@ -869,8 +869,8 @@ static MACHINE_CONFIG_START( funkball, funkball_state )
 	MCFG_PCI_BUS_LEGACY_DEVICE(7, "voodoo_0", voodoo_0_pci_r, voodoo_0_pci_w)
 	MCFG_PCI_BUS_LEGACY_DEVICE(18, NULL, cx5510_pci_r, cx5510_pci_w)

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

 	/* video hardware */
 	MCFG_3DFX_VOODOO_1_ADD("voodoo_0", STD_VOODOO_1_CLOCK, voodoo_intf)
--- a/src/mame/drivers/gamecstl.c
+++ b/src/mame/drivers/gamecstl.c
@ -345,11 +345,11 @@ static ADDRESS_MAP_START(gamecstl_io, AS_IO, 32, gamecstl_state )
 	AM_IMPORT_FROM(pcat32_io_common)
 	AM_RANGE(0x00e8, 0x00eb) AM_NOP
 	AM_RANGE(0x00ec, 0x00ef) AM_NOP
-	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
+	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff)
 	AM_RANGE(0x0300, 0x03af) AM_NOP
 	AM_RANGE(0x03b0, 0x03df) AM_NOP
 	AM_RANGE(0x0278, 0x027b) AM_WRITE(pnp_config_w)
-	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1_pc, write_cs1_pc, 0xffffffff)
+	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff)
 	AM_RANGE(0x0a78, 0x0a7b) AM_WRITE(pnp_data_w)
 	AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
 ADDRESS_MAP_END
@ -435,8 +435,8 @@ static MACHINE_CONFIG_START( gamecstl, gamecstl_state )
 	MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
 	MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

 	/* video hardware */
 	MCFG_SCREEN_ADD("screen", RASTER)
@ -469,7 +469,7 @@ ROM_START(gamecstl)
 	ROM_REGION(0x08100, "gfx1", 0)
 	ROM_LOAD("cga.chr",     0x00000, 0x01000, BAD_DUMP CRC(42009069) SHA1(ed08559ce2d7f97f68b9f540bddad5b6295294dd))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "gamecstl", 0, SHA1(b431af3c42c48ba07972d77a3d24e60ee1e4359e) )
 ROM_END

@ -480,7 +480,7 @@ ROM_START(gamecst2)
 	ROM_REGION(0x08100, "gfx1", 0)
 	ROM_LOAD("cga.chr",     0x00000, 0x01000, BAD_DUMP CRC(42009069) SHA1(ed08559ce2d7f97f68b9f540bddad5b6295294dd))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "gamecst2", 0, SHA1(14e1b311cb474801c7bdda3164a0c220fb102159) )
 ROM_END

--- a/src/mame/drivers/globalvr.c
+++ b/src/mame/drivers/globalvr.c
@ -90,7 +90,7 @@ MACHINE_CONFIG_END


 ROM_START( hyperv2 )
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE_READONLY( "hyperv2_pqi_6-12-02", 0, SHA1(44473f2950c0e108acb0961579a46f4765e379f7) )
 ROM_END

@ -98,42 +98,42 @@ ROM_START( hyperv2a )
 	ROM_REGION( 0x168000, "bootdisk", 0 ) /* Win98/DOS bootdisk from folder made into .IMA with WinImage */
 	ROM_LOAD( "hyperv2_pqi_9-30-01.ima", 0x000000, 0x168000, CRC(964d8e00) SHA1(efefcfcca85328df8445a4ba482cd7d5b584ae05) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE_READONLY( "hyperv2_pqi_9-30-01", 0, SHA1(7a8c201a83a45609d0242a20441891f5204d7dd1) )
 ROM_END

 ROM_START( gvrxpsys )
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE_READONLY( "globalvr_xp_system", 0, SHA1(83a784fe038acbd651544b3fa3b17ceb11bbeeab) )
 ROM_END

 ROM_START( gvrxpsup )
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE_READONLY( "vr_xp_system_6-11-2002", 0, SHA1(c2b586a0106632bcaddc1df8077ee9c226537d2b) )
 ROM_END

 ROM_START( bhead2k )
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE_READONLY( "beachhead2000_5-27-2003", 0, SHA1(d4473a7fb9820f2e517a1e0609ec9e12f326fc06) )
 ROM_END

 ROM_START( bhead2ka )
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE_READONLY( "beachhead2000_9-16-2001", 0, SHA1(2151c0aff39a5279adb422e97f00c610d21c48e8) )
 ROM_END

 ROM_START( bhead2k2 )
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE_READONLY( "beachhead2002_5-27-2003", 0, SHA1(c58e62363387b76b4f03432b543498d4560d27a9) )
 ROM_END

 ROM_START( bhead2k3 )
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE_READONLY( "beachhead2003desertwar_5-27-2003", 0, SHA1(fed23a6496836050eb1d4f69b91da09adbd9d973) )
 ROM_END

 ROM_START( nfsug )
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE_READONLY( "nfsug1_1-disc1", 0, SHA1(25a9f0606ac3909bd7c4f3f3a59c6782e3c84712) )

 	DISK_REGION( "drive_1" )
--- a/src/mame/drivers/iteagle.c
+++ b/src/mame/drivers/iteagle.c
@ -84,7 +84,7 @@ www.multitech.com

 #include "emu.h"
 #include "cpu/mips/mips3.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "video/voodoo.h"

 class iteagle_state : public driver_device
@ -199,8 +199,8 @@ static MACHINE_CONFIG_START( gtfore, iteagle_state )
 	MCFG_CPU_CONFIG(r4310_config)
 	MCFG_CPU_PROGRAM_MAP(main_map)

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(WRITELINE(iteagle_state, ide_interrupt))
+	MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(iteagle_state, ide_interrupt))

 	/* video hardware */
 	MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
@ -258,20 +258,20 @@ MACHINE_CONFIG_END
 ROM_START( iteagle )
 	EAGLE_BIOS

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 ROM_END

 ROM_START( gtfore04 )
 	EAGLE_BIOS

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "gt2004", 0, SHA1(739a52d6ce13bb6ac7a543ee0e8086fb66be19b9) )
 ROM_END

 ROM_START( gtfore05 )
 	EAGLE_BIOS

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "gt2005", 0, SHA1(d8de569d8cf97b5aaada10ce896eb3c75f1b37f1) )
 ROM_END

--- a/src/mame/drivers/jaguar.c
+++ b/src/mame/drivers/jaguar.c
@ -1090,16 +1090,16 @@ READ32_MEMBER(jaguar_state::vt83c461_r)
 	else if( offset >= 0x1f0/4 && offset < 0x1f8/4 )
 	{
 		if (ACCESSING_BITS_0_15)
-			data |= m_ide->read_cs0_pc(space, (offset * 2) & 7, mem_mask);
+			data |= m_ide->read_cs0(space, (offset * 2) & 7, mem_mask);
 		if (ACCESSING_BITS_16_31)
-			data |= m_ide->read_cs0_pc(space, ((offset * 2) & 7) + 1, mem_mask >> 16) << 16;
+			data |= m_ide->read_cs0(space, ((offset * 2) & 7) + 1, mem_mask >> 16) << 16;
 	}
 	else if( offset >= 0x3f0/4 && offset < 0x3f8/4 )
 	{
 		if (ACCESSING_BITS_0_15)
-			data |= m_ide->read_cs1_pc(space, (offset * 2) & 7, mem_mask);
+			data |= m_ide->read_cs1(space, (offset * 2) & 7, mem_mask);
 		if (ACCESSING_BITS_16_31)
-			data |= m_ide->read_cs1_pc(space, ((offset * 2) & 7) + 1, mem_mask >> 16) << 16;
+			data |= m_ide->read_cs1(space, ((offset * 2) & 7) + 1, mem_mask >> 16) << 16;
 	}

 	return data;
@ -1115,16 +1115,16 @@ WRITE32_MEMBER(jaguar_state::vt83c461_w)
 	else if( offset >= 0x1f0/4 && offset < 0x1f8/4 )
 	{
 		if (ACCESSING_BITS_0_15)
-			m_ide->write_cs0_pc(space, (offset * 2) & 7, data, mem_mask);
+			m_ide->write_cs0(space, (offset * 2) & 7, data, mem_mask);
 		if (ACCESSING_BITS_16_31)
-			m_ide->write_cs0_pc(space, ((offset * 2) & 7) + 1, data >> 16, mem_mask >> 16);
+			m_ide->write_cs0(space, ((offset * 2) & 7) + 1, data >> 16, mem_mask >> 16);
 	}
 	else if( offset >= 0x3f0/4 && offset < 0x3f8/4 )
 	{
 		if (ACCESSING_BITS_0_15)
-			m_ide->write_cs1_pc(space, (offset * 2) & 7, data, mem_mask);
+			m_ide->write_cs1(space, (offset * 2) & 7, data, mem_mask);
 		if (ACCESSING_BITS_16_31)
-			m_ide->write_cs1_pc(space, ((offset * 2) & 7) + 1, data >> 16, mem_mask >> 16);
+			m_ide->write_cs1(space, ((offset * 2) & 7) + 1, data >> 16, mem_mask >> 16);
 	}
 }

@ -1601,8 +1601,8 @@ static MACHINE_CONFIG_START( cojagr3k, jaguar_state )

 	MCFG_NVRAM_ADD_1FILL("nvram")

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(WRITELINE(jaguar_state, external_int))
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(jaguar_state, external_int))

 	/* video hardware */
 	MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
@ -1623,7 +1623,7 @@ MACHINE_CONFIG_END

 static MACHINE_CONFIG_DERIVED( cojagr3k_rom, cojagr3k )
 	MCFG_DEVICE_REMOVE("ide:0")
-	MCFG_IDE_SLOT_ADD("ide:0", ide_devices, NULL, true)
+	MCFG_ATA_SLOT_ADD("ide:0", ata_devices, NULL, true)
 MACHINE_CONFIG_END

 static MACHINE_CONFIG_DERIVED( cojag68k, cojagr3k )
@ -1897,7 +1897,7 @@ ROM_START( area51t ) /* 68020 based, Area51 Time Warner License  Date: Nov 15, 1
 	ROM_REGION16_BE( 0x1000, "waverom", 0 )
 	ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "area51t", 0, SHA1(d2865cc7b1bb08a4393a72013a90e18d8a8f9860) )
 ROM_END

@ -1911,7 +1911,7 @@ ROM_START( area51a ) /* 68020 based, Area51 Atari Games License  Date: Oct 25, 1
 	ROM_REGION16_BE( 0x1000, "waverom", 0 )
 	ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "area51", 0, SHA1(3b303bc37e206a6d7339352c869f050d04186f11) )
 ROM_END

@ -1925,7 +1925,7 @@ ROM_START( area51 ) /* R3000 based, labeled as "Area51 2-C"  Date: Nov 11 1996 *
 	ROM_REGION16_BE( 0x1000, "waverom", 0 )
 	ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "area51", 0, SHA1(3b303bc37e206a6d7339352c869f050d04186f11) )
 ROM_END

@ -1939,7 +1939,7 @@ ROM_START( maxforce ) /* R3000 based, labeled as "Maximum Force 5-23-97 v1.05" *
 	ROM_REGION16_BE( 0x1000, "waverom", 0 )
 	ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "maxforce", 0, SHA1(d54e7a8f3866bb2a1d28ae637e7c92ffa4dbe558) )
 ROM_END

@ -1954,7 +1954,7 @@ ROM_START( maxf_102 ) /* R3000 based, labeled as "Maximum Force 2-27-97 v1.02" *
 	ROM_REGION16_BE( 0x1000, "waverom", 0 )
 	ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "maxforce", 0, SHA1(d54e7a8f3866bb2a1d28ae637e7c92ffa4dbe558) )
 ROM_END

@ -1972,7 +1972,7 @@ ROM_START( maxf_ng ) /* R3000 based, stickers say 'NO GORE' */
 	ROM_REGION( 0x800, "user2", 0 ) /* 28C16 style eeprom, currently loaded but not used */
 	ROM_LOAD( "28c16.17z", 0x000, 0x800, CRC(1cdd9088) SHA1(4f01f02ff95f31ced87a3cdd7f171afd92551266) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "maxforce", 0, SHA1(d54e7a8f3866bb2a1d28ae637e7c92ffa4dbe558) )
 ROM_END

@ -1987,7 +1987,7 @@ ROM_START( area51mx )   /* 68020 based, Labeled as "68020 MAX/A51 KIT 2.0" Date:
 	ROM_REGION16_BE( 0x1000, "waverom", 0 )
 	ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "area51mx", 0, SHA1(5ff10f4e87094d4449eabf3de7549564ca568c7e) )
 ROM_END

@ -2002,7 +2002,7 @@ ROM_START( a51mxr3k ) /* R3000 based, Labeled as "R3K Max/A51 Kit Ver 1.0" */
 	ROM_REGION16_BE( 0x1000, "waverom", 0 )
 	ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "area51mx", 0, SHA1(5ff10f4e87094d4449eabf3de7549564ca568c7e) )
 ROM_END

@ -2017,7 +2017,7 @@ ROM_START( vcircle )
 	ROM_REGION16_BE( 0x1000, "waverom", 0 )
 	ROM_LOAD16_WORD("jagwave.rom", 0x0000, 0x1000, CRC(7a25ee5b) SHA1(58117e11fd6478c521fbd3fdbe157f39567552f0) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "vcircle", 0, SHA1(bfa79c4cacdc9c2cd6362f62a23056b3e35a2034) )
 ROM_END

--- a/src/mame/drivers/kinst.c
+++ b/src/mame/drivers/kinst.c
@ -131,7 +131,7 @@ Notes:
 #include "emu.h"
 #include "cpu/mips/mips3.h"
 #include "cpu/adsp2100/adsp2100.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "machine/midwayic.h"
 #include "audio/dcs.h"

@ -151,7 +151,7 @@ public:
 		m_control(*this, "control"),
 		m_rombase(*this, "rombase"),
 		m_maincpu(*this, "maincpu"),
-		m_ide(*this, "ide" )
+		m_ata(*this, "ata" )
 	{
 	}

@ -175,7 +175,7 @@ public:
 	UINT32 screen_update_kinst(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
 	INTERRUPT_GEN_MEMBER(irq0_start);
 	required_device<cpu_device> m_maincpu;
-	required_device<ide_controller_device> m_ide;
+	required_device<ata_interface_device> m_ata;

 protected:
 	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
@ -215,7 +215,7 @@ void kinst_state::machine_start()

 void kinst_state::machine_reset()
 {
-	UINT8 *identify_device = m_ide->identify_device_buffer(0);
+	UINT8 *identify_device = m_ata->identify_device_buffer(0);

 	if (strncmp(machine().system().name, "kinst2", 6) != 0)
 	{
@ -325,25 +325,25 @@ WRITE_LINE_MEMBER(kinst_state::ide_interrupt)

 READ32_MEMBER(kinst_state::kinst_ide_r)
 {
-	return m_ide->read_cs0(space, offset / 2, mem_mask);
+	return m_ata->read_cs0(space, offset / 2, mem_mask);
 }


 WRITE32_MEMBER(kinst_state::kinst_ide_w)
 {
-	m_ide->write_cs0(space, offset / 2, data, mem_mask);
+	m_ata->write_cs0(space, offset / 2, data, mem_mask);
 }


 READ32_MEMBER(kinst_state::kinst_ide_extra_r)
 {
-	return m_ide->read_cs1(space, 6, 0xff);
+	return m_ata->read_cs1(space, 6, 0xff);
 }


 WRITE32_MEMBER(kinst_state::kinst_ide_extra_w)
 {
-	m_ide->write_cs1(space, 6, data, 0xff);
+	m_ata->write_cs1(space, 6, data, 0xff);
 }


@ -689,8 +689,8 @@ static MACHINE_CONFIG_START( kinst, kinst_state )
 	MCFG_CPU_VBLANK_INT_DRIVER("screen", kinst_state,  irq0_start)


-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(WRITELINE(kinst_state, ide_interrupt))
+	MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(kinst_state, ide_interrupt))

 	/* video hardware */
 	MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
@ -731,7 +731,7 @@ ROM_START( kinst )
 	ROM_LOAD16_BYTE( "u35-l1", 0xc00000, 0x80000, CRC(0aaef4fc) SHA1(48c4c954ac9db648f28ad64f9845e19ec432eec3) )
 	ROM_LOAD16_BYTE( "u36-l1", 0xe00000, 0x80000, CRC(0577bb60) SHA1(cc78070cc41701e9a91fde5cfbdc7e1e83354854) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "kinst", 0, SHA1(81d833236e994528d1482979261401b198d1ca53) )
 ROM_END

@ -750,7 +750,7 @@ ROM_START( kinst14 )
 	ROM_LOAD16_BYTE( "u35-l1", 0xc00000, 0x80000, CRC(0aaef4fc) SHA1(48c4c954ac9db648f28ad64f9845e19ec432eec3) )
 	ROM_LOAD16_BYTE( "u36-l1", 0xe00000, 0x80000, CRC(0577bb60) SHA1(cc78070cc41701e9a91fde5cfbdc7e1e83354854) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "kinst", 0, SHA1(81d833236e994528d1482979261401b198d1ca53) )
 ROM_END

@ -769,7 +769,7 @@ ROM_START( kinst13 )
 	ROM_LOAD16_BYTE( "u35-l1", 0xc00000, 0x80000, CRC(0aaef4fc) SHA1(48c4c954ac9db648f28ad64f9845e19ec432eec3) )
 	ROM_LOAD16_BYTE( "u36-l1", 0xe00000, 0x80000, CRC(0577bb60) SHA1(cc78070cc41701e9a91fde5cfbdc7e1e83354854) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "kinst", 0, SHA1(81d833236e994528d1482979261401b198d1ca53) )
 ROM_END

@ -788,7 +788,7 @@ ROM_START( kinstp )
 	ROM_LOAD16_BYTE( "u35-l1", 0xc00000, 0x80000, CRC(0aaef4fc) SHA1(48c4c954ac9db648f28ad64f9845e19ec432eec3) )
 	ROM_LOAD16_BYTE( "u36-l1", 0xe00000, 0x80000, CRC(0577bb60) SHA1(cc78070cc41701e9a91fde5cfbdc7e1e83354854) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "kinst", 0, SHA1(81d833236e994528d1482979261401b198d1ca53) )
 ROM_END

@ -807,7 +807,7 @@ ROM_START( kinst2 )
 	ROM_LOAD16_BYTE( "ki2_l1.u35", 0xc00000, 0x80000, CRC(7245ce69) SHA1(24a3ff009c8a7f5a0bfcb198b8dcb5df365770d3) )
 	ROM_LOAD16_BYTE( "ki2_l1.u36", 0xe00000, 0x80000, CRC(8920acbb) SHA1(0fca72c40067034939b984b4bf32972a5a6c26af) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "kinst2", 0, SHA1(e7c9291b4648eae0012ea0cc230731ed4987d1d5) )
 ROM_END

@ -826,7 +826,7 @@ ROM_START( kinst2k4 )
 	ROM_LOAD16_BYTE( "ki2_l1.u35", 0xc00000, 0x80000, CRC(7245ce69) SHA1(24a3ff009c8a7f5a0bfcb198b8dcb5df365770d3) )
 	ROM_LOAD16_BYTE( "ki2_l1.u36", 0xe00000, 0x80000, CRC(8920acbb) SHA1(0fca72c40067034939b984b4bf32972a5a6c26af) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "kinst2", 0, SHA1(e7c9291b4648eae0012ea0cc230731ed4987d1d5) )
 ROM_END

@ -845,7 +845,7 @@ ROM_START( kinst213 )
 	ROM_LOAD16_BYTE( "ki2_l1.u35", 0xc00000, 0x80000, CRC(7245ce69) SHA1(24a3ff009c8a7f5a0bfcb198b8dcb5df365770d3) )
 	ROM_LOAD16_BYTE( "ki2_l1.u36", 0xe00000, 0x80000, CRC(8920acbb) SHA1(0fca72c40067034939b984b4bf32972a5a6c26af) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "kinst2", 0, SHA1(e7c9291b4648eae0012ea0cc230731ed4987d1d5) )
 ROM_END

@ -864,7 +864,7 @@ ROM_START( kinst2k3 )
 	ROM_LOAD16_BYTE( "ki2_l1.u35", 0xc00000, 0x80000, CRC(7245ce69) SHA1(24a3ff009c8a7f5a0bfcb198b8dcb5df365770d3) )
 	ROM_LOAD16_BYTE( "ki2_l1.u36", 0xe00000, 0x80000, CRC(8920acbb) SHA1(0fca72c40067034939b984b4bf32972a5a6c26af) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "kinst2", 0, SHA1(e7c9291b4648eae0012ea0cc230731ed4987d1d5) )
 ROM_END

@ -883,7 +883,7 @@ ROM_START( kinst211 )
 	ROM_LOAD16_BYTE( "ki2_l1.u35", 0xc00000, 0x80000, CRC(7245ce69) SHA1(24a3ff009c8a7f5a0bfcb198b8dcb5df365770d3) )
 	ROM_LOAD16_BYTE( "ki2_l1.u36", 0xe00000, 0x80000, CRC(8920acbb) SHA1(0fca72c40067034939b984b4bf32972a5a6c26af) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "kinst2", 0, SHA1(e7c9291b4648eae0012ea0cc230731ed4987d1d5) )
 ROM_END

@ -902,7 +902,7 @@ ROM_START( kinst210 )
 	ROM_LOAD16_BYTE( "ki2_l1.u35", 0xc00000, 0x80000, CRC(7245ce69) SHA1(24a3ff009c8a7f5a0bfcb198b8dcb5df365770d3) )
 	ROM_LOAD16_BYTE( "ki2_l1.u36", 0xe00000, 0x80000, CRC(8920acbb) SHA1(0fca72c40067034939b984b4bf32972a5a6c26af) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "kinst2", 0, SHA1(e7c9291b4648eae0012ea0cc230731ed4987d1d5) )
 ROM_END

--- a/src/mame/drivers/maygayep.c
+++ b/src/mame/drivers/maygayep.c
@ -4264,7 +4264,7 @@ ROM_END
 	*/

 #define EP_PHARO_HDD \
-	DISK_REGION( "ide" ) \
+	DISK_REGION( "ata:0:hdd:image" ) \
 	DISK_IMAGE( "ep_pharo", 0, SHA1(daf56705178bb2b6f3547418a98c361478702aed) )


--- a/src/mame/drivers/mediagx.c
+++ b/src/mame/drivers/mediagx.c
@ -750,9 +750,9 @@ static ADDRESS_MAP_START(mediagx_io, AS_IO, 32, mediagx_state )
 	AM_RANGE(0x0020, 0x0023) AM_READWRITE8(io20_r, io20_w, 0xffff0000)
 	AM_IMPORT_FROM(pcat32_io_common)
 	AM_RANGE(0x00e8, 0x00eb) AM_NOP     // I/O delay port
-	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
+	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff)
 	AM_RANGE(0x0378, 0x037b) AM_READWRITE(parallel_port_r, parallel_port_w)
-	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1_pc, write_cs1_pc, 0xffffffff)
+	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff)
 	AM_RANGE(0x0400, 0x04ff) AM_READWRITE(ad1847_r, ad1847_w)
 	AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
 ADDRESS_MAP_END
@ -858,7 +858,6 @@ void mediagx_state::machine_reset()
 	m_dmadac[0] = machine().device<dmadac_sound_device>("dac1");
 	m_dmadac[1] = machine().device<dmadac_sound_device>("dac2");
 	dmadac_enable(&m_dmadac[0], 2, 1);
-	m_ide->reset();
 }

 static ADDRESS_MAP_START( ramdac_map, AS_0, 8, mediagx_state )
@ -882,8 +881,8 @@ static MACHINE_CONFIG_START( mediagx, mediagx_state )
 	MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
 	MCFG_PCI_BUS_LEGACY_DEVICE(18, NULL, cx5510_pci_r, cx5510_pci_w)

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

 	MCFG_TIMER_DRIVER_ADD("sound_timer", mediagx_state, sound_timer_callback)

@ -1014,7 +1013,7 @@ ROM_START( a51site4 )
 	ROM_REGION(0x08100, "gfx1", 0)
 	ROM_LOAD("cga.chr",     0x00000, 0x01000, CRC(42009069) SHA1(ed08559ce2d7f97f68b9f540bddad5b6295294dd))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "a51site4-2_01", 0, SHA1(48496666d1613700ae9274f9a5361ea5bbaebea0) ) /* Happ replacement drive "A-22509", sticker on drive shows REV 2.01 and Test Mode screen shows the date September 7, 1998 */
 ROM_END

@ -1028,7 +1027,7 @@ ROM_START( a51site4a ) /* When dumped connected straight to IDE the cylinders we
 	ROM_REGION(0x08100, "gfx1", 0)
 	ROM_LOAD("cga.chr",     0x00000, 0x01000, CRC(42009069) SHA1(ed08559ce2d7f97f68b9f540bddad5b6295294dd))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "a51site4-2_0", 0, SHA1(4de421e4d1708ecbdfb50730000814a1ea36a044) ) /* Stock drive, sticker on drive shows REV 2.0 and Test Mode screen shows the date September 11, 1998 */
 ROM_END

--- a/src/mame/drivers/midqslvr.c
+++ b/src/mame/drivers/midqslvr.c
@ -372,11 +372,11 @@ static ADDRESS_MAP_START(midqslvr_io, AS_IO, 32, midqslvr_state)
 	AM_IMPORT_FROM(pcat32_io_common)
 	AM_RANGE(0x00e8, 0x00ef) AM_NOP

-	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
+	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff)
 	AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
 	AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
 	AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
-	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1_pc, write_cs1_pc, 0xffffffff)
+	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff)

 	AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
 ADDRESS_MAP_END
@ -418,8 +418,8 @@ static MACHINE_CONFIG_START( midqslvr, midqslvr_state )
 	MCFG_PCI_BUS_LEGACY_DEVICE( 0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
 	MCFG_PCI_BUS_LEGACY_DEVICE(31, NULL, intel82371ab_pci_r, intel82371ab_pci_w)

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

 	/* video hardware */
 	MCFG_FRAGMENT_ADD( pcvideo_vga )
@ -434,7 +434,7 @@ ROM_START( offrthnd )
 //  ROM_LOAD16_BYTE( "trident_tgui9680_bios.bin", 0x0000, 0x4000, BAD_DUMP CRC(1eebde64) SHA1(67896a854d43a575037613b3506aea6dae5d6a19) )
 //  ROM_CONTINUE(                                 0x0001, 0x4000 )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "offrthnd", 0, SHA1(d88f1c5b75361a1e310565a8a5a09c674a4a1a22) )
 ROM_END

@ -446,7 +446,7 @@ ROM_START( hydrthnd )
 //  ROM_LOAD16_BYTE( "trident_tgui9680_bios.bin", 0x0000, 0x4000, BAD_DUMP CRC(1eebde64) SHA1(67896a854d43a575037613b3506aea6dae5d6a19) )
 //  ROM_CONTINUE(                                 0x0001, 0x4000 )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "hydro", 0,  SHA1(d481d178782943c066b41764628a419cd55f676d) )
 ROM_END

@ -458,7 +458,7 @@ ROM_START( arctthnd )
 //  ROM_LOAD16_BYTE( "trident_tgui9680_bios.bin", 0x0000, 0x4000, BAD_DUMP CRC(1eebde64) SHA1(67896a854d43a575037613b3506aea6dae5d6a19) )
 //  ROM_CONTINUE(                                 0x0001, 0x4000 )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "arctthnd", 0,  SHA1(f4373e57c3f453ac09c735b5d8d99ff811416a23) )
 ROM_END

@ -471,7 +471,7 @@ ROM_START( arctthndult )
 //  ROM_LOAD16_BYTE( "trident_tgui9680_bios.bin", 0x0000, 0x4000, BAD_DUMP CRC(1eebde64) SHA1(67896a854d43a575037613b3506aea6dae5d6a19) )
 //  ROM_CONTINUE(                                 0x0001, 0x4000 )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "uarctict", 0, SHA1(8557a1d7ae8dc41c879350cb1c228f4c27a0dd09) )
 ROM_END

--- a/src/mame/drivers/midvunit.c
+++ b/src/mame/drivers/midvunit.c
@ -29,7 +29,7 @@ Known to exist but not dumped:
 #include "cpu/tms32031/tms32031.h"
 #include "cpu/adsp2100/adsp2100.h"
 #include "audio/dcs.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "machine/midwayic.h"
 #include "machine/nvram.h"
 #include "includes/midvunit.h"
@ -80,7 +80,7 @@ MACHINE_RESET_MEMBER(midvunit_state,midvplus)
 	m_timer[0] = machine().device<timer_device>("timer0");
 	m_timer[1] = machine().device<timer_device>("timer1");

-	machine().device("ide")->reset();
+	machine().device("ata")->reset();
 }


@ -508,7 +508,7 @@ static ADDRESS_MAP_START( midvplus_map, AS_PROGRAM, 32, midvunit_state )
 	AM_RANGE(0x990000, 0x99000f) AM_READWRITE_LEGACY(midway_ioasic_r, midway_ioasic_w)
 	AM_RANGE(0x994000, 0x994000) AM_WRITE(midvunit_control_w)
 	AM_RANGE(0x995020, 0x995020) AM_WRITE(midvunit_cmos_protect_w)
-	AM_RANGE(0x9a0000, 0x9a0007) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0x0000ffff)
+	AM_RANGE(0x9a0000, 0x9a0007) AM_DEVREADWRITE16("ata", ata_interface_device, read_cs0, write_cs0, 0x0000ffff)
 	AM_RANGE(0x9c0000, 0x9c7fff) AM_RAM_WRITE(midvunit_paletteram_w) AM_SHARE("paletteram")
 	AM_RANGE(0x9d0000, 0x9d000f) AM_READWRITE(midvplus_misc_r, midvplus_misc_w) AM_SHARE("midvplus_misc")
 	AM_RANGE(0xa00000, 0xbfffff) AM_READWRITE(midvunit_textureram_r, midvunit_textureram_w) AM_SHARE("textureram")
@ -1042,7 +1042,7 @@ static MACHINE_CONFIG_DERIVED( midvplus, midvcommon )
 	MCFG_DEVICE_REMOVE("nvram")
 	MCFG_NVRAM_HANDLER(midway_serial_pic2)

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true)

 	/* sound hardware */
 	MCFG_FRAGMENT_ADD(dcs2_audio_2115)
@ -1665,7 +1665,7 @@ ROM_START( wargods ) /* Boot EPROM Version 1.0, Game Type: 452 (10/09/1996) */
 	ROM_REGION32_LE( 0x1000000, "user1", 0 )
 	ROM_LOAD( "u41.rom", 0x000000, 0x20000, CRC(398c54cc) SHA1(6c4b5d6ec5c844dcbf181f9d86a9196a088ed2db) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "wargods_10-09-1996", 0, SHA1(7585bc65b1038589cb59d3e7c56e08ca9d7015b8) )
 ROM_END

@ -1676,7 +1676,7 @@ ROM_START( wargodsa ) /* Boot EPROM Version 1.0, Game Type: 452 (08/15/1996) */
 	ROM_REGION32_LE( 0x1000000, "user1", 0 )
 	ROM_LOAD( "u41.rom", 0x000000, 0x20000, CRC(398c54cc) SHA1(6c4b5d6ec5c844dcbf181f9d86a9196a088ed2db) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "wargods_08-15-1996", 0, SHA1(5dee00be40c315fbb1d6e3994dae8e498ab87fb2) )
 ROM_END

@ -1687,7 +1687,7 @@ ROM_START( wargodsb ) /* Boot EPROM Version 1.0, Game Type: 452 (12/11/1995) */
 	ROM_REGION32_LE( 0x1000000, "user1", 0 )
 	ROM_LOAD( "u41.rom", 0x000000, 0x20000, CRC(398c54cc) SHA1(6c4b5d6ec5c844dcbf181f9d86a9196a088ed2db) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "wargods_12-11-1995", 0, SHA1(141063f95867fdcc4b15c844e510696604a70c6a) )
 ROM_END

--- a/src/mame/drivers/photoply.c
+++ b/src/mame/drivers/photoply.c
@ -48,14 +48,14 @@ ADDRESS_MAP_END
 static ADDRESS_MAP_START( photoply_io, AS_IO, 32, photoply_state )
 	AM_IMPORT_FROM(pcat32_io_common)
 	AM_RANGE(0x00e8, 0x00eb) AM_NOP
-	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
+	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff)
 	AM_RANGE(0x0278, 0x027f) AM_RAM //parallel port 2
 	AM_RANGE(0x0378, 0x037f) AM_RAM //parallel port
 	//AM_RANGE(0x03bc, 0x03bf) AM_RAM //parallel port 3
 	AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
 	AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
 	AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
-	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1_pc, write_cs1_pc, 0xffffffff)
+	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff)
 ADDRESS_MAP_END

 #define AT_KEYB_HELPER(bit, text, key1) \
@ -123,8 +123,8 @@ static MACHINE_CONFIG_START( photoply, photoply_state )

 	MCFG_GFXDECODE( photoply )

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

 	MCFG_FRAGMENT_ADD( pcvideo_vga )
 MACHINE_CONFIG_END
@ -143,7 +143,7 @@ ROM_START(photoply)
 	ROM_REGION(0x8000, "video_bios", 0 )
 	ROM_LOAD("vga.bin", 0x000000, 0x8000, CRC(7a859659) SHA1(ff667218261969c48082ec12aa91088a01b0cb2a) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "pp201", 0, SHA1(23e1940d485d19401e7d0ad912ddad2cf2ea10b4) )
 ROM_END

--- a/src/mame/drivers/pinball2k.c
+++ b/src/mame/drivers/pinball2k.c
@ -579,8 +579,8 @@ static MACHINE_CONFIG_START( mediagx, pinball2k_state )
 	MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
 	MCFG_PCI_BUS_LEGACY_DEVICE(18, NULL, cx5510_pci_r, cx5510_pci_w)

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

 	MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map)

--- a/src/mame/drivers/pyson.c
+++ b/src/mame/drivers/pyson.c
@ -221,7 +221,7 @@ ROM_START( pyson )
 	PYSON_BIOS

 	ROM_REGION(0x840000, "key", ROMREGION_ERASE00)
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 ROM_END

 ROM_START( wswe )
@ -235,7 +235,7 @@ ROM_START( wswe )
 	ROM_REGION(0x2000, "timekeeper", ROMREGION_ERASE00)
 		ROM_LOAD( "m48t58y.u48",       0x000000, 0x002000, CRC(d4181cb5) SHA1(c5560d1ac043bfe2527fac3fb1989fa8fc53cf8a) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE_READONLY( "c18jaa03", 0, SHA1(b47190aa38f1f3a499b817758e3f29fac54391bd) )
 ROM_END

@ -250,7 +250,7 @@ ROM_START( wswe2k3 )
 	ROM_REGION(0x2000, "timekeeper", ROMREGION_ERASE00)
 		ROM_LOAD( "m48t58y.u48",       0x000000, 0x002000, CRC(76068de0) SHA1(5f75b88ad04871fb3799fe904658c87524bad94f) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE_READONLY( "c27jaa03", 0, SHA1(9b2aa900711d88cf5effb3ba6be18726ea006ac4) )
 ROM_END

--- a/src/mame/drivers/qdrmfgp.c
+++ b/src/mame/drivers/qdrmfgp.c
@ -23,7 +23,7 @@ GP1 HDD data contents:

 #include "emu.h"
 #include "cpu/m68000/m68000.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "sound/k054539.h"
 #include "video/konicdev.h"
 #include "machine/k053252.h"
@ -199,7 +199,7 @@ READ16_MEMBER(qdrmfgp_state::gp2_ide_std_r)
 		}
 	}

-	return m_ide->read_cs0(space, offset, mem_mask);
+	return m_ata->read_cs0(space, offset, mem_mask);
 }


@ -291,8 +291,8 @@ static ADDRESS_MAP_START( qdrmfgp_map, AS_PROGRAM, 16, qdrmfgp_state )
 	AM_RANGE(0x880000, 0x881fff) AM_DEVREADWRITE_LEGACY("k056832", k056832_ram_word_r, k056832_ram_word_w)          /* vram */
 	AM_RANGE(0x882000, 0x883fff) AM_DEVREADWRITE_LEGACY("k056832", k056832_ram_word_r, k056832_ram_word_w)          /* vram (mirror) */
 	AM_RANGE(0x900000, 0x901fff) AM_READ(v_rom_r)                                               /* gfxrom through */
-	AM_RANGE(0xa00000, 0xa0000f) AM_DEVREADWRITE("ide", ide_controller_device, read_cs0, write_cs0) /* IDE control regs */
-	AM_RANGE(0xa40000, 0xa4000f) AM_DEVREADWRITE("ide", ide_controller_device, read_cs1, write_cs1) /* IDE status control reg */
+	AM_RANGE(0xa00000, 0xa0000f) AM_DEVREADWRITE("ata", ata_interface_device, read_cs0, write_cs0) /* IDE control regs */
+	AM_RANGE(0xa40000, 0xa4000f) AM_DEVREADWRITE("ata", ata_interface_device, read_cs1, write_cs1) /* IDE status control reg */
 	AM_RANGE(0xc00000, 0xcbffff) AM_READWRITE(sndram_r, sndram_w)                               /* sound ram */
 ADDRESS_MAP_END

@ -314,8 +314,8 @@ static ADDRESS_MAP_START( qdrmfgp2_map, AS_PROGRAM, 16, qdrmfgp_state )
 	AM_RANGE(0x880000, 0x881fff) AM_READWRITE(gp2_vram_r, gp2_vram_w)                           /* vram */
 	AM_RANGE(0x89f000, 0x8a0fff) AM_READWRITE(gp2_vram_mirror_r, gp2_vram_mirror_w)             /* vram (mirror) */
 	AM_RANGE(0x900000, 0x901fff) AM_READ(v_rom_r)                                               /* gfxrom through */
-	AM_RANGE(0xa00000, 0xa0000f) AM_READ(gp2_ide_std_r) AM_DEVWRITE("ide", ide_controller_device, write_cs0) /* IDE control regs */
-	AM_RANGE(0xa40000, 0xa4000f) AM_DEVREADWRITE("ide", ide_controller_device, read_cs1, write_cs1) /* IDE status control reg */
+	AM_RANGE(0xa00000, 0xa0000f) AM_READ(gp2_ide_std_r) AM_DEVWRITE("ata", ata_interface_device, write_cs0) /* IDE control regs */
+	AM_RANGE(0xa40000, 0xa4000f) AM_DEVREADWRITE("ata", ata_interface_device, read_cs1, write_cs1) /* IDE status control reg */
 	AM_RANGE(0xc00000, 0xcbffff) AM_READWRITE(sndram_r,sndram_w)                                /* sound ram */
 ADDRESS_MAP_END

@ -596,7 +596,6 @@ void qdrmfgp_state::machine_reset()

 	/* reset the IDE controller */
 	m_gp2_irq_control = 0;
-	m_ide->reset();
 }


@ -615,8 +614,8 @@ static MACHINE_CONFIG_START( qdrmfgp, qdrmfgp_state )
 	MCFG_MACHINE_START_OVERRIDE(qdrmfgp_state,qdrmfgp)
 	MCFG_NVRAM_ADD_1FILL("nvram")

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(WRITELINE(qdrmfgp_state, ide_interrupt))
+	MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(qdrmfgp_state, ide_interrupt))

 	/* video hardware */
 	MCFG_SCREEN_ADD("screen", RASTER)
@ -651,8 +650,8 @@ static MACHINE_CONFIG_START( qdrmfgp2, qdrmfgp_state )
 	MCFG_MACHINE_START_OVERRIDE(qdrmfgp_state,qdrmfgp2)
 	MCFG_NVRAM_ADD_1FILL("nvram")

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(WRITELINE(qdrmfgp_state, gp2_ide_interrupt))
+	MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(qdrmfgp_state, gp2_ide_interrupt))

 	/* video hardware */
 	MCFG_SCREEN_ADD("screen", RASTER)
@ -697,7 +696,7 @@ ROM_START( qdrmfgp )
 	ROM_LOAD( "gq_460_a07.14h", 0x000000, 0x80000, CRC(67d8ea6b) SHA1(11af1b5a33de2a6e24823964d210bef193ecefe4) )
 	ROM_LOAD( "gq_460_a06.12h", 0x080000, 0x80000, CRC(97ed5a77) SHA1(68600fd8d914451284cf181fb4bd5872860fb9ad) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "gq460a08", 0, SHA1(2f142f986fa3c79d5c4102e800980d1706c35f75) )
 ROM_END

@ -714,7 +713,7 @@ ROM_START( qdrmfgp2 )
 	ROM_LOAD( "ge_557_a07.19h", 0x000000, 0x80000, CRC(7491e0c8) SHA1(6459ab5e7af052ef7a1c4ce01cd844c0f4319f2e) )
 	ROM_LOAD( "ge_557_a08.19k", 0x080000, 0x80000, CRC(3da2b20c) SHA1(fdc2cdc27f3299f541944a78ce36ed33a7926056) )

-	DISK_REGION( "ide:0:hdd" )            /* IDE HARD DRIVE */
+	DISK_REGION( "ata:0:hdd:image" )            /* IDE HARD DRIVE */
 	DISK_IMAGE( "ge557a09", 0, SHA1(1ef8093b542fe0bf8240a5fd64e5af3839b6a04c) )
 ROM_END

--- a/src/mame/drivers/quakeat.c
+++ b/src/mame/drivers/quakeat.c
@ -92,11 +92,11 @@ ADDRESS_MAP_END
 static ADDRESS_MAP_START( quake_io, AS_IO, 32, quakeat_state )
 	AM_IMPORT_FROM(pcat32_io_common)
 	AM_RANGE(0x00e8, 0x00eb) AM_NOP
-//  AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
+//  AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff)
 	AM_RANGE(0x0300, 0x03af) AM_NOP
 	AM_RANGE(0x03b0, 0x03df) AM_NOP
 //  AM_RANGE(0x0278, 0x027b) AM_WRITE(pnp_config_w)
-//  AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1_pc, write_cs1_pc, 0xffffffff)
+//  AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff)
 //  AM_RANGE(0x0a78, 0x0a7b) AM_WRITE(pnp_data_w)
 //  AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
 ADDRESS_MAP_END
--- a/src/mame/drivers/queen.c
+++ b/src/mame/drivers/queen.c
@ -236,11 +236,11 @@ static ADDRESS_MAP_START( queen_io, AS_IO, 32, queen_state )
 	AM_IMPORT_FROM(pcat32_io_common)
 	AM_RANGE(0x00e8, 0x00ef) AM_NOP

-	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
+	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff)
 	AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
 	AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
 	AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
-	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1_pc, write_cs1_pc, 0xffffffff)
+	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff)

 	AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
 ADDRESS_MAP_END
@ -273,8 +273,8 @@ static MACHINE_CONFIG_START( queen, queen_state )
 	MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
 	MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

 	/* video hardware */
 	MCFG_FRAGMENT_ADD( pcvideo_vga )
@ -291,7 +291,7 @@ ROM_START( queen )
 //  ROM_LOAD16_BYTE( "trident_tgui9680_bios.bin", 0x0000, 0x4000, BAD_DUMP CRC(1eebde64) SHA1(67896a854d43a575037613b3506aea6dae5d6a19) )
 //  ROM_CONTINUE(                                 0x0001, 0x4000 )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "pqiidediskonmodule", 0,SHA1(a56efcc711b1c5a2e63160b3088001a8c4fb56c2) )
 ROM_END

--- a/src/mame/drivers/savquest.c
+++ b/src/mame/drivers/savquest.c
@ -552,12 +552,12 @@ static ADDRESS_MAP_START(savquest_io, AS_IO, 32, savquest_state)

 	AM_RANGE(0x00e8, 0x00ef) AM_NOP

-	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
+	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff)
 	AM_RANGE(0x0378, 0x037b) AM_READWRITE(parallel_port_r, parallel_port_w)
 	AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
 	AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
 	AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
-	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1_pc, write_cs1_pc, 0xffffffff)
+	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff)

 	AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)

@ -619,8 +619,8 @@ static MACHINE_CONFIG_START( savquest, savquest_state )
 	MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
 	MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

 	/* video hardware */
 	MCFG_FRAGMENT_ADD( pcvideo_s3_vga )
@ -636,7 +636,7 @@ ROM_START( savquest )
 	ROM_LOAD( "s3_764.bin",   0x000000, 0x008000, BAD_DUMP CRC(4f10aac7) SHA1(c77b3f11cc15679121314823588887dd547cd715) )
 	ROM_IGNORE( 0x8000 )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "savquest", 0, SHA1(b7c8901172b66706a7ab5f5c91e6912855153fa9) )
 ROM_END

--- a/src/mame/drivers/seattle.c
+++ b/src/mame/drivers/seattle.c
@ -1778,15 +1778,15 @@ READ16_MEMBER(seattle_state::seattle_ide_r)
 	/* note that blitz times out if we don't have this cycle stealing */
 	if (offset == 6/2)
 		m_maincpu->eat_cycles(100);
-	return m_ide->read_cs1_pc(space, offset, mem_mask);
+	return m_ide->read_cs1(space, offset, mem_mask);
 }

 static ADDRESS_MAP_START( seattle_map, AS_PROGRAM, 32, seattle_state )
 	ADDRESS_MAP_UNMAP_HIGH
 	AM_RANGE(0x00000000, 0x007fffff) AM_RAM AM_SHARE("rambase") // wg3dh only has 4MB; sfrush, blitz99 8MB
 	AM_RANGE(0x08000000, 0x08ffffff) AM_DEVREAD_LEGACY("voodoo", voodoo_r) AM_WRITE(seattle_voodoo_w)
-	AM_RANGE(0x0a0001f0, 0x0a0001f7) AM_DEVREADWRITE16("ide", bus_master_ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
-	AM_RANGE(0x0a0003f0, 0x0a0003f7) AM_READ16(seattle_ide_r, 0xffffffff) AM_DEVWRITE16("ide", bus_master_ide_controller_device, write_cs1_pc, 0xffffffff)
+	AM_RANGE(0x0a0001f0, 0x0a0001f7) AM_DEVREADWRITE16("ide", bus_master_ide_controller_device, read_cs0, write_cs0, 0xffffffff)
+	AM_RANGE(0x0a0003f0, 0x0a0003f7) AM_READ16(seattle_ide_r, 0xffffffff) AM_DEVWRITE16("ide", bus_master_ide_controller_device, write_cs1, 0xffffffff)
 	AM_RANGE(0x0a00040c, 0x0a00040f) AM_NOP                     // IDE-related, but annoying
 	AM_RANGE(0x0a000f00, 0x0a000f07) AM_DEVREADWRITE("ide", bus_master_ide_controller_device, ide_bus_master32_r, ide_bus_master32_w)
 	AM_RANGE(0x0c000000, 0x0c000fff) AM_READWRITE(galileo_r, galileo_w)
@ -2535,8 +2535,8 @@ static MACHINE_CONFIG_START( seattle_common, seattle_state )

 	MCFG_NVRAM_ADD_1FILL("nvram")

-	MCFG_BUS_MASTER_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(WRITELINE(seattle_state, ide_interrupt))
+	MCFG_BUS_MASTER_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(seattle_state, ide_interrupt))
 	MCFG_BUS_MASTER_IDE_CONTROLLER_SPACE("maincpu", AS_PROGRAM)

 	MCFG_3DFX_VOODOO_1_ADD("voodoo", STD_VOODOO_1_CLOCK, voodoo_intf)
@ -2628,7 +2628,7 @@ ROM_START( wg3dh )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* Boot Code Version L1.2 (10/8/96) */
 	ROM_LOAD( "wg3dh_12.u32", 0x000000, 0x80000, CRC(15e4cea2) SHA1(72c0db7dc53ce645ba27a5311b5ce803ad39f131) )

-	DISK_REGION( "ide:0:hdd" )    /* Hard Drive Version 1.3 (Guts 10/15/96, Main 10/15/96) */
+	DISK_REGION( "ide:0:hdd:image" )    /* Hard Drive Version 1.3 (Guts 10/15/96, Main 10/15/96) */
 	DISK_IMAGE( "wg3dh", 0, SHA1(4fc6f25d7f043d9bcf8743aa8df1d9be3cbc375b) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* ADSP-2115 data Version L1.1 */
@ -2640,7 +2640,7 @@ ROM_START( mace )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* Boot Code Version 1.0ce 7/2/97 */
 	ROM_LOAD( "mace10ce.u32", 0x000000, 0x80000, CRC(7a50b37e) SHA1(33788835f84a9443566c80bee9f20a1691490c6d) )

-	DISK_REGION( "ide:0:hdd" )    /* Hard Drive Version 1.0B 6/10/97 (Guts 7/2/97, Main 7/2/97) */
+	DISK_REGION( "ide:0:hdd:image" )    /* Hard Drive Version 1.0B 6/10/97 (Guts 7/2/97, Main 7/2/97) */
 	DISK_IMAGE( "mace", 0, SHA1(96ec8d3ff5dd894e21aa81403bcdbeba44bb97ea) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* ADSP-2115 data Version L1.1, Labeled as Version 1.0 */
@ -2652,7 +2652,7 @@ ROM_START( macea )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* Boot Code Version ??? 5/7/97 */
 	ROM_LOAD( "maceboot.u32", 0x000000, 0x80000, CRC(effe3ebc) SHA1(7af3ca3580d6276ffa7ab8b4c57274e15ee6bcbb) )

-	DISK_REGION( "ide:0:hdd" )    /* Hard Drive Version 1.0a (Guts 6/9/97, Main 5/12/97) */
+	DISK_REGION( "ide:0:hdd:image" )    /* Hard Drive Version 1.0a (Guts 6/9/97, Main 5/12/97) */
 	DISK_IMAGE( "macea", 0, BAD_DUMP SHA1(9bd4a60627915d71932cab24f89c48ea21f4c1cb) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* ADSP-2115 data Version L1.1 */
@ -2673,7 +2673,7 @@ ROM_START( sfrush )
 	ROM_LOAD32_WORD( "sfrush.u53",  0x800000, 0x200000, CRC(71f8ddb0) SHA1(c24bef801f43bae68fda043c4356e8cf1298ca97) )
 	ROM_LOAD32_WORD( "sfrush.u49",  0x800002, 0x200000, CRC(dfb0a54c) SHA1(ed34f9485f7a7e5bb73bf5c6428b27548e12db12) )

-	DISK_REGION( "ide:0:hdd" )    /* Hard Drive Version L1.06 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Hard Drive Version L1.06 */
 	DISK_IMAGE( "sfrush", 0, SHA1(e2db0270a707fb2115207f988d5751081d6b4994) )
 ROM_END

@ -2691,7 +2691,7 @@ ROM_START( sfrushrk )
 	ROM_LOAD32_WORD( "audio.u53",  0x800000, 0x200000, CRC(51c89a14) SHA1(6bc62bcda224040a4596d795132874828011a038) )
 	ROM_LOAD32_WORD( "audio.u49",  0x800002, 0x200000, CRC(e6b684d3) SHA1(1f5bab7fae974cecc8756dd23e3c7aa2cf6e7dc7) )

-	DISK_REGION( "ide:0:hdd" )    /* Hard Drive Version 1.2 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Hard Drive Version 1.2 */
 	DISK_IMAGE( "sfrushrk", 0, SHA1(e763f26aca67ebc17fe8b8df4fba91d492cf7837) )
 ROM_END

@ -2700,7 +2700,7 @@ ROM_START( calspeed )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* Boot Code Version 1.2 (2/18/98) */
 	ROM_LOAD( "caspd1_2.u32", 0x000000, 0x80000, CRC(0a235e4e) SHA1(b352f10fad786260b58bd344b5002b6ea7aaf76d) )

-	DISK_REGION( "ide:0:hdd" )    /* Release version 2.1a (4/17/98) (Guts 1.25 4/17/98, Main 4/17/98) */
+	DISK_REGION( "ide:0:hdd:image" )    /* Release version 2.1a (4/17/98) (Guts 1.25 4/17/98, Main 4/17/98) */
 	DISK_IMAGE( "calspeed", 0, SHA1(08d411c591d4b8bbdd6437ea80d01c4cec8516f8) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* ADSP-2115 data Version 1.02 */
@ -2712,7 +2712,7 @@ ROM_START( calspeeda )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* Boot Code Version 1.2 (2/18/98) */
 	ROM_LOAD( "caspd1_2.u32", 0x000000, 0x80000, CRC(0a235e4e) SHA1(b352f10fad786260b58bd344b5002b6ea7aaf76d) )

-	DISK_REGION( "ide:0:hdd" )    /* Release version 1.0r7a (3/4/98) (Guts 3/3/98, Main 1/19/98) */
+	DISK_REGION( "ide:0:hdd:image" )    /* Release version 1.0r7a (3/4/98) (Guts 3/3/98, Main 1/19/98) */
 	DISK_IMAGE( "calspeda", 0, SHA1(6b1c3a7530195ef7309b06a651b01c8b3ece92c6) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* ADSP-2115 data Version 1.02 */
@ -2724,7 +2724,7 @@ ROM_START( vaportrx )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )
 	ROM_LOAD( "vtrxboot.bin", 0x000000, 0x80000, CRC(ee487a6c) SHA1(fb9efda85047cf615f24f7276a9af9fd542f3354) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "vaportrx", 0, SHA1(fe53ca7643d2ed2745086abb7f2243c69678cab1) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* ADSP-2115 data Version 1.02 */
@ -2736,7 +2736,7 @@ ROM_START( vaportrxp )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )
 	ROM_LOAD( "vtrxboot.bin", 0x000000, 0x80000, CRC(ee487a6c) SHA1(fb9efda85047cf615f24f7276a9af9fd542f3354) )

-	DISK_REGION( "ide:0:hdd" ) /* Guts: Apr 10 1998 11:03:14  Main: Apr 10 1998 11:27:44 */
+	DISK_REGION( "ide:0:hdd:image" ) /* Guts: Apr 10 1998 11:03:14  Main: Apr 10 1998 11:27:44 */
 	DISK_IMAGE( "vaportrp", 0, SHA1(6c86637c442ebd6994eee8c0ae0dce343c35dbe9) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* ADSP-2115 data Version 1.02 */
@ -2751,7 +2751,7 @@ ROM_START( biofreak )
 	ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Seattle System Boot ROM Version 0.1i Apr 14 1997  14:52:53 */
 	ROM_LOAD( "biofreak.u32", 0x000000, 0x80000, CRC(cefa00bb) SHA1(7e171610ede1e8a448fb8d175f9cb9e7d549de28) )

-	DISK_REGION( "ide:0:hdd" ) /* Build Date 12/11/97 */
+	DISK_REGION( "ide:0:hdd:image" ) /* Build Date 12/11/97 */
 	DISK_IMAGE( "biofreak", 0, SHA1(711241642f92ded8eaf20c418ea748989183fe10) )
 ROM_END

@ -2763,7 +2763,7 @@ ROM_START( blitz )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* Boot Code Version 1.2 */
 	ROM_LOAD( "blitz1_2.u32", 0x000000, 0x80000, CRC(38dbecf5) SHA1(7dd5a5b3baf83a7f8f877ff4cd3f5e8b5201b36f) )

-	DISK_REGION( "ide:0:hdd" )    /* Hard Drive Version 1.21 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Hard Drive Version 1.21 */
 	DISK_IMAGE( "blitz", 0, SHA1(9131c7888e89b3c172780156ed3fe1fe46f78b0a) )
 ROM_END

@ -2775,7 +2775,7 @@ ROM_START( blitz11 )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* Boot Code Version 1.1 */
 	ROM_LOAD( "blitz1_1.u32", 0x000000, 0x80000, CRC(8163ce02) SHA1(89b432d8879052f6c5534ee49599f667f50a010f) )

-	DISK_REGION( "ide:0:hdd" )    /* Hard Drive Version 1.21 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Hard Drive Version 1.21 */
 	DISK_IMAGE( "blitz", 0, SHA1(9131c7888e89b3c172780156ed3fe1fe46f78b0a) )
 ROM_END

@ -2787,7 +2787,7 @@ ROM_START( blitz99 )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* Boot Code Version 1.0 */
 	ROM_LOAD( "bltz9910.u32", 0x000000, 0x80000, CRC(777119b2) SHA1(40d255181c2f3a787919c339e83593fd506779a5) )

-	DISK_REGION( "ide:0:hdd" )    /* Hard Drive Version 1.30 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Hard Drive Version 1.30 */
 	DISK_IMAGE( "blitz99", 0, SHA1(19877e26ffce81dd525031e9e2b4f83ff982e2d9) )
 ROM_END

@ -2799,7 +2799,7 @@ ROM_START( blitz2k )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* Boot Code Version 1.4 */
 	ROM_LOAD( "bltz2k14.u32", 0x000000, 0x80000, CRC(ac4f0051) SHA1(b8125c17370db7bfd9b783230b4ef3d5b22a2025) )

-	DISK_REGION( "ide:0:hdd" )    /* Hard Drive Version 1.5 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Hard Drive Version 1.5 */
 	DISK_IMAGE( "blitz2k", 0, SHA1(e89b7fbd4b4a9854d47ae97493e0afffbd1f69e7) )
 ROM_END

@ -2811,7 +2811,7 @@ ROM_START( carnevil )
 	ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Rom Version 1.9 */
 	ROM_LOAD( "carnevil1_9.u32", 0x000000, 0x80000, CRC(82c07f2e) SHA1(fa51c58022ce251c53bad12fc6ffadb35adb8162) )

-	DISK_REGION( "ide:0:hdd" )    /* Hard Drive v1.0.3  Diagnostics v3.4 / Feb 1 1999 16:00:07 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Hard Drive v1.0.3  Diagnostics v3.4 / Feb 1 1999 16:00:07 */
 	DISK_IMAGE( "carnevil", 0, SHA1(5cffb0de63ad36eb01c5951bab04d3f8a9e23e16) )
 ROM_END

@ -2823,7 +2823,7 @@ ROM_START( carnevil1 )
 	ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Rom Version 1.9 */
 	ROM_LOAD( "carnevil1_9.u32", 0x000000, 0x80000, CRC(82c07f2e) SHA1(fa51c58022ce251c53bad12fc6ffadb35adb8162) )

-	DISK_REGION( "ide:0:hdd" )    /* Hard Drive v1.0.1  Diagnostics v3.3 / Oct 20 1998 11:44:41 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Hard Drive v1.0.1  Diagnostics v3.3 / Oct 20 1998 11:44:41 */
 	DISK_IMAGE( "carnevi1", 0, BAD_DUMP SHA1(94532727512280930a100fe473bf3a938fe2d44f) )
 ROM_END

@ -2835,7 +2835,7 @@ ROM_START( hyprdriv )
 	ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Rom Version 9. */
 	ROM_LOAD( "hyprdrve.u32", 0x000000, 0x80000, CRC(3e18cb80) SHA1(b18cc4253090ee1d65d72a7ec0c426ed08c4f238) )

-	DISK_REGION( "ide:0:hdd" )    /* Version 1.40  Oct 23 1998  15:16:00 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Version 1.40  Oct 23 1998  15:16:00 */
 	DISK_IMAGE( "hyprdriv", 0, SHA1(8cfa343797575b32f46cc24150024be48963a03e) )
 ROM_END

--- a/src/mame/drivers/taitogn.c
+++ b/src/mame/drivers/taitogn.c
@ -795,7 +795,7 @@ ROM_END
 ROM_START(raycris)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "raycris", 0, SHA1(015cb0e6c4421cc38809de28c4793b4491386aee))
 ROM_END

@ -803,28 +803,28 @@ ROM_END
 ROM_START(gobyrc)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "gobyrc", 0, SHA1(0bee1f495fc8b033fd56aad9260ae94abb35eb58))
 ROM_END

 ROM_START(rcdego)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "rcdego", 0, SHA1(9e177f2a3954cfea0c8c5a288e116324d10f5dd1))
 ROM_END

 ROM_START(chaoshea)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "chaosheat", 0, SHA1(c13b7d7025eee05f1f696d108801c7bafb3f1356))
 ROM_END

 ROM_START(chaosheaj)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "chaosheatj", 0, SHA1(2f211ac08675ea8ec33c7659a13951db94eaa627))
 ROM_END

@ -832,7 +832,7 @@ ROM_END
 ROM_START(flipmaze)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "flipmaze", 0, SHA1(423b6c06f4f2d9a608ce20b61a3ac11687d22c40) )
 ROM_END

@ -840,42 +840,42 @@ ROM_END
 ROM_START(spuzbobl)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "spuzbobl", 0, SHA1(1b1c72fb7e5656021485fefaef8f2ba48e2b4ea8))
 ROM_END

 ROM_START(spuzboblj)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "spuzbobj", 0, SHA1(dac433cf88543d2499bf797d7406b82ae4338726))
 ROM_END

 ROM_START(soutenry)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "soutenry", 0, SHA1(9204d0be833d29f37b8cd3fbdf09da69b622254b))
 ROM_END

 ROM_START(shanghss)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "shanghss", 0, SHA1(7964f71ec5c81d2120d83b63a82f97fbad5a8e6d))
 ROM_END

 ROM_START(sianniv)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "sianniv", 0, SHA1(1e08b813190a9e1baf29bc16884172d6c8da7ae3))
 ROM_END

 ROM_START(kollon)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "kollon", 0, SHA1(d8ea5b5b0ee99004b16ef89883e23de6c7ddd7ce))
 ROM_END

@ -883,14 +883,14 @@ ROM_START(kollonc)
 	TAITOGNET_BIOS
 	ROM_DEFAULT_BIOS( "v2" )

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "kollonc", 0, SHA1(ce62181659701cfb8f7c564870ab902be4d8e060)) /* Original Taito Compact Flash version */
 ROM_END

 ROM_START(shikigam)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "shikigam", 0, SHA1(fa49a0bc47f5cb7c30d7e49e2c3696b21bafb840))
 ROM_END

@ -900,7 +900,7 @@ ROM_END
 ROM_START(otenamih)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "otenamih", 0, SHA1(b3babe3a1876c43745616ee1e7d87276ce7dad0b) )
 ROM_END

@ -908,28 +908,28 @@ ROM_END
 ROM_START(psyvaria)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "psyvaria", 0,  SHA1(b981a42a10069322b77f7a268beae1d409b4156d))
 ROM_END

 ROM_START(psyvarrv)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "psyvarrv", 0, SHA1(277c4f52502bcd7acc1889840962ec80d56465f3))
 ROM_END

 ROM_START(zooo)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "zooo", 0, SHA1(e275b3141b2bc49142990e6b497a5394a314a30b))
 ROM_END

 ROM_START(zokuoten)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "zokuoten", 0, SHA1(5ce13db00518f96af64935176c71ec68d2a51938))
 ROM_END

@ -937,7 +937,7 @@ ROM_START(otenamhf)
 	TAITOGNET_BIOS
 	ROM_DEFAULT_BIOS( "v2" )

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "otenamhf", 0, SHA1(5b15c33bf401e5546d78e905f538513d6ffcf562)) /* Original Taito Compact Flash version */
 ROM_END

@ -949,14 +949,14 @@ ROM_END
 ROM_START(nightrai)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "nightrai", 0, SHA1(74d0458f851cbcf10453c5cc4c47bb4388244cdf))
 ROM_END

 ROM_START(otenki)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "otenki", 0, SHA1(7e745ca4c4570215f452fd09cdd56a42c39caeba))
 ROM_END

@ -965,21 +965,21 @@ ROM_END
 ROM_START(usagi)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "usagi", 0, SHA1(edf9dd271957f6cb06feed238ae21100514bef8e))
 ROM_END

 ROM_START(mahjngoh)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "mahjngoh", 0, SHA1(3ef1110d15582d7c0187438d7ad61765dd121cff))
 ROM_END

 ROM_START(shangtou)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "shanghaito", 0, SHA1(9901db5a9aae77e3af4157aa2c601eaab5b7ca85) )
 ROM_END

@ -989,7 +989,7 @@ ROM_END
 ROM_START(xiistag)
 	TAITOGNET_BIOS

-	DISK_REGION( "pccard:ataflash" )
+	DISK_REGION( "pccard:ataflash:image" )
 	DISK_IMAGE( "xiistag", 0, SHA1(586e37c8d926293b2bd928e5f0d693910cfb05a2))
 ROM_END

--- a/src/mame/drivers/taitotz.c
+++ b/src/mame/drivers/taitotz.c
@ -174,7 +174,7 @@ Notes:
 #include "emu.h"
 #include "cpu/powerpc/ppc.h"
 #include "cpu/tlcs900/tlcs900.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "machine/nvram.h"
 #include "video/polynew.h"

@ -567,7 +567,7 @@ public:
 		m_iocpu(*this, "iocpu"),
 		m_work_ram(*this, "work_ram"),
 		m_mbox_ram(*this, "mbox_ram"),
-		m_ide(*this, "ide")
+		m_ata(*this, "ata")
 	{
 	}

@ -575,7 +575,7 @@ public:
 	required_device<cpu_device> m_iocpu;
 	required_shared_ptr<UINT64> m_work_ram;
 	required_shared_ptr<UINT8>  m_mbox_ram;
-	required_device<ide_controller_device> m_ide;
+	required_device<ata_interface_device> m_ata;

 	DECLARE_READ64_MEMBER(ppc_common_r);
 	DECLARE_WRITE64_MEMBER(ppc_common_w);
@ -2118,7 +2118,7 @@ READ8_MEMBER(taitotz_state::tlcs_ide0_r)
 	{
 		if ((offset & 1) == 0)
 		{
-			ide_cs0_latch_r = m_ide->read_cs0(space, reg, 0xffff);
+			ide_cs0_latch_r = m_ata->read_cs0(space, reg, 0xffff);
 			return (ide_cs0_latch_r & 0xff);
 		}
 		else
@ -2131,7 +2131,7 @@ READ8_MEMBER(taitotz_state::tlcs_ide0_r)
 		if (offset & 1)
 			fatalerror("tlcs_ide0_r: %02X, odd offset\n", offset);

-		UINT8 d = m_ide->read_cs0(space, reg, 0xff);
+		UINT8 d = m_ata->read_cs0(space, reg, 0xff);
 		if (reg == 7)
 			d &= ~0x2;      // Type Zero doesn't like the index bit. It's defined as vendor-specific, so it probably shouldn't be up...
 							// The status check explicitly checks for 0x50 (drive ready, seek complete).
@ -2154,14 +2154,14 @@ WRITE8_MEMBER(taitotz_state::tlcs_ide0_w)
 		{
 			ide_cs0_latch_w &= 0x00ff;
 			ide_cs0_latch_w |= (UINT16)(data) << 8;
-			m_ide->write_cs0(space, reg, ide_cs0_latch_w, 0xffff);
+			m_ata->write_cs0(space, reg, ide_cs0_latch_w, 0xffff);
 		}
 	}
 	else
 	{
 		if (offset & 1)
 			fatalerror("tlcs_ide0_w: %02X, %02X, odd offset\n", offset, data);
-		m_ide->write_cs0(space, reg, data, 0xff);
+		m_ata->write_cs0(space, reg, data, 0xff);
 	}
 }

@ -2174,7 +2174,7 @@ READ8_MEMBER(taitotz_state::tlcs_ide1_r)

 	if ((offset & 1) == 0)
 	{
-		UINT8 d = m_ide->read_cs1(space, reg, 0xff);
+		UINT8 d = m_ata->read_cs1(space, reg, 0xff);
 		d &= ~0x2;      // Type Zero doesn't like the index bit. It's defined as vendor-specific, so it probably shouldn't be up...
 						// The status check explicitly checks for 0x50 (drive ready, seek complete).
 		return d;
@ -2182,7 +2182,7 @@ READ8_MEMBER(taitotz_state::tlcs_ide1_r)
 	else
 	{
 		//fatalerror("tlcs_ide1_r: %02X, odd offset\n", offset);
-		UINT8 d = m_ide->read_cs1(space, reg, 0xff);
+		UINT8 d = m_ata->read_cs1(space, reg, 0xff);
 		d &= ~0x2;
 		return d;
 	}
@ -2204,7 +2204,7 @@ WRITE8_MEMBER(taitotz_state::tlcs_ide1_w)
 	{
 		ide_cs1_latch_w &= 0x00ff;
 		ide_cs1_latch_w |= (UINT16)(data) << 16;
-		m_ide->write_cs1(space, reg, ide_cs1_latch_w, 0xffff);
+		m_ata->write_cs1(space, reg, ide_cs1_latch_w, 0xffff);
 	}
 }

@ -2530,7 +2530,7 @@ void taitotz_state::machine_reset()
 {
 	if (m_hdd_serial_number != NULL)
 	{
-		UINT8 *identify_device = m_ide->identify_device_buffer(0);
+		UINT8 *identify_device = m_ata->identify_device_buffer(0);

 		for (int i=0; i < 20; i++)
 		{
@ -2590,8 +2590,8 @@ static MACHINE_CONFIG_START( taitotz, taitotz_state )

 	MCFG_QUANTUM_TIME(attotime::from_hz(120))

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(WRITELINE(taitotz_state, ide_interrupt))
+	MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(taitotz_state, ide_interrupt))

 	MCFG_NVRAM_ADD_0FILL("nvram")

@ -2724,7 +2724,7 @@ ROM_START( taitotz )
 	ROM_REGION( 0x40000, "io_cpu", ROMREGION_ERASE00 )
 	ROM_REGION( 0x10000, "sound_cpu", ROMREGION_ERASE00 ) /* Internal ROM :( */
 	ROM_REGION( 0x500, "plds", ROMREGION_ERASE00 )
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 ROM_END

 ROM_START( landhigh )
@ -2743,7 +2743,7 @@ ROM_START( landhigh )
 	ROM_LOAD( "e82-02.ic45", 0x117, 0x2dd, CRC(f581cff5) SHA1(468e0e6a3828f2dcda35c6d523154510f9c99db7) )
 	ROM_LOAD( "e68-06.ic24", 0x3f4, 0x100, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "landhigh", 0, SHA1(7cea4ea5c3899e6ac774a4eb12821f44541d9c9c) )
 ROM_END

@ -2758,7 +2758,7 @@ ROM_START( batlgear )
 	ROM_REGION( 0x10000, "sound_cpu", 0 ) /* Internal ROM :( */
 	ROM_LOAD( "e68-01.ic7", 0x000000, 0x010000, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "batlgear", 0, SHA1(eab283839ad3e0a3e6be11f6482570db334eacca) )
 ROM_END

@ -2773,7 +2773,7 @@ ROM_START( batlgr2 )
 	ROM_REGION( 0x10000, "sound_cpu", 0 ) /* Internal ROM :( */
 	ROM_LOAD( "e68-01.ic7", 0x000000, 0x010000, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "bg2_204j", 0, SHA1(7ac100fba39ae0b93980c0af2f0212a731106912) )
 ROM_END

@ -2788,7 +2788,7 @@ ROM_START( batlgr2a )
 	ROM_REGION( 0x10000, "sound_cpu", 0 ) /* Internal ROM :( */
 	ROM_LOAD( "e68-01.ic7", 0x000000, 0x010000, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "bg2_201j", 0, SHA1(542d12682bd0f95143368578461c6a4fcc492fcc) )
 ROM_END

@ -2812,7 +2812,7 @@ ROM_START( pwrshovl )
 	ROM_REGION( 0x20000, "oki2", 0 )
 	ROM_LOAD( "e74-08.ic8", 0x000000, 0x020000, CRC(ca5baccc) SHA1(4594b7a6232b912d698fff053f7e3f51d8e1bfb6) ) // located on the I/O PCB

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "pwrshovl", 0, SHA1(360f63b39f645851c513b4644fb40601b9ba1412) )
 ROM_END

@ -2827,7 +2827,7 @@ ROM_START( raizpin )
 	ROM_REGION( 0x10000, "sound_cpu", 0 ) /* Internal ROM :( */
 	ROM_LOAD( "e68-01.ic7", 0x000000, 0x010000, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "raizpin", 0, SHA1(883ebcda03026df31da1cdb95af521e100c171ed) )
 ROM_END

--- a/src/mame/drivers/twinkle.c
+++ b/src/mame/drivers/twinkle.c
@ -235,7 +235,7 @@ Notes:
 #include "machine/am53cf96.h"
 #include "machine/rtc65271.h"
 #include "machine/i2cmem.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "sound/spu.h"
 #include "sound/cdda.h"
 #include "sound/rf5c400.h"
@ -713,7 +713,7 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 16, twinkle_state )
 	// 250000 = write to initiate DMA?
 	// 260000 = ???
 	AM_RANGE(0x280000, 0x280fff) AM_READWRITE(shared_68k_r, shared_68k_w )
-	AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("ide", ide_controller_device, read_cs0, write_cs0)
+	AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("ata", ata_interface_device, read_cs0, write_cs0)
 	// 34000E = ???
 	AM_RANGE(0x400000, 0x400fff) AM_DEVREADWRITE("rfsnd", rf5c400_device, rf5c400_r, rf5c400_w)
 	AM_RANGE(0x800000, 0xffffff) AM_READWRITE(twinkle_waveram_r, twinkle_waveram_w )    // 8 MB window wave RAM
@ -839,8 +839,8 @@ static MACHINE_CONFIG_START( twinkle, twinkle_state )
 	MCFG_AM53CF96_ADD("scsi:am53cf96")
 	MCFG_AM53CF96_IRQ_HANDLER(DEVWRITELINE("^maincpu:irq", psxirq_device, intin10))

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(WRITELINE(twinkle_state, ide_interrupt))
+	MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(twinkle_state, ide_interrupt))

 	MCFG_RTC65271_ADD("rtc", twinkle_rtc)

@ -939,7 +939,7 @@ ROM_START( bmiidx )
 	DISK_REGION( "cdrom1" ) // video CD
 	DISK_IMAGE_READONLY("863jaa04", 0, BAD_DUMP SHA1(8f6a0d2e191153032c9388b5298d8ee531b22a41) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE_READONLY("c44jaa03", 0, SHA1(53e9bd25d1674a04aeec81c0224b4e4e44af802a) ) // was part of a 1st mix machine, but "c44" indicates 8th mix?
 ROM_END

@ -955,7 +955,7 @@ ROM_START( bmiidx2 )
 	DISK_REGION( "cdrom1" ) // video CD
 	DISK_IMAGE_READONLY( "985jaa02", 0, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE_READONLY( "985jaahd", 0, NO_DUMP )
 ROM_END

@ -971,7 +971,7 @@ ROM_START( bmiidx3 )
 	DISK_REGION( "cdrom1" ) // video CD
 	DISK_IMAGE_READONLY( "992jaa02", 0, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE_READONLY( "992jaahd", 0, NO_DUMP )
 ROM_END

@ -987,7 +987,7 @@ ROM_START( bmiidx4 )
 	DISK_REGION( "cdrom1" ) // video CD
 	DISK_IMAGE_READONLY( "a03jaa02", 0, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE_READONLY( "a03jaahd", 0, NO_DUMP )
 ROM_END

@ -1003,7 +1003,7 @@ ROM_START( bmiidx6 )
 	DISK_REGION( "cdrom1" ) // DVD
 	DISK_IMAGE_READONLY( "b4ujaa02", 0, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE_READONLY( "b4ujaahd", 0, NO_DUMP )
 ROM_END

@ -1019,7 +1019,7 @@ ROM_START( bmiidx7 )
 	DISK_REGION( "cdrom1" ) // DVD
 	DISK_IMAGE_READONLY( "b44jaa02", 0, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE_READONLY( "b44jaahd", 0, NO_DUMP )
 ROM_END

@ -1035,7 +1035,7 @@ ROM_START( bmiidx8 )
 	DISK_REGION( "cdrom1" ) // DVD
 	DISK_IMAGE_READONLY( "c44jaa02", 0, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE_READONLY( "c44jaahd", 0, NO_DUMP )
 ROM_END

@ -1051,7 +1051,7 @@ ROM_START( bmiidxc )
 	DISK_REGION( "cdrom1" ) // video CD
 	DISK_IMAGE_READONLY( "abmjaa02", 0, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE_READONLY( "abmjaahd", 0, NO_DUMP )
 ROM_END

@ -1067,7 +1067,7 @@ ROM_START( bmiidxc2 )
 	DISK_REGION( "cdrom1" ) // video CD
 	DISK_IMAGE_READONLY( "abmjaa02", 0, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE_READONLY( "abmjaahd", 0, NO_DUMP )
 ROM_END

@ -1083,7 +1083,7 @@ ROM_START( bmiidxca )
 	DISK_REGION( "cdrom1" ) // video CD
 	DISK_IMAGE_READONLY( "abmjaa02", 0, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE_READONLY( "abmjaahd", 0, NO_DUMP )
 ROM_END

--- a/src/mame/drivers/vegas.c
+++ b/src/mame/drivers/vegas.c
@ -1462,9 +1462,9 @@ static READ32_DEVICE_HANDLER( ide_main_r )

 	UINT32 data = 0;
 	if (ACCESSING_BITS_0_15)
-		data |= ide->read_cs0_pc(space, offset * 2, mem_mask);
+		data |= ide->read_cs0(space, offset * 2, mem_mask);
 	if (ACCESSING_BITS_16_31)
-		data |= ide->read_cs0_pc(space, (offset * 2) + 1, mem_mask >> 16) << 16;
+		data |= ide->read_cs0(space, (offset * 2) + 1, mem_mask >> 16) << 16;

 	return data;
 }
@ -1475,9 +1475,9 @@ static WRITE32_DEVICE_HANDLER( ide_main_w )
 	bus_master_ide_controller_device *ide = (bus_master_ide_controller_device *) device;

 	if (ACCESSING_BITS_0_15)
-		ide->write_cs0_pc(space, offset * 2, data, mem_mask);
+		ide->write_cs0(space, offset * 2, data, mem_mask);
 	if (ACCESSING_BITS_16_31)
-		ide->write_cs0_pc(space, (offset * 2) + 1, data >> 16, mem_mask >> 16);
+		ide->write_cs0(space, (offset * 2) + 1, data >> 16, mem_mask >> 16);
 }


@ -1487,9 +1487,9 @@ static READ32_DEVICE_HANDLER( ide_alt_r )

 	UINT32 data = 0;
 	if (ACCESSING_BITS_0_15)
-		data |= ide->read_cs1_pc(space, (4/2) + (offset * 2), mem_mask);
+		data |= ide->read_cs1(space, (4/2) + (offset * 2), mem_mask);
 	if (ACCESSING_BITS_16_31)
-		data |= ide->read_cs1_pc(space, (4/2) + (offset * 2) + 1, mem_mask >> 16) << 16;
+		data |= ide->read_cs1(space, (4/2) + (offset * 2) + 1, mem_mask >> 16) << 16;

 	return data;
 }
@ -1500,9 +1500,9 @@ static WRITE32_DEVICE_HANDLER( ide_alt_w )
 	bus_master_ide_controller_device *ide = (bus_master_ide_controller_device *) device;

 	if (ACCESSING_BITS_0_15)
-		ide->write_cs1_pc(space, 6/2 + offset * 2, data, mem_mask);
+		ide->write_cs1(space, 6/2 + offset * 2, data, mem_mask);
 	if (ACCESSING_BITS_16_31)
-		ide->write_cs1_pc(space, 6/2 + (offset * 2) + 1, data >> 16, mem_mask >> 16);
+		ide->write_cs1(space, 6/2 + (offset * 2) + 1, data >> 16, mem_mask >> 16);
 }


@ -2279,8 +2279,8 @@ static MACHINE_CONFIG_START( vegascore, vegas_state )

 	MCFG_M48T37_ADD("timekeeper")

-	MCFG_BUS_MASTER_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(WRITELINE(vegas_state, ide_interrupt))
+	MCFG_BUS_MASTER_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(vegas_state, ide_interrupt))
 	MCFG_BUS_MASTER_IDE_CONTROLLER_SPACE("maincpu", AS_PROGRAM)

 	MCFG_SMC91C94_ADD("ethernet", ethernet_intf)
@ -2371,7 +2371,7 @@ ROM_START( gauntleg )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* EPROM 1.5 11/17/1998 */
 	ROM_LOAD( "legend15.bin", 0x000000, 0x80000, CRC(a8372d70) SHA1(d8cd4fd4d7007ee38bb58b5a818d0f83043d5a48) )

-	DISK_REGION( "ide:0:hdd" )    /* Guts 1.5 1/14/1999 Game 1/14/1999 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Guts 1.5 1/14/1999 Game 1/14/1999 */
 	DISK_IMAGE( "gauntleg", 0, SHA1(66eb70e2fba574a7abe54be8bd45310654b24b08) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* Vegas SIO boot ROM */
@ -2383,7 +2383,7 @@ ROM_START( gauntleg12 )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* EPROM 1.3 9/25/1998 */
 	ROM_LOAD( "legend12.bin", 0x000000, 0x80000, CRC(34674c5f) SHA1(92ec1779f3ab32944cbd953b6e1889503a57794b) )

-	DISK_REGION( "ide:0:hdd" )    /* Guts 1.4 10/22/1998 Main 10/23/1998 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Guts 1.4 10/22/1998 Main 10/23/1998 */
 	DISK_IMAGE( "gauntl12", 0, SHA1(c8208e3ce3b02a271dc6b089efa98dd996b66ce0) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* Vegas SIO boot ROM */
@ -2395,7 +2395,7 @@ ROM_START( gauntdl )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* EPROM 1.7 12/14/1999 */
 	ROM_LOAD( "gauntdl.bin", 0x000000, 0x80000, CRC(3d631518) SHA1(d7f5a3bc109a19c9c7a711d607ff87e11868b536) )

-	DISK_REGION( "ide:0:hdd" )    /* Guts: 1.9 3/17/2000 Game 5/9/2000 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Guts: 1.9 3/17/2000 Game 5/9/2000 */
 	DISK_IMAGE( "gauntdl", 0, SHA1(ba3af48171e727c2f7232c06dcf8411cbcf14de8) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* Vegas SIO boot ROM */
@ -2407,7 +2407,7 @@ ROM_START( gauntdl24 )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* EPROM 1.7 12/14/1999 */
 	ROM_LOAD( "gauntdl.bin", 0x000000, 0x80000, CRC(3d631518) SHA1(d7f5a3bc109a19c9c7a711d607ff87e11868b536) )

-	DISK_REGION( "ide:0:hdd" )    /* Guts: 1.9 3/17/2000 Game 3/19/2000 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Guts: 1.9 3/17/2000 Game 3/19/2000 */
 	DISK_IMAGE( "gauntd24", 0, SHA1(3e055794d23d62680732e906cfaf9154765de698) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* Vegas SIO boot ROM */
@ -2419,7 +2419,7 @@ ROM_START( warfa )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* EPROM 1.9 3/25/1999 */
 	ROM_LOAD( "warboot.v19", 0x000000, 0x80000, CRC(b0c095cd) SHA1(d3b8cccdca83f0ecb49aa7993864cfdaa4e5c6f0) )

-	DISK_REGION( "ide:0:hdd" )    /* Guts 1.3 4/20/1999 Game 4/20/1999 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Guts 1.3 4/20/1999 Game 4/20/1999 */
 	DISK_IMAGE( "warfa", 0, SHA1(87f8a8878cd6be716dbd6c68fb1bc7f564ede484) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* Vegas SIO boot ROM */
@ -2431,7 +2431,7 @@ ROM_START( tenthdeg )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )
 	ROM_LOAD( "tenthdeg.bio", 0x000000, 0x80000, CRC(1cd2191b) SHA1(a40c48f3d6a9e2760cec809a79a35abe762da9ce) )

-	DISK_REGION( "ide:0:hdd" )    /* Guts 5/26/1998 Main 8/25/1998 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Guts 5/26/1998 Main 8/25/1998 */
 	DISK_IMAGE( "tenthdeg", 0, SHA1(41a1a045a2d118cf6235be2cc40bf16dbb8be5d1) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* Vegas SIO boot ROM */
@ -2443,7 +2443,7 @@ ROM_START( roadburn )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* EPROM 2.6 4/22/1999 */
 	ROM_LOAD( "rbmain.bin", 0x000000, 0x80000, CRC(060e1aa8) SHA1(2a1027d209f87249fe143500e721dfde7fb5f3bc) )

-	DISK_REGION( "ide:0:hdd" )    /* Guts 4/22/1999 Game 4/22/1999 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Guts 4/22/1999 Game 4/22/1999 */
 	DISK_IMAGE( "roadburn", 0, SHA1(a62870cceafa6357d7d3505aca250c3f16087566) )
 ROM_END

@ -2452,7 +2452,7 @@ ROM_START( nbashowt )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )
 	ROM_LOAD( "nbau27.100", 0x000000, 0x80000, CRC(ff5d620d) SHA1(8f07567929f40a2269a42495dfa9dd5edef688fe) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "nbashowt", 0, SHA1(f7c56bc3dcbebc434de58034986179ae01127f87) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* Vegas SIO boot ROM */
@ -2465,7 +2465,7 @@ ROM_START( nbanfl )
 	ROM_LOAD( "u27nflnba.bin", 0x000000, 0x80000, CRC(6a9bd382) SHA1(18b942df6af86ea944c24166dbe88148334eaff9) )
 //  ROM_LOAD( "bootnflnba.bin", 0x000000, 0x80000, CRC(3def7053) SHA1(8f07567929f40a2269a42495dfa9dd5edef688fe) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "nbanfl", 0, SHA1(f60c627f85f1bf58f2ea674063736a1e516e7e9e) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* Vegas SIO boot ROM */
@ -2477,7 +2477,7 @@ ROM_START( cartfury )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )
 	ROM_LOAD( "bootu27", 0x000000, 0x80000, CRC(c44550a2) SHA1(ad30f1c3382ff2f5902a4cbacbb1f0c4e37f42f9) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "cartfury", 0, SHA1(4c5bc2803297ea9a191bbd8b002d0e46b4ae1563) )

 	ROM_REGION16_LE( 0x10000, "dcs", 0 )    /* ADSP-2105 data */
@ -2489,7 +2489,7 @@ ROM_START( sf2049 )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )  /* EPROM 1.02 7/9/1999 */
 	ROM_LOAD( "sf2049.u27", 0x000000, 0x80000, CRC(174ba8fe) SHA1(baba83b811eca659f00514a008a86ef0ac9680ee) )

-	DISK_REGION( "ide:0:hdd" )    /* Guts 1.03 9/3/1999 Game 9/8/1999 */
+	DISK_REGION( "ide:0:hdd:image" )    /* Guts 1.03 9/3/1999 Game 9/8/1999 */
 	DISK_IMAGE( "sf2049", 0, SHA1(9e0661b8566a6c78d18c59c11cd3a6628d025405) )
 ROM_END

@ -2498,7 +2498,7 @@ ROM_START( sf2049se )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )
 	ROM_LOAD( "sf2049se.u27", 0x000000, 0x80000, CRC(da4ecd9c) SHA1(2574ff3d608ebcc59a63cf6dea13ee7650ae8921) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "sf2049se", 0, SHA1(7b27a8ce2a953050ce267548bb7160b41f3e8054) )
 ROM_END

@ -2507,7 +2507,7 @@ ROM_START( sf2049te )
 	ROM_REGION32_LE( 0x80000, "user1", 0 )
 	ROM_LOAD( "sf2049te.u27", 0x000000, 0x80000, CRC(cc7c8601) SHA1(3f37dbd1b32b3ac5caa300725468e8e426f0fb83) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "sf2049te", 0, SHA1(625aa36436587b7bec3e7db1d19793b760e2ea51) )
 ROM_END

--- a/src/mame/drivers/viper.c
+++ b/src/mame/drivers/viper.c
@ -284,7 +284,7 @@ An additional control PCB is used for Mocap Golf for the golf club sensor. It co
 #include "emu.h"
 #include "cpu/powerpc/ppc.h"
 #include "machine/pci.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "machine/timekpr.h"
 #include "video/voodoo.h"

@ -310,7 +310,7 @@ public:
 	viper_state(const machine_config &mconfig, device_type type, const char *tag)
 		: driver_device(mconfig, type, tag),
 		m_maincpu(*this, "maincpu"),
-		m_ide(*this, "ide")
+		m_ata(*this, "ata")
 	{
 	}

@ -363,7 +363,7 @@ public:
 	int ds2430_insert_cmd_bit(int bit);
 	void DS2430_w(int bit);
 	required_device<cpu_device> m_maincpu;
-	required_device<ide_controller_device> m_ide;
+	required_device<ata_interface_device> m_ata;
 };

 UINT32 viper_state::screen_update_viper(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
@ -1266,7 +1266,7 @@ READ64_MEMBER(viper_state::cf_card_data_r)
 		{
 			case 0x8:   // Duplicate Even RD Data
 			{
-				r |= m_ide->read_cs0(space, 0, mem_mask >> 16) << 16;
+				r |= m_ata->read_cs0(space, 0, mem_mask >> 16) << 16;
 				break;
 			}

@ -1287,7 +1287,7 @@ WRITE64_MEMBER(viper_state::cf_card_data_w)
 		{
 			case 0x8:   // Duplicate Even RD Data
 			{
-				m_ide->write_cs0(space, 0, data >> 16, mem_mask >> 16);
+				m_ata->write_cs0(space, 0, data >> 16, mem_mask >> 16);
 				break;
 			}

@ -1318,7 +1318,7 @@ READ64_MEMBER(viper_state::cf_card_r)
 				case 0x6:   // Select Card/Head
 				case 0x7:   // Status
 				{
-					r |= m_ide->read_cs0(space, offset & 7, mem_mask >> 16) << 16;
+					r |= m_ata->read_cs0(space, offset & 7, mem_mask >> 16) << 16;
 					break;
 				}

@ -1327,13 +1327,13 @@ READ64_MEMBER(viper_state::cf_card_r)

 				case 0xd:   // Duplicate Error
 				{
-					r |= m_ide->read_cs0(space, 1, mem_mask >> 16) << 16;
+					r |= m_ata->read_cs0(space, 1, mem_mask >> 16) << 16;
 					break;
 				}
 				case 0xe:   // Alt Status
 				case 0xf:   // Drive Address
 				{
-					r |= m_ide->read_cs1(space, offset & 7, mem_mask >> 16) << 16;
+					r |= m_ata->read_cs1(space, offset & 7, mem_mask >> 16) << 16;
 					break;
 				}

@ -1383,7 +1383,7 @@ WRITE64_MEMBER(viper_state::cf_card_w)
 				case 0x6:   // Select Card/Head
 				case 0x7:   // Command
 				{
-					m_ide->write_cs0(space, offset & 7, data >> 16, mem_mask >> 16);
+					m_ata->write_cs0(space, offset & 7, data >> 16, mem_mask >> 16);
 					break;
 				}

@ -1392,13 +1392,13 @@ WRITE64_MEMBER(viper_state::cf_card_w)

 				case 0xd:   // Duplicate Features
 				{
-					m_ide->write_cs0(space, 1, data >> 16, mem_mask >> 16);
+					m_ata->write_cs0(space, 1, data >> 16, mem_mask >> 16);
 					break;
 				}
 				case 0xe:   // Device Ctl
 				case 0xf:   // Reserved
 				{
-					m_ide->write_cs1(space, offset & 7, data >> 16, mem_mask >> 16);
+					m_ata->write_cs1(space, offset & 7, data >> 16, mem_mask >> 16);
 					break;
 				}

@ -1419,7 +1419,7 @@ WRITE64_MEMBER(viper_state::cf_card_w)
 						m_cf_card_ide = 1;

 						// soft reset
-						m_ide->write_cs1(space, 6, 0x04, 0xff);
+						m_ata->write_cs1(space, 6, 0x04, 0xff);
 					}
 					break;
 				}
@ -1454,10 +1454,10 @@ READ64_MEMBER(viper_state::ata_r)
 		switch(offset & 0x80)
 		{
 		case 0x00:
-			r |= m_ide->read_cs0(space, reg, mem_mask >> 16) << 16;
+			r |= m_ata->read_cs0(space, reg, mem_mask >> 16) << 16;
 			break;
 		case 0x80:
-			r |= m_ide->read_cs1(space, reg, mem_mask >> 16) << 16;
+			r |= m_ata->read_cs1(space, reg, mem_mask >> 16) << 16;
 			break;
 		}
 	}
@ -1474,10 +1474,10 @@ WRITE64_MEMBER(viper_state::ata_w)
 		switch(offset & 0x80)
 		{
 		case 0x00:
-			m_ide->write_cs0(space, reg, data >> 16, mem_mask >> 16);
+			m_ata->write_cs0(space, reg, data >> 16, mem_mask >> 16);
 			break;
 		case 0x80:
-			m_ide->write_cs1(space, reg, data >> 16, mem_mask >> 16);
+			m_ata->write_cs1(space, reg, data >> 16, mem_mask >> 16);
 			break;
 		}
 	}
@ -2021,10 +2021,9 @@ void viper_state::machine_start()

 void viper_state::machine_reset()
 {
-	m_ide->reset();
 	mpc8240_epic_reset();

-	UINT8 *identify_device = m_ide->identify_device_buffer(0);
+	UINT8 *identify_device = m_ata->identify_device_buffer(0);

 	// Viper expects these settings or the BIOS fails
 	identify_device[51*2+0] = 0;           /* 51: PIO data transfer cycle timing mode */
@ -2057,7 +2056,7 @@ static MACHINE_CONFIG_START( viper, viper_state )
 	MCFG_PCI_BUS_LEGACY_DEVICE(0, "mpc8240", mpc8240_pci_r, mpc8240_pci_w)
 	MCFG_PCI_BUS_LEGACY_DEVICE(12, "voodoo", voodoo3_pci_r, voodoo3_pci_w)

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true)

 	MCFG_3DFX_VOODOO_3_ADD("voodoo", STD_VOODOO_3_CLOCK, voodoo_intf)

@ -2126,7 +2125,7 @@ ROM_START(ppp2nd)

 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "ppp2nd", 0, SHA1(b8b90483d515c83eac05ffa617af19612ea990b0))
 ROM_END

@ -2140,7 +2139,7 @@ ROM_START(boxingm) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("a45jaa_nvram.u39", 0x00000, 0x2000, CRC(c24e29fc) SHA1(efb6ecaf25cbdf9d8dfcafa85e38a195fa5ff6c4))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "a45a02", 0, SHA1(9af2481f53de705ae48fad08d8dd26553667c2d0) )
 ROM_END

@ -2153,7 +2152,7 @@ ROM_START(code1d) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("nvram.u39", 0x00000, 0x2000, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "922d02", 0, SHA1(01f35e324c9e8567da0f51b3e68fff1562c32116) )
 ROM_END

@ -2166,7 +2165,7 @@ ROM_START(code1db) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("nvram.u39", 0x00000, 0x2000, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "922b02", 0, SHA1(4d288b5dcfab3678af662783e7083a358eee99ce) )
 ROM_END

@ -2180,7 +2179,7 @@ ROM_START(gticlub2) //*
 	ROM_LOAD("nvram.u39", 0x00000, 0x2000, CRC(d0604e84) SHA1(18d1183f1331af3e655a56692eb7ab877b4bc239)) //old dump, probably has non-default settings.
 	ROM_LOAD("941jab_nvram.u39", 0x00000, 0x2000, CRC(6c4a852f) SHA1(2753dda42cdd81af22dc6780678f1ddeb3c62013))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "941b02", 0,  SHA1(943bc9b1ea7273a8382b94c8a75010dfe296df14) )
 ROM_END

@ -2190,7 +2189,7 @@ ROM_START(gticlub2ea) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("941eaa_nvram.u39", 0x00000, 0x2000, CRC(5ee7004d) SHA1(92e0ce01049308f459985d466fbfcfac82f34a47))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "941a02", 0,  NO_DUMP )
 ROM_END

@ -2203,7 +2202,7 @@ ROM_START(jpark3) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("b41ebc_nvram.u39", 0x00000, 0x2000, CRC(55d1681d) SHA1(26868cf0d14f23f06b81f2df0b4186924439bb43))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "b41c02", 0, SHA1(fb6b0b43a6f818041d644bcd711f6a727348d3aa) )
 ROM_END

@ -2217,7 +2216,7 @@ ROM_START(mocapglf) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("b33uaa_nvram.u39", 0x00000, 0x1ff8, BAD_DUMP CRC(0f0ba988) SHA1(5618c03b21fc2ba14b2e159cee3aab7f53c2c34d)) //data looks plain bad (compared to the other games)

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "b33a02", 0, SHA1(819d8fac5d2411542c1b989105cffe38a5545fc2) )
 ROM_END

@ -2230,7 +2229,7 @@ ROM_START(mocapb) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("a29aaa_nvram.u39", 0x000000, 0x2000, CRC(14b9fe68) SHA1(3c59e6df1bb46bc1835c13fd182b1bb092c08759)) //supposed to be aab version?

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "a29b02", 0, SHA1(f0c04310caf2cca804fde20805eb30a44c5a6796) ) //missing bootloader
 ROM_END

@ -2243,7 +2242,7 @@ ROM_START(mocapbj) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("a29jaa_nvram.u39", 0x000000, 0x2000, CRC(2f7cdf27) SHA1(0b69d8728be12909e235268268a312982f81d46a))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "a29a02", 0, SHA1(00afad399737652b3e17257c70a19f62e37f3c97) )
 ROM_END

@ -2256,7 +2255,7 @@ ROM_START(p911) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("a00uad_nvram.u39", 0x000000, 0x2000, CRC(cca056ca) SHA1(de1a00d84c1311d48bbe6d24f5b36e22ecf5e85a))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "a00uad02", 0, SHA1(6acb8dc41920e7025b87034a3a62b185ef0109d9) )
 ROM_END

@ -2269,7 +2268,7 @@ ROM_START(p911uc) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("a00uac_nvram.u39", 0x000000, 0x2000,  NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "a00uac02", 0, SHA1(b268789416dbf8886118a634b911f0ee254970de) )
 ROM_END

@ -2282,7 +2281,7 @@ ROM_START(p911kc) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("a00kac_nvram.u39", 0x000000, 0x2000,  CRC(8ddc921c) SHA1(901538da237679fc74966a301278b36d1335671f) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "a00kac02", 0, SHA1(b268789416dbf8886118a634b911f0ee254970de) )
 ROM_END

@ -2295,7 +2294,7 @@ ROM_START(p911e) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("a00eaa_nvram.u39", 0x000000, 0x2000,  CRC(4f3497b6) SHA1(3045c54f98dff92cdf3a1fc0cd4c76ba82d632d7) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "a00eaa02", 0, SHA1(81565a2dce2e2b0a7927078a784354948af1f87c) )
 ROM_END

@ -2308,7 +2307,7 @@ ROM_START(p911j) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("a00jaa_nvram.u39", 0x000000, 0x2000, CRC(9ecf70dc) SHA1(4769a99b0cc28563e219860b8d480f32d1e21f60))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "a00jac02", 0, SHA1(d962d3a8ea84c380767d0fe336296911c289c224) )
 ROM_END

@ -2321,7 +2320,7 @@ ROM_START(p9112) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("nvram.u39", 0x000000, 0x2000, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "b11a02", 0, SHA1(57665664321b78c1913d01f0d2c0b8d3efd42e04) )
 ROM_END

@ -2334,7 +2333,7 @@ ROM_START(popn9) //Note: this is actually a Konami Pyson HW! (PlayStation 2-base
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("nvram.u39", 0x000000, 0x2000, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "c00jab", 0, BAD_DUMP SHA1(3763aaded9b45388a664edd84a3f7f8ff4101be4) )
 ROM_END

@ -2347,7 +2346,7 @@ ROM_START(sscopex)
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("a13uaa_nvram.u39", 0x000000, 0x2000, CRC(7b0e1ac8) SHA1(1ea549964539e27f87370e9986bfa44eeed037cd))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "a13c02", 0, SHA1(d740784fa51a3f43695ea95e23f92ef05f43284a) )
 ROM_END

@ -2362,7 +2361,7 @@ ROM_START(sogeki) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("nvram.u39", 0x000000, 0x2000, CRC(2f325c55) SHA1(0bc44f40f981a815c8ce64eae95ae55db510c565))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "a13b02", 0, SHA1(c25a61b76d365794c2da4a9e7de88a5519e944ec) )
 ROM_END

@ -2376,7 +2375,7 @@ ROM_START(thrild2) //*
 	ROM_LOAD("a41ebb_nvram.u39", 0x00000, 0x2000, CRC(22f59ac0) SHA1(e14ea2ba95b72edf0a3331ab82c192760bfdbce3))
 //  a41eba_nvram == a41ebb_nvram

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "a41b02", 0, SHA1(0426f4bb9001cf457f44e2c22e3d7575b8049aa3) )
 ROM_END

@ -2389,7 +2388,7 @@ ROM_START(thrild2a) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("a41aaa_nvram.u39", 0x00000, 0x2000, CRC(d5de9b8e) SHA1(768bcd46a6ad20948f60f5e0ecd2f7b9c2901061))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "a41a02", 0, SHA1(bbb71e23bddfa07dfa30b6565a35befd82b055b8) )
 ROM_END

@ -2403,7 +2402,7 @@ ROM_START(thrild2c) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("941eaa_nvram.u39", 0x00000, 0x2000, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "a41c02", 0, SHA1(ab3020e8709768c0fd2467573e92b679a05944e5) )
 ROM_END

@ -2416,7 +2415,7 @@ ROM_START(tsurugi) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("a30eab_nvram.u39", 0x00000, 0x2000, CRC(c123342c) SHA1(55416767608fe0311a362854a16b214b04435a31))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "a30b02", 0, SHA1(d2be83b7323c365ba445de7697c3fb8eb83d0212) )
 ROM_END

@ -2429,7 +2428,7 @@ ROM_START(tsurugij) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("a30jac_nvram.u39", 0x00000, 0x2000, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "a30c02", 0, SHA1(533b5669b00884a800df9ba29651777a76559862) )
 ROM_END

@ -2443,7 +2442,7 @@ ROM_START(wcombat) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("wcombat_nvram.u39", 0x00000, 0x2000, CRC(4f8b5858) SHA1(68066241c6f9db7f45e55b3c5da101987f4ce53c))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "c22d02", 0, BAD_DUMP SHA1(85d2a8b5ec4cfd932190486cad991f0c180ca6b3) )
 ROM_END

@ -2453,7 +2452,7 @@ ROM_START(wcombatk) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("wcombatk_nvram.u39", 0x00000, 0x2000, CRC(ebd4d645) SHA1(2fa7e2c6b113214f3eb1900c8ceef4d5fcf0bb76))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "c22c02", 0, BAD_DUMP SHA1(8bd1dfbf926ad5b28fa7dafd7e31c475325ec569) )
 ROM_END

@ -2466,7 +2465,7 @@ ROM_START(wcombatj) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("wcombatj_nvram.u39", 0x00000, 0x2000, CRC(bd8a6640) SHA1(2d409197ef3fb07d984d27fa943f29c7a711d715))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "c22a02", 0, BAD_DUMP SHA1(b607fb2ddfd0bd552b7a736cea4ac1aa3ea021bd) )
 ROM_END

@ -2479,7 +2478,7 @@ ROM_START(xtrial) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("b4xjab_nvram.u39", 0x00000, 0x2000, CRC(33708a93) SHA1(715968e3c9c15edf628fa6ac655dc0864e336c6c))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "b4xb02", 0, SHA1(d8d54f3f16b762bf0187fe29b2f8696015c0a940) )
 ROM_END

@ -2541,7 +2540,7 @@ ROM_START(mfightc) //*
 	ROM_LOAD("nvram.u39", 0x00000, 0x2000, CRC(9fb551a5) SHA1(a33d185e186d404c3bf62277d7e34e5ad0000b09)) //likely non-default settings
 	ROM_LOAD("c09jad_nvram.u39", 0x00000, 0x2000, CRC(33e960b7) SHA1(a9a249e68c89b18d4685f1859fe35dc21df18e14))

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "c09d04", 0, SHA1(7395b7a33e953f65827aea44461e49f8388464fb) )
 ROM_END

@ -2555,7 +2554,7 @@ ROM_START(mfightcc) //*
 	ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)     /* M48T58 Timekeeper NVRAM */
 	ROM_LOAD("c09jac_nvram.u39", 0x00000, 0x2000, NO_DUMP )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "c09c04", 0, SHA1(bf5f7447d74399d34edd4eb6dfcca7f6fc2154f2) )
 ROM_END

--- a/src/mame/drivers/voyager.c
+++ b/src/mame/drivers/voyager.c
@ -248,7 +248,7 @@ static ADDRESS_MAP_START( voyager_io, AS_IO, 32, voyager_state )
 	//AM_RANGE(0x00e8, 0x00eb) AM_NOP
 	AM_RANGE(0x00e8, 0x00ef) AM_NOP //AMI BIOS write to this ports as delays between I/O ports operations sending al value -> NEWIODELAY
 	AM_RANGE(0x0170, 0x0177) AM_NOP //To debug
-	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
+	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff)
 	AM_RANGE(0x0200, 0x021f) AM_NOP //To debug
 	AM_RANGE(0x0260, 0x026f) AM_NOP //To debug
 	AM_RANGE(0x0278, 0x027b) AM_WRITENOP//AM_WRITE(pnp_config_w)
@ -267,7 +267,7 @@ static ADDRESS_MAP_START( voyager_io, AS_IO, 32, voyager_state )
 	AM_RANGE(0x0378, 0x037f) AM_NOP //To debug
 	// AM_RANGE(0x0300, 0x03af) AM_NOP
 	// AM_RANGE(0x03b0, 0x03df) AM_NOP
-	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1_pc, write_cs1_pc, 0xffffffff)
+	AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff)
 	AM_RANGE(0x03f8, 0x03ff) AM_NOP // To debug Serial Port COM1:
 	AM_RANGE(0x0a78, 0x0a7b) AM_WRITENOP//AM_WRITE(pnp_data_w)
 	AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
@ -480,8 +480,8 @@ static MACHINE_CONFIG_START( voyager, voyager_state )

 	MCFG_FRAGMENT_ADD( pcat_common )

-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

 	MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
 	MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
@ -511,7 +511,7 @@ ROM_START( voyager )

 	ROM_REGION( 0x800, "nvram", ROMREGION_ERASE00 )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE_READONLY( "voyager", 0, SHA1(8b94f2420f6abb40148e4ba6eed8819d8e85dbde))
 ROM_END

--- a/src/mame/drivers/vp101.c
+++ b/src/mame/drivers/vp101.c
@ -15,7 +15,7 @@

 #include "emu.h"
 #include "cpu/mips/mips3.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"


 class vp10x_state : public driver_device
@ -103,7 +103,7 @@ ROM_START(jnero)
 	ROM_REGION(0x80000, "pic", 0)       /* PIC18c422 program - read-protected, need dumped */
 	ROM_LOAD( "8722a-1206.bin", 0x000000, 0x80000, NO_DUMP )

-	DISK_REGION( "ide" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE_READONLY("jn010108", 0, SHA1(4f3e9c6349c9be59213df1236dba7d79e7cd704e) )
 ROM_END

@ -115,7 +115,7 @@ ROM_START(specfrce)
 	ROM_REGION(0x80000, "pic", 0)       /* PIC18c422 I/P program - read-protected, need dumped */
 	ROM_LOAD( "special_forces_et_u7_rev1.2.u7", 0x000000, 0x80000, NO_DUMP )

-	DISK_REGION( "ide" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE_READONLY("sf010101", 0, SHA1(59b5e3d8e1d5537204233598830be2066aad0556) )
 ROM_END

--- a/src/mame/drivers/zn.c
+++ b/src/mame/drivers/zn.c
@ -19,6 +19,7 @@
 #include "machine/7200fifo.h"
 #include "machine/znsec.h"
 #include "machine/zndip.h"
+#include "machine/ataintf.h"
 #include "machine/idectrl.h"
 #include "audio/taitosnd.h"
 #include "sound/2610intf.h"
@ -88,10 +89,8 @@ public:
 	DECLARE_MACHINE_RESET(coh1000c);
 	DECLARE_MACHINE_RESET(coh1000ta);
 	DECLARE_MACHINE_RESET(coh1000tb);
-	DECLARE_MACHINE_RESET(coh1000w);
 	DECLARE_MACHINE_RESET(coh1002e);
 	DECLARE_MACHINE_RESET(bam2);
-	DECLARE_MACHINE_RESET(jdredd);
 	DECLARE_MACHINE_RESET(coh1001l);
 	DECLARE_MACHINE_RESET(coh1002v);
 	DECLARE_MACHINE_RESET(coh1002m);
@ -1359,20 +1358,17 @@ static ADDRESS_MAP_START(coh1000w_map, AS_PROGRAM, 32, zn_state)
 	AM_RANGE(0x1f000000, 0x1f1fffff) AM_ROM AM_REGION("roms", 0)
 	AM_RANGE(0x1f000000, 0x1f000003) AM_WRITENOP
 	AM_RANGE(0x1f7e8000, 0x1f7e8003) AM_NOP
+	// 8/16
 	AM_RANGE(0x1f7e4030, 0x1f7e403f) AM_DEVREADWRITE8("ide", ide_controller_device, read_via_config, write_via_config, 0xffffffff)
-	AM_RANGE(0x1f7e41f0, 0x1f7e41f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
-	AM_RANGE(0x1f7e43f0, 0x1f7e43f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1_pc, write_cs1_pc, 0xffffffff)
-	AM_RANGE(0x1f7f41f0, 0x1f7f41f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, 0xffffffff)
-	AM_RANGE(0x1f7f43f0, 0x1f7f43f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1_pc, write_cs1_pc, 0xffffffff)
+	AM_RANGE(0x1f7e41f0, 0x1f7e41f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff)
+	AM_RANGE(0x1f7e43f0, 0x1f7e43f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff)
+	// 32
+	AM_RANGE(0x1f7f41f0, 0x1f7f41f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff)
+	AM_RANGE(0x1f7f43f0, 0x1f7f43f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff)

 	AM_IMPORT_FROM(zn_map)
 ADDRESS_MAP_END

-MACHINE_RESET_MEMBER(zn_state,coh1000w)
-{
-	m_ide->reset();
-}
-
 static MACHINE_CONFIG_DERIVED( coh1000w, zn1_2mb_vram )
 	MCFG_CPU_MODIFY("maincpu")
 	MCFG_CPU_PROGRAM_MAP(coh1000w_map)
@ -1380,10 +1376,8 @@ static MACHINE_CONFIG_DERIVED( coh1000w, zn1_2mb_vram )
 	MCFG_RAM_MODIFY("maincpu:ram")
 	MCFG_RAM_DEFAULT_SIZE("8M")

-	MCFG_MACHINE_RESET_OVERRIDE(zn_state, coh1000w )
-
-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("maincpu:irq", psxirq_device, intin10))
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("maincpu:irq", psxirq_device, intin10))
 	MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( zn_state::atpsx_dma_read ), (zn_state *) owner ) )
 	MCFG_PSX_DMA_CHANNEL_WRITE( "maincpu", 5, psx_dma_write_delegate( FUNC( zn_state::atpsx_dma_write ), (zn_state *) owner ) )
 MACHINE_CONFIG_END
@ -1956,17 +1950,12 @@ static ADDRESS_MAP_START(nbajamex_map, AS_PROGRAM, 32, zn_state)
 ADDRESS_MAP_END

 static ADDRESS_MAP_START(jdredd_map, AS_PROGRAM, 32, zn_state)
-	AM_RANGE(0x1fbfff80, 0x1fbfff8f) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff)
-	AM_RANGE(0x1fbfff90, 0x1fbfff9f) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff)
+	AM_RANGE(0x1fbfff80, 0x1fbfff8f) AM_DEVREADWRITE16("ata", ata_interface_device, read_cs1, write_cs1, 0xffffffff)
+	AM_RANGE(0x1fbfff90, 0x1fbfff9f) AM_DEVREADWRITE16("ata", ata_interface_device, read_cs0, write_cs0, 0xffffffff)

 	AM_IMPORT_FROM(coh1000a_map)
 ADDRESS_MAP_END

-MACHINE_RESET_MEMBER(zn_state,jdredd)
-{
-	m_ide->reset();
-}
-
 static MACHINE_CONFIG_DERIVED( coh1000a, zn1_2mb_vram )
 	MCFG_CPU_MODIFY("maincpu")
 	MCFG_CPU_PROGRAM_MAP(coh1000a_map)
@ -1986,10 +1975,8 @@ static MACHINE_CONFIG_DERIVED( jdredd, zn1_2mb_vram )
 	MCFG_DEVICE_MODIFY("gpu")
 	MCFG_PSXGPU_VBLANK_CALLBACK(vblank_state_delegate( FUNC( zn_state::jdredd_vblank ), (zn_state *) owner))

-	MCFG_MACHINE_RESET_OVERRIDE(zn_state, jdredd)
-
-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("maincpu:irq", psxirq_device, intin10))
+	MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("maincpu:irq", psxirq_device, intin10))
 MACHINE_CONFIG_END

 /*
@ -4399,7 +4386,7 @@ ROM_START( bam2 )
 	ROM_LOAD( "mtr-bam-a09.u31", 0x2400000, 0x400000, CRC(e4bd7cec) SHA1(794d10b15a22aeed89082f4db2f3cb94aa7d807d) )
 	ROM_LOAD( "mtr-bam-a10.u32", 0x2800000, 0x400000, CRC(37fd1fa0) SHA1(afe846a817e499c405a5fd4ad83094270640faf3) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE("bam2", 0, SHA1(634d9a745a82c567fc4d7ce48e3570d88326c5f9) )
 ROM_END

@ -4423,7 +4410,7 @@ ROM_START( primrag2 )
 	ROM_LOAD16_BYTE( "pr2_036.u17",  0x100001, 0x080000, CRC(3681516c) SHA1(714f73ea4ac190c36a6eb2308616a4aecabc4e69) )
 	ROM_LOAD16_BYTE( "pr2_036.u15",  0x100000, 0x080000, CRC(4b24bd54) SHA1(7f27cd524d10e5869aab6d4dc6a4217d049c475d) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "primrag2", 0, SHA1(bc615068ddf4fd967f770ee01c02f285c052c4c5) )
 ROM_END

@ -4475,7 +4462,7 @@ ROM_START( jdredd )
 	ROM_LOAD16_BYTE( "j-dread.u36",  0x000001, 0x020000, CRC(37addbf9) SHA1(a4061a1ba9e230f080f0bfea69bf77efe9264a92) )
 	ROM_LOAD16_BYTE( "j-dread.u35",  0x000000, 0x020000, CRC(c1e17191) SHA1(82901439b1a51b9aadb4df4b9d944f26697a1460) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ata:0:hdd:image" )
 	DISK_IMAGE( "jdreddc", 0, SHA1(eee205f83e5f590f8baf36452c873d7063156bd0) )
 ROM_END

@ -4486,7 +4473,7 @@ ROM_START( jdreddb )
 	ROM_LOAD16_BYTE( "j-dread.u36",  0x000001, 0x020000, CRC(37addbf9) SHA1(a4061a1ba9e230f080f0bfea69bf77efe9264a92) )
 	ROM_LOAD16_BYTE( "j-dread.u35",  0x000000, 0x020000, CRC(c1e17191) SHA1(82901439b1a51b9aadb4df4b9d944f26697a1460) )

-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "ide:0:hdd:image" )
 	DISK_IMAGE( "jdreddb", 0, SHA1(20f696fa6e1fbf97793bac2a794631c5dd4fb39a) )
 ROM_END

--- a/src/mame/includes/djmain.h
+++ b/src/mame/includes/djmain.h
@ -1,4 +1,4 @@
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"

 class djmain_state : public driver_device
 {
@ -9,7 +9,7 @@ public:
 		m_maincpu(*this, "maincpu"),
 		m_k056832(*this, "k056832"),
 		m_k055555(*this, "k055555"),
-		m_ide(*this, "ide")
+		m_ata(*this, "ata")
 	{
 	}

@ -21,8 +21,8 @@ public:
 	UINT8 m_pending_vb_int;
 	UINT16 m_v_ctrl;
 	UINT32 m_obj_regs[0xa0/4];
-	const UINT8 *m_ide_user_password;
-	const UINT8 *m_ide_master_password;
+	const UINT8 *m_ata_user_password;
+	const UINT8 *m_ata_master_password;
 	required_shared_ptr<UINT32> m_obj_ram;
 	DECLARE_WRITE32_MEMBER(paletteram32_w);
 	DECLARE_WRITE32_MEMBER(sndram_bank_w);
@ -65,7 +65,7 @@ public:
 	required_device<cpu_device> m_maincpu;
 	required_device<k056832_device> m_k056832;
 	required_device<k055555_device> m_k055555;
-	required_device<ide_controller_device> m_ide;
+	required_device<ata_interface_device> m_ata;
 };

 /*----------- defined in video/djmain.c -----------*/
--- a/src/mame/includes/qdrmfgp.h
+++ b/src/mame/includes/qdrmfgp.h
@ -1,4 +1,4 @@
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "sound/k054539.h"

 class qdrmfgp_state : public driver_device
@ -11,7 +11,7 @@ public:
 		m_workram(*this, "workram"),
 		m_k056832(*this, "k056832"),
 		m_k054539(*this, "k054539"),
-		m_ide(*this, "ide")
+		m_ata(*this, "ata")
 	{
 	}

@ -21,7 +21,7 @@ public:
 	required_shared_ptr<UINT16> m_workram;
 	required_device<k056832_device> m_k056832;
 	required_device<k054539_device> m_k054539;
-	required_device<ide_controller_device> m_ide;
+	required_device<ata_interface_device> m_ata;
 	UINT16 m_control;
 	INT32 m_gp2_irq_control;
 	INT32 m_pal;
--- a/src/mess/drivers/bebox.c
+++ b/src/mess/drivers/bebox.c
@ -53,14 +53,14 @@ static ADDRESS_MAP_START( bebox_mem, AS_PROGRAM, 64, bebox_state )
 	AM_RANGE(0x80000080, 0x8000009F) AM_READWRITE8(bebox_page_r, bebox_page_w, U64(0xffffffffffffffff) )
 	AM_RANGE(0x800000A0, 0x800000BF) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, U64(0xffffffffffffffff) )
 	AM_RANGE(0x800000C0, 0x800000DF) AM_READWRITE8(at_dma8237_1_r, at_dma8237_1_w, U64(0xffffffffffffffff))
-	AM_RANGE(0x800001F0, 0x800001F7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0_pc, write_cs0_pc, U64(0xffffffffffffffff) )
+	AM_RANGE(0x800001F0, 0x800001F7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, U64(0xffffffffffffffff) )
 	AM_RANGE(0x800002F8, 0x800002FF) AM_DEVREADWRITE8( "ns16550_1", ns16550_device, ins8250_r, ins8250_w, U64(0xffffffffffffffff) )
 	AM_RANGE(0x80000380, 0x80000387) AM_DEVREADWRITE8( "ns16550_2", ns16550_device, ins8250_r, ins8250_w, U64(0xffffffffffffffff) )
 	AM_RANGE(0x80000388, 0x8000038F) AM_DEVREADWRITE8( "ns16550_3", ns16550_device, ins8250_r, ins8250_w, U64(0xffffffffffffffff) )
 	AM_RANGE(0x800003b0, 0x800003bf) AM_DEVREADWRITE8("vga", cirrus_vga_device, port_03b0_r, port_03b0_w, U64(0xffffffffffffffff))
 	AM_RANGE(0x800003c0, 0x800003cf) AM_DEVREADWRITE8("vga", cirrus_vga_device, port_03c0_r, port_03c0_w, U64(0xffffffffffffffff))
 	AM_RANGE(0x800003d0, 0x800003df) AM_DEVREADWRITE8("vga", cirrus_vga_device, port_03d0_r, port_03d0_w, U64(0xffffffffffffffff))
-	AM_RANGE(0x800003F0, 0x800003F7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1_pc, write_cs1_pc, U64(0xffffffffffffffff) )
+	AM_RANGE(0x800003F0, 0x800003F7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, U64(0xffffffffffffffff) )
 	AM_RANGE(0x800003F0, 0x800003F7) AM_DEVICE8( "smc37c78", smc37c78_device, map, U64(0xffffffffffffffff) )
 	AM_RANGE(0x800003F8, 0x800003FF) AM_DEVREADWRITE8( "ns16550_0",ns16550_device,  ins8250_r, ins8250_w, U64(0xffffffffffffffff) )
 	AM_RANGE(0x80000480, 0x8000048F) AM_READWRITE8(bebox_80000480_r, bebox_80000480_w, U64(0xffffffffffffffff) )
@ -218,8 +218,8 @@ static MACHINE_CONFIG_START( bebox, bebox_state )
 	MCFG_SCSIDEV_ADD("scsi:cdrom", SCSICD, SCSI_ID_3)
 	MCFG_LSI53C810_ADD( "scsi:lsi53c810", lsi53c810_intf)

-	MCFG_IDE_CONTROLLER_ADD( "ide", ide_devices, "hdd", NULL, false ) /* FIXME */
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(WRITELINE(bebox_state, bebox_ide_interrupt))
+	MCFG_IDE_CONTROLLER_ADD( "ide", ata_devices, "hdd", NULL, false ) /* FIXME */
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(bebox_state, bebox_ide_interrupt))

 	/* pci */
 	MCFG_PCI_BUS_ADD("pcibus", 0)
--- a/src/mess/machine/a2cffa.c
+++ b/src/mess/machine/a2cffa.c
@ -11,7 +11,7 @@

 #include "a2cffa.h"
 #include "includes/apple2.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "imagedev/harddriv.h"


@ -29,10 +29,10 @@ const device_type A2BUS_CFFA2 = &device_creator<a2bus_cffa2_device>;
 const device_type A2BUS_CFFA2_6502 = &device_creator<a2bus_cffa2_6502_device>;

 #define CFFA2_ROM_REGION  "cffa2_rom"
-#define CFFA2_IDE_TAG     "cffa2_ide"
+#define CFFA2_ATA_TAG     "cffa2_ata"

 MACHINE_CONFIG_FRAGMENT( cffa2 )
-	MCFG_IDE_CONTROLLER_ADD(CFFA2_IDE_TAG, ide_devices, "hdd", "hdd", false)
+	MCFG_ATA_INTERFACE_ADD(CFFA2_ATA_TAG, ata_devices, "hdd", "hdd", false)
 MACHINE_CONFIG_END

 ROM_START( cffa2 )
@ -81,7 +81,7 @@ const rom_entry *a2bus_cffa2_6502_device::device_rom_region() const
 a2bus_cffa2000_device::a2bus_cffa2000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
 	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
 	device_a2bus_card_interface(mconfig, *this),
-	m_ide(*this, CFFA2_IDE_TAG)
+	m_ata(*this, CFFA2_ATA_TAG)
 {
 }

@ -143,7 +143,7 @@ UINT8 a2bus_cffa2000_device::read_c0nx(address_space &space, UINT8 offset)
 			break;

 		case 8:
-			m_lastdata = m_ide->read_cs0(space, offset-8, 0xffff);
+			m_lastdata = m_ata->read_cs0(space, offset-8, 0xffff);
 			return m_lastdata & 0xff;

 		case 9:
@ -153,7 +153,7 @@ UINT8 a2bus_cffa2000_device::read_c0nx(address_space &space, UINT8 offset)
 		case 0xd:
 		case 0xe:
 		case 0xf:
-			return m_ide->read_cs0(space, offset-8, 0xff);
+			return m_ata->read_cs0(space, offset-8, 0xff);
 	}

 	return 0xff;
@ -184,7 +184,7 @@ void a2bus_cffa2000_device::write_c0nx(address_space &space, UINT8 offset, UINT8
 		case 8:
 			m_lastdata &= 0xff00;
 			m_lastdata |= data;
-			m_ide->write_cs0(space, offset-8, m_lastdata, 0xffff);
+			m_ata->write_cs0(space, offset-8, m_lastdata, 0xffff);
 			break;

 		case 9:
@ -194,7 +194,7 @@ void a2bus_cffa2000_device::write_c0nx(address_space &space, UINT8 offset, UINT8
 		case 0xd:
 		case 0xe:
 		case 0xf:
-			m_ide->write_cs0(space, offset-8, data, 0xff);
+			m_ata->write_cs0(space, offset-8, data, 0xff);
 			break;
 	}
 }
--- a/src/mess/machine/a2cffa.h
+++ b/src/mess/machine/a2cffa.h
@ -12,7 +12,7 @@

 #include "emu.h"
 #include "machine/a2bus.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"

 //**************************************************************************
 //  TYPE DEFINITIONS
@ -41,7 +41,7 @@ protected:
 	virtual UINT8 read_c800(address_space &space, UINT16 offset);
 	virtual void write_c800(address_space &space, UINT16 offset, UINT8 data);

-	required_device<ide_controller_device> m_ide;
+	required_device<ata_interface_device> m_ata;

 	UINT8 *m_rom;
 	UINT8 m_eeprom[0x1000];
--- a/src/mess/machine/a2vulcan.c
+++ b/src/mess/machine/a2vulcan.c
@ -53,7 +53,7 @@

 #include "a2vulcan.h"
 #include "includes/apple2.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "imagedev/harddriv.h"

 //**************************************************************************
@ -63,10 +63,10 @@
 const device_type A2BUS_VULCAN = &device_creator<a2bus_vulcan_device>;

 #define VULCAN_ROM_REGION  "vulcan_rom"
-#define VULCAN_IDE_TAG     "vulcan_ide"
+#define VULCAN_ATA_TAG     "vulcan_ata"

 static MACHINE_CONFIG_FRAGMENT( vulcan )
-	MCFG_IDE_CONTROLLER_ADD(VULCAN_IDE_TAG, ide_devices, "hdd", "hdd", false)
+	MCFG_ATA_INTERFACE_ADD(VULCAN_ATA_TAG, ata_devices, "hdd", "hdd", false)
 MACHINE_CONFIG_END

 ROM_START( vulcan )
@ -104,7 +104,7 @@ const rom_entry *a2bus_vulcanbase_device::device_rom_region() const
 a2bus_vulcanbase_device::a2bus_vulcanbase_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
 	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
 	device_a2bus_card_interface(mconfig, *this),
-	m_ide(*this, VULCAN_IDE_TAG)
+	m_ata(*this, VULCAN_ATA_TAG)
 {
 }

@ -151,7 +151,7 @@ UINT8 a2bus_vulcanbase_device::read_c0nx(address_space &space, UINT8 offset)
 	switch (offset)
 	{
 		case 0:
-			m_lastdata = m_ide->read_cs0(space, offset, 0xffff);
+			m_lastdata = m_ata->read_cs0(space, offset, 0xffff);
 //          printf("IDE: read %04x\n", m_lastdata);
 			m_last_read_was_0 = true;
 			return m_lastdata&0xff;
@ -164,7 +164,7 @@ UINT8 a2bus_vulcanbase_device::read_c0nx(address_space &space, UINT8 offset)
 			}
 			else
 			{
-				return m_ide->read_cs0(space, offset, 0xff);
+				return m_ata->read_cs0(space, offset, 0xff);
 			}
 			break;

@ -174,7 +174,7 @@ UINT8 a2bus_vulcanbase_device::read_c0nx(address_space &space, UINT8 offset)
 		case 5:
 		case 6:
 		case 7:
-			return m_ide->read_cs0(space, offset, 0xff);
+			return m_ata->read_cs0(space, offset, 0xff);

 		default:
 //          printf("Read @ C0n%x\n", offset);
@ -206,11 +206,11 @@ void a2bus_vulcanbase_device::write_c0nx(address_space &space, UINT8 offset, UIN
 				m_lastdata &= 0x00ff;
 				m_lastdata |= (data << 8);
 //              printf("IDE: write %04x\n", m_lastdata);
-				m_ide->write_cs0(space, offset, m_lastdata, 0xffff);
+				m_ata->write_cs0(space, offset, m_lastdata, 0xffff);
 			}
 			else
 			{
-				m_ide->write_cs0(space, offset, data, 0xff);
+				m_ata->write_cs0(space, offset, data, 0xff);
 			}
 			break;

@ -221,7 +221,7 @@ void a2bus_vulcanbase_device::write_c0nx(address_space &space, UINT8 offset, UIN
 		case 6:
 		case 7:
 //          printf("%02x to IDE controller @ %x\n", data, offset);
-			m_ide->write_cs0(space, offset, data, 0xff);
+			m_ata->write_cs0(space, offset, data, 0xff);
 			break;

 		case 9: // ROM bank
--- a/src/mess/machine/a2vulcan.h
+++ b/src/mess/machine/a2vulcan.h
@ -11,7 +11,7 @@

 #include "emu.h"
 #include "machine/a2bus.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"

 //**************************************************************************
 //  TYPE DEFINITIONS
@ -40,7 +40,7 @@ protected:
 	virtual UINT8 read_c800(address_space &space, UINT16 offset);
 	virtual void write_c800(address_space &space, UINT16 offset, UINT8 data);

-	required_device<ide_controller_device> m_ide;
+	required_device<ata_interface_device> m_ata;

 	UINT8 *m_rom;
 	UINT8 m_ram[8*1024];
--- a/src/mess/machine/a2zipdrive.c
+++ b/src/mess/machine/a2zipdrive.c
@ -19,7 +19,7 @@

 #include "a2zipdrive.h"
 #include "includes/apple2.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "imagedev/harddriv.h"

 //**************************************************************************
@ -29,10 +29,10 @@
 const device_type A2BUS_ZIPDRIVE = &device_creator<a2bus_zipdrive_device>;

 #define ZIPDRIVE_ROM_REGION  "zipdrive_rom"
-#define ZIPDRIVE_IDE_TAG     "zipdrive_ide"
+#define ZIPDRIVE_ATA_TAG     "zipdrive_ata"

 static MACHINE_CONFIG_FRAGMENT( zipdrive )
-	MCFG_IDE_CONTROLLER_ADD(ZIPDRIVE_IDE_TAG, ide_devices, "hdd", "hdd", false)
+	MCFG_ATA_INTERFACE_ADD(ZIPDRIVE_ATA_TAG, ata_devices, "hdd", "hdd", false)
 MACHINE_CONFIG_END

 ROM_START( zipdrive )
@ -70,7 +70,7 @@ const rom_entry *a2bus_zipdrivebase_device::device_rom_region() const
 a2bus_zipdrivebase_device::a2bus_zipdrivebase_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
 	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
 	device_a2bus_card_interface(mconfig, *this),
-	m_ide(*this, ZIPDRIVE_IDE_TAG)
+	m_ata(*this, ZIPDRIVE_ATA_TAG)
 {
 }

@ -116,10 +116,10 @@ UINT8 a2bus_zipdrivebase_device::read_c0nx(address_space &space, UINT8 offset)
 		case 5:
 		case 6:
 		case 7:
-			return m_ide->read_cs0(space, offset, 0xff);
+			return m_ata->read_cs0(space, offset, 0xff);

 		case 8: // data port
-			m_lastdata = m_ide->read_cs0(space, offset, 0xffff);
+			m_lastdata = m_ata->read_cs0(space, offset, 0xffff);
 //          printf("%04x @ IDE data\n", m_lastdata);
 			return m_lastdata&0xff;

@ -152,7 +152,7 @@ void a2bus_zipdrivebase_device::write_c0nx(address_space &space, UINT8 offset, U
 		case 6:
 		case 7:
 //          printf("%02x to IDE controller @ %x\n", data, offset);
-			m_ide->write_cs0(space, offset, data, 0xff);
+			m_ata->write_cs0(space, offset, data, 0xff);
 			break;

 		case 8:
@ -164,7 +164,7 @@ void a2bus_zipdrivebase_device::write_c0nx(address_space &space, UINT8 offset, U
 //          printf("%02x to IDE data hi\n", data);
 			m_lastdata &= 0x00ff;
 			m_lastdata |= (data << 8);
-			m_ide->write_cs0(space, offset, m_lastdata, 0xffff);
+			m_ata->write_cs0(space, offset, m_lastdata, 0xffff);
 			break;

 		default:
--- a/src/mess/machine/a2zipdrive.h
+++ b/src/mess/machine/a2zipdrive.h
@ -13,7 +13,7 @@

 #include "emu.h"
 #include "machine/a2bus.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"

 //**************************************************************************
 //  TYPE DEFINITIONS
@ -41,7 +41,7 @@ protected:
 	virtual UINT8 read_cnxx(address_space &space, UINT8 offset);
 	virtual UINT8 read_c800(address_space &space, UINT16 offset);

-	required_device<ide_controller_device> m_ide;
+	required_device<ata_interface_device> m_ata;

 	UINT8 *m_rom;

--- a/src/mess/machine/adam_ide.c
+++ b/src/mess/machine/adam_ide.c
@ -25,7 +25,7 @@
 //  MACROS/CONSTANTS
 //**************************************************************************

-#define IDE_TAG             "ide"
+#define ATA_TAG             "ata"
 #define CENTRONICS_TAG      "centronics"


@ -38,10 +38,10 @@ const device_type ADAM_IDE = &device_creator<powermate_ide_device>;


 //-------------------------------------------------
-//  ROM( adam_ide )
+//  ROM( adam_ata )
 //-------------------------------------------------

-ROM_START( adam_ide )
+ROM_START( adam_ata )
 	ROM_REGION( 0x1000, "rom", 0 )
 	ROM_LOAD( "exp.rom", 0x0000, 0x1000, NO_DUMP )
 ROM_END
@ -53,15 +53,15 @@ ROM_END

 const rom_entry *powermate_ide_device::device_rom_region() const
 {
-	return ROM_NAME( adam_ide );
+	return ROM_NAME( adam_ata );
 }


 //-------------------------------------------------
-//  MACHINE_CONFIG_FRAGMENT( adam_ide )
+//  MACHINE_CONFIG_FRAGMENT( adam_ata )
 //-------------------------------------------------
-static MACHINE_CONFIG_FRAGMENT( adam_ide )
-	MCFG_IDE_CONTROLLER_ADD(IDE_TAG, ide_devices, "hdd", NULL, false)
+static MACHINE_CONFIG_FRAGMENT( adam_ata )
+	MCFG_ATA_INTERFACE_ADD(ATA_TAG, ata_devices, "hdd", NULL, false)
 	MCFG_CENTRONICS_PRINTER_ADD(CENTRONICS_TAG, standard_centronics)
 MACHINE_CONFIG_END

@ -73,7 +73,7 @@ MACHINE_CONFIG_END

 machine_config_constructor powermate_ide_device::device_mconfig_additions() const
 {
-	return MACHINE_CONFIG_NAME( adam_ide );
+	return MACHINE_CONFIG_NAME( adam_ata );
 }


@ -87,9 +87,9 @@ machine_config_constructor powermate_ide_device::device_mconfig_additions() cons
 //-------------------------------------------------

 powermate_ide_device::powermate_ide_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
-	: device_t(mconfig, ADAM_IDE, "Powermate HP IDE", tag, owner, clock, "adam_ide", __FILE__),
+	: device_t(mconfig, ADAM_IDE, "Powermate HP IDE", tag, owner, clock, "adam_ata", __FILE__),
 		device_adam_expansion_slot_card_interface(mconfig, *this),
-		m_ide(*this, IDE_TAG),
+		m_ata(*this, ATA_TAG),
 		m_centronics(*this, CENTRONICS_TAG)
 {
 }
@ -121,7 +121,7 @@ UINT8 powermate_ide_device::adam_bd_r(address_space &space, offs_t offset, UINT8
 		case 0x05:
 		case 0x06:
 		case 0x07:
-			data = m_ide->read_cs0(space, offset & 0x07, 0xff);
+			data = m_ata->read_cs0(space, offset & 0x07, 0xff);
 			break;

 		case 0x40: // Printer status
@ -142,17 +142,17 @@ UINT8 powermate_ide_device::adam_bd_r(address_space &space, offs_t offset, UINT8
 			break;

 		case 0x58:
-			m_ide_data = m_ide->read_cs0(space, 0, 0xffff);
+			m_ata_data = m_ata->read_cs0(space, 0, 0xffff);

-			data = m_ide_data & 0xff;
+			data = m_ata_data & 0xff;
 			break;

 		case 0x59:
-			data = m_ide_data >> 8;
+			data = m_ata_data >> 8;
 			break;

 		case 0x5a:
-			data = m_ide->read_cs1(space, 6, 0xff);
+			data = m_ata->read_cs1(space, 6, 0xff);
 			break;

 		case 0x5b: // Digital Input Register
@ -181,7 +181,7 @@ void powermate_ide_device::adam_bd_w(address_space &space, offs_t offset, UINT8
 		case 0x05:
 		case 0x06:
 		case 0x07:
-			m_ide->write_cs0(space, offset & 0x07, data, 0xff);
+			m_ata->write_cs0(space, offset & 0x07, data, 0xff);
 			break;

 		case 0x40:
@ -192,12 +192,12 @@ void powermate_ide_device::adam_bd_w(address_space &space, offs_t offset, UINT8
 			break;

 		case 0x58:
-			m_ide_data |= data;
-			m_ide->write_cs0(space, 0, m_ide_data, 0xffff);
+			m_ata_data |= data;
+			m_ata->write_cs0(space, 0, m_ata_data, 0xffff);
 			break;

 		case 0x59:
-			m_ide_data = data << 8;
+			m_ata_data = data << 8;
 			break;

 		case 0x5a: // Fixed Disk Control Register
--- a/src/mess/machine/adam_ide.h
+++ b/src/mess/machine/adam_ide.h
@ -15,7 +15,7 @@
 #include "emu.h"
 #include "machine/adamexp.h"
 #include "machine/ctronics.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"



@ -45,10 +45,10 @@ protected:
 	virtual void adam_bd_w(address_space &space, offs_t offset, UINT8 data, int bmreq, int biorq, int aux_rom_cs, int cas1, int cas2);

 private:
-	required_device<ide_controller_device> m_ide;
+	required_device<ata_interface_device> m_ata;
 	required_device<centronics_device> m_centronics;

-	UINT16 m_ide_data;
+	UINT16 m_ata_data;
 };


--- a/src/mess/machine/bebox.c
+++ b/src/mess/machine/bebox.c
@ -100,7 +100,7 @@
 #include "machine/mc146818.h"
 #include "machine/pic8259.h"
 #include "machine/am9517a.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "machine/pci.h"
 #include "machine/intelfsh.h"
 #include "machine/53c810.h"
--- a/src/mess/machine/c64_ide64.c
+++ b/src/mess/machine/c64_ide64.c
@ -31,7 +31,7 @@
 #define AT29C010A_TAG       "u3"
 #define DS1302_TAG          "u4"
 #define FT245R_TAG          "u21"
-#define IDE_TAG             "ide"
+#define ATA_TAG             "ata"



@ -49,7 +49,7 @@ static MACHINE_CONFIG_FRAGMENT( c64_ide64 )
 	MCFG_ATMEL_29C010_ADD(AT29C010A_TAG)
 	MCFG_DS1302_ADD(DS1302_TAG, XTAL_32_768kHz)

-	MCFG_IDE_CONTROLLER_ADD(IDE_TAG, ide_devices, "hdd", "hdd", false)
+	MCFG_ATA_INTERFACE_ADD(ATA_TAG, ata_devices, "hdd", "hdd", false)
 MACHINE_CONFIG_END


@ -100,7 +100,7 @@ c64_ide64_cartridge_device::c64_ide64_cartridge_device(const machine_config &mco
 	device_c64_expansion_card_interface(mconfig, *this),
 	m_flash_rom(*this, AT29C010A_TAG),
 	m_rtc(*this, DS1302_TAG),
-	m_ide(*this, IDE_TAG),
+	m_ata(*this, ATA_TAG),
 	m_jp1(*this, "JP1")
 {
 }
@ -117,7 +117,7 @@ void c64_ide64_cartridge_device::device_start()

 	// state saving
 	save_item(NAME(m_bank));
-	save_item(NAME(m_ide_data));
+	save_item(NAME(m_ata_data));
 	save_item(NAME(m_enable));
 }

@ -181,19 +181,19 @@ UINT8 c64_ide64_cartridge_device::c64_cd_r(address_space &space, offs_t offset,

 		if (io1_offset >= 0x20 && io1_offset < 0x28)
 		{
-			m_ide_data = m_ide->read_cs0(space, offset & 0x07, 0xffff);
+			m_ata_data = m_ata->read_cs0(space, offset & 0x07, 0xffff);

-			data = m_ide_data & 0xff;
+			data = m_ata_data & 0xff;
 		}
 		else if (io1_offset >= 0x28 && io1_offset < 0x30)
 		{
-			m_ide_data = m_ide->read_cs1(space, offset & 0x07, 0xffff);
+			m_ata_data = m_ata->read_cs1(space, offset & 0x07, 0xffff);

-			data = m_ide_data & 0xff;
+			data = m_ata_data & 0xff;
 		}
 		else if (io1_offset == 0x31)
 		{
-			data = m_ide_data >> 8;
+			data = m_ata_data >> 8;
 		}
 		else if (io1_offset == 0x32)
 		{
@ -282,19 +282,19 @@ void c64_ide64_cartridge_device::c64_cd_w(address_space &space, offs_t offset, U

 		if (io1_offset >= 0x20 && io1_offset < 0x28)
 		{
-			m_ide_data = (m_ide_data & 0xff00) | data;
+			m_ata_data = (m_ata_data & 0xff00) | data;

-			m_ide->write_cs0(space, offset & 0x07, m_ide_data, 0xffff);
+			m_ata->write_cs0(space, offset & 0x07, m_ata_data, 0xffff);
 		}
 		else if (io1_offset >= 0x28 && io1_offset < 0x30)
 		{
-			m_ide_data = (m_ide_data & 0xff00) | data;
+			m_ata_data = (m_ata_data & 0xff00) | data;

-			m_ide->write_cs1(space, offset & 0x07, m_ide_data, 0xffff);
+			m_ata->write_cs1(space, offset & 0x07, m_ata_data, 0xffff);
 		}
 		else if (io1_offset == 0x31)
 		{
-			m_ide_data = (data << 8) | (m_ide_data & 0xff);
+			m_ata_data = (data << 8) | (m_ata_data & 0xff);
 		}
 		else if (io1_offset == 0x5f)
 		{
--- a/src/mess/machine/c64_ide64.h
+++ b/src/mess/machine/c64_ide64.h
@ -16,7 +16,7 @@
 #include "emu.h"
 #include "machine/c64exp.h"
 #include "machine/ds1302.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "machine/intelfsh.h"
 #include "imagedev/harddriv.h"

@ -53,11 +53,11 @@ protected:
 private:
 	required_device<atmel_29c010_device> m_flash_rom;
 	required_device<ds1302_device> m_rtc;
-	required_device<ide_controller_device> m_ide;
+	required_device<ata_interface_device> m_ata;
 	required_ioport m_jp1;

 	UINT8 m_bank;
-	UINT16 m_ide_data;
+	UINT16 m_ata_data;
 	int m_wp;
 	int m_enable;
 };
--- a/src/mess/machine/isa_fdc.c
+++ b/src/mess/machine/isa_fdc.c
@ -9,7 +9,7 @@
 #include "machine/pc_fdc.h"
 #include "imagedev/flopdrv.h"
 #include "formats/pc_dsk.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "formats/pc_dsk.h"
 #include "formats/mfi_dsk.h"

--- a/src/mess/machine/isa_ide.c
+++ b/src/mess/machine/isa_ide.c
@ -11,16 +11,16 @@

 READ8_MEMBER(isa16_ide_device::ide16_alt_r )
 {
-	return m_ide->read_cs1_pc(space, 6/2, 0xff);
+	return m_ide->read_cs1(space, 6/2, 0xff);
 }

 WRITE8_MEMBER(isa16_ide_device::ide16_alt_w )
 {
-	m_ide->write_cs1_pc(space, 6/2, data, 0xff);
+	m_ide->write_cs1(space, 6/2, data, 0xff);
 }

 DEVICE_ADDRESS_MAP_START(map, 16, isa16_ide_device)
-	AM_RANGE(0x0, 0x7) AM_DEVREADWRITE("ide", ide_controller_device, read_cs0_pc, write_cs0_pc)
+	AM_RANGE(0x0, 0x7) AM_DEVREADWRITE("ide", ide_controller_device, read_cs0, write_cs0)
 ADDRESS_MAP_END

 DEVICE_ADDRESS_MAP_START(alt_map, 8, isa16_ide_device)
@ -40,8 +40,8 @@ WRITE_LINE_MEMBER(isa16_ide_device::ide_interrupt)
 }

 static MACHINE_CONFIG_FRAGMENT( ide )
-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", "hdd", false)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(WRITELINE(isa16_ide_device, ide_interrupt))
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", "hdd", false)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(isa16_ide_device, ide_interrupt))
 MACHINE_CONFIG_END

 static INPUT_PORTS_START( ide )
--- a/src/mess/machine/isa_ide8.c
+++ b/src/mess/machine/isa_ide8.c
@ -55,7 +55,7 @@ Device Control (out)        14              7

 static READ8_DEVICE_HANDLER( ide8_r )
 {
-	ide_controller_device   *ide = (ide_controller_device *) device;
+	ata_interface_device   *ide = (ata_interface_device *) device;
 	isa8_ide_device         *ide8_d = downcast<isa8_ide_device *>(device->owner());
 	UINT8   result  = 0;

@ -80,7 +80,7 @@ static READ8_DEVICE_HANDLER( ide8_r )

 static WRITE8_DEVICE_HANDLER( ide8_w )
 {
-	ide_controller_device   *ide = (ide_controller_device *) device;
+	ata_interface_device   *ide = (ata_interface_device *) device;
 	isa8_ide_device         *ide8_d = downcast<isa8_ide_device *>(device->owner());

 //  logerror("%s ide8_w: offset=%d, data=%2X\n",device->machine().describe_context(),offset,data);
@ -114,8 +114,8 @@ WRITE_LINE_MEMBER(isa8_ide_device::ide_interrupt)
 }

 static MACHINE_CONFIG_FRAGMENT( ide8_config )
-	MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", "hdd", false)
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(WRITELINE(isa8_ide_device, ide_interrupt))
+	MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", "hdd", false)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(isa8_ide_device, ide_interrupt))
 MACHINE_CONFIG_END

 static INPUT_PORTS_START( ide8_port )
--- a/src/mess/machine/kc_d004.c
+++ b/src/mess/machine/kc_d004.c
@ -14,7 +14,7 @@
 #define Z80_TAG         "disk"
 #define Z80CTC_TAG      "z80ctc"
 #define UPD765_TAG      "upd765"
-#define IDE_TAG         "ide"
+#define ATA_TAG         "ata"

 /***************************************************************************
    IMPLEMENTATION
@ -90,7 +90,7 @@ static MACHINE_CONFIG_FRAGMENT(kc_d004_gide)
 	MCFG_CPU_MODIFY(Z80_TAG)
 	MCFG_CPU_IO_MAP(kc_d004_gide_io)

-	MCFG_IDE_CONTROLLER_ADD(IDE_TAG, ide_devices, "hdd", "hdd", false)
+	MCFG_ATA_INTERFACE_ADD(ATA_TAG, ata_devices, "hdd", "hdd", false)
 MACHINE_CONFIG_END


@ -390,7 +390,7 @@ void kc_d004_device::fdc_drq(bool state)

 kc_d004_gide_device::kc_d004_gide_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
 		: kc_d004_device(mconfig, KC_D004, "D004 Floppy Disk + GIDE Interface", tag, owner, clock, "kc_d004gide", __FILE__),
-		m_ide(*this, IDE_TAG)
+		m_ata(*this, ATA_TAG)
 {
 }

@ -421,7 +421,7 @@ void kc_d004_gide_device::device_reset()
 {
 	kc_d004_device::device_reset();

-	m_ide_data  = 0;
+	m_ata_data  = 0;
 	m_lh        = 0;
 }

@ -457,15 +457,15 @@ READ8_MEMBER(kc_d004_gide_device::gide_r)
 			{
 				if (ide_cs == 0 )
 				{
-					m_ide_data = m_ide->read_cs0(space, io_addr & 0x07, 0xffff);
+					m_ata_data = m_ata->read_cs0(space, io_addr & 0x07, 0xffff);
 				}
 				else
 				{
-					m_ide_data = m_ide->read_cs1(space, io_addr & 0x07, 0xffff);
+					m_ata_data = m_ata->read_cs1(space, io_addr & 0x07, 0xffff);
 				}
 			}

-			data = (m_ide_data >> data_shift) & 0xff;
+			data = (m_ata_data >> data_shift) & 0xff;
 		}

 		m_lh = (io_addr == 0x08) ? !m_lh : ((io_addr > 0x08) ? 0 : m_lh);
@ -500,17 +500,17 @@ WRITE8_MEMBER(kc_d004_gide_device::gide_w)
 			if (io_addr == 0x08 && m_lh)
 				data_shift = 8;

-			m_ide_data = (data << data_shift) | (m_ide_data & (0xff00 >> data_shift));
+			m_ata_data = (data << data_shift) | (m_ata_data & (0xff00 >> data_shift));

 			if (io_addr == 0x06 || io_addr == 0x07 || io_addr > 0x08 || (io_addr == 0x08 && m_lh))
 			{
 				if (ide_cs == 0)
 				{
-					m_ide->write_cs0(space, io_addr & 0x07, m_ide_data, 0xffff);
+					m_ata->write_cs0(space, io_addr & 0x07, m_ata_data, 0xffff);
 				}
 				else
 				{
-					m_ide->write_cs1(space, io_addr & 0x07, m_ide_data, 0xffff);
+					m_ata->write_cs1(space, io_addr & 0x07, m_ata_data, 0xffff);
 				}
 			}
 		}
--- a/src/mess/machine/kc_d004.h
+++ b/src/mess/machine/kc_d004.h
@ -8,7 +8,7 @@
 #include "machine/z80ctc.h"
 #include "cpu/z80/z80.h"
 #include "machine/upd765.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "formats/basicdsk.h"
 #include "imagedev/harddriv.h"

@ -100,9 +100,9 @@ public:
 	DECLARE_WRITE8_MEMBER(gide_w);

 private:
-	required_device<ide_controller_device> m_ide;
+	required_device<ata_interface_device> m_ata;

-	UINT16              m_ide_data;
+	UINT16              m_ata_data;
 	int                 m_lh;
 };

--- a/src/mess/machine/southbridge.h
+++ b/src/mess/machine/southbridge.h
@ -10,7 +10,7 @@
 #include "machine/pic8259.h"
 #include "machine/pit8253.h"

-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "machine/at_keybc.h"

 #include "imagedev/harddriv.h"
--- a/src/mess/machine/ti99/tn_ide.c
+++ b/src/mess/machine/ti99/tn_ide.c
@ -27,7 +27,7 @@

 #include "emu.h"
 #include "peribox.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "tn_ide.h"
 #include "ti99_hd.h"

@ -49,7 +49,8 @@ enum
 };

 nouspikel_ide_interface_device::nouspikel_ide_interface_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
-: ti_expansion_card_device(mconfig, TI99_IDE, "Nouspikel IDE interface card", tag, owner, clock, "ti99_ide", __FILE__)
+	: ti_expansion_card_device(mconfig, TI99_IDE, "Nouspikel IDE interface card", tag, owner, clock, "ti99_ide", __FILE__),
+	m_ata(*this, "ata")
 {
 }

@ -71,7 +72,7 @@ void nouspikel_ide_interface_device::crureadz(offs_t offset, UINT8 *value)
 				reply |= 4;
 			if (m_sram_enable_dip)
 				reply |= 2;
-			if (!m_ide_irq)
+			if (!m_ata_irq)
 				reply |= 1;
 		}
 		*value = reply;
@ -107,11 +108,11 @@ void nouspikel_ide_interface_device::cruwrite(offs_t offset, UINT8 data)
 				m_cru_register &= ~(1 << bit);

 			if (bit == 6)
-				m_slot->set_inta((m_cru_register & cru_reg_int_en) && m_ide_irq);
+				m_slot->set_inta((m_cru_register & cru_reg_int_en) && m_ata_irq);

 			if ((bit == 6) || (bit == 7))
 				if ((m_cru_register & cru_reg_int_en) && !(m_cru_register & cru_reg_reset))
-					m_ide->reset();
+					m_ata->reset();
 			break;
 		}
 	}
@ -151,7 +152,7 @@ READ8Z_MEMBER(nouspikel_ide_interface_device::readz)
 			case 2:     /* IDE registers set 1 (CS1Fx) */
 				if (m_tms9995_mode ? (!(addr & 1)) : (addr & 1))
 				{   /* first read triggers 16-bit read cycle */
-					m_input_latch = (! (addr & 0x10)) ? m_ide->read_cs0(space, (addr >> 1) & 0x7, 0xffff) : 0;
+					m_input_latch = (! (addr & 0x10)) ? m_ata->read_cs0(space, (addr >> 1) & 0x7, 0xffff) : 0;
 				}

 				/* return latched input */
@ -162,7 +163,7 @@ READ8Z_MEMBER(nouspikel_ide_interface_device::readz)
 			case 3:     /* IDE registers set 2 (CS3Fx) */
 				if (m_tms9995_mode ? (!(addr & 1)) : (addr & 1))
 				{   /* first read triggers 16-bit read cycle */
-					m_input_latch = (! (addr & 0x10)) ? m_ide->read_cs1(space, (addr >> 1) & 0x7, 0xffff) : 0;
+					m_input_latch = (! (addr & 0x10)) ? m_ata->read_cs1(space, (addr >> 1) & 0x7, 0xffff) : 0;
 				}

 				/* return latched input */
@ -232,7 +233,7 @@ WRITE8_MEMBER(nouspikel_ide_interface_device::write)

 				if (m_tms9995_mode ? (addr & 1) : (!(addr & 1)))
 				{   /* second write triggers 16-bit write cycle */
-					m_ide->write_cs0(space, (addr >> 1) & 0x7, m_output_latch, 0xffff);
+					m_ata->write_cs0(space, (addr >> 1) & 0x7, m_output_latch, 0xffff);
 				}
 				break;
 			case 3:     /* IDE registers set 2 (CS3Fx) */
@ -250,7 +251,7 @@ WRITE8_MEMBER(nouspikel_ide_interface_device::write)

 				if (m_tms9995_mode ? (addr & 1) : (!(addr & 1)))
 				{   /* second write triggers 16-bit write cycle */
-					m_ide->write_cs1(space, (addr >> 1) & 0x7, m_output_latch, 0xffff);
+					m_ata->write_cs1(space, (addr >> 1) & 0x7, m_output_latch, 0xffff);
 				}
 				break;
 			}
@ -279,7 +280,7 @@ void nouspikel_ide_interface_device::do_inta(int state)
 */
 WRITE_LINE_MEMBER(nouspikel_ide_interface_device::ide_interrupt_callback)
 {
-	m_ide_irq = state;
+	m_ata_irq = state;
 	if (m_cru_register & cru_reg_int_en)
 		do_inta(state);
 }
@ -297,7 +298,6 @@ WRITE_LINE_MEMBER(nouspikel_ide_interface_device::clock_interrupt_callback)
 void nouspikel_ide_interface_device::device_start()
 {
 	m_rtc = subdevice<rtc65271_device>("ide_rtc");
-	m_ide = subdevice<ide_controller_device>("ide");

 	m_ram = memregion(BUFFER_TAG)->base();
 	m_sram_enable_dip = false; // TODO: what is this?
@ -334,9 +334,8 @@ static const rtc65271_interface ide_rtc_cfg =

 MACHINE_CONFIG_FRAGMENT( tn_ide )
 	MCFG_RTC65271_ADD( "ide_rtc", ide_rtc_cfg )
-	MCFG_IDE_CONTROLLER_ADD( "ide", ide_devices, "hdd", NULL, false)  // see idectrl.c
-	MCFG_IDE_CONTROLLER_IRQ_HANDLER(WRITELINE(nouspikel_ide_interface_device, ide_interrupt_callback))
-//  MCFG_IDE_CONTROLLER_REGIONS(":peribox:idehd0:drive", NULL)
+	MCFG_ATA_INTERFACE_ADD( "ata", ata_devices, "hdd", NULL, false)
+	MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(nouspikel_ide_interface_device, ide_interrupt_callback))
 MACHINE_CONFIG_END

 ROM_START( tn_ide )
--- a/src/mess/machine/ti99/tn_ide.h
+++ b/src/mess/machine/ti99/tn_ide.h
@ -14,7 +14,7 @@

 #include "emu.h"
 #include "ti99defs.h"
-#include "machine/idectrl.h"
+#include "machine/ataintf.h"
 #include "machine/rtc65271.h"

 extern const device_type TI99_IDE;
@ -30,7 +30,7 @@ public:
 	void    cruwrite(offs_t offset, UINT8 value);

 	void    do_inta(int state);
-	bool    m_ide_irq;
+	bool    m_ata_irq;
 	int     m_cru_register;

 	DECLARE_WRITE_LINE_MEMBER(clock_interrupt_callback);
@ -45,7 +45,7 @@ protected:

 private:
 	rtc65271_device*    m_rtc;
-	ide_controller_device* m_ide;
+	required_device<ata_interface_device> m_ata;

 	bool    m_clk_irq;
 	bool    m_sram_enable;