Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-05-19 03:59:35 +03:00
Code Issues Actions Packages Projects Releases Wiki Activity

MIPS: make DRC selectable by #ifdef [R. Belmont]

Browse Source
This commit is contained in:
R. Belmont 2011-01-01 22:56:34 +00:00
parent 17f4fb8b97
commit f8adb6f53c
4 changed files with 30 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/emu/cpu/cpu.mak
View File

@ -832,7 +832,7 @@ $(CPUOBJ)/pic16c62x/pic16c62x.o: $(CPUSRC)/pic16c62x/pic16c62x.c \
ifneq ($(filter MIPS,$(CPUS)),)
OBJDIRS += $(CPUOBJ)/mips
CPUOBJS += $(CPUOBJ)/mips/r3000.o
CPUOBJS += $(CPUOBJ)/mips/mips3com.o $(CPUOBJ)/mips/mips3fe.o $(CPUOBJ)/mips/mips3drc.o $(DRCOBJ)
CPUOBJS += $(CPUOBJ)/mips/mips3com.o $(CPUOBJ)/mips/mips3.o $(CPUOBJ)/mips/mips3fe.o $(CPUOBJ)/mips/mips3drc.o $(DRCOBJ)
CPUOBJS += $(CPUOBJ)/mips/psx.o
DASMOBJS += $(CPUOBJ)/mips/r3kdasm.o
DASMOBJS += $(CPUOBJ)/mips/mips3dsm.o
@ -842,6 +842,9 @@ endif
$(CPUOBJ)/mips/r3000.o: $(CPUSRC)/mips/r3000.c \
$(CPUSRC)/mips/r3000.h
$(CPUOBJ)/mips/mips3.o: $(CPUSRC)/mips/mips3.h \
$(CPUSRC)/mips/mips3.c
$(CPUOBJ)/mips/mips3com.o: $(CPUSRC)/mips/mips3.h \
$(CPUSRC)/mips/mips3com.h

28
src/emu/cpu/mips/mips3.c
View File

@ -11,11 +11,14 @@
#include "emu.h"
#include "debugger.h"
#include "profiler.h"
#include "mips3.h"
#include "mips3com.h"
#define ENABLE_OVERFLOWS 0
#ifndef MIPS3_USE_DRC
/***************************************************************************
HELPER MACROS
@ -156,6 +159,21 @@ static mips3_regs mips3;
#define ROPCODE(pc) mips3.core.direct->read_decrypted_dword(pc)
/***************************************************************************
DRC COMPATIBILITY
***************************************************************************/
void mips3drc_set_options(device_t *device, UINT32 options)
{
}
void mips3drc_add_fastram(device_t *device, offs_t start, offs_t end, UINT8 readonly, void *base)
{
}
void mips3drc_add_hotspot(device_t *device, offs_t pc, UINT32 opcode, UINT32 cycles)
{
}
/***************************************************************************
EXECEPTION HANDLING
@ -2546,14 +2564,6 @@ CPU_GET_INFO( rm7000le )
}
}
void mips3drc_set_options(running_device *device, UINT32 options)
{
}
void mips3drc_add_fastram(running_device *device, offs_t start, offs_t end, UINT8 readonly, void *base)
{
}
DEFINE_LEGACY_CPU_DEVICE(VR4300BE, vr4300be);
DEFINE_LEGACY_CPU_DEVICE(VR4300LE, vr4300le);
DEFINE_LEGACY_CPU_DEVICE(VR4310BE, vr4310be);
@ -2576,3 +2586,5 @@ DEFINE_LEGACY_CPU_DEVICE(QED5271LE, qed5271le);
DEFINE_LEGACY_CPU_DEVICE(RM7000BE, rm7000be);
DEFINE_LEGACY_CPU_DEVICE(RM7000LE, rm7000le);
#endif

2
src/emu/cpu/mips/mips3com.h
View File

@ -19,6 +19,8 @@
CONSTANTS
***************************************************************************/
#define MIPS3_USE_DRC
/* core parameters */
#define MIPS3_MIN_PAGE_SHIFT 12
#define MIPS3_MIN_PAGE_SIZE (1 << MIPS3_MIN_PAGE_SHIFT)

6
src/emu/cpu/mips/mips3drc.c
View File

@ -36,7 +36,7 @@
extern unsigned dasmmips3(char *buffer, unsigned pc, UINT32 op);
#ifdef MIPS3_USE_DRC
/***************************************************************************
DEBUGGING
@ -3665,7 +3665,6 @@ static void log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desclist, i
}
}
/***************************************************************************
NEC VR4300 VARIANTS
***************************************************************************/
@ -4087,3 +4086,6 @@ DEFINE_LEGACY_CPU_DEVICE(QED5271LE, qed5271le);
DEFINE_LEGACY_CPU_DEVICE(RM7000BE, rm7000be);
DEFINE_LEGACY_CPU_DEVICE(RM7000LE, rm7000le);
#endif // MIPS3_USE_DRC