mirror of
https://github.com/holub/mame
synced 2025-04-22 08:22:15 +03:00
v40, v50, v53: Allow configuration registers to be read back
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6ed7f0d90b
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f8d6d4a823
@ -40,6 +40,11 @@ DEFINE_DEVICE_TYPE(V50, v50_device, "v50", "NEC V50")
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DEFINE_DEVICE_TYPE(V53, v53_device, "v53", "NEC V53")
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DEFINE_DEVICE_TYPE(V53A, v53a_device, "v53a", "NEC V53A")
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u8 device_v5x_interface::SULA_r()
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{
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return m_SULA;
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}
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void device_v5x_interface::SULA_w(u8 data)
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{
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if (VERBOSE)
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@ -48,6 +53,11 @@ void device_v5x_interface::SULA_w(u8 data)
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install_peripheral_io();
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}
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u8 device_v5x_interface::TULA_r()
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{
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return m_TULA;
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}
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void device_v5x_interface::TULA_w(u8 data)
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{
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if (VERBOSE)
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@ -56,6 +66,11 @@ void device_v5x_interface::TULA_w(u8 data)
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install_peripheral_io();
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}
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u8 device_v5x_interface::IULA_r()
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{
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return m_IULA;
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}
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void device_v5x_interface::IULA_w(u8 data)
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{
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if (VERBOSE)
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@ -64,6 +79,11 @@ void device_v5x_interface::IULA_w(u8 data)
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install_peripheral_io();
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}
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u8 device_v5x_interface::DULA_r()
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{
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return m_DULA;
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}
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void device_v5x_interface::DULA_w(u8 data)
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{
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if (VERBOSE)
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@ -72,6 +92,11 @@ void device_v5x_interface::DULA_w(u8 data)
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install_peripheral_io();
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}
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u8 device_v5x_interface::OPHA_r()
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{
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return m_OPHA;
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}
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void device_v5x_interface::OPHA_w(u8 data)
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{
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if (VERBOSE)
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@ -83,14 +108,24 @@ void device_v5x_interface::OPHA_w(u8 data)
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m_OPHA = data;
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}
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u8 device_v5x_interface::OPSEL_r()
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{
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return m_OPSEL;
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}
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void device_v5x_interface::OPSEL_w(u8 data)
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{
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if (VERBOSE)
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device().logerror("OPSEL_w %02x\n", data);
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m_OPSEL = data;
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m_OPSEL = data & 0x0f;
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install_peripheral_io();
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}
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u8 device_v5x_interface::TCKS_r()
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{
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return m_TCKS;
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}
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void device_v5x_interface::TCKS_w(u8 data)
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{
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m_TCKS = data;
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@ -265,6 +300,11 @@ void v50_base_device::io_write_word(offs_t a, u16 v)
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}
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u8 v50_base_device::OPCN_r()
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{
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return m_OPCN;
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}
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void v50_base_device::OPCN_w(u8 data)
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{
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// bit 7: unused
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@ -416,7 +456,7 @@ void v50_device::install_peripheral_io()
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void v50_base_device::internal_port_map(address_map &map)
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{
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map(0xfff0, 0xfff0).w(FUNC(v50_base_device::TCKS_w));
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map(0xfff0, 0xfff0).rw(FUNC(v50_base_device::TCKS_r), FUNC(v50_base_device::TCKS_w));
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map(0xfff2, 0xfff2).w(FUNC(v50_base_device::RFC_w));
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@ -424,13 +464,13 @@ void v50_base_device::internal_port_map(address_map &map)
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map(0xfff5, 0xfff5).w(FUNC(v50_base_device::WCY1_w));
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map(0xfff6, 0xfff6).w(FUNC(v50_base_device::WCY2_w));
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map(0xfff8, 0xfff8).w(FUNC(v50_base_device::SULA_w));
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map(0xfff9, 0xfff9).w(FUNC(v50_base_device::TULA_w));
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map(0xfffa, 0xfffa).w(FUNC(v50_base_device::IULA_w));
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map(0xfffb, 0xfffb).w(FUNC(v50_base_device::DULA_w));
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map(0xfffc, 0xfffc).w(FUNC(v50_base_device::OPHA_w));
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map(0xfffd, 0xfffd).w(FUNC(v50_base_device::OPSEL_w));
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map(0xfffe, 0xfffe).w(FUNC(v50_base_device::OPCN_w));
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map(0xfff8, 0xfff8).rw(FUNC(v50_base_device::SULA_r), FUNC(v50_base_device::SULA_w));
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map(0xfff9, 0xfff9).rw(FUNC(v50_base_device::TULA_r), FUNC(v50_base_device::TULA_w));
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map(0xfffa, 0xfffa).rw(FUNC(v50_base_device::IULA_r), FUNC(v50_base_device::IULA_w));
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map(0xfffb, 0xfffb).rw(FUNC(v50_base_device::DULA_r), FUNC(v50_base_device::DULA_w));
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map(0xfffc, 0xfffc).rw(FUNC(v50_base_device::OPHA_r), FUNC(v50_base_device::OPHA_w));
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map(0xfffd, 0xfffd).rw(FUNC(v50_base_device::OPSEL_r), FUNC(v50_base_device::OPSEL_w));
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map(0xfffe, 0xfffe).rw(FUNC(v50_base_device::OPCN_r), FUNC(v50_base_device::OPCN_w));
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}
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void v50_base_device::execute_set_input(int irqline, int state)
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@ -550,6 +590,11 @@ void v53_device::io_write_word(offs_t a, u16 v)
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}
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u8 v53_device::SCTL_r()
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{
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return m_SCTL;
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}
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void v53_device::SCTL_w(u8 data)
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{
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// bit 7: unused
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@ -562,7 +607,7 @@ void v53_device::SCTL_w(u8 data)
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// bit 0: Onboard pripheral I/O maps to 8-bit boundaries? (otherwise 16-bit)
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LOG("SCTL_w %02x\n", data);
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m_SCTL = data;
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m_SCTL = data & 0x1f;
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install_peripheral_io();
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}
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@ -703,7 +748,7 @@ void v53_device::internal_port_map(address_map &map)
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map(0xffec, 0xffec).w(FUNC(v53_device::WCY0_w)); // waitstate control
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map(0xffed, 0xffed).w(FUNC(v53_device::WAC_w)); // waitstate control
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// 0xffee-0xffef reserved
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map(0xfff0, 0xfff0).w(FUNC(v53_device::TCKS_w)); // timer clocks
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map(0xfff0, 0xfff0).rw(FUNC(v53_device::TCKS_r), FUNC(v53_device::TCKS_w)); // timer clocks
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map(0xfff1, 0xfff1).w(FUNC(v53_device::SBCR_w)); // internal clock divider, halt behavior etc.
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map(0xfff2, 0xfff2).w(FUNC(v53_device::RFC_w)); // ram refresh control
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map(0xfff3, 0xfff3).w(FUNC(v53_device::WMB1_w)); // waitstate control
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@ -711,13 +756,13 @@ void v53_device::internal_port_map(address_map &map)
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map(0xfff5, 0xfff5).w(FUNC(v53_device::WCY3_w)); // waitstate control
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map(0xfff6, 0xfff6).w(FUNC(v53_device::WCY4_w)); // waitstate control
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// 0xfff6 reserved
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map(0xfff8, 0xfff8).w(FUNC(v53_device::SULA_w)); // scu mapping
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map(0xfff9, 0xfff9).w(FUNC(v53_device::TULA_w)); // tcu mapping
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map(0xfffa, 0xfffa).w(FUNC(v53_device::IULA_w)); // icu mapping
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map(0xfffb, 0xfffb).w(FUNC(v53_device::DULA_w)); // dmau mapping
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map(0xfffc, 0xfffc).w(FUNC(v53_device::OPHA_w)); // peripheral mapping (upper bits, common)
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map(0xfffd, 0xfffd).w(FUNC(v53_device::OPSEL_w)); // peripheral enabling
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map(0xfffe, 0xfffe).w(FUNC(v53_device::SCTL_w)); // peripheral configuration (& byte / word mapping)
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map(0xfff8, 0xfff8).rw(FUNC(v53_device::SULA_r), FUNC(v53_device::SULA_w)); // scu mapping
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map(0xfff9, 0xfff9).rw(FUNC(v53_device::TULA_r), FUNC(v53_device::TULA_w)); // tcu mapping
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map(0xfffa, 0xfffa).rw(FUNC(v53_device::IULA_r), FUNC(v53_device::IULA_w)); // icu mapping
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map(0xfffb, 0xfffb).rw(FUNC(v53_device::DULA_r), FUNC(v53_device::DULA_w)); // dmau mapping
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map(0xfffc, 0xfffc).rw(FUNC(v53_device::OPHA_r), FUNC(v53_device::OPHA_w)); // peripheral mapping (upper bits, common)
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map(0xfffd, 0xfffd).rw(FUNC(v53_device::OPSEL_r), FUNC(v53_device::OPSEL_w)); // peripheral enabling
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map(0xfffe, 0xfffe).rw(FUNC(v53_device::SCTL_r), FUNC(v53_device::SCTL_w)); // peripheral configuration (& byte / word mapping)
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// 0xffff reserved
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}
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@ -85,6 +85,7 @@ protected:
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void WCY1_w(u8 data) {}
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void WCY0_w(u8 data) {}
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void WAC_w(u8 data) {}
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u8 TCKS_r();
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void TCKS_w(u8 data);
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void SBCR_w(u8 data) {}
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void RFC_w(u8 data) {}
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@ -92,11 +93,17 @@ protected:
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void WCY2_w(u8 data) {}
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void WCY3_w(u8 data) {}
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void WCY4_w(u8 data) {}
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u8 SULA_r();
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void SULA_w(u8 data);
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u8 TULA_r();
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void TULA_w(u8 data);
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u8 IULA_r();
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void IULA_w(u8 data);
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u8 DULA_r();
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void DULA_w(u8 data);
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u8 OPHA_r();
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void OPHA_w(u8 data);
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u8 OPSEL_r();
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void OPSEL_w(u8 data);
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u8 get_pic_ack() { return 0; }
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DECLARE_WRITE_LINE_MEMBER(internal_irq_w);
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@ -167,6 +174,7 @@ protected:
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void internal_port_map(address_map &map);
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u8 OPCN_r();
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void OPCN_w(u8 data);
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private:
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@ -244,6 +252,7 @@ protected:
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void internal_port_map(address_map &map);
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virtual void install_peripheral_io() override;
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u8 SCTL_r();
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void SCTL_w(u8 data);
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private:
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