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https://github.com/holub/mame
synced 2025-04-19 23:12:11 +03:00
Various buses and associated drivers: Simplify handler signatures (nw)
This commit is contained in:
parent
363485b628
commit
f95267bf5e
@ -573,34 +573,34 @@ std::string a78_cart_slot_device::get_default_card_software(get_default_card_sof
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read
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-------------------------------------------------*/
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READ8_MEMBER(a78_cart_slot_device::read_04xx)
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uint8_t a78_cart_slot_device::read_04xx(offs_t offset)
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{
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if (m_cart)
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return m_cart->read_04xx(space, offset, mem_mask);
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return m_cart->read_04xx(offset);
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else
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return 0xff;
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}
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READ8_MEMBER(a78_cart_slot_device::read_10xx)
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uint8_t a78_cart_slot_device::read_10xx(offs_t offset)
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{
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if (m_cart)
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return m_cart->read_10xx(space, offset, mem_mask);
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return m_cart->read_10xx(offset);
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else
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return 0xff;
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}
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READ8_MEMBER(a78_cart_slot_device::read_30xx)
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uint8_t a78_cart_slot_device::read_30xx(offs_t offset)
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{
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if (m_cart)
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return m_cart->read_30xx(space, offset, mem_mask);
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return m_cart->read_30xx(offset);
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else
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return 0xff;
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}
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READ8_MEMBER(a78_cart_slot_device::read_40xx)
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uint8_t a78_cart_slot_device::read_40xx(offs_t offset)
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{
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if (m_cart)
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return m_cart->read_40xx(space, offset, mem_mask);
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return m_cart->read_40xx(offset);
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else
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return 0xff;
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}
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@ -610,28 +610,28 @@ READ8_MEMBER(a78_cart_slot_device::read_40xx)
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write
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-------------------------------------------------*/
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WRITE8_MEMBER(a78_cart_slot_device::write_04xx)
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void a78_cart_slot_device::write_04xx(offs_t offset, uint8_t data)
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{
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if (m_cart)
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m_cart->write_04xx(space, offset, data, mem_mask);
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m_cart->write_04xx(offset, data);
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}
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WRITE8_MEMBER(a78_cart_slot_device::write_10xx)
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void a78_cart_slot_device::write_10xx(offs_t offset, uint8_t data)
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{
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if (m_cart)
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m_cart->write_10xx(space, offset, data, mem_mask);
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m_cart->write_10xx(offset, data);
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}
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WRITE8_MEMBER(a78_cart_slot_device::write_30xx)
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void a78_cart_slot_device::write_30xx(offs_t offset, uint8_t data)
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{
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if (m_cart)
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m_cart->write_30xx(space, offset, data, mem_mask);
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m_cart->write_30xx(offset, data);
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}
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WRITE8_MEMBER(a78_cart_slot_device::write_40xx)
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void a78_cart_slot_device::write_40xx(offs_t offset, uint8_t data)
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{
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if (m_cart)
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m_cart->write_40xx(space, offset, data, mem_mask);
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m_cart->write_40xx(offset, data);
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}
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@ -49,14 +49,14 @@ public:
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virtual ~device_a78_cart_interface();
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// memory accessor
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virtual DECLARE_READ8_MEMBER(read_04xx) { return 0xff; }
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virtual DECLARE_READ8_MEMBER(read_10xx) { return 0xff; }
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virtual DECLARE_READ8_MEMBER(read_30xx) { return 0xff; }
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virtual DECLARE_READ8_MEMBER(read_40xx) { return 0xff; }
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virtual DECLARE_WRITE8_MEMBER(write_04xx) {}
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virtual DECLARE_WRITE8_MEMBER(write_10xx) {}
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virtual DECLARE_WRITE8_MEMBER(write_30xx) {}
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virtual DECLARE_WRITE8_MEMBER(write_40xx) {}
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virtual uint8_t read_04xx(offs_t offset) { return 0xff; }
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virtual uint8_t read_10xx(offs_t offset) { return 0xff; }
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virtual uint8_t read_30xx(offs_t offset) { return 0xff; }
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virtual uint8_t read_40xx(offs_t offset) { return 0xff; }
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virtual void write_04xx(offs_t offset, uint8_t data) {}
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virtual void write_10xx(offs_t offset, uint8_t data) {}
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virtual void write_30xx(offs_t offset, uint8_t data) {}
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virtual void write_40xx(offs_t offset, uint8_t data) {}
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void rom_alloc(uint32_t size, const char *tag);
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void ram_alloc(uint32_t size);
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@ -123,14 +123,14 @@ public:
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bool has_cart() { return m_cart != nullptr; }
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// reading and writing
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virtual DECLARE_READ8_MEMBER(read_04xx);
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virtual DECLARE_READ8_MEMBER(read_10xx);
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virtual DECLARE_READ8_MEMBER(read_30xx);
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virtual DECLARE_READ8_MEMBER(read_40xx);
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virtual DECLARE_WRITE8_MEMBER(write_04xx);
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virtual DECLARE_WRITE8_MEMBER(write_10xx);
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virtual DECLARE_WRITE8_MEMBER(write_30xx);
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virtual DECLARE_WRITE8_MEMBER(write_40xx);
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uint8_t read_04xx(offs_t offset);
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uint8_t read_10xx(offs_t offset);
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uint8_t read_30xx(offs_t offset);
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uint8_t read_40xx(offs_t offset);
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void write_04xx(offs_t offset, uint8_t data);
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void write_10xx(offs_t offset, uint8_t data);
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void write_30xx(offs_t offset, uint8_t data);
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void write_40xx(offs_t offset, uint8_t data);
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private:
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// device-level overrides
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@ -80,7 +80,7 @@ void a78_versaboard_device::device_reset()
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// VersaBoard
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READ8_MEMBER(a78_versaboard_device::read_40xx)
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uint8_t a78_versaboard_device::read_40xx(offs_t offset)
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{
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if (offset < 0x4000)
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return m_ram[offset + (m_ram_bank * 0x4000)];
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@ -90,7 +90,7 @@ READ8_MEMBER(a78_versaboard_device::read_40xx)
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return m_rom[(offset & 0x3fff) + (m_bank_mask * 0x4000)]; // last bank
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}
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WRITE8_MEMBER(a78_versaboard_device::write_40xx)
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void a78_versaboard_device::write_40xx(offs_t offset, uint8_t data)
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{
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if (offset < 0x4000)
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m_ram[offset + (m_ram_bank * 0x4000)] = data;
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@ -105,7 +105,7 @@ WRITE8_MEMBER(a78_versaboard_device::write_40xx)
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// MegaCart+
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WRITE8_MEMBER(a78_megacart_device::write_40xx)
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void a78_megacart_device::write_40xx(offs_t offset, uint8_t data)
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{
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if (offset < 0x4000)
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m_ram[offset + (m_ram_bank * 0x4000)] = data;
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@ -22,8 +22,8 @@ public:
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virtual void device_reset() override;
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// reading and writing
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virtual DECLARE_READ8_MEMBER(read_40xx) override;
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virtual DECLARE_WRITE8_MEMBER(write_40xx) override;
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virtual uint8_t read_40xx(offs_t offset) override;
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virtual void write_40xx(offs_t offset, uint8_t data) override;
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protected:
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a78_versaboard_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
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@ -41,7 +41,7 @@ public:
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a78_megacart_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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// reading and writing
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virtual DECLARE_WRITE8_MEMBER(write_40xx) override;
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virtual void write_40xx(offs_t offset, uint8_t data) override;
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};
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@ -56,8 +56,8 @@ public:
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a78_rom_p450_vb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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// reading and writing
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virtual DECLARE_READ8_MEMBER(read_04xx) override { if (offset >= 0x50 && offset < 0x60) return m_pokey450->read(offset & 0x0f); else return 0xff; }
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virtual DECLARE_WRITE8_MEMBER(write_04xx) override { if (offset >= 0x50 && offset < 0x60) m_pokey450->write(offset & 0x0f, data); }
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virtual uint8_t read_04xx(offs_t offset) override { if (offset >= 0x50 && offset < 0x60) return m_pokey450->read(offset & 0x0f); else return 0xff; }
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virtual void write_04xx(offs_t offset, uint8_t data) override { if (offset >= 0x50 && offset < 0x60) m_pokey450->write(offset & 0x0f, data); }
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protected:
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virtual void device_add_mconfig(machine_config &config) override;
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@ -37,37 +37,37 @@ void a78_hiscore_device::device_add_mconfig(machine_config &config)
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mapper specific handlers
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-------------------------------------------------*/
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READ8_MEMBER(a78_hiscore_device::read_10xx)
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uint8_t a78_hiscore_device::read_10xx(offs_t offset)
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{
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return m_nvram[offset];
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}
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WRITE8_MEMBER(a78_hiscore_device::write_10xx)
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void a78_hiscore_device::write_10xx(offs_t offset, uint8_t data)
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{
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m_nvram[offset] = data;
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}
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READ8_MEMBER(a78_hiscore_device::read_30xx)
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uint8_t a78_hiscore_device::read_30xx(offs_t offset)
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{
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return m_rom[offset];
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}
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READ8_MEMBER(a78_hiscore_device::read_04xx)
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uint8_t a78_hiscore_device::read_04xx(offs_t offset)
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{
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return m_hscslot->read_04xx(space, offset);
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return m_hscslot->read_04xx(offset);
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}
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WRITE8_MEMBER(a78_hiscore_device::write_04xx)
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void a78_hiscore_device::write_04xx(offs_t offset, uint8_t data)
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{
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m_hscslot->write_04xx(space, offset, data);
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m_hscslot->write_04xx(offset, data);
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}
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READ8_MEMBER(a78_hiscore_device::read_40xx)
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uint8_t a78_hiscore_device::read_40xx(offs_t offset)
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{
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return m_hscslot->read_40xx(space, offset);
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return m_hscslot->read_40xx(offset);
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}
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WRITE8_MEMBER(a78_hiscore_device::write_40xx)
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void a78_hiscore_device::write_40xx(offs_t offset, uint8_t data)
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{
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m_hscslot->write_40xx(space, offset, data);
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m_hscslot->write_40xx(offset, data);
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}
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a78_hiscore_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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// reading and writing
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virtual DECLARE_READ8_MEMBER(read_04xx) override;
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virtual DECLARE_WRITE8_MEMBER(write_04xx) override;
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virtual DECLARE_READ8_MEMBER(read_10xx) override;
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virtual DECLARE_WRITE8_MEMBER(write_10xx) override;
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virtual DECLARE_READ8_MEMBER(read_30xx) override;
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virtual DECLARE_READ8_MEMBER(read_40xx) override;
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virtual DECLARE_WRITE8_MEMBER(write_40xx) override;
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virtual uint8_t read_04xx(offs_t offset) override;
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virtual void write_04xx(offs_t offset, uint8_t data) override;
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virtual uint8_t read_10xx(offs_t offset) override;
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virtual void write_10xx(offs_t offset, uint8_t data) override;
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virtual uint8_t read_30xx(offs_t offset) override;
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virtual uint8_t read_40xx(offs_t offset) override;
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virtual void write_40xx(offs_t offset, uint8_t data) override;
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protected:
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virtual void device_add_mconfig(machine_config &config) override;
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@ -208,7 +208,7 @@ void a78_rom_act_device::device_reset()
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-------------------------------------------------*/
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READ8_MEMBER(a78_rom_device::read_40xx)
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uint8_t a78_rom_device::read_40xx(offs_t offset)
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{
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if (offset + 0x4000 < m_base_rom)
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return 0xff;
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@ -226,7 +226,7 @@ READ8_MEMBER(a78_rom_device::read_40xx)
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-------------------------------------------------*/
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READ8_MEMBER(a78_rom_pokey_device::read_40xx)
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uint8_t a78_rom_pokey_device::read_40xx(offs_t offset)
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{
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if (offset < 0x4000)
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return m_pokey->read(offset & 0x0f);
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@ -237,7 +237,7 @@ READ8_MEMBER(a78_rom_pokey_device::read_40xx)
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return m_rom[offset + 0x4000 - m_base_rom];
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}
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WRITE8_MEMBER(a78_rom_pokey_device::write_40xx)
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void a78_rom_pokey_device::write_40xx(offs_t offset, uint8_t data)
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{
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if (offset < 0x4000)
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m_pokey->write(offset & 0x0f, data);
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@ -264,7 +264,7 @@ void a78_rom_pokey_device::device_add_mconfig(machine_config &config)
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-------------------------------------------------*/
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READ8_MEMBER(a78_rom_mram_device::read_40xx)
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uint8_t a78_rom_mram_device::read_40xx(offs_t offset)
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{
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if (offset < 0x4000)
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return m_ram[offset & 0xfeff];
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@ -274,7 +274,7 @@ READ8_MEMBER(a78_rom_mram_device::read_40xx)
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return m_rom[offset + 0x4000 - m_base_rom];
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}
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WRITE8_MEMBER(a78_rom_mram_device::write_40xx)
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void a78_rom_mram_device::write_40xx(offs_t offset, uint8_t data)
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{
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if (offset < 0x4000)
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m_ram[offset&0xfeff] = data;
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@ -298,7 +298,7 @@ WRITE8_MEMBER(a78_rom_mram_device::write_40xx)
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-------------------------------------------------*/
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READ8_MEMBER(a78_rom_sg_device::read_40xx)
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uint8_t a78_rom_sg_device::read_40xx(offs_t offset)
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{
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if (offset < 0x4000)
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return m_rom[(offset & 0x3fff) + ((m_bank_mask - 1) * 0x4000)]; // second to last bank (is this always ok?!?)
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@ -308,7 +308,7 @@ READ8_MEMBER(a78_rom_sg_device::read_40xx)
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return m_rom[(offset & 0x3fff) + (m_bank_mask * 0x4000)]; // last bank
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}
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WRITE8_MEMBER(a78_rom_sg_device::write_40xx)
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void a78_rom_sg_device::write_40xx(offs_t offset, uint8_t data)
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{
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if (offset >= 0x4000 && offset < 0x8000)
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m_bank = data & m_bank_mask;
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@ -324,7 +324,7 @@ WRITE8_MEMBER(a78_rom_sg_device::write_40xx)
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-------------------------------------------------*/
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READ8_MEMBER(a78_rom_sg_pokey_device::read_40xx)
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uint8_t a78_rom_sg_pokey_device::read_40xx(offs_t offset)
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{
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if (offset < 0x4000)
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return m_pokey->read(offset & 0x0f);
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@ -334,7 +334,7 @@ READ8_MEMBER(a78_rom_sg_pokey_device::read_40xx)
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return m_rom[(offset & 0x3fff) + (m_bank_mask * 0x4000)]; // last bank
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}
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WRITE8_MEMBER(a78_rom_sg_pokey_device::write_40xx)
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void a78_rom_sg_pokey_device::write_40xx(offs_t offset, uint8_t data)
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{
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if (offset < 0x4000)
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m_pokey->write(offset & 0x0f, data);
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@ -361,7 +361,7 @@ void a78_rom_sg_pokey_device::device_add_mconfig(machine_config &config)
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-------------------------------------------------*/
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READ8_MEMBER(a78_rom_sg_ram_device::read_40xx)
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uint8_t a78_rom_sg_ram_device::read_40xx(offs_t offset)
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{
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if (offset < 0x4000)
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return m_ram[offset];
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@ -371,7 +371,7 @@ READ8_MEMBER(a78_rom_sg_ram_device::read_40xx)
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return m_rom[(offset & 0x3fff) + (m_bank_mask * 0x4000)]; // last bank
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}
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WRITE8_MEMBER(a78_rom_sg_ram_device::write_40xx)
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void a78_rom_sg_ram_device::write_40xx(offs_t offset, uint8_t data)
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{
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if (offset < 0x4000)
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m_ram[offset] = data;
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@ -392,7 +392,7 @@ WRITE8_MEMBER(a78_rom_sg_ram_device::write_40xx)
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-------------------------------------------------*/
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READ8_MEMBER(a78_rom_sg9_device::read_40xx)
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uint8_t a78_rom_sg9_device::read_40xx(offs_t offset)
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{
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if (offset < 0x4000)
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return m_rom[(offset & 0x3fff)];
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@ -402,7 +402,7 @@ READ8_MEMBER(a78_rom_sg9_device::read_40xx)
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return m_rom[(offset & 0x3fff) + ((m_bank_mask + 1) * 0x4000)]; // last bank
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}
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WRITE8_MEMBER(a78_rom_sg9_device::write_40xx)
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void a78_rom_sg9_device::write_40xx(offs_t offset, uint8_t data)
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{
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if (offset >= 0x4000 && offset < 0x8000)
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m_bank = (data & m_bank_mask) + 1;
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@ -419,7 +419,7 @@ WRITE8_MEMBER(a78_rom_sg9_device::write_40xx)
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-------------------------------------------------*/
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READ8_MEMBER(a78_rom_abs_device::read_40xx)
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uint8_t a78_rom_abs_device::read_40xx(offs_t offset)
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{
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if (offset < 0x4000)
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return m_rom[(offset & 0x3fff) + (m_bank * 0x4000)];
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@ -430,7 +430,7 @@ READ8_MEMBER(a78_rom_abs_device::read_40xx)
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}
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}
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|
||||
WRITE8_MEMBER(a78_rom_abs_device::write_40xx)
|
||||
void a78_rom_abs_device::write_40xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (offset == 0x4000)
|
||||
{
|
||||
@ -457,7 +457,7 @@ WRITE8_MEMBER(a78_rom_abs_device::write_40xx)
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a78_rom_act_device::read_40xx)
|
||||
uint8_t a78_rom_act_device::read_40xx(offs_t offset)
|
||||
{
|
||||
uint8_t data = 0xff;
|
||||
uint16_t addr = offset & 0x1fff;
|
||||
@ -488,7 +488,7 @@ READ8_MEMBER(a78_rom_act_device::read_40xx)
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a78_rom_act_device::write_40xx)
|
||||
void a78_rom_act_device::write_40xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (offset >= 0xbf80 && offset <= 0xbf8f)
|
||||
m_bank = offset & 7;
|
||||
|
@ -19,7 +19,7 @@ public:
|
||||
a78_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_40xx) override;
|
||||
virtual uint8_t read_40xx(offs_t offset) override;
|
||||
|
||||
protected:
|
||||
a78_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -39,8 +39,8 @@ public:
|
||||
a78_rom_pokey_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_40xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_40xx) override;
|
||||
virtual uint8_t read_40xx(offs_t offset) override;
|
||||
virtual void write_40xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
a78_rom_pokey_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -60,8 +60,8 @@ public:
|
||||
a78_rom_mram_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_40xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_40xx) override;
|
||||
virtual uint8_t read_40xx(offs_t offset) override;
|
||||
virtual void write_40xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
a78_rom_mram_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -77,8 +77,8 @@ public:
|
||||
a78_rom_sg_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_40xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_40xx) override;
|
||||
virtual uint8_t read_40xx(offs_t offset) override;
|
||||
virtual void write_40xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
a78_rom_sg_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -100,8 +100,8 @@ public:
|
||||
a78_rom_sg_pokey_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_40xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_40xx) override;
|
||||
virtual uint8_t read_40xx(offs_t offset) override;
|
||||
virtual void write_40xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
@ -119,8 +119,8 @@ public:
|
||||
a78_rom_sg_ram_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_40xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_40xx) override;
|
||||
virtual uint8_t read_40xx(offs_t offset) override;
|
||||
virtual void write_40xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
a78_rom_sg_ram_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -136,8 +136,8 @@ public:
|
||||
a78_rom_sg9_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_40xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_40xx) override;
|
||||
virtual uint8_t read_40xx(offs_t offset) override;
|
||||
virtual void write_40xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
a78_rom_sg9_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -153,8 +153,8 @@ public:
|
||||
a78_rom_abs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_40xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_40xx) override;
|
||||
virtual uint8_t read_40xx(offs_t offset) override;
|
||||
virtual void write_40xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
@ -174,8 +174,8 @@ public:
|
||||
a78_rom_act_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_40xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_40xx) override;
|
||||
virtual uint8_t read_40xx(offs_t offset) override;
|
||||
virtual void write_40xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
@ -197,8 +197,8 @@ public:
|
||||
a78_rom_p450_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_04xx) override { if (offset >= 0x50 && offset < 0x60) return m_pokey450->read(offset & 0x0f); else return 0xff; }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_04xx) override { if (offset >= 0x50 && offset < 0x60) m_pokey450->write(offset & 0x0f, data); }
|
||||
virtual uint8_t read_04xx(offs_t offset) override { if (offset >= 0x50 && offset < 0x60) return m_pokey450->read(offset & 0x0f); else return 0xff; }
|
||||
virtual void write_04xx(offs_t offset, uint8_t data) override { if (offset >= 0x50 && offset < 0x60) m_pokey450->write(offset & 0x0f, data); }
|
||||
|
||||
protected:
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
@ -216,8 +216,8 @@ public:
|
||||
a78_rom_p450_pokey_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_04xx) override { if (offset >= 0x50 && offset < 0x60) return m_pokey450->read(offset & 0x0f); else return 0xff; }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_04xx) override { if (offset >= 0x50 && offset < 0x60) m_pokey450->write(offset & 0x0f, data); }
|
||||
virtual uint8_t read_04xx(offs_t offset) override { if (offset >= 0x50 && offset < 0x60) return m_pokey450->read(offset & 0x0f); else return 0xff; }
|
||||
virtual void write_04xx(offs_t offset, uint8_t data) override { if (offset >= 0x50 && offset < 0x60) m_pokey450->write(offset & 0x0f, data); }
|
||||
|
||||
protected:
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
@ -235,8 +235,8 @@ public:
|
||||
a78_rom_p450_sg_ram_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_04xx) override { if (offset >= 0x50 && offset < 0x60) return m_pokey450->read(offset & 0x0f); else return 0xff; }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_04xx) override { if (offset >= 0x50 && offset < 0x60) m_pokey450->write(offset & 0x0f, data); }
|
||||
virtual uint8_t read_04xx(offs_t offset) override { if (offset >= 0x50 && offset < 0x60) return m_pokey450->read(offset & 0x0f); else return 0xff; }
|
||||
virtual void write_04xx(offs_t offset, uint8_t data) override { if (offset >= 0x50 && offset < 0x60) m_pokey450->write(offset & 0x0f, data); }
|
||||
|
||||
protected:
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
@ -254,8 +254,8 @@ public:
|
||||
a78_rom_p450_sg9_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_04xx) override { if (offset >= 0x50 && offset < 0x60) return m_pokey450->read(offset & 0x0f); else return 0xff; }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_04xx) override { if (offset >= 0x50 && offset < 0x60) m_pokey450->write(offset & 0x0f, data); }
|
||||
virtual uint8_t read_04xx(offs_t offset) override { if (offset >= 0x50 && offset < 0x60) return m_pokey450->read(offset & 0x0f); else return 0xff; }
|
||||
virtual void write_04xx(offs_t offset, uint8_t data) override { if (offset >= 0x50 && offset < 0x60) m_pokey450->write(offset & 0x0f, data); }
|
||||
|
||||
protected:
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
|
@ -139,38 +139,38 @@ void a78_xm_device::device_add_mconfig(machine_config &config)
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a78_xboard_device::read_40xx)
|
||||
uint8_t a78_xboard_device::read_40xx(offs_t offset)
|
||||
{
|
||||
if (BIT(m_reg, 3) && offset < 0x4000)
|
||||
return m_ram[offset + (m_ram_bank * 0x4000)];
|
||||
else
|
||||
return m_xbslot->read_40xx(space, offset);
|
||||
return m_xbslot->read_40xx(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a78_xboard_device::write_40xx)
|
||||
void a78_xboard_device::write_40xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (BIT(m_reg, 3) && offset < 0x4000)
|
||||
m_ram[offset + (m_ram_bank * 0x4000)] = data;
|
||||
else
|
||||
m_xbslot->write_40xx(space, offset, data);
|
||||
m_xbslot->write_40xx(offset, data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(a78_xboard_device::read_04xx)
|
||||
uint8_t a78_xboard_device::read_04xx(offs_t offset)
|
||||
{
|
||||
if (BIT(m_reg, 4) && offset >= 0x50 && offset < 0x60)
|
||||
return m_pokey->read(offset & 0x0f);
|
||||
else if (BIT(m_reg, 4) && offset >= 0x60 && offset < 0x70)
|
||||
return m_xbslot->read_04xx(space, offset - 0x10); // access second POKEY
|
||||
return m_xbslot->read_04xx(offset - 0x10); // access second POKEY
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a78_xboard_device::write_04xx)
|
||||
void a78_xboard_device::write_04xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (BIT(m_reg, 4) && offset >= 0x50 && offset < 0x60)
|
||||
m_pokey->write(offset & 0x0f, data);
|
||||
else if (BIT(m_reg, 4) && offset >= 0x60 && offset < 0x70)
|
||||
m_xbslot->write_04xx(space, offset - 0x10, data); // access second POKEY
|
||||
m_xbslot->write_04xx(offset - 0x10, data); // access second POKEY
|
||||
else if (offset >= 0x70 && offset < 0x80)
|
||||
{
|
||||
m_reg = data;
|
||||
@ -185,41 +185,41 @@ WRITE8_MEMBER(a78_xboard_device::write_04xx)
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a78_xm_device::read_10xx)
|
||||
uint8_t a78_xm_device::read_10xx(offs_t offset)
|
||||
{
|
||||
return m_nvram[offset];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a78_xm_device::write_10xx)
|
||||
void a78_xm_device::write_10xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_nvram[offset] = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(a78_xm_device::read_30xx)
|
||||
uint8_t a78_xm_device::read_30xx(offs_t offset)
|
||||
{
|
||||
return m_rom[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER(a78_xm_device::read_04xx)
|
||||
uint8_t a78_xm_device::read_04xx(offs_t offset)
|
||||
{
|
||||
if (BIT(m_reg, 4) && offset >= 0x50 && offset < 0x60)
|
||||
return m_pokey->read(offset & 0x0f);
|
||||
else if (m_ym_enabled && offset >= 0x60 && offset <= 0x61)
|
||||
return m_ym->read(offset & 1);
|
||||
else if (BIT(m_reg, 4) && offset >= 0x60 && offset < 0x70)
|
||||
return m_xbslot->read_04xx(space, offset - 0x10); // access second POKEY
|
||||
return m_xbslot->read_04xx(offset - 0x10); // access second POKEY
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a78_xm_device::write_04xx)
|
||||
void a78_xm_device::write_04xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (BIT(m_reg, 4) && offset >= 0x50 && offset < 0x60)
|
||||
m_pokey->write(offset & 0x0f, data);
|
||||
else if (m_ym_enabled && offset >= 0x60 && offset <= 0x61)
|
||||
m_ym->write(offset & 1, data);
|
||||
else if (BIT(m_reg, 4) && offset >= 0x60 && offset < 0x70)
|
||||
m_xbslot->write_04xx(space, offset - 0x10, data); // access second POKEY
|
||||
m_xbslot->write_04xx(offset - 0x10, data); // access second POKEY
|
||||
else if (offset >= 0x70 && offset < 0x80)
|
||||
{
|
||||
//printf("regs 0x%X\n", data);
|
||||
|
@ -20,10 +20,10 @@ public:
|
||||
a78_xboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_04xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_04xx) override;
|
||||
virtual DECLARE_READ8_MEMBER(read_40xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_40xx) override;
|
||||
virtual uint8_t read_04xx(offs_t offset) override;
|
||||
virtual void write_04xx(offs_t offset, uint8_t data) override;
|
||||
virtual uint8_t read_40xx(offs_t offset) override;
|
||||
virtual void write_40xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
a78_xboard_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -47,11 +47,11 @@ public:
|
||||
a78_xm_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_04xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_04xx) override;
|
||||
virtual DECLARE_READ8_MEMBER(read_10xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_10xx) override;
|
||||
virtual DECLARE_READ8_MEMBER(read_30xx) override;
|
||||
virtual uint8_t read_04xx(offs_t offset) override;
|
||||
virtual void write_04xx(offs_t offset, uint8_t data) override;
|
||||
virtual uint8_t read_10xx(offs_t offset) override;
|
||||
virtual void write_10xx(offs_t offset, uint8_t data) override;
|
||||
virtual uint8_t read_30xx(offs_t offset) override;
|
||||
|
||||
protected:
|
||||
virtual void device_start() override;
|
||||
|
@ -494,18 +494,18 @@ std::string xegs_cart_slot_device::get_default_card_software(get_default_card_so
|
||||
read
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a800_cart_slot_device::read_80xx)
|
||||
uint8_t a800_cart_slot_device::read_80xx(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_80xx(space, offset, mem_mask);
|
||||
return m_cart->read_80xx(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(a800_cart_slot_device::read_d5xx)
|
||||
uint8_t a800_cart_slot_device::read_d5xx(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_d5xx(space, offset, mem_mask);
|
||||
return m_cart->read_d5xx(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
@ -515,14 +515,14 @@ READ8_MEMBER(a800_cart_slot_device::read_d5xx)
|
||||
write
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE8_MEMBER(a800_cart_slot_device::write_80xx)
|
||||
void a800_cart_slot_device::write_80xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (m_cart)
|
||||
m_cart->write_80xx(space, offset, data, mem_mask);
|
||||
m_cart->write_80xx(offset, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a800_cart_slot_device::write_d5xx)
|
||||
void a800_cart_slot_device::write_d5xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (m_cart)
|
||||
m_cart->write_d5xx(space, offset, data, mem_mask);
|
||||
m_cart->write_d5xx(offset, data);
|
||||
}
|
||||
|
@ -55,10 +55,10 @@ public:
|
||||
virtual ~device_a800_cart_interface();
|
||||
|
||||
// memory accessor
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) { return 0xff; }
|
||||
virtual DECLARE_READ8_MEMBER(read_d5xx) { return 0xff; }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_80xx) {}
|
||||
virtual DECLARE_WRITE8_MEMBER(write_d5xx) {}
|
||||
virtual uint8_t read_80xx(offs_t offset) { return 0xff; }
|
||||
virtual uint8_t read_d5xx(offs_t offset) { return 0xff; }
|
||||
virtual void write_80xx(offs_t offset, uint8_t data) {}
|
||||
virtual void write_d5xx(offs_t offset, uint8_t data) {}
|
||||
|
||||
void rom_alloc(uint32_t size, const char *tag);
|
||||
void ram_alloc(uint32_t size);
|
||||
@ -124,10 +124,10 @@ public:
|
||||
bool has_cart() { return m_cart != nullptr; }
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx);
|
||||
virtual DECLARE_READ8_MEMBER(read_d5xx);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_80xx);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_d5xx);
|
||||
uint8_t read_80xx(offs_t offset);
|
||||
uint8_t read_d5xx(offs_t offset);
|
||||
void write_80xx(offs_t offset, uint8_t data);
|
||||
void write_d5xx(offs_t offset, uint8_t data);
|
||||
|
||||
protected:
|
||||
a800_cart_slot_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
@ -143,7 +143,7 @@ WRITE_LINE_MEMBER( a8sio_device::proceed_w )
|
||||
m_out_proceed_cb(state);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( a8sio_device::audio_in_w )
|
||||
void a8sio_device::audio_in_w(uint8_t data)
|
||||
{
|
||||
m_out_audio_in_cb(data);
|
||||
}
|
||||
|
@ -69,7 +69,7 @@ public:
|
||||
DECLARE_WRITE_LINE_MEMBER( command_w ); // pin 7
|
||||
DECLARE_WRITE_LINE_MEMBER( motor_w ); // pin 8
|
||||
DECLARE_WRITE_LINE_MEMBER( proceed_w ); // pin 9
|
||||
DECLARE_WRITE8_MEMBER( audio_in_w ); // pin 11
|
||||
void audio_in_w(uint8_t data); // pin 11
|
||||
DECLARE_WRITE_LINE_MEMBER( interrupt_w ); // pin 13
|
||||
|
||||
protected:
|
||||
|
@ -102,7 +102,7 @@ void a800_rom_oss91_device::device_reset()
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a800_rom_oss8k_device::read_80xx)
|
||||
uint8_t a800_rom_oss8k_device::read_80xx(offs_t offset)
|
||||
{
|
||||
if (offset >= 0x1000)
|
||||
return m_rom[offset & 0xfff];
|
||||
@ -110,7 +110,7 @@ READ8_MEMBER(a800_rom_oss8k_device::read_80xx)
|
||||
return m_rom[(offset & 0xfff) + (m_bank * 0x1000)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a800_rom_oss8k_device::write_d5xx)
|
||||
void a800_rom_oss8k_device::write_d5xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
switch (offset & 0x09)
|
||||
{
|
||||
@ -136,7 +136,7 @@ WRITE8_MEMBER(a800_rom_oss8k_device::write_d5xx)
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a800_rom_oss34_device::read_80xx)
|
||||
uint8_t a800_rom_oss34_device::read_80xx(offs_t offset)
|
||||
{
|
||||
if (offset >= 0x1000)
|
||||
return m_rom[(offset & 0xfff) + 0x3000];
|
||||
@ -146,7 +146,7 @@ READ8_MEMBER(a800_rom_oss34_device::read_80xx)
|
||||
return m_rom[(offset & 0xfff) + (m_bank * 0x1000)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a800_rom_oss34_device::write_d5xx)
|
||||
void a800_rom_oss34_device::write_d5xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
switch (offset & 0x0f)
|
||||
{
|
||||
@ -180,7 +180,7 @@ WRITE8_MEMBER(a800_rom_oss34_device::write_d5xx)
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a800_rom_oss43_device::read_80xx)
|
||||
uint8_t a800_rom_oss43_device::read_80xx(offs_t offset)
|
||||
{
|
||||
if (offset >= 0x1000)
|
||||
return m_rom[(offset & 0xfff) + 0x3000];
|
||||
@ -190,7 +190,7 @@ READ8_MEMBER(a800_rom_oss43_device::read_80xx)
|
||||
return m_rom[(offset & 0xfff) + (m_bank * 0x1000)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a800_rom_oss43_device::write_d5xx)
|
||||
void a800_rom_oss43_device::write_d5xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
switch (offset & 0x0f)
|
||||
{
|
||||
@ -225,7 +225,7 @@ WRITE8_MEMBER(a800_rom_oss43_device::write_d5xx)
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a800_rom_oss91_device::read_80xx)
|
||||
uint8_t a800_rom_oss91_device::read_80xx(offs_t offset)
|
||||
{
|
||||
if (offset >= 0x1000)
|
||||
return m_rom[offset & 0xfff];
|
||||
@ -233,7 +233,7 @@ READ8_MEMBER(a800_rom_oss91_device::read_80xx)
|
||||
return m_rom[(offset & 0xfff) + (m_bank * 0x1000)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a800_rom_oss91_device::write_d5xx)
|
||||
void a800_rom_oss91_device::write_d5xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
switch (offset & 0x09)
|
||||
{
|
||||
|
@ -16,8 +16,8 @@ public:
|
||||
// construction/destruction
|
||||
a800_rom_oss8k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_d5xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
virtual void write_d5xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
@ -36,8 +36,8 @@ public:
|
||||
// construction/destruction
|
||||
a800_rom_oss34_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_d5xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
virtual void write_d5xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
@ -56,8 +56,8 @@ public:
|
||||
// construction/destruction
|
||||
a800_rom_oss43_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_d5xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
virtual void write_d5xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
@ -76,8 +76,8 @@ public:
|
||||
// construction/destruction
|
||||
a800_rom_oss91_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_d5xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
virtual void write_d5xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
|
@ -206,7 +206,7 @@ void a5200_rom_bbsb_device::device_reset()
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a800_rom_device::read_80xx)
|
||||
uint8_t a800_rom_device::read_80xx(offs_t offset)
|
||||
{
|
||||
return m_rom[offset & (m_rom_size - 1)];
|
||||
}
|
||||
@ -226,7 +226,7 @@ READ8_MEMBER(a800_rom_device::read_80xx)
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a800_rom_bbsb_device::read_80xx)
|
||||
uint8_t a800_rom_bbsb_device::read_80xx(offs_t offset)
|
||||
{
|
||||
if (offset < 0x1000)
|
||||
return m_rom[(offset & 0xfff) + (m_banks[0] * 0x1000) + 0];
|
||||
@ -236,7 +236,7 @@ READ8_MEMBER(a800_rom_bbsb_device::read_80xx)
|
||||
return m_rom[(offset & 0x1fff) + 0x8000];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a800_rom_bbsb_device::write_80xx)
|
||||
void a800_rom_bbsb_device::write_80xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
uint16_t addr = offset & 0xfff;
|
||||
if (addr >= 0xff6 && addr <= 0xff9)
|
||||
@ -252,7 +252,7 @@ WRITE8_MEMBER(a800_rom_bbsb_device::write_80xx)
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(xegs_rom_device::read_80xx)
|
||||
uint8_t xegs_rom_device::read_80xx(offs_t offset)
|
||||
{
|
||||
if (offset < 0x2000)
|
||||
return m_rom[(offset & 0x1fff) + (m_bank * 0x2000)];
|
||||
@ -261,7 +261,7 @@ READ8_MEMBER(xegs_rom_device::read_80xx)
|
||||
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xegs_rom_device::write_d5xx)
|
||||
void xegs_rom_device::write_d5xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_bank = data & m_bank_mask;
|
||||
}
|
||||
@ -280,12 +280,12 @@ WRITE8_MEMBER(xegs_rom_device::write_d5xx)
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a800_rom_williams_device::read_80xx)
|
||||
uint8_t a800_rom_williams_device::read_80xx(offs_t offset)
|
||||
{
|
||||
return m_rom[(offset & 0x1fff) + (m_bank * 0x2000)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a800_rom_williams_device::write_d5xx)
|
||||
void a800_rom_williams_device::write_d5xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_bank = (offset & 0x07);
|
||||
}
|
||||
@ -303,12 +303,12 @@ WRITE8_MEMBER(a800_rom_williams_device::write_d5xx)
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a800_rom_express_device::read_80xx)
|
||||
uint8_t a800_rom_express_device::read_80xx(offs_t offset)
|
||||
{
|
||||
return m_rom[(offset & 0x1fff) + (m_bank * 0x2000)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a800_rom_express_device::write_d5xx)
|
||||
void a800_rom_express_device::write_d5xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_bank = (offset ^ 0x07) & 0x0f;
|
||||
}
|
||||
@ -321,12 +321,12 @@ WRITE8_MEMBER(a800_rom_express_device::write_d5xx)
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a800_rom_turbo_device::read_80xx)
|
||||
uint8_t a800_rom_turbo_device::read_80xx(offs_t offset)
|
||||
{
|
||||
return m_rom[(offset & 0x1fff) + (m_bank * 0x2000)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a800_rom_turbo_device::write_d5xx)
|
||||
void a800_rom_turbo_device::write_d5xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_bank = offset & m_bank_mask;
|
||||
}
|
||||
@ -339,7 +339,7 @@ WRITE8_MEMBER(a800_rom_turbo_device::write_d5xx)
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a800_rom_telelink2_device::read_80xx)
|
||||
uint8_t a800_rom_telelink2_device::read_80xx(offs_t offset)
|
||||
{
|
||||
if (offset >= 0x2000)
|
||||
return m_rom[offset & 0x1fff];
|
||||
@ -349,18 +349,18 @@ READ8_MEMBER(a800_rom_telelink2_device::read_80xx)
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a800_rom_telelink2_device::write_80xx)
|
||||
void a800_rom_telelink2_device::write_80xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_nvram[offset & 0xff] = data | 0xf0; // low 4bits only
|
||||
}
|
||||
|
||||
READ8_MEMBER(a800_rom_telelink2_device::read_d5xx)
|
||||
uint8_t a800_rom_telelink2_device::read_d5xx(offs_t offset)
|
||||
{
|
||||
// this should affect NVRAM enable / save
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a800_rom_telelink2_device::write_d5xx)
|
||||
void a800_rom_telelink2_device::write_d5xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
// this should affect NVRAM enable / save
|
||||
}
|
||||
@ -374,12 +374,12 @@ WRITE8_MEMBER(a800_rom_telelink2_device::write_d5xx)
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a800_rom_microcalc_device::read_80xx)
|
||||
uint8_t a800_rom_microcalc_device::read_80xx(offs_t offset)
|
||||
{
|
||||
return m_rom[(offset & 0x1fff) + (m_bank * 0x2000)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a800_rom_microcalc_device::write_d5xx)
|
||||
void a800_rom_microcalc_device::write_d5xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_bank = data;
|
||||
}
|
||||
@ -407,7 +407,7 @@ WRITE8_MEMBER(a800_rom_microcalc_device::write_d5xx)
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a5200_rom_2chips_device::read_80xx)
|
||||
uint8_t a5200_rom_2chips_device::read_80xx(offs_t offset)
|
||||
{
|
||||
if (offset < 0x4000)
|
||||
return m_rom[offset & 0x1fff];
|
||||
@ -431,7 +431,7 @@ READ8_MEMBER(a5200_rom_2chips_device::read_80xx)
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a5200_rom_bbsb_device::read_80xx)
|
||||
uint8_t a5200_rom_bbsb_device::read_80xx(offs_t offset)
|
||||
{
|
||||
if (offset < 0x1000)
|
||||
return m_rom[(offset & 0xfff) + (m_banks[0] * 0x1000) + 0];
|
||||
@ -443,7 +443,7 @@ READ8_MEMBER(a5200_rom_bbsb_device::read_80xx)
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a5200_rom_bbsb_device::write_80xx)
|
||||
void a5200_rom_bbsb_device::write_80xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
uint16_t addr = offset & 0xfff;
|
||||
if (addr >= 0xff6 && addr <= 0xff9)
|
||||
|
@ -17,7 +17,7 @@ public:
|
||||
// construction/destruction
|
||||
a800_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
|
||||
protected:
|
||||
a800_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -36,8 +36,8 @@ public:
|
||||
// construction/destruction
|
||||
a800_rom_bbsb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_80xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
virtual void write_80xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
@ -56,8 +56,8 @@ public:
|
||||
// construction/destruction
|
||||
a800_rom_williams_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_d5xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
virtual void write_d5xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
@ -76,8 +76,8 @@ public:
|
||||
// construction/destruction
|
||||
a800_rom_express_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_d5xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
virtual void write_d5xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
@ -96,7 +96,7 @@ public:
|
||||
// construction/destruction
|
||||
a800_rom_blizzard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
@ -113,8 +113,8 @@ public:
|
||||
// construction/destruction
|
||||
a800_rom_turbo_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_d5xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
virtual void write_d5xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
@ -133,10 +133,10 @@ public:
|
||||
// construction/destruction
|
||||
a800_rom_telelink2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_80xx) override;
|
||||
virtual DECLARE_READ8_MEMBER(read_d5xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_d5xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
virtual void write_80xx(offs_t offset, uint8_t data) override;
|
||||
virtual uint8_t read_d5xx(offs_t offset) override;
|
||||
virtual void write_d5xx(offs_t offset, uint8_t data) override;
|
||||
};
|
||||
|
||||
|
||||
@ -148,8 +148,8 @@ public:
|
||||
// construction/destruction
|
||||
a800_rom_microcalc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_d5xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
virtual void write_d5xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
@ -172,8 +172,8 @@ public:
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_d5xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
virtual void write_d5xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
int m_bank;
|
||||
@ -188,7 +188,7 @@ public:
|
||||
// construction/destruction
|
||||
a5200_rom_2chips_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
};
|
||||
|
||||
|
||||
@ -200,8 +200,8 @@ public:
|
||||
// construction/destruction
|
||||
a5200_rom_bbsb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_80xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
virtual void write_80xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
|
@ -55,7 +55,7 @@ void a800_rom_spartados_device::device_reset()
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(a800_rom_spartados_device::read_80xx)
|
||||
uint8_t a800_rom_spartados_device::read_80xx(offs_t offset)
|
||||
{
|
||||
if (!m_subslot_enabled)
|
||||
return m_rom[(offset & 0x1fff) + (m_bank * 0x2000)];
|
||||
@ -63,7 +63,7 @@ READ8_MEMBER(a800_rom_spartados_device::read_80xx)
|
||||
return 0xff; // subslot, currently not implemented
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(a800_rom_spartados_device::write_d5xx)
|
||||
void a800_rom_spartados_device::write_d5xx(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (offset & 0x08)
|
||||
m_subslot_enabled = !BIT(offset, 2);
|
||||
|
@ -16,8 +16,8 @@ public:
|
||||
// construction/destruction
|
||||
a800_rom_spartados_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_80xx) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_d5xx) override;
|
||||
virtual uint8_t read_80xx(offs_t offset) override;
|
||||
virtual void write_d5xx(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
|
@ -201,17 +201,15 @@ public:
|
||||
DECLARE_WRITE_LINE_MEMBER( tren_w ) { if (m_card) m_card->abcbus_tren(state); }
|
||||
DECLARE_WRITE_LINE_MEMBER( prac_w ) { if (m_card) m_card->abcbus_prac(state); }
|
||||
|
||||
DECLARE_WRITE8_MEMBER( cs_w ) { write_cs(data); }
|
||||
DECLARE_READ8_MEMBER( rst_r ) { return read_rst(); }
|
||||
DECLARE_READ8_MEMBER( inp_r ) { return read_inp(); }
|
||||
DECLARE_WRITE8_MEMBER( out_w ) { write_out(data); }
|
||||
DECLARE_READ8_MEMBER( stat_r ) { return read_stat(); }
|
||||
DECLARE_WRITE8_MEMBER( c1_w ) { write_c1(data); }
|
||||
DECLARE_WRITE8_MEMBER( c2_w ) { write_c2(data); }
|
||||
DECLARE_WRITE8_MEMBER( c3_w ) { write_c3(data); }
|
||||
DECLARE_WRITE8_MEMBER( c4_w ) { write_c4(data); }
|
||||
DECLARE_READ8_MEMBER( xmemfl_r ) { return xmemfl_r(offset); }
|
||||
DECLARE_WRITE8_MEMBER( xmemw_w ) { xmemw_w(offset, data); }
|
||||
void cs_w(uint8_t data) { write_cs(data); }
|
||||
uint8_t rst_r() { return read_rst(); }
|
||||
uint8_t inp_r() { return read_inp(); }
|
||||
void out_w(uint8_t data) { write_out(data); }
|
||||
uint8_t stat_r() { return read_stat(); }
|
||||
void c1_w(uint8_t data) { write_c1(data); }
|
||||
void c2_w(uint8_t data) { write_c2(data); }
|
||||
void c3_w(uint8_t data) { write_c3(data); }
|
||||
void c4_w(uint8_t data) { write_c4(data); }
|
||||
|
||||
DECLARE_READ_LINE_MEMBER( irq_r ) { return m_irq; }
|
||||
DECLARE_READ_LINE_MEMBER( nmi_r ) { return m_nmi; }
|
||||
|
@ -455,8 +455,7 @@ void luxor_55_10828_device::device_reset()
|
||||
{
|
||||
m_cs = false;
|
||||
|
||||
address_space &space = m_maincpu->space(AS_PROGRAM);
|
||||
ctrl_w(space, 0, 0);
|
||||
ctrl_w(0);
|
||||
|
||||
m_data = 0;
|
||||
}
|
||||
@ -574,7 +573,7 @@ void luxor_55_10828_device::abcbus_c3(uint8_t data)
|
||||
// ctrl_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( luxor_55_10828_device::ctrl_w )
|
||||
void luxor_55_10828_device::ctrl_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
|
||||
@ -626,7 +625,7 @@ WRITE8_MEMBER( luxor_55_10828_device::ctrl_w )
|
||||
// status_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( luxor_55_10828_device::status_w )
|
||||
void luxor_55_10828_device::status_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
|
||||
@ -657,7 +656,7 @@ WRITE8_MEMBER( luxor_55_10828_device::status_w )
|
||||
// fdc_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( luxor_55_10828_device::fdc_r )
|
||||
uint8_t luxor_55_10828_device::fdc_r(offs_t offset)
|
||||
{
|
||||
if (machine().side_effects_disabled())
|
||||
return 0xff;
|
||||
@ -685,7 +684,7 @@ READ8_MEMBER( luxor_55_10828_device::fdc_r )
|
||||
// fdc_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( luxor_55_10828_device::fdc_w )
|
||||
void luxor_55_10828_device::fdc_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (machine().side_effects_disabled())
|
||||
return;
|
||||
|
@ -83,10 +83,10 @@ private:
|
||||
DECLARE_WRITE_LINE_MEMBER( fdc_intrq_w );
|
||||
DECLARE_WRITE_LINE_MEMBER( fdc_drq_w );
|
||||
|
||||
DECLARE_WRITE8_MEMBER( ctrl_w );
|
||||
DECLARE_WRITE8_MEMBER( status_w );
|
||||
DECLARE_READ8_MEMBER( fdc_r );
|
||||
DECLARE_WRITE8_MEMBER( fdc_w );
|
||||
void ctrl_w(uint8_t data);
|
||||
void status_w(uint8_t data);
|
||||
uint8_t fdc_r(offs_t offset);
|
||||
void fdc_w(offs_t offset, uint8_t data);
|
||||
|
||||
DECLARE_FLOPPY_FORMATS( floppy_formats );
|
||||
|
||||
|
@ -789,10 +789,9 @@ void luxor_55_21046_device::device_reset()
|
||||
|
||||
m_maincpu->reset();
|
||||
|
||||
address_space &space = m_maincpu->space(AS_PROGRAM);
|
||||
_4b_w(space, 0, 0);
|
||||
_9b_w(space, 0, 0);
|
||||
_8a_w(space, 0, 0);
|
||||
_4b_w(0);
|
||||
_9b_w(0);
|
||||
_8a_w(0);
|
||||
}
|
||||
|
||||
|
||||
@ -932,9 +931,9 @@ void luxor_55_21046_device::abcbus_c4(uint8_t data)
|
||||
// 3d_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( luxor_55_21046_device::out_r )
|
||||
uint8_t luxor_55_21046_device::out_r()
|
||||
{
|
||||
if (m_busy)
|
||||
if (m_busy && !machine().side_effects_disabled())
|
||||
{
|
||||
m_busy = 0;
|
||||
}
|
||||
@ -947,7 +946,7 @@ READ8_MEMBER( luxor_55_21046_device::out_r )
|
||||
// 4d_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( luxor_55_21046_device::inp_w )
|
||||
void luxor_55_21046_device::inp_w(uint8_t data)
|
||||
{
|
||||
if (m_busy)
|
||||
{
|
||||
@ -962,7 +961,7 @@ WRITE8_MEMBER( luxor_55_21046_device::inp_w )
|
||||
// 4b_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( luxor_55_21046_device::_4b_w )
|
||||
void luxor_55_21046_device::_4b_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
|
||||
@ -993,7 +992,7 @@ WRITE8_MEMBER( luxor_55_21046_device::_4b_w )
|
||||
// 9b_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( luxor_55_21046_device::_9b_w )
|
||||
void luxor_55_21046_device::_9b_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
|
||||
@ -1033,7 +1032,7 @@ WRITE8_MEMBER( luxor_55_21046_device::_9b_w )
|
||||
// 8a_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( luxor_55_21046_device::_8a_w )
|
||||
void luxor_55_21046_device::_8a_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
|
||||
@ -1066,7 +1065,7 @@ WRITE8_MEMBER( luxor_55_21046_device::_8a_w )
|
||||
// 9a_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( luxor_55_21046_device::_9a_r )
|
||||
uint8_t luxor_55_21046_device::_9a_r(offs_t offset)
|
||||
{
|
||||
/*
|
||||
|
||||
|
@ -92,12 +92,12 @@ private:
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER( fdc_intrq_w );
|
||||
|
||||
DECLARE_READ8_MEMBER( out_r );
|
||||
DECLARE_WRITE8_MEMBER( inp_w );
|
||||
DECLARE_WRITE8_MEMBER( _4b_w );
|
||||
DECLARE_WRITE8_MEMBER( _9b_w );
|
||||
DECLARE_WRITE8_MEMBER( _8a_w );
|
||||
DECLARE_READ8_MEMBER( _9a_r );
|
||||
uint8_t out_r();
|
||||
void inp_w(uint8_t data);
|
||||
void _4b_w(uint8_t data);
|
||||
void _9b_w(uint8_t data);
|
||||
void _8a_w(uint8_t data);
|
||||
uint8_t _9a_r(offs_t offset);
|
||||
|
||||
void luxor_55_21046_io(address_map &map);
|
||||
void luxor_55_21046_mem(address_map &map);
|
||||
|
@ -491,7 +491,7 @@ void luxor_55_21056_device::abcbus_c3(uint8_t data)
|
||||
// sasi_status_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( luxor_55_21056_device::sasi_status_r )
|
||||
uint8_t luxor_55_21056_device::sasi_status_r()
|
||||
{
|
||||
/*
|
||||
|
||||
@ -526,7 +526,7 @@ READ8_MEMBER( luxor_55_21056_device::sasi_status_r )
|
||||
// stat_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( luxor_55_21056_device::stat_w )
|
||||
void luxor_55_21056_device::stat_w(uint8_t data)
|
||||
{
|
||||
m_stat = data;
|
||||
|
||||
@ -538,7 +538,7 @@ WRITE8_MEMBER( luxor_55_21056_device::stat_w )
|
||||
// out_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( luxor_55_21056_device::out_r )
|
||||
uint8_t luxor_55_21056_device::out_r()
|
||||
{
|
||||
uint8_t data = m_out;
|
||||
|
||||
@ -552,7 +552,7 @@ READ8_MEMBER( luxor_55_21056_device::out_r )
|
||||
// inp_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( luxor_55_21056_device::inp_w )
|
||||
void luxor_55_21056_device::inp_w(uint8_t data)
|
||||
{
|
||||
m_inp = data;
|
||||
|
||||
@ -564,7 +564,7 @@ WRITE8_MEMBER( luxor_55_21056_device::inp_w )
|
||||
// sasi_data_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( luxor_55_21056_device::sasi_data_r )
|
||||
uint8_t luxor_55_21056_device::sasi_data_r()
|
||||
{
|
||||
uint8_t data = m_sasi_data_in->read();
|
||||
|
||||
@ -579,7 +579,7 @@ READ8_MEMBER( luxor_55_21056_device::sasi_data_r )
|
||||
// sasi_data_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( luxor_55_21056_device::sasi_data_w )
|
||||
void luxor_55_21056_device::sasi_data_w(uint8_t data)
|
||||
{
|
||||
m_sasi_data = data;
|
||||
|
||||
@ -597,9 +597,10 @@ WRITE8_MEMBER( luxor_55_21056_device::sasi_data_w )
|
||||
// rdy_reset_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( luxor_55_21056_device::rdy_reset_r )
|
||||
uint8_t luxor_55_21056_device::rdy_reset_r()
|
||||
{
|
||||
rdy_reset_w(space, offset, 0xff);
|
||||
if (!machine().side_effects_disabled())
|
||||
rdy_reset_w(0xff);
|
||||
|
||||
return 0xff;
|
||||
}
|
||||
@ -609,7 +610,7 @@ READ8_MEMBER( luxor_55_21056_device::rdy_reset_r )
|
||||
// rdy_reset_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( luxor_55_21056_device::rdy_reset_w )
|
||||
void luxor_55_21056_device::rdy_reset_w(uint8_t data)
|
||||
{
|
||||
set_rdy(0);
|
||||
}
|
||||
@ -619,9 +620,10 @@ WRITE8_MEMBER( luxor_55_21056_device::rdy_reset_w )
|
||||
// sasi_sel_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( luxor_55_21056_device::sasi_sel_r )
|
||||
uint8_t luxor_55_21056_device::sasi_sel_r()
|
||||
{
|
||||
sasi_sel_w(space, offset, 0xff);
|
||||
if (!machine().side_effects_disabled())
|
||||
sasi_sel_w(0xff);
|
||||
|
||||
return 0xff;
|
||||
}
|
||||
@ -631,7 +633,7 @@ READ8_MEMBER( luxor_55_21056_device::sasi_sel_r )
|
||||
// sasi_sel_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( luxor_55_21056_device::sasi_sel_w )
|
||||
void luxor_55_21056_device::sasi_sel_w(uint8_t data)
|
||||
{
|
||||
m_sasibus->write_sel(!m_sasi_bsy);
|
||||
}
|
||||
@ -641,9 +643,10 @@ WRITE8_MEMBER( luxor_55_21056_device::sasi_sel_w )
|
||||
// sasi_rst_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( luxor_55_21056_device::sasi_rst_r )
|
||||
uint8_t luxor_55_21056_device::sasi_rst_r()
|
||||
{
|
||||
sasi_rst_w(space, offset, 0xff);
|
||||
if (!machine().side_effects_disabled())
|
||||
sasi_rst_w(0xff);
|
||||
|
||||
return 0xff;
|
||||
}
|
||||
@ -653,7 +656,7 @@ READ8_MEMBER( luxor_55_21056_device::sasi_rst_r )
|
||||
// sasi_rst_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( luxor_55_21056_device::sasi_rst_w )
|
||||
void luxor_55_21056_device::sasi_rst_w(uint8_t data)
|
||||
{
|
||||
m_sasibus->write_rst(1);
|
||||
m_sasibus->write_rst(0);
|
||||
|
@ -64,18 +64,18 @@ private:
|
||||
DECLARE_WRITE_LINE_MEMBER( write_sasi_msg );
|
||||
DECLARE_WRITE_LINE_MEMBER( write_sasi_bsy );
|
||||
|
||||
DECLARE_READ8_MEMBER( sasi_status_r );
|
||||
DECLARE_WRITE8_MEMBER( stat_w );
|
||||
DECLARE_READ8_MEMBER( out_r );
|
||||
DECLARE_WRITE8_MEMBER( inp_w );
|
||||
DECLARE_READ8_MEMBER( sasi_data_r );
|
||||
DECLARE_WRITE8_MEMBER( sasi_data_w );
|
||||
DECLARE_READ8_MEMBER( rdy_reset_r );
|
||||
DECLARE_WRITE8_MEMBER( rdy_reset_w );
|
||||
DECLARE_READ8_MEMBER( sasi_sel_r );
|
||||
DECLARE_WRITE8_MEMBER( sasi_sel_w );
|
||||
DECLARE_READ8_MEMBER( sasi_rst_r );
|
||||
DECLARE_WRITE8_MEMBER( sasi_rst_w );
|
||||
uint8_t sasi_status_r();
|
||||
void stat_w(uint8_t data);
|
||||
uint8_t out_r();
|
||||
void inp_w(uint8_t data);
|
||||
uint8_t sasi_data_r();
|
||||
void sasi_data_w(uint8_t data);
|
||||
uint8_t rdy_reset_r();
|
||||
void rdy_reset_w(uint8_t data);
|
||||
uint8_t sasi_sel_r();
|
||||
void sasi_sel_w(uint8_t data);
|
||||
uint8_t sasi_rst_r();
|
||||
void sasi_rst_w(uint8_t data);
|
||||
|
||||
void luxor_55_21056_io(address_map &map);
|
||||
void luxor_55_21056_mem(address_map &map);
|
||||
|
@ -47,7 +47,7 @@ apf_spacedst_device::apf_spacedst_device(const machine_config &mconfig, const ch
|
||||
mapper specific handlers
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(apf_rom_device::read_rom)
|
||||
uint8_t apf_rom_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (offset < m_rom_size)
|
||||
return m_rom[offset];
|
||||
@ -56,7 +56,7 @@ READ8_MEMBER(apf_rom_device::read_rom)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(apf_basic_device::extra_rom)
|
||||
uint8_t apf_basic_device::extra_rom(offs_t offset)
|
||||
{
|
||||
if (offset < (m_rom_size - 0x2000))
|
||||
return m_rom[offset + 0x2000];
|
||||
@ -65,12 +65,12 @@ READ8_MEMBER(apf_basic_device::extra_rom)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(apf_spacedst_device::read_ram)
|
||||
uint8_t apf_spacedst_device::read_ram(offs_t offset)
|
||||
{
|
||||
return m_ram[offset];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(apf_spacedst_device::write_ram)
|
||||
void apf_spacedst_device::write_ram(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_ram[offset] = data;
|
||||
}
|
||||
|
@ -16,7 +16,7 @@ public:
|
||||
apf_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) override;
|
||||
virtual uint8_t read_rom(offs_t offset) override;
|
||||
|
||||
protected:
|
||||
apf_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -35,7 +35,7 @@ public:
|
||||
apf_basic_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(extra_rom) override;
|
||||
virtual uint8_t extra_rom(offs_t offset) override;
|
||||
};
|
||||
|
||||
// ======================> apf_spacedst_device
|
||||
@ -47,8 +47,8 @@ public:
|
||||
apf_spacedst_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_ram) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram) override;
|
||||
virtual uint8_t read_ram(offs_t offset) override;
|
||||
virtual void write_ram(offs_t offset, uint8_t data) override;
|
||||
};
|
||||
|
||||
|
||||
|
@ -227,10 +227,10 @@ std::string apf_cart_slot_device::get_default_card_software(get_default_card_sof
|
||||
read
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(apf_cart_slot_device::read_rom)
|
||||
uint8_t apf_cart_slot_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_rom(space, offset);
|
||||
return m_cart->read_rom(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
@ -239,10 +239,10 @@ READ8_MEMBER(apf_cart_slot_device::read_rom)
|
||||
read
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(apf_cart_slot_device::extra_rom)
|
||||
uint8_t apf_cart_slot_device::extra_rom(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->extra_rom(space, offset);
|
||||
return m_cart->extra_rom(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
@ -251,10 +251,10 @@ READ8_MEMBER(apf_cart_slot_device::extra_rom)
|
||||
read
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(apf_cart_slot_device::read_ram)
|
||||
uint8_t apf_cart_slot_device::read_ram(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_ram(space, offset);
|
||||
return m_cart->read_ram(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
@ -263,8 +263,8 @@ READ8_MEMBER(apf_cart_slot_device::read_ram)
|
||||
write
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE8_MEMBER(apf_cart_slot_device::write_ram)
|
||||
void apf_cart_slot_device::write_ram(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (m_cart)
|
||||
m_cart->write_ram(space, offset, data);
|
||||
m_cart->write_ram(offset, data);
|
||||
}
|
||||
|
@ -29,10 +29,10 @@ public:
|
||||
virtual ~device_apf_cart_interface();
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) { return 0xff; }
|
||||
virtual DECLARE_READ8_MEMBER(extra_rom) { return 0xff; }
|
||||
virtual DECLARE_READ8_MEMBER(read_ram) { return 0xff; }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram) {}
|
||||
virtual uint8_t read_rom(offs_t offset) { return 0xff; }
|
||||
virtual uint8_t extra_rom(offs_t offset) { return 0xff; }
|
||||
virtual uint8_t read_ram(offs_t offset) { return 0xff; }
|
||||
virtual void write_ram(offs_t offset, uint8_t data) {}
|
||||
|
||||
void rom_alloc(uint32_t size, const char *tag);
|
||||
void ram_alloc(uint32_t size);
|
||||
@ -93,10 +93,10 @@ public:
|
||||
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom);
|
||||
virtual DECLARE_READ8_MEMBER(extra_rom);
|
||||
virtual DECLARE_READ8_MEMBER(read_ram);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram);
|
||||
uint8_t read_rom(offs_t offset);
|
||||
uint8_t extra_rom(offs_t offset);
|
||||
uint8_t read_ram(offs_t offset);
|
||||
void write_ram(offs_t offset, uint8_t data);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
|
@ -42,7 +42,7 @@ arcadia_golf_device::arcadia_golf_device(const machine_config &mconfig, const ch
|
||||
mapper specific handlers
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(arcadia_rom_device::read_rom)
|
||||
uint8_t arcadia_rom_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (offset < m_rom_size)
|
||||
return m_rom[offset];
|
||||
@ -51,7 +51,7 @@ READ8_MEMBER(arcadia_rom_device::read_rom)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(arcadia_rom_device::extra_rom)
|
||||
uint8_t arcadia_rom_device::extra_rom(offs_t offset)
|
||||
{
|
||||
if (offset + 0x1000 < m_rom_size)
|
||||
return m_rom[offset + 0x1000];
|
||||
|
@ -18,8 +18,8 @@ public:
|
||||
arcadia_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) override;
|
||||
virtual DECLARE_READ8_MEMBER(extra_rom) override;
|
||||
virtual uint8_t read_rom(offs_t offset) override;
|
||||
virtual uint8_t extra_rom(offs_t offset) override;
|
||||
|
||||
public:
|
||||
arcadia_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
@ -215,10 +215,10 @@ std::string arcadia_cart_slot_device::get_default_card_software(get_default_card
|
||||
read
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(arcadia_cart_slot_device::read_rom)
|
||||
uint8_t arcadia_cart_slot_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_rom(space, offset);
|
||||
return m_cart->read_rom(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
@ -227,10 +227,10 @@ READ8_MEMBER(arcadia_cart_slot_device::read_rom)
|
||||
write
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(arcadia_cart_slot_device::extra_rom)
|
||||
uint8_t arcadia_cart_slot_device::extra_rom(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->extra_rom(space, offset);
|
||||
return m_cart->extra_rom(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
|
@ -28,8 +28,8 @@ public:
|
||||
virtual ~device_arcadia_cart_interface();
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) { return 0xff; }
|
||||
virtual DECLARE_READ8_MEMBER(extra_rom) { return 0xff; }
|
||||
virtual uint8_t read_rom(offs_t offset) { return 0xff; }
|
||||
virtual uint8_t extra_rom(offs_t offset) { return 0xff; }
|
||||
|
||||
void rom_alloc(uint32_t size, const char *tag);
|
||||
uint8_t* get_rom_base() { return m_rom; }
|
||||
@ -81,8 +81,8 @@ public:
|
||||
int get_type() { return m_type; }
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom);
|
||||
virtual DECLARE_READ8_MEMBER(extra_rom);
|
||||
uint8_t read_rom(offs_t offset);
|
||||
uint8_t extra_rom(offs_t offset);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
|
@ -66,18 +66,18 @@ void astrocade_exp_device::device_start()
|
||||
read
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(astrocade_exp_device::read)
|
||||
uint8_t astrocade_exp_device::read(offs_t offset)
|
||||
{
|
||||
if (m_card)
|
||||
return m_card->read(space, offset);
|
||||
return m_card->read(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(astrocade_exp_device::read_io)
|
||||
uint8_t astrocade_exp_device::read_io(offs_t offset)
|
||||
{
|
||||
if (m_card)
|
||||
return m_card->read_io(space, offset);
|
||||
return m_card->read_io(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
@ -86,14 +86,14 @@ READ8_MEMBER(astrocade_exp_device::read_io)
|
||||
write
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE8_MEMBER(astrocade_exp_device::write)
|
||||
void astrocade_exp_device::write(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (m_card)
|
||||
m_card->write(space, offset, data);
|
||||
m_card->write(offset, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(astrocade_exp_device::write_io)
|
||||
void astrocade_exp_device::write_io(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (m_card)
|
||||
m_card->write_io(space, offset, data);
|
||||
m_card->write_io(offset, data);
|
||||
}
|
||||
|
@ -12,10 +12,10 @@ public:
|
||||
virtual ~device_astrocade_exp_interface();
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read) { return 0xff; }
|
||||
virtual DECLARE_WRITE8_MEMBER(write) { }
|
||||
virtual DECLARE_READ8_MEMBER(read_io) { return 0xff; }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_io) { }
|
||||
virtual uint8_t read(offs_t offset) { return 0xff; }
|
||||
virtual void write(offs_t offset, uint8_t data) { }
|
||||
virtual uint8_t read_io(offs_t offset) { return 0xff; }
|
||||
virtual void write_io(offs_t offset, uint8_t data) { }
|
||||
|
||||
protected:
|
||||
device_astrocade_exp_interface(const machine_config &mconfig, device_t &device);
|
||||
@ -46,10 +46,10 @@ public:
|
||||
bool get_card_mounted() { return m_card_mounted; }
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read);
|
||||
virtual DECLARE_WRITE8_MEMBER(write);
|
||||
virtual DECLARE_READ8_MEMBER(read_io);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_io);
|
||||
uint8_t read(offs_t offset);
|
||||
void write(offs_t offset, uint8_t data);
|
||||
uint8_t read_io(offs_t offset);
|
||||
void write_io(offs_t offset, uint8_t data);
|
||||
|
||||
protected:
|
||||
bool m_card_mounted;
|
||||
|
@ -151,7 +151,7 @@ ioport_constructor astrocade_rl64ram_device::device_input_ports() const
|
||||
-------------------------------------------------*/
|
||||
|
||||
// Blue RAM expansions have RAM starting at 0x6000, up to the RAM size
|
||||
READ8_MEMBER(astrocade_blueram_4k_device::read)
|
||||
uint8_t astrocade_blueram_4k_device::read(offs_t offset)
|
||||
{
|
||||
if (offset >= 0x1000 && offset < 0x1000 + m_ram.size())
|
||||
return m_ram[offset - 0x1000];
|
||||
@ -159,18 +159,18 @@ READ8_MEMBER(astrocade_blueram_4k_device::read)
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(astrocade_blueram_4k_device::write)
|
||||
void astrocade_blueram_4k_device::write(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (offset >= 0x1000 && offset < 0x1000 + m_ram.size() && !m_write_prot->read())
|
||||
m_ram[offset - 0x1000] = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(astrocade_blueram_4k_device::read_io)
|
||||
uint8_t astrocade_blueram_4k_device::read_io(offs_t offset)
|
||||
{
|
||||
return m_ramio->read_io(offset & 0x7f);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(astrocade_blueram_4k_device::write_io)
|
||||
void astrocade_blueram_4k_device::write_io(offs_t offset, uint8_t data)
|
||||
{
|
||||
logerror("write_io: %04x = %02x\n", offset, data);
|
||||
m_ramio->write_io(offset & 0x7f, data);
|
||||
@ -196,7 +196,7 @@ void astrocade_blueram_4k_device::portb_w(uint8_t data)
|
||||
}
|
||||
|
||||
// Viper System 1 expansion has RAM in 0x6000-0x9fff
|
||||
READ8_MEMBER(astrocade_viper_sys1_device::read)
|
||||
uint8_t astrocade_viper_sys1_device::read(offs_t offset)
|
||||
{
|
||||
if (offset >= 0x1000 && offset < 0xa000)
|
||||
return m_ram[offset - 0x1000];
|
||||
@ -204,7 +204,7 @@ READ8_MEMBER(astrocade_viper_sys1_device::read)
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(astrocade_viper_sys1_device::write)
|
||||
void astrocade_viper_sys1_device::write(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (offset >= 0x1000 && offset < 0xa000 && !m_write_prot->read())
|
||||
m_ram[offset - 0x1000] = data;
|
||||
@ -213,12 +213,12 @@ WRITE8_MEMBER(astrocade_viper_sys1_device::write)
|
||||
|
||||
|
||||
// Lil' WHITE RAM expansion has RAM in 0x5000-0xcfff + a mirror of the first 0x3000 bytes up to 0xffff
|
||||
READ8_MEMBER(astrocade_whiteram_device::read)
|
||||
uint8_t astrocade_whiteram_device::read(offs_t offset)
|
||||
{
|
||||
return m_ram[offset % 0x8000];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(astrocade_whiteram_device::write)
|
||||
void astrocade_whiteram_device::write(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (!m_write_prot->read())
|
||||
m_ram[offset % 0x8000] = data;
|
||||
@ -227,12 +227,12 @@ WRITE8_MEMBER(astrocade_whiteram_device::write)
|
||||
|
||||
|
||||
// R&L 64K RAM Board (44KB installed) has RAM in 0x5000-0xffff
|
||||
READ8_MEMBER(astrocade_rl64ram_device::read)
|
||||
uint8_t astrocade_rl64ram_device::read(offs_t offset)
|
||||
{
|
||||
return m_ram[offset];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(astrocade_rl64ram_device::write)
|
||||
void astrocade_rl64ram_device::write(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (!m_write_prot->read())
|
||||
m_ram[offset] = data;
|
||||
|
@ -22,10 +22,10 @@ public:
|
||||
virtual ioport_constructor device_input_ports() const override;
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write) override;
|
||||
virtual DECLARE_READ8_MEMBER(read_io) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_io) override;
|
||||
virtual uint8_t read(offs_t offset) override;
|
||||
virtual void write(offs_t offset, uint8_t data) override;
|
||||
virtual uint8_t read_io(offs_t offset) override;
|
||||
virtual void write_io(offs_t offset, uint8_t data) override;
|
||||
|
||||
uint8_t porta_r();
|
||||
uint8_t portb_r();
|
||||
@ -79,8 +79,8 @@ public:
|
||||
virtual ioport_constructor device_input_ports() const override;
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write) override;
|
||||
virtual uint8_t read(offs_t offset) override;
|
||||
virtual void write(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
virtual void device_start() override { m_ram.resize(0x4000); save_item(NAME(m_ram)); }
|
||||
@ -103,8 +103,8 @@ public:
|
||||
virtual ioport_constructor device_input_ports() const override;
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write) override;
|
||||
virtual uint8_t read(offs_t offset) override;
|
||||
virtual void write(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
virtual void device_start() override { m_ram.resize(0x8000); save_item(NAME(m_ram)); }
|
||||
@ -127,8 +127,8 @@ public:
|
||||
virtual ioport_constructor device_input_ports() const override;
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write) override;
|
||||
virtual uint8_t read(offs_t offset) override;
|
||||
virtual void write(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
virtual void device_start() override { m_ram.resize(0xb000); save_item(NAME(m_ram)); }
|
||||
|
@ -75,7 +75,7 @@ void astrocade_rom_512k_device::device_reset()
|
||||
mapper specific handlers
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(astrocade_rom_device::read_rom)
|
||||
uint8_t astrocade_rom_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (offset < m_rom_size)
|
||||
return m_rom[offset];
|
||||
@ -83,7 +83,7 @@ READ8_MEMBER(astrocade_rom_device::read_rom)
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(astrocade_rom_256k_device::read_rom)
|
||||
uint8_t astrocade_rom_256k_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (offset < 0x1000) // 0x2000-0x2fff
|
||||
return m_rom[offset + 0x1000 * 0x3f];
|
||||
@ -93,7 +93,7 @@ READ8_MEMBER(astrocade_rom_256k_device::read_rom)
|
||||
return m_base_bank = offset & 0x3f;
|
||||
}
|
||||
|
||||
READ8_MEMBER(astrocade_rom_512k_device::read_rom)
|
||||
uint8_t astrocade_rom_512k_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (offset < 0x1000) // 0x2000-0x2fff
|
||||
return m_rom[offset + 0x1000 * 0x7f];
|
||||
@ -103,7 +103,7 @@ READ8_MEMBER(astrocade_rom_512k_device::read_rom)
|
||||
return m_base_bank = offset & 0x7f;
|
||||
}
|
||||
|
||||
READ8_MEMBER(astrocade_rom_cass_device::read_rom)
|
||||
uint8_t astrocade_rom_cass_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (offset < m_rom_size)
|
||||
return m_rom[offset];
|
||||
|
@ -19,7 +19,7 @@ public:
|
||||
astrocade_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) override;
|
||||
virtual uint8_t read_rom(offs_t offset) override;
|
||||
|
||||
protected:
|
||||
astrocade_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -38,7 +38,7 @@ public:
|
||||
astrocade_rom_256k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) override;
|
||||
virtual uint8_t read_rom(offs_t offset) override;
|
||||
|
||||
private:
|
||||
virtual void device_start() override;
|
||||
@ -56,7 +56,7 @@ public:
|
||||
astrocade_rom_512k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) override;
|
||||
virtual uint8_t read_rom(offs_t offset) override;
|
||||
|
||||
private:
|
||||
virtual void device_start() override;
|
||||
@ -74,7 +74,7 @@ public:
|
||||
astrocade_rom_cass_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) override;
|
||||
virtual uint8_t read_rom(offs_t offset) override;
|
||||
|
||||
private:
|
||||
virtual void device_start() override { }
|
||||
|
@ -203,10 +203,10 @@ std::string astrocade_cart_slot_device::get_default_card_software(get_default_ca
|
||||
read
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(astrocade_cart_slot_device::read_rom)
|
||||
uint8_t astrocade_cart_slot_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_rom(space, offset);
|
||||
return m_cart->read_rom(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
|
@ -33,7 +33,7 @@ public:
|
||||
virtual ~device_astrocade_cart_interface();
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) { return 0xff; }
|
||||
virtual uint8_t read_rom(offs_t offset) { return 0xff; }
|
||||
|
||||
void rom_alloc(uint32_t size, const char *tag);
|
||||
uint8_t* get_rom_base() { return m_rom; }
|
||||
@ -88,7 +88,7 @@ public:
|
||||
int get_type() { return m_type; }
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom);
|
||||
uint8_t read_rom(offs_t offset);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
|
@ -43,12 +43,12 @@ const tiny_rom_entry *bml3bus_kanji_device::device_rom_region() const
|
||||
return ROM_NAME( kanji );
|
||||
}
|
||||
|
||||
READ8_MEMBER( bml3bus_kanji_device::bml3_kanji_r )
|
||||
uint8_t bml3bus_kanji_device::bml3_kanji_r(offs_t offset)
|
||||
{
|
||||
return m_rom[((uint32_t)m_kanji_addr << 1) + offset];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( bml3bus_kanji_device::bml3_kanji_w )
|
||||
void bml3bus_kanji_device::bml3_kanji_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_kanji_addr &= (0xff << (offset*8));
|
||||
m_kanji_addr |= (data << ((offset^1)*8));
|
||||
@ -76,7 +76,7 @@ void bml3bus_kanji_device::device_start()
|
||||
|
||||
// install into memory
|
||||
address_space &space_prg = space();
|
||||
space_prg.install_readwrite_handler(0xff75, 0xff76, read8_delegate(*this, FUNC(bml3bus_kanji_device::bml3_kanji_r)), write8_delegate(*this, FUNC(bml3bus_kanji_device::bml3_kanji_w)));
|
||||
space_prg.install_readwrite_handler(0xff75, 0xff76, read8sm_delegate(*this, FUNC(bml3bus_kanji_device::bml3_kanji_r)), write8sm_delegate(*this, FUNC(bml3bus_kanji_device::bml3_kanji_w)));
|
||||
}
|
||||
|
||||
void bml3bus_kanji_device::device_reset()
|
||||
|
@ -27,8 +27,8 @@ public:
|
||||
// construction/destruction
|
||||
bml3bus_kanji_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
DECLARE_READ8_MEMBER(bml3_kanji_r);
|
||||
DECLARE_WRITE8_MEMBER(bml3_kanji_w);
|
||||
uint8_t bml3_kanji_r(offs_t offset);
|
||||
void bml3_kanji_w(offs_t offset, uint8_t data);
|
||||
|
||||
protected:
|
||||
virtual void device_start() override;
|
||||
|
@ -76,12 +76,12 @@ const tiny_rom_entry *bml3bus_mp1802_device::device_rom_region() const
|
||||
return ROM_NAME( mp1802 );
|
||||
}
|
||||
|
||||
READ8_MEMBER( bml3bus_mp1802_device::bml3_mp1802_r)
|
||||
uint8_t bml3bus_mp1802_device::bml3_mp1802_r()
|
||||
{
|
||||
return m_fdc->drq_r() ? 0x00 : 0x80;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( bml3bus_mp1802_device::bml3_mp1802_w)
|
||||
void bml3bus_mp1802_device::bml3_mp1802_w(uint8_t data)
|
||||
{
|
||||
floppy_image_device *floppy = nullptr;
|
||||
|
||||
@ -130,7 +130,7 @@ void bml3bus_mp1802_device::device_start()
|
||||
// install into memory
|
||||
address_space &space_prg = space();
|
||||
space_prg.install_readwrite_handler(0xff00, 0xff03, read8sm_delegate(*m_fdc, FUNC(mb8866_device::read)), write8sm_delegate(*m_fdc, FUNC(mb8866_device::write)));
|
||||
space_prg.install_readwrite_handler(0xff04, 0xff04, read8_delegate(*this, FUNC(bml3bus_mp1802_device::bml3_mp1802_r)), write8_delegate(*this, FUNC(bml3bus_mp1802_device::bml3_mp1802_w)));
|
||||
space_prg.install_readwrite_handler(0xff04, 0xff04, read8smo_delegate(*this, FUNC(bml3bus_mp1802_device::bml3_mp1802_r)), write8smo_delegate(*this, FUNC(bml3bus_mp1802_device::bml3_mp1802_w)));
|
||||
// overwriting the main ROM (rather than using e.g. install_rom) should mean that bank switches for RAM expansion still work...
|
||||
uint8_t *mainrom = device().machine().root_device().memregion("maincpu")->base();
|
||||
memcpy(mainrom + 0xf800, m_rom + 0xf800, 0x800);
|
||||
|
@ -31,8 +31,8 @@ public:
|
||||
// construction/destruction
|
||||
bml3bus_mp1802_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
DECLARE_READ8_MEMBER(bml3_mp1802_r);
|
||||
DECLARE_WRITE8_MEMBER(bml3_mp1802_w);
|
||||
uint8_t bml3_mp1802_r();
|
||||
void bml3_mp1802_w(uint8_t data);
|
||||
|
||||
protected:
|
||||
virtual void device_start() override;
|
||||
|
@ -75,14 +75,14 @@ const tiny_rom_entry *bml3bus_mp1805_device::device_rom_region() const
|
||||
return ROM_NAME( mp1805 );
|
||||
}
|
||||
|
||||
READ8_MEMBER( bml3bus_mp1805_device::bml3_mp1805_r)
|
||||
uint8_t bml3bus_mp1805_device::bml3_mp1805_r()
|
||||
{
|
||||
// TODO: read supported or not?
|
||||
// return mc6843_drq_r(m_mc6843) ? 0x00 : 0x80;
|
||||
return -1;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( bml3bus_mp1805_device::bml3_mp1805_w)
|
||||
void bml3bus_mp1805_device::bml3_mp1805_w(uint8_t data)
|
||||
{
|
||||
// b7 b6 b5 b4 b3 b2 b1 b0
|
||||
// MT ? ? ? D3 D2 D1 D0
|
||||
@ -142,7 +142,7 @@ void bml3bus_mp1805_device::device_start()
|
||||
// install into memory
|
||||
address_space &space_prg = space();
|
||||
space_prg.install_readwrite_handler(0xff18, 0xff1f, read8sm_delegate(*m_mc6843, FUNC(mc6843_device::read)), write8sm_delegate(*m_mc6843, FUNC(mc6843_device::write)));
|
||||
space_prg.install_readwrite_handler(0xff20, 0xff20, read8_delegate(*this, FUNC(bml3bus_mp1805_device::bml3_mp1805_r)), write8_delegate(*this, FUNC(bml3bus_mp1805_device::bml3_mp1805_w)));
|
||||
space_prg.install_readwrite_handler(0xff20, 0xff20, read8smo_delegate(*this, FUNC(bml3bus_mp1805_device::bml3_mp1805_r)), write8smo_delegate(*this, FUNC(bml3bus_mp1805_device::bml3_mp1805_w)));
|
||||
// overwriting the main ROM (rather than using e.g. install_rom) should mean that bank switches for RAM expansion still work...
|
||||
uint8_t *mainrom = device().machine().root_device().memregion("maincpu")->base();
|
||||
memcpy(mainrom + 0xf800, m_rom + 0xf800, 0x800);
|
||||
|
@ -30,8 +30,8 @@ public:
|
||||
// construction/destruction
|
||||
bml3bus_mp1805_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
DECLARE_READ8_MEMBER(bml3_mp1805_r);
|
||||
DECLARE_WRITE8_MEMBER(bml3_mp1805_w);
|
||||
uint8_t bml3_mp1805_r();
|
||||
void bml3_mp1805_w(uint8_t data);
|
||||
|
||||
protected:
|
||||
virtual void device_start() override;
|
||||
|
@ -35,7 +35,7 @@ void bml3bus_rtc_device::device_add_mconfig(machine_config &config)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(bml3bus_rtc_device::bml3_rtc_r)
|
||||
uint8_t bml3bus_rtc_device::bml3_rtc_r(offs_t offset)
|
||||
{
|
||||
uint8_t data = 0x00;
|
||||
|
||||
@ -53,7 +53,7 @@ READ8_MEMBER(bml3bus_rtc_device::bml3_rtc_r)
|
||||
return data | 0xf0; // return low nibble only
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(bml3bus_rtc_device::bml3_rtc_w)
|
||||
void bml3bus_rtc_device::bml3_rtc_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
@ -97,7 +97,7 @@ void bml3bus_rtc_device::device_start()
|
||||
{
|
||||
// install into memory
|
||||
address_space &space_prg = space();
|
||||
space_prg.install_readwrite_handler(0xff38, 0xff3a, read8_delegate(*this, FUNC(bml3bus_rtc_device::bml3_rtc_r)), write8_delegate(*this, FUNC(bml3bus_rtc_device::bml3_rtc_w)));
|
||||
space_prg.install_readwrite_handler(0xff38, 0xff3a, read8sm_delegate(*this, FUNC(bml3bus_rtc_device::bml3_rtc_r)), write8sm_delegate(*this, FUNC(bml3bus_rtc_device::bml3_rtc_w)));
|
||||
|
||||
m_addr_latch = 0;
|
||||
m_data_latch = 0;
|
||||
|
@ -29,8 +29,8 @@ public:
|
||||
// construction/destruction
|
||||
bml3bus_rtc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
DECLARE_READ8_MEMBER(bml3_rtc_r);
|
||||
DECLARE_WRITE8_MEMBER(bml3_rtc_w);
|
||||
uint8_t bml3_rtc_r(offs_t offset);
|
||||
void bml3_rtc_w(offs_t offset, uint8_t data);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
|
@ -155,13 +155,15 @@ void cgenie_fdc_device::device_reset()
|
||||
// IMPLEMENTATION
|
||||
//**************************************************************************
|
||||
|
||||
READ8_MEMBER( cgenie_fdc_device::irq_r )
|
||||
uint8_t cgenie_fdc_device::irq_r()
|
||||
{
|
||||
uint8_t data = m_irq_status;
|
||||
|
||||
m_irq_status &= ~IRQ_TIMER;
|
||||
m_slot->int_w(m_irq_status ? ASSERT_LINE : CLEAR_LINE);
|
||||
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
m_irq_status &= ~IRQ_TIMER;
|
||||
m_slot->int_w(m_irq_status ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -200,7 +202,7 @@ WRITE_LINE_MEMBER( cgenie_fdc_device::intrq_w )
|
||||
m_slot->int_w(m_irq_status ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( cgenie_fdc_device::select_w )
|
||||
void cgenie_fdc_device::select_w(uint8_t data)
|
||||
{
|
||||
if (VERBOSE)
|
||||
logerror("cgenie_fdc_device::motor_w: 0x%02x\n", data);
|
||||
@ -221,7 +223,7 @@ WRITE8_MEMBER( cgenie_fdc_device::select_w )
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( cgenie_fdc_device::command_w )
|
||||
void cgenie_fdc_device::command_w(uint8_t data)
|
||||
{
|
||||
// density select is encoded into this pseudo-command
|
||||
if ((data & 0xfe) == 0xfe)
|
||||
|
@ -43,9 +43,9 @@ private:
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(timer_callback);
|
||||
|
||||
DECLARE_READ8_MEMBER(irq_r);
|
||||
DECLARE_WRITE8_MEMBER(select_w);
|
||||
DECLARE_WRITE8_MEMBER(command_w);
|
||||
uint8_t irq_r();
|
||||
void select_w(uint8_t data);
|
||||
void command_w(uint8_t data);
|
||||
|
||||
void mmio(address_map &map);
|
||||
|
||||
|
@ -145,7 +145,7 @@ void chanf_multi_final_device::device_reset()
|
||||
mapper specific handlers
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(chanf_rom_device::read_rom)
|
||||
uint8_t chanf_rom_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (offset < m_rom_size)
|
||||
return m_rom[offset];
|
||||
@ -212,7 +212,7 @@ void chanf_rom_device::common_write_3853(uint32_t offset, uint8_t data)
|
||||
m_ram[offset] = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(chanf_multi_old_device::read_rom)
|
||||
uint8_t chanf_multi_old_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (offset < 0x2000)
|
||||
return m_rom[offset + m_base_bank * 0x2000];
|
||||
@ -220,13 +220,13 @@ READ8_MEMBER(chanf_multi_old_device::read_rom)
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(chanf_multi_old_device::write_bank)
|
||||
void chanf_multi_old_device::write_bank(uint8_t data)
|
||||
{
|
||||
//printf("0x%x\n", data);
|
||||
m_base_bank = data & 0x1f;
|
||||
}
|
||||
|
||||
READ8_MEMBER(chanf_multi_final_device::read_rom)
|
||||
uint8_t chanf_multi_final_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (offset < 0x2000)
|
||||
return m_rom[offset + (m_base_bank * 0x2000) + (m_half_bank * 0x1000)];
|
||||
@ -234,7 +234,7 @@ READ8_MEMBER(chanf_multi_final_device::read_rom)
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(chanf_multi_final_device::write_bank)
|
||||
void chanf_multi_final_device::write_bank(uint8_t data)
|
||||
{
|
||||
//printf("0x%x\n", data);
|
||||
m_base_bank = data & 0x1f;
|
||||
|
@ -25,7 +25,7 @@ public:
|
||||
void common_write_3853(uint32_t offset, uint8_t data);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) override;
|
||||
virtual uint8_t read_rom(offs_t offset) override;
|
||||
|
||||
protected:
|
||||
chanf_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -49,8 +49,8 @@ public:
|
||||
virtual void device_reset() override;
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_ram) override { return common_read_2102(offset); }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram) override { common_write_2102(offset, data); }
|
||||
virtual uint8_t read_ram(offs_t offset) override { return common_read_2102(offset); }
|
||||
virtual void write_ram(offs_t offset, uint8_t data) override { common_write_2102(offset, data); }
|
||||
};
|
||||
|
||||
|
||||
@ -67,8 +67,8 @@ public:
|
||||
virtual void device_reset() override;
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_ram) override { return common_read_2102(offset); }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram) override { common_write_2102(offset, data); }
|
||||
virtual uint8_t read_ram(offs_t offset) override { return common_read_2102(offset); }
|
||||
virtual void write_ram(offs_t offset, uint8_t data) override { common_write_2102(offset, data); }
|
||||
};
|
||||
|
||||
|
||||
@ -81,8 +81,8 @@ public:
|
||||
chanf_chess_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_ram) override { return common_read_3853(offset); }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram) override { common_write_3853(offset, data); }
|
||||
virtual uint8_t read_ram(offs_t offset) override { return common_read_3853(offset); }
|
||||
virtual void write_ram(offs_t offset, uint8_t data) override { common_write_3853(offset, data); }
|
||||
};
|
||||
|
||||
|
||||
@ -99,10 +99,10 @@ public:
|
||||
virtual void device_reset() override;
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) override;
|
||||
virtual DECLARE_READ8_MEMBER(read_ram) override { return common_read_3853(offset); }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram) override { common_write_3853(offset, data); }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_bank) override;
|
||||
virtual uint8_t read_rom(offs_t offset) override;
|
||||
virtual uint8_t read_ram(offs_t offset) override { return common_read_3853(offset); }
|
||||
virtual void write_ram(offs_t offset, uint8_t data) override { common_write_3853(offset, data); }
|
||||
virtual void write_bank(uint8_t data) override;
|
||||
|
||||
private:
|
||||
int m_base_bank;
|
||||
@ -122,10 +122,10 @@ public:
|
||||
virtual void device_reset() override;
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) override;
|
||||
virtual DECLARE_READ8_MEMBER(read_ram) override { return common_read_3853(offset); }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram) override { common_write_3853(offset, data); }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_bank) override;
|
||||
virtual uint8_t read_rom(offs_t offset) override;
|
||||
virtual uint8_t read_ram(offs_t offset) override { return common_read_3853(offset); }
|
||||
virtual void write_ram(offs_t offset, uint8_t data) override { common_write_3853(offset, data); }
|
||||
virtual void write_bank(uint8_t data) override;
|
||||
|
||||
private:
|
||||
int m_base_bank, m_half_bank;
|
||||
|
@ -219,10 +219,10 @@ std::string channelf_cart_slot_device::get_default_card_software(get_default_car
|
||||
read
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(channelf_cart_slot_device::read_rom)
|
||||
uint8_t channelf_cart_slot_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_rom(space, offset);
|
||||
return m_cart->read_rom(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
@ -231,10 +231,10 @@ READ8_MEMBER(channelf_cart_slot_device::read_rom)
|
||||
read
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(channelf_cart_slot_device::read_ram)
|
||||
uint8_t channelf_cart_slot_device::read_ram(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_ram(space, offset);
|
||||
return m_cart->read_ram(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
@ -243,18 +243,18 @@ READ8_MEMBER(channelf_cart_slot_device::read_ram)
|
||||
write
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE8_MEMBER(channelf_cart_slot_device::write_ram)
|
||||
void channelf_cart_slot_device::write_ram(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (m_cart)
|
||||
m_cart->write_ram(space, offset, data);
|
||||
m_cart->write_ram(offset, data);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
write
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE8_MEMBER(channelf_cart_slot_device::write_bank)
|
||||
void channelf_cart_slot_device::write_bank(uint8_t data)
|
||||
{
|
||||
if (m_cart)
|
||||
m_cart->write_bank(space, offset, data);
|
||||
m_cart->write_bank(data);
|
||||
}
|
||||
|
@ -32,10 +32,10 @@ public:
|
||||
virtual ~device_channelf_cart_interface();
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) { return 0xff; }
|
||||
virtual DECLARE_READ8_MEMBER(read_ram) { return 0xff; }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram) { }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_bank) { }
|
||||
virtual uint8_t read_rom(offs_t offset) { return 0xff; }
|
||||
virtual uint8_t read_ram(offs_t offset) { return 0xff; }
|
||||
virtual void write_ram(offs_t offset, uint8_t data) { }
|
||||
virtual void write_bank(uint8_t data) { }
|
||||
|
||||
void rom_alloc(uint32_t size, const char *tag);
|
||||
void ram_alloc(uint32_t size);
|
||||
@ -98,10 +98,10 @@ public:
|
||||
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom);
|
||||
virtual DECLARE_READ8_MEMBER(read_ram);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_bank);
|
||||
uint8_t read_rom(offs_t offset);
|
||||
uint8_t read_ram(offs_t offset);
|
||||
void write_ram(offs_t offset, uint8_t data);
|
||||
void write_bank(uint8_t data);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
|
@ -72,7 +72,7 @@ crvision_rom18k_device::crvision_rom18k_device(const machine_config &mconfig, co
|
||||
mapper specific handlers
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(crvision_rom_device::read_rom80)
|
||||
uint8_t crvision_rom_device::read_rom80(offs_t offset)
|
||||
{
|
||||
offset &= 0x1fff;
|
||||
if (offset < 0x1000)
|
||||
@ -82,7 +82,7 @@ READ8_MEMBER(crvision_rom_device::read_rom80)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(crvision_rom6k_device::read_rom80)
|
||||
uint8_t crvision_rom6k_device::read_rom80(offs_t offset)
|
||||
{
|
||||
offset &= 0x1fff;
|
||||
if (offset < 0x1000)
|
||||
@ -92,48 +92,48 @@ READ8_MEMBER(crvision_rom6k_device::read_rom80)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(crvision_rom8k_device::read_rom80)
|
||||
uint8_t crvision_rom8k_device::read_rom80(offs_t offset)
|
||||
{
|
||||
return m_rom[offset & 0x1fff];
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(crvision_rom10k_device::read_rom80)
|
||||
uint8_t crvision_rom10k_device::read_rom80(offs_t offset)
|
||||
{
|
||||
return m_rom[offset & 0x1fff];
|
||||
}
|
||||
|
||||
READ8_MEMBER(crvision_rom10k_device::read_rom40)
|
||||
uint8_t crvision_rom10k_device::read_rom40(offs_t offset)
|
||||
{
|
||||
return m_rom[0x2000 + (offset & 0x7ff)];
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(crvision_rom12k_device::read_rom80)
|
||||
uint8_t crvision_rom12k_device::read_rom80(offs_t offset)
|
||||
{
|
||||
return m_rom[offset & 0x1fff];
|
||||
}
|
||||
|
||||
READ8_MEMBER(crvision_rom12k_device::read_rom40)
|
||||
uint8_t crvision_rom12k_device::read_rom40(offs_t offset)
|
||||
{
|
||||
return m_rom[0x2000 + (offset & 0xfff)];
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(crvision_rom16k_device::read_rom80)
|
||||
uint8_t crvision_rom16k_device::read_rom80(offs_t offset)
|
||||
{
|
||||
// lower 8K in 0xa000-0xbfff, higher 8K in 0x8000-0x9fff
|
||||
return m_rom[offset ^ 0x2000];
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(crvision_rom18k_device::read_rom80)
|
||||
uint8_t crvision_rom18k_device::read_rom80(offs_t offset)
|
||||
{
|
||||
// lower 8K in 0xa000-0xbfff, higher 8K in 0x8000-0x9fff
|
||||
return m_rom[offset ^ 0x2000];
|
||||
}
|
||||
|
||||
READ8_MEMBER(crvision_rom18k_device::read_rom40)
|
||||
uint8_t crvision_rom18k_device::read_rom40(offs_t offset)
|
||||
{
|
||||
return m_rom[0x4000 + (offset & 0x7ff)];
|
||||
}
|
||||
|
@ -18,7 +18,7 @@ public:
|
||||
crvision_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom80) override;
|
||||
virtual uint8_t read_rom80(offs_t offset) override;
|
||||
|
||||
protected:
|
||||
crvision_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -37,7 +37,7 @@ public:
|
||||
crvision_rom6k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom80) override;
|
||||
virtual uint8_t read_rom80(offs_t offset) override;
|
||||
};
|
||||
|
||||
// ======================> crvision_rom8k_device
|
||||
@ -49,7 +49,7 @@ public:
|
||||
crvision_rom8k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom80) override;
|
||||
virtual uint8_t read_rom80(offs_t offset) override;
|
||||
};
|
||||
|
||||
// ======================> crvision_rom10k_device
|
||||
@ -61,8 +61,8 @@ public:
|
||||
crvision_rom10k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom40) override;
|
||||
virtual DECLARE_READ8_MEMBER(read_rom80) override;
|
||||
virtual uint8_t read_rom40(offs_t offset) override;
|
||||
virtual uint8_t read_rom80(offs_t offset) override;
|
||||
};
|
||||
|
||||
// ======================> crvision_rom12k_device
|
||||
@ -74,8 +74,8 @@ public:
|
||||
crvision_rom12k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom40) override;
|
||||
virtual DECLARE_READ8_MEMBER(read_rom80) override;
|
||||
virtual uint8_t read_rom40(offs_t offset) override;
|
||||
virtual uint8_t read_rom80(offs_t offset) override;
|
||||
};
|
||||
|
||||
// ======================> crvision_rom16k_device
|
||||
@ -87,7 +87,7 @@ public:
|
||||
crvision_rom16k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom80) override;
|
||||
virtual uint8_t read_rom80(offs_t offset) override;
|
||||
};
|
||||
|
||||
// ======================> crvision_rom18k_device
|
||||
@ -99,8 +99,8 @@ public:
|
||||
crvision_rom18k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom40) override;
|
||||
virtual DECLARE_READ8_MEMBER(read_rom80) override;
|
||||
virtual uint8_t read_rom40(offs_t offset) override;
|
||||
virtual uint8_t read_rom80(offs_t offset) override;
|
||||
};
|
||||
|
||||
|
||||
|
@ -253,18 +253,18 @@ std::string crvision_cart_slot_device::get_default_card_software(get_default_car
|
||||
read_rom
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(crvision_cart_slot_device::read_rom40)
|
||||
uint8_t crvision_cart_slot_device::read_rom40(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_rom40(space, offset);
|
||||
return m_cart->read_rom40(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(crvision_cart_slot_device::read_rom80)
|
||||
uint8_t crvision_cart_slot_device::read_rom80(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_rom80(space, offset);
|
||||
return m_cart->read_rom80(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
|
@ -36,8 +36,8 @@ public:
|
||||
virtual ~device_crvision_cart_interface();
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom40) { return 0xff; }
|
||||
virtual DECLARE_READ8_MEMBER(read_rom80) { return 0xff; }
|
||||
virtual uint8_t read_rom40(offs_t offset) { return 0xff; }
|
||||
virtual uint8_t read_rom80(offs_t offset) { return 0xff; }
|
||||
|
||||
void rom_alloc(uint32_t size, const char *tag);
|
||||
uint8_t* get_rom_base() { return m_rom; }
|
||||
@ -91,8 +91,8 @@ public:
|
||||
int get_type() { return m_type; }
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom40);
|
||||
virtual DECLARE_READ8_MEMBER(read_rom80);
|
||||
uint8_t read_rom40(offs_t offset);
|
||||
uint8_t read_rom80(offs_t offset);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
|
@ -116,7 +116,7 @@ void ecbbus_device::add_card(device_ecbbus_card_interface &card, int pos)
|
||||
// mem_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( ecbbus_device::mem_r )
|
||||
uint8_t ecbbus_device::mem_r(offs_t offset)
|
||||
{
|
||||
uint8_t data = 0;
|
||||
|
||||
@ -136,7 +136,7 @@ READ8_MEMBER( ecbbus_device::mem_r )
|
||||
// mem_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ecbbus_device::mem_w )
|
||||
void ecbbus_device::mem_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
for (auto & elem : m_ecbbus_device)
|
||||
{
|
||||
@ -152,7 +152,7 @@ WRITE8_MEMBER( ecbbus_device::mem_w )
|
||||
// io_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( ecbbus_device::io_r )
|
||||
uint8_t ecbbus_device::io_r(offs_t offset)
|
||||
{
|
||||
uint8_t data = 0;
|
||||
|
||||
@ -172,7 +172,7 @@ READ8_MEMBER( ecbbus_device::io_r )
|
||||
// io_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ecbbus_device::io_w )
|
||||
void ecbbus_device::io_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
for (auto & elem : m_ecbbus_device)
|
||||
{
|
||||
|
@ -110,11 +110,11 @@ public:
|
||||
|
||||
void add_card(device_ecbbus_card_interface &card, int pos);
|
||||
|
||||
DECLARE_READ8_MEMBER( mem_r );
|
||||
DECLARE_WRITE8_MEMBER( mem_w );
|
||||
uint8_t mem_r(offs_t offset);
|
||||
void mem_w(offs_t offset, uint8_t data);
|
||||
|
||||
DECLARE_READ8_MEMBER( io_r );
|
||||
DECLARE_WRITE8_MEMBER( io_w );
|
||||
uint8_t io_r(offs_t offset);
|
||||
void io_w(offs_t offset, uint8_t data);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER( irq_w ) { m_write_irq(state); }
|
||||
DECLARE_WRITE_LINE_MEMBER( nmi_w ) { m_write_nmi(state); }
|
||||
|
@ -634,7 +634,7 @@ void ecb_grip21_device::device_reset()
|
||||
// vol0_w - volume 0
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ecb_grip21_device::vol0_w )
|
||||
void ecb_grip21_device::vol0_w(uint8_t data)
|
||||
{
|
||||
m_vol0 = BIT(data, 7);
|
||||
}
|
||||
@ -644,7 +644,7 @@ WRITE8_MEMBER( ecb_grip21_device::vol0_w )
|
||||
// vol1_w - volume 1
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ecb_grip21_device::vol1_w )
|
||||
void ecb_grip21_device::vol1_w(uint8_t data)
|
||||
{
|
||||
m_vol1 = BIT(data, 7);
|
||||
}
|
||||
@ -654,7 +654,7 @@ WRITE8_MEMBER( ecb_grip21_device::vol1_w )
|
||||
// flash_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ecb_grip21_device::flash_w )
|
||||
void ecb_grip21_device::flash_w(uint8_t data)
|
||||
{
|
||||
m_flash = BIT(data, 7);
|
||||
}
|
||||
@ -664,7 +664,7 @@ WRITE8_MEMBER( ecb_grip21_device::flash_w )
|
||||
// page_w - video page select
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ecb_grip21_device::page_w )
|
||||
void ecb_grip21_device::page_w(uint8_t data)
|
||||
{
|
||||
m_page = BIT(data, 7);
|
||||
|
||||
@ -681,7 +681,7 @@ WRITE_LINE_MEMBER(ecb_grip21_device::write_centronics_fault)
|
||||
m_centronics_fault = state;
|
||||
}
|
||||
|
||||
READ8_MEMBER( ecb_grip21_device::stat_r )
|
||||
uint8_t ecb_grip21_device::stat_r()
|
||||
{
|
||||
/*
|
||||
|
||||
@ -739,9 +739,10 @@ READ8_MEMBER( ecb_grip21_device::stat_r )
|
||||
// lrs_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( ecb_grip21_device::lrs_r )
|
||||
uint8_t ecb_grip21_device::lrs_r()
|
||||
{
|
||||
m_lps = 0;
|
||||
if (!machine().side_effects_disabled())
|
||||
m_lps = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -751,7 +752,7 @@ READ8_MEMBER( ecb_grip21_device::lrs_r )
|
||||
// lrs_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ecb_grip21_device::lrs_w )
|
||||
void ecb_grip21_device::lrs_w(uint8_t data)
|
||||
{
|
||||
m_lps = 0;
|
||||
}
|
||||
@ -761,10 +762,13 @@ WRITE8_MEMBER( ecb_grip21_device::lrs_w )
|
||||
// cxstb_r - centronics strobe
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( ecb_grip21_device::cxstb_r )
|
||||
uint8_t ecb_grip21_device::cxstb_r()
|
||||
{
|
||||
m_centronics->write_strobe(0);
|
||||
m_centronics->write_strobe(1);
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
m_centronics->write_strobe(0);
|
||||
m_centronics->write_strobe(1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -774,7 +778,7 @@ READ8_MEMBER( ecb_grip21_device::cxstb_r )
|
||||
// cxstb_w - centronics strobe
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ecb_grip21_device::cxstb_w )
|
||||
void ecb_grip21_device::cxstb_w(uint8_t data)
|
||||
{
|
||||
m_centronics->write_strobe(0);
|
||||
m_centronics->write_strobe(1);
|
||||
@ -785,9 +789,9 @@ WRITE8_MEMBER( ecb_grip21_device::cxstb_w )
|
||||
// eprom_w - EPROM bank select
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( grip5_state::eprom_w )
|
||||
void grip5_state::eprom_w(uint8_t data)
|
||||
{
|
||||
membank("eprom")->set_entry(BIT(data, 0));
|
||||
membank("eprom")->set_entry(BIT(data, 0));
|
||||
}
|
||||
|
||||
|
||||
@ -795,9 +799,9 @@ WRITE8_MEMBER( grip5_state::eprom_w )
|
||||
// dpage_w - display page select
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( grip5_state::dpage_w )
|
||||
void grip5_state::dpage_w(uint8_t data)
|
||||
{
|
||||
m_dpage = BIT(data, 7);
|
||||
m_dpage = BIT(data, 7);
|
||||
}
|
||||
*/
|
||||
|
||||
|
@ -103,23 +103,23 @@ private:
|
||||
// timers
|
||||
emu_timer *m_kb_timer;
|
||||
|
||||
DECLARE_WRITE8_MEMBER( vol0_w );
|
||||
DECLARE_WRITE8_MEMBER( vol1_w );
|
||||
DECLARE_WRITE8_MEMBER( flash_w );
|
||||
DECLARE_WRITE8_MEMBER( page_w );
|
||||
DECLARE_READ8_MEMBER( stat_r );
|
||||
DECLARE_READ8_MEMBER( lrs_r );
|
||||
DECLARE_WRITE8_MEMBER( lrs_w );
|
||||
DECLARE_READ8_MEMBER( cxstb_r );
|
||||
DECLARE_WRITE8_MEMBER( cxstb_w );
|
||||
void vol0_w(uint8_t data);
|
||||
void vol1_w(uint8_t data);
|
||||
void flash_w(uint8_t data);
|
||||
void page_w(uint8_t data);
|
||||
uint8_t stat_r();
|
||||
uint8_t lrs_r();
|
||||
void lrs_w(uint8_t data);
|
||||
uint8_t cxstb_r();
|
||||
void cxstb_w(uint8_t data);
|
||||
|
||||
void grip_io(address_map &map);
|
||||
void grip_mem(address_map &map);
|
||||
|
||||
/*
|
||||
required_device<hd6345_device> m_crtc;
|
||||
DECLARE_WRITE8_MEMBER( eprom_w );
|
||||
DECLARE_WRITE8_MEMBER( dpage_w );
|
||||
void eprom_w(uint8_t data);
|
||||
void dpage_w(uint8_t data);
|
||||
|
||||
// video state
|
||||
int m_dpage; // displayed video page
|
||||
|
@ -467,7 +467,7 @@ void econet_e01_device::device_timer(emu_timer &timer, device_timer_id id, int p
|
||||
// read -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( econet_e01_device::read )
|
||||
uint8_t econet_e01_device::read(offs_t offset)
|
||||
{
|
||||
uint8_t data;
|
||||
|
||||
@ -488,7 +488,7 @@ READ8_MEMBER( econet_e01_device::read )
|
||||
// write -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( econet_e01_device::write )
|
||||
void econet_e01_device::write(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_ram->pointer()[offset] = data;
|
||||
}
|
||||
@ -498,9 +498,10 @@ WRITE8_MEMBER( econet_e01_device::write )
|
||||
// eprom_r - ROM/RAM select read
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( econet_e01_device::ram_select_r )
|
||||
uint8_t econet_e01_device::ram_select_r()
|
||||
{
|
||||
m_ram_en = true;
|
||||
if (!machine().side_effects_disabled())
|
||||
m_ram_en = true;
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -510,7 +511,7 @@ READ8_MEMBER( econet_e01_device::ram_select_r )
|
||||
// floppy_w - floppy control write
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( econet_e01_device::floppy_w )
|
||||
void econet_e01_device::floppy_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
|
||||
@ -558,9 +559,10 @@ WRITE8_MEMBER( econet_e01_device::floppy_w )
|
||||
// network_irq_disable_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( econet_e01_device::network_irq_disable_r )
|
||||
uint8_t econet_e01_device::network_irq_disable_r()
|
||||
{
|
||||
network_irq_enable(0);
|
||||
if (!machine().side_effects_disabled())
|
||||
network_irq_enable(0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -570,7 +572,7 @@ READ8_MEMBER( econet_e01_device::network_irq_disable_r )
|
||||
// network_irq_disable_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( econet_e01_device::network_irq_disable_w )
|
||||
void econet_e01_device::network_irq_disable_w(uint8_t data)
|
||||
{
|
||||
network_irq_enable(0);
|
||||
}
|
||||
@ -580,9 +582,10 @@ WRITE8_MEMBER( econet_e01_device::network_irq_disable_w )
|
||||
// network_irq_enable_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( econet_e01_device::network_irq_enable_r )
|
||||
uint8_t econet_e01_device::network_irq_enable_r()
|
||||
{
|
||||
network_irq_enable(1);
|
||||
if (!machine().side_effects_disabled())
|
||||
network_irq_enable(1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -592,7 +595,7 @@ READ8_MEMBER( econet_e01_device::network_irq_enable_r )
|
||||
// network_irq_enable_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( econet_e01_device::network_irq_enable_w )
|
||||
void econet_e01_device::network_irq_enable_w(uint8_t data)
|
||||
{
|
||||
network_irq_enable(1);
|
||||
}
|
||||
@ -602,11 +605,12 @@ WRITE8_MEMBER( econet_e01_device::network_irq_enable_w )
|
||||
// hdc_data_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( econet_e01_device::hdc_data_r )
|
||||
uint8_t econet_e01_device::hdc_data_r()
|
||||
{
|
||||
uint8_t data = m_scsi_data_in->read();
|
||||
|
||||
m_scsibus->write_ack(1);
|
||||
if (!machine().side_effects_disabled())
|
||||
m_scsibus->write_ack(1);
|
||||
|
||||
return data;
|
||||
}
|
||||
@ -616,7 +620,7 @@ READ8_MEMBER( econet_e01_device::hdc_data_r )
|
||||
// hdc_data_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( econet_e01_device::hdc_data_w )
|
||||
void econet_e01_device::hdc_data_w(uint8_t data)
|
||||
{
|
||||
m_scsi_data_out->write(data);
|
||||
|
||||
@ -628,7 +632,7 @@ WRITE8_MEMBER( econet_e01_device::hdc_data_w )
|
||||
// hdc_select_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( econet_e01_device::hdc_select_w )
|
||||
void econet_e01_device::hdc_select_w(uint8_t data)
|
||||
{
|
||||
m_scsibus->write_sel(1);
|
||||
}
|
||||
@ -638,7 +642,7 @@ WRITE8_MEMBER( econet_e01_device::hdc_select_w )
|
||||
// hdc_irq_enable_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( econet_e01_device::hdc_irq_enable_w )
|
||||
void econet_e01_device::hdc_irq_enable_w(uint8_t data)
|
||||
{
|
||||
hdc_irq_enable(BIT(data, 0));
|
||||
}
|
||||
@ -648,7 +652,7 @@ WRITE8_MEMBER( econet_e01_device::hdc_irq_enable_w )
|
||||
// rtc_address_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( econet_e01_device::rtc_address_r )
|
||||
uint8_t econet_e01_device::rtc_address_r()
|
||||
{
|
||||
return m_rtc->read(0);
|
||||
}
|
||||
@ -658,7 +662,7 @@ READ8_MEMBER( econet_e01_device::rtc_address_r )
|
||||
// rtc_address_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( econet_e01_device::rtc_address_w )
|
||||
void econet_e01_device::rtc_address_w(uint8_t data)
|
||||
{
|
||||
m_rtc->write(0, data);
|
||||
}
|
||||
@ -668,7 +672,7 @@ WRITE8_MEMBER( econet_e01_device::rtc_address_w )
|
||||
// rtc_data_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( econet_e01_device::rtc_data_r )
|
||||
uint8_t econet_e01_device::rtc_data_r()
|
||||
{
|
||||
return m_rtc->read(1);
|
||||
}
|
||||
@ -678,7 +682,7 @@ READ8_MEMBER( econet_e01_device::rtc_data_r )
|
||||
// rtc_data_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( econet_e01_device::rtc_data_w )
|
||||
void econet_e01_device::rtc_data_w(uint8_t data)
|
||||
{
|
||||
m_rtc->write(1, data);
|
||||
}
|
||||
|
@ -65,22 +65,22 @@ private:
|
||||
DECLARE_WRITE_LINE_MEMBER( fdc_drq_w );
|
||||
DECLARE_WRITE_LINE_MEMBER( scsi_bsy_w );
|
||||
DECLARE_WRITE_LINE_MEMBER( scsi_req_w );
|
||||
DECLARE_READ8_MEMBER( read );
|
||||
DECLARE_WRITE8_MEMBER( write );
|
||||
DECLARE_READ8_MEMBER( ram_select_r );
|
||||
DECLARE_WRITE8_MEMBER( floppy_w );
|
||||
DECLARE_READ8_MEMBER( network_irq_disable_r );
|
||||
DECLARE_WRITE8_MEMBER( network_irq_disable_w );
|
||||
DECLARE_READ8_MEMBER( network_irq_enable_r );
|
||||
DECLARE_WRITE8_MEMBER( network_irq_enable_w );
|
||||
DECLARE_READ8_MEMBER( hdc_data_r );
|
||||
DECLARE_WRITE8_MEMBER( hdc_data_w );
|
||||
DECLARE_WRITE8_MEMBER( hdc_select_w );
|
||||
DECLARE_WRITE8_MEMBER( hdc_irq_enable_w );
|
||||
DECLARE_READ8_MEMBER( rtc_address_r );
|
||||
DECLARE_WRITE8_MEMBER( rtc_address_w );
|
||||
DECLARE_READ8_MEMBER( rtc_data_r );
|
||||
DECLARE_WRITE8_MEMBER( rtc_data_w );
|
||||
uint8_t read(offs_t offset);
|
||||
void write(offs_t offset, uint8_t data);
|
||||
uint8_t ram_select_r();
|
||||
void floppy_w(uint8_t data);
|
||||
uint8_t network_irq_disable_r();
|
||||
void network_irq_disable_w(uint8_t data);
|
||||
uint8_t network_irq_enable_r();
|
||||
void network_irq_enable_w(uint8_t data);
|
||||
uint8_t hdc_data_r();
|
||||
void hdc_data_w(uint8_t data);
|
||||
void hdc_select_w(uint8_t data);
|
||||
void hdc_irq_enable_w(uint8_t data);
|
||||
uint8_t rtc_address_r();
|
||||
void rtc_address_w(uint8_t data);
|
||||
uint8_t rtc_data_r();
|
||||
void rtc_data_w(uint8_t data);
|
||||
|
||||
DECLARE_FLOPPY_FORMATS(floppy_formats_afs);
|
||||
|
||||
|
@ -87,8 +87,8 @@ void einstein_silicon_disc_device::device_reset()
|
||||
// install i/o ports
|
||||
io_space().install_device(0xf0, 0xff, *this, &einstein_silicon_disc_device::map);
|
||||
io_space().install_readwrite_handler(0xfa, 0xfa, 0, 0, 0xff00,
|
||||
read8_delegate(*this, FUNC(einstein_silicon_disc_device::ram_r)),
|
||||
write8_delegate(*this, FUNC(einstein_silicon_disc_device::ram_w)));
|
||||
read8sm_delegate(*this, FUNC(einstein_silicon_disc_device::ram_r)),
|
||||
write8sm_delegate(*this, FUNC(einstein_silicon_disc_device::ram_w)));
|
||||
}
|
||||
|
||||
|
||||
@ -96,25 +96,25 @@ void einstein_silicon_disc_device::device_reset()
|
||||
// IMPLEMENTATION
|
||||
//**************************************************************************
|
||||
|
||||
WRITE8_MEMBER( einstein_silicon_disc_device::sector_low_w )
|
||||
void einstein_silicon_disc_device::sector_low_w(uint8_t data)
|
||||
{
|
||||
m_sector &= 0xff00;
|
||||
m_sector |= data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( einstein_silicon_disc_device::sector_high_w )
|
||||
void einstein_silicon_disc_device::sector_high_w(uint8_t data)
|
||||
{
|
||||
m_sector &= 0x00ff;
|
||||
m_sector |= ((data & 0x07) << 8);
|
||||
}
|
||||
|
||||
// a8 to a14 are used to specify the byte in a 128-byte sector
|
||||
READ8_MEMBER( einstein_silicon_disc_device::ram_r )
|
||||
uint8_t einstein_silicon_disc_device::ram_r(offs_t offset)
|
||||
{
|
||||
return m_ram[(m_sector * 0x80) | ((offset >> 8) & 0x7f)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( einstein_silicon_disc_device::ram_w )
|
||||
void einstein_silicon_disc_device::ram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_ram[(m_sector * 0x80) | ((offset >> 8) & 0x7f)] = data;
|
||||
}
|
||||
|
@ -42,10 +42,10 @@ private:
|
||||
std::unique_ptr<uint8_t[]> m_ram;
|
||||
uint16_t m_sector;
|
||||
|
||||
DECLARE_READ8_MEMBER(ram_r);
|
||||
DECLARE_WRITE8_MEMBER(ram_w);
|
||||
DECLARE_WRITE8_MEMBER(sector_low_w);
|
||||
DECLARE_WRITE8_MEMBER(sector_high_w);
|
||||
uint8_t ram_r(offs_t offset);
|
||||
void ram_w(offs_t offset, uint8_t data);
|
||||
void sector_low_w(uint8_t data);
|
||||
void sector_high_w(uint8_t data);
|
||||
};
|
||||
|
||||
// device type definition
|
||||
|
@ -97,18 +97,18 @@ void einstein_speculator_device::device_reset()
|
||||
{
|
||||
// ram: range 0x1f, 0x3f, 0x5f, 0x7f, 0x9f, 0xbf, 0xdf, 0xff
|
||||
io_space().install_readwrite_handler(0x1f, 0x1f, 0, 0, 0xffe0,
|
||||
read8_delegate(*this, FUNC(einstein_speculator_device::ram_r)),
|
||||
write8_delegate(*this, FUNC(einstein_speculator_device::ram_w)));
|
||||
read8sm_delegate(*this, FUNC(einstein_speculator_device::ram_r)),
|
||||
write8sm_delegate(*this, FUNC(einstein_speculator_device::ram_w)));
|
||||
|
||||
// ram: range 0x60 - 0xff
|
||||
io_space().install_readwrite_handler(0x60, 0x60, 0, 0, 0xff9f,
|
||||
read8_delegate(*this, FUNC(einstein_speculator_device::ram_r)),
|
||||
write8_delegate(*this, FUNC(einstein_speculator_device::ram_w)));
|
||||
read8sm_delegate(*this, FUNC(einstein_speculator_device::ram_r)),
|
||||
write8sm_delegate(*this, FUNC(einstein_speculator_device::ram_w)));
|
||||
|
||||
// tape read/nmi write register: range 0xff
|
||||
io_space().install_readwrite_handler(0xff, 0xff, 0, 0, 0xff00,
|
||||
read8_delegate(*this, FUNC(einstein_speculator_device::tape_r)),
|
||||
write8_delegate(*this, FUNC(einstein_speculator_device::nmi_w)));
|
||||
read8smo_delegate(*this, FUNC(einstein_speculator_device::tape_r)),
|
||||
write8smo_delegate(*this, FUNC(einstein_speculator_device::nmi_w)));
|
||||
}
|
||||
|
||||
|
||||
@ -167,19 +167,19 @@ offs_t einstein_speculator_device::address_translate(offs_t offset)
|
||||
return (ra3 << 3) | (ra2 << 2) | (ra1 << 1) | (ra0 << 0);
|
||||
}
|
||||
|
||||
READ8_MEMBER( einstein_speculator_device::ram_r )
|
||||
uint8_t einstein_speculator_device::ram_r(offs_t offset)
|
||||
{
|
||||
offs_t addr = ((offset << 4) & 0x7f) | address_translate(offset);
|
||||
return m_ram[addr];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( einstein_speculator_device::ram_w )
|
||||
void einstein_speculator_device::ram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
offs_t addr = ((offset << 4) & 0x7f) | address_translate(offset);
|
||||
m_ram[addr] = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( einstein_speculator_device::tape_r )
|
||||
uint8_t einstein_speculator_device::tape_r()
|
||||
{
|
||||
// 7654321- unknown
|
||||
// -------0 cassette input
|
||||
@ -187,9 +187,9 @@ READ8_MEMBER( einstein_speculator_device::tape_r )
|
||||
return m_cassette->input() > 0.0038 ? 1 : 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( einstein_speculator_device::nmi_w )
|
||||
void einstein_speculator_device::nmi_w(uint8_t data)
|
||||
{
|
||||
logerror("nmi_w offset %04x data %02x\n", offset, data);
|
||||
logerror("nmi_w data %02x\n", data);
|
||||
|
||||
// 76543--- unknown
|
||||
// -----2-- nmi enable?
|
||||
|
@ -34,10 +34,10 @@ public:
|
||||
|
||||
virtual void int_w(int state) override;
|
||||
|
||||
DECLARE_READ8_MEMBER(ram_r);
|
||||
DECLARE_WRITE8_MEMBER(ram_w);
|
||||
DECLARE_READ8_MEMBER(tape_r);
|
||||
DECLARE_WRITE8_MEMBER(nmi_w);
|
||||
uint8_t ram_r(offs_t offset);
|
||||
void ram_w(offs_t offset, uint8_t data);
|
||||
uint8_t tape_r();
|
||||
void nmi_w(uint8_t data);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(ic5a_q_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(ic5b_q_w);
|
||||
|
@ -160,7 +160,7 @@ void tk02_device::device_start()
|
||||
void tk02_device::device_reset()
|
||||
{
|
||||
io_space().install_device(0x40, 0x4f, *this, &tk02_device::map);
|
||||
io_space().install_readwrite_handler(0x40, 0x47, 0, 0, 0xff00, read8_delegate(*this, FUNC(tk02_device::ram_r)), write8_delegate(*this, FUNC(tk02_device::ram_w)));
|
||||
io_space().install_readwrite_handler(0x40, 0x47, 0, 0, 0xff00, read8sm_delegate(*this, FUNC(tk02_device::ram_r)), write8sm_delegate(*this, FUNC(tk02_device::ram_w)));
|
||||
}
|
||||
|
||||
|
||||
@ -203,17 +203,17 @@ WRITE_LINE_MEMBER( tk02_device::de_w )
|
||||
|
||||
// lower 3 bits of address define a 256-byte "row"
|
||||
// upper 8 bits define the offset in the row
|
||||
READ8_MEMBER( tk02_device::ram_r )
|
||||
uint8_t tk02_device::ram_r(offs_t offset)
|
||||
{
|
||||
return m_ram[((offset & 0x07) << 8) | ((offset >> 8) & 0xff)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( tk02_device::ram_w )
|
||||
void tk02_device::ram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_ram[((offset & 0x07) << 8) | ((offset >> 8) & 0xff)] = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( tk02_device::status_r )
|
||||
uint8_t tk02_device::status_r()
|
||||
{
|
||||
// 7654---- unused
|
||||
// ----3--- link M001
|
||||
|
@ -40,9 +40,9 @@ private:
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(de_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(ram_r);
|
||||
DECLARE_WRITE8_MEMBER(ram_w);
|
||||
DECLARE_READ8_MEMBER(status_r);
|
||||
uint8_t ram_r(offs_t offset);
|
||||
void ram_w(offs_t offset, uint8_t data);
|
||||
uint8_t status_r();
|
||||
|
||||
MC6845_UPDATE_ROW(crtc_update_row);
|
||||
|
||||
|
@ -66,22 +66,22 @@ ekara_rom_i2c_24lc02_gc0010_device::ekara_rom_i2c_24lc02_gc0010_device(const mac
|
||||
|
||||
// plain
|
||||
|
||||
READ8_MEMBER(ekara_rom_plain_device::read_cart)
|
||||
uint8_t ekara_rom_plain_device::read_cart(offs_t offset)
|
||||
{
|
||||
return read_rom(space, offset, mem_mask);
|
||||
return read_rom(offset);
|
||||
}
|
||||
|
||||
READ8_MEMBER(ekara_rom_plain_device::read_rom)
|
||||
uint8_t ekara_rom_plain_device::read_rom(offs_t offset)
|
||||
{
|
||||
return m_rom[offset & (m_rom_size-1)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(ekara_rom_plain_device::write_cart)
|
||||
void ekara_rom_plain_device::write_cart(offs_t offset, uint8_t data)
|
||||
{
|
||||
write_rom(space, offset, data, mem_mask);
|
||||
write_rom(offset, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(ekara_rom_plain_device::write_rom)
|
||||
void ekara_rom_plain_device::write_rom(offs_t offset, uint8_t data)
|
||||
{
|
||||
logerror("ekara_rom_plain_device::write_rom %08x %02x\n", offset, data);
|
||||
}
|
||||
@ -98,30 +98,30 @@ bool ekara_rom_i2c_base_device::is_write_access_not_rom(void)
|
||||
return (m_buscontrol[0] & 0x08) ? true : false;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(ekara_rom_i2c_base_device::write_bus_control)
|
||||
void ekara_rom_i2c_base_device::write_bus_control(offs_t offset, uint8_t data)
|
||||
{
|
||||
logerror("ekara_rom_i2c_base_device::write_bus_control %08x %02x\n", offset, data);
|
||||
m_buscontrol[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(ekara_rom_i2c_base_device::write_rom)
|
||||
void ekara_rom_i2c_base_device::write_rom(offs_t offset, uint8_t data)
|
||||
{
|
||||
logerror("ekara_rom_i2c_base_device::write_rom %08x %02x\n", offset, data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(ekara_rom_i2c_base_device::read_rom)
|
||||
uint8_t ekara_rom_i2c_base_device::read_rom(offs_t offset)
|
||||
{
|
||||
return m_rom[offset & (m_rom_size - 1)];
|
||||
}
|
||||
|
||||
READ8_MEMBER(ekara_rom_i2c_base_device::read_extra)
|
||||
uint8_t ekara_rom_i2c_base_device::read_extra(offs_t offset)
|
||||
{
|
||||
logerror("ekara_rom_i2c_base_device::read_extra %08x\n", offset);
|
||||
|
||||
return (m_i2cmem->read_sda() & 1) ? 0xff : 0x00;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(ekara_rom_i2c_base_device::write_extra)
|
||||
void ekara_rom_i2c_base_device::write_extra(offs_t offset, uint8_t data)
|
||||
{
|
||||
logerror("ekara_rom_i2c_base_device::write_extra %08x %02x\n", offset, data);
|
||||
|
||||
@ -177,12 +177,12 @@ bool ekara_rom_i2c_24lc02_gc0010_device::is_write_access_not_rom(void)
|
||||
return false;
|
||||
}
|
||||
|
||||
READ8_MEMBER(ekara_rom_i2c_24lc02_gc0010_device::read_extra)
|
||||
uint8_t ekara_rom_i2c_24lc02_gc0010_device::read_extra(offs_t offset)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(ekara_rom_i2c_24lc02_gc0010_device::write_extra)
|
||||
void ekara_rom_i2c_24lc02_gc0010_device::write_extra(offs_t offset, uint8_t data)
|
||||
{
|
||||
}
|
||||
|
||||
|
@ -18,14 +18,14 @@ public:
|
||||
ekara_rom_plain_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_cart) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_cart) override;
|
||||
virtual uint8_t read_cart(offs_t offset) override;
|
||||
virtual void write_cart(offs_t offset, uint8_t data) override;
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_extra) override { return 0xff; };
|
||||
virtual DECLARE_WRITE8_MEMBER(write_extra) override { };
|
||||
virtual uint8_t read_extra(offs_t offset) override { return 0xff; }
|
||||
virtual void write_extra(offs_t offset, uint8_t data) override { }
|
||||
|
||||
virtual READ8_MEMBER(read_rom);
|
||||
virtual WRITE8_MEMBER(write_rom);
|
||||
virtual uint8_t read_rom(offs_t offset);
|
||||
virtual void write_rom(offs_t offset, uint8_t data);
|
||||
|
||||
protected:
|
||||
ekara_rom_plain_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -47,15 +47,15 @@ protected:
|
||||
ekara_rom_i2c_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual READ8_MEMBER(read_rom) override;
|
||||
virtual WRITE8_MEMBER(write_rom) override;
|
||||
virtual uint8_t read_rom(offs_t offset) override;
|
||||
virtual void write_rom(offs_t offset, uint8_t data) override;
|
||||
|
||||
optional_device<i2cmem_device> m_i2cmem;
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_extra) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_extra) override;
|
||||
virtual uint8_t read_extra(offs_t offset) override;
|
||||
virtual void write_extra(offs_t offset, uint8_t data) override;
|
||||
|
||||
virtual DECLARE_WRITE8_MEMBER(write_bus_control) override;
|
||||
virtual void write_bus_control(offs_t offset, uint8_t data) override;
|
||||
|
||||
virtual bool is_read_access_not_rom(void) override;
|
||||
virtual bool is_write_access_not_rom(void) override;
|
||||
@ -118,8 +118,8 @@ protected:
|
||||
|
||||
bool is_read_access_not_rom(void) override;
|
||||
bool is_write_access_not_rom(void) override;
|
||||
DECLARE_READ8_MEMBER(read_extra) override;
|
||||
DECLARE_WRITE8_MEMBER(write_extra) override;
|
||||
uint8_t read_extra(offs_t offset) override;
|
||||
void write_extra(offs_t offset, uint8_t data) override;
|
||||
DECLARE_WRITE_LINE_MEMBER(write_sda) override;
|
||||
DECLARE_WRITE_LINE_MEMBER(write_scl) override;
|
||||
DECLARE_READ_LINE_MEMBER(read_sda ) override;
|
||||
|
@ -206,45 +206,45 @@ std::string ekara_cart_slot_device::get_default_card_software(get_default_card_s
|
||||
read
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(ekara_cart_slot_device::read_cart)
|
||||
uint8_t ekara_cart_slot_device::read_cart(offs_t offset)
|
||||
{
|
||||
return m_cart->read_cart(space, offset);
|
||||
return m_cart->read_cart(offset);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
write
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE8_MEMBER(ekara_cart_slot_device::write_cart)
|
||||
void ekara_cart_slot_device::write_cart(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_cart->write_cart(space, offset, data);
|
||||
m_cart->write_cart(offset, data);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
read extra
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(ekara_cart_slot_device::read_extra)
|
||||
uint8_t ekara_cart_slot_device::read_extra(offs_t offset)
|
||||
{
|
||||
return m_cart->read_extra(space, offset);
|
||||
return m_cart->read_extra(offset);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
write extra
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE8_MEMBER(ekara_cart_slot_device::write_extra)
|
||||
void ekara_cart_slot_device::write_extra(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_cart->write_extra(space, offset, data);
|
||||
m_cart->write_extra(offset, data);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
write control
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE8_MEMBER(ekara_cart_slot_device::write_bus_control)
|
||||
void ekara_cart_slot_device::write_bus_control(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_cart->write_bus_control(space, offset, data);
|
||||
m_cart->write_bus_control(offset, data);
|
||||
}
|
||||
|
||||
bool ekara_cart_slot_device::is_read_access_not_rom(void)
|
||||
|
@ -30,18 +30,18 @@ public:
|
||||
virtual ~device_ekara_cart_interface();
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_cart) { return 0xff; }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_cart) { }
|
||||
virtual uint8_t read_cart(offs_t offset) { return 0xff; }
|
||||
virtual void write_cart(offs_t offset, uint8_t data) { }
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_extra) { return 0xff; }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_extra) { }
|
||||
virtual uint8_t read_extra(offs_t offset) { return 0xff; }
|
||||
virtual void write_extra(offs_t offset, uint8_t data) { }
|
||||
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(write_sda) { }
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(write_scl) { }
|
||||
//virtual DECLARE_WRITE_LINE_MEMBER( write_wc )
|
||||
virtual DECLARE_READ_LINE_MEMBER( read_sda ) { return 0; }
|
||||
|
||||
virtual DECLARE_WRITE8_MEMBER(write_bus_control) { }
|
||||
virtual void write_bus_control(offs_t offset, uint8_t data) { }
|
||||
|
||||
virtual bool is_read_access_not_rom(void) { return false; }
|
||||
virtual bool is_write_access_not_rom(void) { return false; }
|
||||
@ -100,21 +100,21 @@ public:
|
||||
static int get_cart_type(const uint8_t *ROM, uint32_t len);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_cart);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_cart);
|
||||
uint8_t read_cart(offs_t offset);
|
||||
void write_cart(offs_t offset, uint8_t data);
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_extra);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_extra);
|
||||
uint8_t read_extra(offs_t offset);
|
||||
void write_extra(offs_t offset, uint8_t data);
|
||||
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(write_sda);
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(write_scl);
|
||||
//virtual DECLARE_WRITE_LINE_MEMBER( write_wc );
|
||||
virtual DECLARE_READ_LINE_MEMBER( read_sda );
|
||||
DECLARE_WRITE_LINE_MEMBER(write_sda);
|
||||
DECLARE_WRITE_LINE_MEMBER(write_scl);
|
||||
//DECLARE_WRITE_LINE_MEMBER( write_wc );
|
||||
DECLARE_READ_LINE_MEMBER( read_sda );
|
||||
|
||||
virtual DECLARE_WRITE8_MEMBER(write_bus_control);
|
||||
void write_bus_control(offs_t offset, uint8_t data);
|
||||
|
||||
virtual bool is_read_access_not_rom(void);
|
||||
virtual bool is_write_access_not_rom(void);
|
||||
bool is_read_access_not_rom(void);
|
||||
bool is_write_access_not_rom(void);
|
||||
|
||||
bool has_cart() { return m_cart ? true : false; }
|
||||
|
||||
|
@ -77,11 +77,11 @@ void gamate_rom_4in1_device::device_reset()
|
||||
-------------------------------------------------*/
|
||||
|
||||
|
||||
READ8_MEMBER(gamate_rom_plain_device::read_cart)
|
||||
uint8_t gamate_rom_plain_device::read_cart(offs_t offset)
|
||||
{
|
||||
if (m_protection->is_protection_passed())
|
||||
{
|
||||
return read_rom(space, offset, mem_mask);
|
||||
return read_rom(offset);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -91,12 +91,12 @@ READ8_MEMBER(gamate_rom_plain_device::read_cart)
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(gamate_rom_plain_device::read_rom)
|
||||
uint8_t gamate_rom_plain_device::read_rom(offs_t offset)
|
||||
{
|
||||
return m_rom[offset & (m_rom_size-1)];
|
||||
}
|
||||
|
||||
READ8_MEMBER(gamate_rom_banked_device::read_rom)
|
||||
uint8_t gamate_rom_banked_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (offset < 0x4000)
|
||||
{
|
||||
@ -110,7 +110,7 @@ READ8_MEMBER(gamate_rom_banked_device::read_rom)
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(gamate_rom_4in1_device::read_rom)
|
||||
uint8_t gamate_rom_4in1_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (offset < 0x4000)
|
||||
{
|
||||
@ -122,11 +122,11 @@ READ8_MEMBER(gamate_rom_4in1_device::read_rom)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gamate_rom_plain_device::write_cart)
|
||||
void gamate_rom_plain_device::write_cart(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (m_protection->is_protection_passed())
|
||||
{
|
||||
write_rom(space, offset, data, mem_mask);
|
||||
write_rom(offset, data);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -134,13 +134,13 @@ WRITE8_MEMBER(gamate_rom_plain_device::write_cart)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gamate_rom_plain_device::write_rom)
|
||||
void gamate_rom_plain_device::write_rom(offs_t offset, uint8_t data)
|
||||
{
|
||||
// shouldn't be any write on an unbanked game
|
||||
logerror("gamate_rom_plain_device::write_rom %04x %02x\n", offset, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gamate_rom_banked_device::write_rom)
|
||||
void gamate_rom_banked_device::write_rom(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (offset == 0x6000)
|
||||
{
|
||||
@ -152,7 +152,7 @@ WRITE8_MEMBER(gamate_rom_banked_device::write_rom)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gamate_rom_4in1_device::write_rom)
|
||||
void gamate_rom_4in1_device::write_rom(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (offset == 0x2000)
|
||||
{
|
||||
|
@ -18,10 +18,10 @@ public:
|
||||
gamate_rom_plain_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_cart) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_cart) override;
|
||||
virtual READ8_MEMBER(read_rom);
|
||||
virtual WRITE8_MEMBER(write_rom);
|
||||
virtual uint8_t read_cart(offs_t offset) override;
|
||||
virtual void write_cart(offs_t offset, uint8_t data) override;
|
||||
virtual uint8_t read_rom(offs_t offset);
|
||||
virtual void write_rom(offs_t offset, uint8_t data);
|
||||
|
||||
protected:
|
||||
gamate_rom_plain_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -47,8 +47,8 @@ protected:
|
||||
gamate_rom_banked_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual READ8_MEMBER(read_rom) override;
|
||||
virtual WRITE8_MEMBER(write_rom) override;
|
||||
virtual uint8_t read_rom(offs_t offset) override;
|
||||
virtual void write_rom(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
virtual void device_start() override;
|
||||
@ -67,8 +67,8 @@ public:
|
||||
gamate_rom_4in1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual READ8_MEMBER(read_rom) override;
|
||||
virtual WRITE8_MEMBER(write_rom) override;
|
||||
virtual uint8_t read_rom(offs_t offset) override;
|
||||
virtual void write_rom(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
virtual void device_start() override;
|
||||
|
@ -225,11 +225,11 @@ std::string gamate_cart_slot_device::get_default_card_software(get_default_card_
|
||||
read
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(gamate_cart_slot_device::read_cart)
|
||||
uint8_t gamate_cart_slot_device::read_cart(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
{
|
||||
return m_cart->read_cart(space, offset);
|
||||
return m_cart->read_cart(offset);
|
||||
}
|
||||
else
|
||||
return 0xff;
|
||||
@ -239,10 +239,10 @@ READ8_MEMBER(gamate_cart_slot_device::read_cart)
|
||||
write
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE8_MEMBER(gamate_cart_slot_device::write_cart)
|
||||
void gamate_cart_slot_device::write_cart(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (m_cart)
|
||||
{
|
||||
m_cart->write_cart(space, offset, data);
|
||||
m_cart->write_cart(offset, data);
|
||||
}
|
||||
}
|
||||
|
@ -28,8 +28,8 @@ public:
|
||||
virtual ~device_gamate_cart_interface();
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_cart) { return 0xff; }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_cart) { }
|
||||
virtual uint8_t read_cart(offs_t offset) { return 0xff; }
|
||||
virtual void write_cart(offs_t offset, uint8_t data) { }
|
||||
|
||||
void rom_alloc(uint32_t size, const char *tag);
|
||||
uint8_t* get_rom_base() { return m_rom; }
|
||||
@ -84,8 +84,8 @@ public:
|
||||
static int get_cart_type(const uint8_t *ROM, uint32_t len);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_cart);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_cart);
|
||||
uint8_t read_cart(offs_t offset);
|
||||
void write_cart(offs_t offset, uint8_t data);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
|
@ -45,34 +45,34 @@ jakks_gamekey_rom_i2c_24lc04_device::jakks_gamekey_rom_i2c_24lc04_device(const m
|
||||
|
||||
// plain
|
||||
|
||||
READ16_MEMBER(jakks_gamekey_rom_plain_device::read_cart)
|
||||
uint16_t jakks_gamekey_rom_plain_device::read_cart(offs_t offset)
|
||||
{
|
||||
return read_rom(space, offset, mem_mask);
|
||||
return read_rom(offset);
|
||||
}
|
||||
|
||||
READ16_MEMBER(jakks_gamekey_rom_plain_device::read_rom)
|
||||
uint16_t jakks_gamekey_rom_plain_device::read_rom(offs_t offset)
|
||||
{
|
||||
return m_rom[offset & (m_rom_size-1)];
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(jakks_gamekey_rom_plain_device::write_cart)
|
||||
void jakks_gamekey_rom_plain_device::write_cart(offs_t offset, uint16_t data)
|
||||
{
|
||||
write_rom(space, offset, data, mem_mask);
|
||||
write_rom(offset, data);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(jakks_gamekey_rom_plain_device::write_rom)
|
||||
void jakks_gamekey_rom_plain_device::write_rom(offs_t offset, uint16_t data)
|
||||
{
|
||||
logerror("jakks_gamekey_rom_plain_device::write_rom %08x %02x\n", offset, data);
|
||||
logerror("jakks_gamekey_rom_plain_device::write_rom %08x %04x\n", offset, data);
|
||||
}
|
||||
|
||||
// i2c base
|
||||
|
||||
WRITE16_MEMBER(jakks_gamekey_rom_i2c_base_device::write_rom)
|
||||
void jakks_gamekey_rom_i2c_base_device::write_rom(offs_t offset, uint16_t data)
|
||||
{
|
||||
logerror("jakks_gamekey_rom_i2c_base_device::write_rom %08x %02x\n", offset, data);
|
||||
logerror("jakks_gamekey_rom_i2c_base_device::write_rom %08x %04x\n", offset, data);
|
||||
}
|
||||
|
||||
READ16_MEMBER(jakks_gamekey_rom_i2c_base_device::read_rom)
|
||||
uint16_t jakks_gamekey_rom_i2c_base_device::read_rom(offs_t offset)
|
||||
{
|
||||
return m_rom[offset & (m_rom_size - 1)];
|
||||
}
|
||||
|
@ -18,14 +18,14 @@ public:
|
||||
jakks_gamekey_rom_plain_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ16_MEMBER(read_cart) override;
|
||||
virtual DECLARE_WRITE16_MEMBER(write_cart) override;
|
||||
virtual uint16_t read_cart(offs_t offset) override;
|
||||
virtual void write_cart(offs_t offset, uint16_t data) override;
|
||||
|
||||
virtual uint8_t read_cart_seeprom(void) override { return 1; };
|
||||
virtual void write_cart_seeprom(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override { };
|
||||
|
||||
virtual READ16_MEMBER(read_rom);
|
||||
virtual WRITE16_MEMBER(write_rom);
|
||||
virtual uint16_t read_rom(offs_t offset);
|
||||
virtual void write_rom(offs_t offset, uint16_t data);
|
||||
|
||||
protected:
|
||||
jakks_gamekey_rom_plain_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -47,8 +47,8 @@ protected:
|
||||
jakks_gamekey_rom_i2c_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual READ16_MEMBER(read_rom) override;
|
||||
virtual WRITE16_MEMBER(write_rom) override;
|
||||
virtual uint16_t read_rom(offs_t offset) override;
|
||||
virtual void write_rom(offs_t offset, uint16_t data) override;
|
||||
|
||||
optional_device<i2cmem_device> m_i2cmem;
|
||||
|
||||
|
@ -204,18 +204,18 @@ std::string jakks_gamekey_slot_device::get_default_card_software(get_default_car
|
||||
read
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ16_MEMBER(jakks_gamekey_slot_device::read_cart)
|
||||
uint16_t jakks_gamekey_slot_device::read_cart(offs_t offset)
|
||||
{
|
||||
return m_cart->read_cart(space, offset);
|
||||
return m_cart->read_cart(offset);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
write
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE16_MEMBER(jakks_gamekey_slot_device::write_cart)
|
||||
void jakks_gamekey_slot_device::write_cart(offs_t offset, uint16_t data)
|
||||
{
|
||||
m_cart->write_cart(space, offset, data);
|
||||
m_cart->write_cart(offset, data);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
|
@ -28,8 +28,8 @@ public:
|
||||
virtual ~device_jakks_gamekey_interface();
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ16_MEMBER(read_cart) { return 0xffff; }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_cart) { }
|
||||
virtual uint16_t read_cart(offs_t offset) { return 0xffff; }
|
||||
virtual void write_cart(offs_t offset, uint16_t data) { }
|
||||
|
||||
virtual uint8_t read_cart_seeprom(void) { return 1; }
|
||||
virtual void write_cart_seeprom(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { }
|
||||
@ -88,8 +88,8 @@ public:
|
||||
static int get_cart_type(const uint8_t *ROM, uint32_t len);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ16_MEMBER(read_cart);
|
||||
virtual DECLARE_WRITE16_MEMBER(write_cart);
|
||||
uint16_t read_cart(offs_t offset);
|
||||
void write_cart(offs_t offset, uint16_t data);
|
||||
|
||||
virtual uint8_t read_cart_seeprom(void);
|
||||
virtual void write_cart_seeprom(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
@ -43,7 +43,7 @@ m5_ram_device::m5_ram_device(const machine_config &mconfig, const char *tag, dev
|
||||
mapper specific handlers
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(m5_rom_device::read_rom)
|
||||
uint8_t m5_rom_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (offset < m_rom_size)
|
||||
return m_rom[offset];
|
||||
@ -51,12 +51,12 @@ READ8_MEMBER(m5_rom_device::read_rom)
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(m5_ram_device::read_ram)
|
||||
uint8_t m5_ram_device::read_ram(offs_t offset)
|
||||
{
|
||||
return m_ram[offset];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(m5_ram_device::write_ram)
|
||||
void m5_ram_device::write_ram(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_ram[offset] = data;
|
||||
}
|
||||
|
@ -22,7 +22,7 @@ public:
|
||||
virtual void device_reset() override {}
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) override;
|
||||
virtual uint8_t read_rom(offs_t offset) override;
|
||||
|
||||
protected:
|
||||
m5_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -37,8 +37,8 @@ public:
|
||||
m5_ram_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_ram) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram) override;
|
||||
virtual uint8_t read_ram(offs_t offset) override;
|
||||
virtual void write_ram(offs_t offset, uint8_t data) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
|
@ -220,10 +220,10 @@ std::string m5_cart_slot_device::get_default_card_software(get_default_card_soft
|
||||
read
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(m5_cart_slot_device::read_rom)
|
||||
uint8_t m5_cart_slot_device::read_rom(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_rom(space, offset);
|
||||
return m_cart->read_rom(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
@ -232,10 +232,10 @@ READ8_MEMBER(m5_cart_slot_device::read_rom)
|
||||
read
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(m5_cart_slot_device::read_ram)
|
||||
uint8_t m5_cart_slot_device::read_ram(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_ram(space, offset);
|
||||
return m_cart->read_ram(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
@ -244,8 +244,8 @@ READ8_MEMBER(m5_cart_slot_device::read_ram)
|
||||
write
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE8_MEMBER(m5_cart_slot_device::write_ram)
|
||||
void m5_cart_slot_device::write_ram(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (m_cart)
|
||||
m_cart->write_ram(space, offset, data);
|
||||
m_cart->write_ram(offset, data);
|
||||
}
|
||||
|
@ -35,9 +35,9 @@ public:
|
||||
virtual ~device_m5_cart_interface();
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) { return 0xff; }
|
||||
virtual DECLARE_READ8_MEMBER(read_ram) { return 0xff; }
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram) {}
|
||||
virtual uint8_t read_rom(offs_t offset) { return 0xff; }
|
||||
virtual uint8_t read_ram(offs_t offset) { return 0xff; }
|
||||
virtual void write_ram(offs_t offset, uint8_t data) {}
|
||||
|
||||
void rom_alloc(uint32_t size, const char *tag);
|
||||
void ram_alloc(uint32_t size);
|
||||
@ -100,9 +100,9 @@ public:
|
||||
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom);
|
||||
virtual DECLARE_READ8_MEMBER(read_ram);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram);
|
||||
uint8_t read_rom(offs_t offset);
|
||||
uint8_t read_ram(offs_t offset);
|
||||
void write_ram(offs_t offset, uint8_t data);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
|
@ -240,7 +240,7 @@ void mtx_sdxbas_device::device_reset()
|
||||
|
||||
/* SDX FDC */
|
||||
io_space().install_readwrite_handler(0x10, 0x13, read8sm_delegate(*m_fdc, FUNC(mb8877_device::read)), write8sm_delegate(*m_fdc, FUNC(mb8877_device::write)));
|
||||
io_space().install_readwrite_handler(0x14, 0x14, read8_delegate(*this, FUNC(mtx_sdx_device::sdx_status_r)), write8_delegate(*this, FUNC(mtx_sdx_device::sdx_control_w)));
|
||||
io_space().install_readwrite_handler(0x14, 0x14, read8smo_delegate(*this, FUNC(mtx_sdx_device::sdx_status_r)), write8smo_delegate(*this, FUNC(mtx_sdx_device::sdx_control_w)));
|
||||
}
|
||||
|
||||
void mtx_sdxcpm_device::device_reset()
|
||||
@ -249,10 +249,10 @@ void mtx_sdxcpm_device::device_reset()
|
||||
|
||||
/* SDX FDC */
|
||||
io_space().install_readwrite_handler(0x10, 0x13, read8sm_delegate(*m_fdc, FUNC(mb8877_device::read)), write8sm_delegate(*m_fdc, FUNC(mb8877_device::write)));
|
||||
io_space().install_readwrite_handler(0x14, 0x14, read8_delegate(*this, FUNC(mtx_sdx_device::sdx_status_r)), write8_delegate(*this, FUNC(mtx_sdx_device::sdx_control_w)));
|
||||
io_space().install_readwrite_handler(0x14, 0x14, read8smo_delegate(*this, FUNC(mtx_sdx_device::sdx_status_r)), write8smo_delegate(*this, FUNC(mtx_sdx_device::sdx_control_w)));
|
||||
|
||||
/* 80 column */
|
||||
io_space().install_readwrite_handler(0x30, 0x33, read8_delegate(*this, FUNC(mtx_sdxcpm_device::mtx_80col_r)), write8_delegate(*this, FUNC(mtx_sdxcpm_device::mtx_80col_w)));
|
||||
io_space().install_readwrite_handler(0x30, 0x33, read8sm_delegate(*this, FUNC(mtx_sdxcpm_device::mtx_80col_r)), write8sm_delegate(*this, FUNC(mtx_sdxcpm_device::mtx_80col_w)));
|
||||
io_space().install_readwrite_handler(0x38, 0x38, read8smo_delegate(*m_crtc, FUNC(mc6845_device::status_r)), write8smo_delegate(*m_crtc, FUNC(mc6845_device::address_w)));
|
||||
io_space().install_readwrite_handler(0x39, 0x39, read8smo_delegate(*m_crtc, FUNC(mc6845_device::register_r)), write8smo_delegate(*m_crtc, FUNC(mc6845_device::register_w)));
|
||||
|
||||
@ -265,7 +265,7 @@ void mtx_sdxcpm_device::device_reset()
|
||||
// IMPLEMENTATION
|
||||
//**************************************************************************
|
||||
|
||||
READ8_MEMBER(mtx_sdx_device::sdx_status_r)
|
||||
uint8_t mtx_sdx_device::sdx_status_r()
|
||||
{
|
||||
/*
|
||||
bit description
|
||||
@ -294,7 +294,7 @@ READ8_MEMBER(mtx_sdx_device::sdx_status_r)
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(mtx_sdx_device::sdx_control_w)
|
||||
void mtx_sdx_device::sdx_control_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
bit description
|
||||
@ -341,7 +341,7 @@ WRITE_LINE_MEMBER(mtx_sdx_device::motor_w)
|
||||
// 80 column video board
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER(mtx_sdxcpm_device::mtx_80col_r)
|
||||
uint8_t mtx_sdxcpm_device::mtx_80col_r(offs_t offset)
|
||||
{
|
||||
uint8_t data = 0xff;
|
||||
|
||||
@ -362,7 +362,7 @@ READ8_MEMBER(mtx_sdxcpm_device::mtx_80col_r)
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(mtx_sdxcpm_device::mtx_80col_w)
|
||||
void mtx_sdxcpm_device::mtx_80col_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
|
@ -32,8 +32,8 @@ public:
|
||||
// optional information overrides
|
||||
virtual ioport_constructor device_input_ports() const override;
|
||||
|
||||
DECLARE_READ8_MEMBER(sdx_status_r);
|
||||
DECLARE_WRITE8_MEMBER(sdx_control_w);
|
||||
uint8_t sdx_status_r();
|
||||
void sdx_control_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(motor_w);
|
||||
|
||||
protected:
|
||||
@ -81,8 +81,8 @@ protected:
|
||||
virtual void device_reset() override;
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(mtx_80col_r);
|
||||
DECLARE_WRITE8_MEMBER(mtx_80col_w);
|
||||
uint8_t mtx_80col_r(offs_t offset);
|
||||
void mtx_80col_w(offs_t offset, uint8_t data);
|
||||
MC6845_UPDATE_ROW(crtc_update_row);
|
||||
|
||||
required_device<screen_device> m_screen;
|
||||
|
@ -80,7 +80,7 @@ void nascom_avc_device::device_reset()
|
||||
{
|
||||
io_space().install_write_handler(0xb0, 0xb0, write8smo_delegate(*m_crtc, FUNC(mc6845_device::address_w)));
|
||||
io_space().install_readwrite_handler(0xb1, 0xb1, read8smo_delegate(*m_crtc, FUNC(mc6845_device::register_r)), write8smo_delegate(*m_crtc, FUNC(mc6845_device::register_w)));
|
||||
io_space().install_write_handler(0xb2, 0xb2, write8_delegate(*this, FUNC(nascom_avc_device::control_w)));
|
||||
io_space().install_write_handler(0xb2, 0xb2, write8smo_delegate(*this, FUNC(nascom_avc_device::control_w)));
|
||||
}
|
||||
|
||||
|
||||
@ -124,7 +124,7 @@ MC6845_UPDATE_ROW( nascom_avc_device::crtc_update_row )
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( nascom_avc_device::control_w )
|
||||
void nascom_avc_device::control_w(uint8_t data)
|
||||
{
|
||||
logerror("nascom_avc_device::control_w: 0x%02x\n", data);
|
||||
|
||||
@ -132,7 +132,7 @@ WRITE8_MEMBER( nascom_avc_device::control_w )
|
||||
if (((m_control & 0x07) == 0) && (data & 0x07))
|
||||
{
|
||||
ram_disable_w(0);
|
||||
program_space().install_readwrite_handler(0x8000, 0xbfff, read8_delegate(*this, FUNC(nascom_avc_device::vram_r)), write8_delegate(*this, FUNC(nascom_avc_device::vram_w)));
|
||||
program_space().install_readwrite_handler(0x8000, 0xbfff, read8sm_delegate(*this, FUNC(nascom_avc_device::vram_r)), write8sm_delegate(*this, FUNC(nascom_avc_device::vram_w)));
|
||||
}
|
||||
else if ((data & 0x07) == 0)
|
||||
{
|
||||
@ -143,7 +143,7 @@ WRITE8_MEMBER( nascom_avc_device::control_w )
|
||||
m_control = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( nascom_avc_device::vram_r )
|
||||
uint8_t nascom_avc_device::vram_r(offs_t offset)
|
||||
{
|
||||
// manual says only one plane can be read, i assume this is the order
|
||||
if (BIT(m_control, 0)) return m_r_ram[offset];
|
||||
@ -154,7 +154,7 @@ READ8_MEMBER( nascom_avc_device::vram_r )
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( nascom_avc_device::vram_w )
|
||||
void nascom_avc_device::vram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
// all planes can be written at the same time
|
||||
if (BIT(m_control, 0)) m_r_ram[offset] = data;
|
||||
|
@ -27,10 +27,10 @@ class nascom_avc_device : public device_t, public device_nasbus_card_interface
|
||||
public:
|
||||
// construction/destruction
|
||||
nascom_avc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
DECLARE_WRITE8_MEMBER(control_w);
|
||||
void control_w(uint8_t data);
|
||||
|
||||
READ8_MEMBER(vram_r);
|
||||
WRITE8_MEMBER(vram_w);
|
||||
uint8_t vram_r(offs_t offset);
|
||||
void vram_w(offs_t offset, uint8_t data);
|
||||
|
||||
protected:
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
|
@ -90,8 +90,8 @@ void nascom_fdc_device::device_start()
|
||||
void nascom_fdc_device::device_reset()
|
||||
{
|
||||
io_space().install_readwrite_handler(0xe0, 0xe3, read8sm_delegate(*m_fdc, FUNC(fd1793_device::read)), write8sm_delegate(*m_fdc, FUNC(fd1793_device::write)));
|
||||
io_space().install_readwrite_handler(0xe4, 0xe4, read8_delegate(*this, FUNC(nascom_fdc_device::select_r)), write8_delegate(*this, FUNC(nascom_fdc_device::select_w)));
|
||||
io_space().install_read_handler(0xe5, 0xe5, read8_delegate(*this, FUNC(nascom_fdc_device::status_r)));
|
||||
io_space().install_readwrite_handler(0xe4, 0xe4, read8smo_delegate(*this, FUNC(nascom_fdc_device::select_r)), write8smo_delegate(*this, FUNC(nascom_fdc_device::select_w)));
|
||||
io_space().install_read_handler(0xe5, 0xe5, read8smo_delegate(*this, FUNC(nascom_fdc_device::status_r)));
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
@ -130,7 +130,7 @@ TIMER_CALLBACK_MEMBER( nascom_fdc_device::motor_off )
|
||||
m_floppy3->get_device()->mon_w(1);
|
||||
}
|
||||
|
||||
READ8_MEMBER( nascom_fdc_device::select_r )
|
||||
uint8_t nascom_fdc_device::select_r()
|
||||
{
|
||||
m_select |= (0x80 | 0x20);
|
||||
|
||||
@ -154,7 +154,7 @@ READ8_MEMBER( nascom_fdc_device::select_r )
|
||||
return m_select;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( nascom_fdc_device::select_w )
|
||||
void nascom_fdc_device::select_w(uint8_t data)
|
||||
{
|
||||
if (VERBOSE)
|
||||
logerror("nascom_fdc_device::select_w: 0x%02x\n", data);
|
||||
@ -182,7 +182,7 @@ WRITE8_MEMBER( nascom_fdc_device::select_w )
|
||||
m_select = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( nascom_fdc_device::status_r )
|
||||
uint8_t nascom_fdc_device::status_r()
|
||||
{
|
||||
uint8_t data = 0;
|
||||
|
||||
|
@ -28,9 +28,9 @@ public:
|
||||
// construction/destruction
|
||||
nascom_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
DECLARE_READ8_MEMBER(select_r);
|
||||
DECLARE_WRITE8_MEMBER(select_w);
|
||||
DECLARE_READ8_MEMBER(status_r);
|
||||
uint8_t select_r();
|
||||
void select_w(uint8_t data);
|
||||
uint8_t status_r();
|
||||
|
||||
protected:
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
|
@ -185,7 +185,7 @@ void newbrain_eim_device::iorq_w(offs_t offset, uint8_t data, bool &prtov)
|
||||
// anout_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( newbrain_eim_device::anout_r )
|
||||
uint8_t newbrain_eim_device::anout_r()
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
@ -195,7 +195,7 @@ READ8_MEMBER( newbrain_eim_device::anout_r )
|
||||
// anout_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( newbrain_eim_device::anout_w )
|
||||
void newbrain_eim_device::anout_w(uint8_t data)
|
||||
{
|
||||
}
|
||||
|
||||
@ -204,7 +204,7 @@ WRITE8_MEMBER( newbrain_eim_device::anout_w )
|
||||
// anin_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( newbrain_eim_device::anin_r )
|
||||
uint8_t newbrain_eim_device::anin_r()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
@ -214,7 +214,7 @@ READ8_MEMBER( newbrain_eim_device::anin_r )
|
||||
// anio_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( newbrain_eim_device::anio_w )
|
||||
void newbrain_eim_device::anio_w(uint8_t data)
|
||||
{
|
||||
}
|
||||
|
||||
|
@ -33,10 +33,10 @@ public:
|
||||
// construction/destruction
|
||||
newbrain_eim_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
DECLARE_READ8_MEMBER( anout_r );
|
||||
DECLARE_WRITE8_MEMBER( anout_w );
|
||||
DECLARE_READ8_MEMBER( anin_r );
|
||||
DECLARE_WRITE8_MEMBER( anio_w );
|
||||
uint8_t anout_r();
|
||||
void anout_w(uint8_t data);
|
||||
uint8_t anin_r();
|
||||
void anio_w(uint8_t data);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
|
@ -68,29 +68,29 @@ void o2_rom_device::write_bank(int bank)
|
||||
m_bank_base = bank;
|
||||
}
|
||||
|
||||
READ8_MEMBER(o2_rom_device::read_rom04)
|
||||
uint8_t o2_rom_device::read_rom04(offs_t offset)
|
||||
{
|
||||
return m_rom[(offset + (m_bank_base & 0x03) * 0x800) & (m_rom_size - 1)];
|
||||
}
|
||||
READ8_MEMBER(o2_rom_device::read_rom0c)
|
||||
uint8_t o2_rom_device::read_rom0c(offs_t offset)
|
||||
{
|
||||
return m_rom[(offset + (m_bank_base & 0x03) * 0x800) & (m_rom_size - 1)];
|
||||
}
|
||||
|
||||
READ8_MEMBER(o2_rom12_device::read_rom04)
|
||||
uint8_t o2_rom12_device::read_rom04(offs_t offset)
|
||||
{
|
||||
return m_rom[offset + (m_bank_base & 0x03) * 0xc00];
|
||||
}
|
||||
READ8_MEMBER(o2_rom12_device::read_rom0c)
|
||||
uint8_t o2_rom12_device::read_rom0c(offs_t offset)
|
||||
{
|
||||
return m_rom[offset + 0x800 + (m_bank_base & 0x03) * 0xc00];
|
||||
}
|
||||
|
||||
READ8_MEMBER(o2_rom16_device::read_rom04)
|
||||
uint8_t o2_rom16_device::read_rom04(offs_t offset)
|
||||
{
|
||||
return m_rom[offset + 0x400 + (m_bank_base & 0x03) * 0x1000];
|
||||
}
|
||||
READ8_MEMBER(o2_rom16_device::read_rom0c)
|
||||
uint8_t o2_rom16_device::read_rom0c(offs_t offset)
|
||||
{
|
||||
return m_rom[offset + 0xc00 + (m_bank_base & 0x03) * 0x1000];
|
||||
}
|
||||
|
@ -18,8 +18,8 @@ public:
|
||||
o2_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom04) override;
|
||||
virtual DECLARE_READ8_MEMBER(read_rom0c) override;
|
||||
virtual uint8_t read_rom04(offs_t offset) override;
|
||||
virtual uint8_t read_rom0c(offs_t offset) override;
|
||||
|
||||
virtual void write_bank(int bank) override;
|
||||
|
||||
@ -42,8 +42,8 @@ public:
|
||||
o2_rom12_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom04) override;
|
||||
virtual DECLARE_READ8_MEMBER(read_rom0c) override;
|
||||
virtual uint8_t read_rom04(offs_t offset) override;
|
||||
virtual uint8_t read_rom0c(offs_t offset) override;
|
||||
};
|
||||
|
||||
// ======================> o2_rom16_device
|
||||
@ -55,8 +55,8 @@ public:
|
||||
o2_rom16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom04) override;
|
||||
virtual DECLARE_READ8_MEMBER(read_rom0c) override;
|
||||
virtual uint8_t read_rom04(offs_t offset) override;
|
||||
virtual uint8_t read_rom0c(offs_t offset) override;
|
||||
};
|
||||
|
||||
|
||||
|
@ -214,18 +214,18 @@ std::string o2_cart_slot_device::get_default_card_software(get_default_card_soft
|
||||
read_rom**
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER(o2_cart_slot_device::read_rom04)
|
||||
uint8_t o2_cart_slot_device::read_rom04(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_rom04(space, offset);
|
||||
return m_cart->read_rom04(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(o2_cart_slot_device::read_rom0c)
|
||||
uint8_t o2_cart_slot_device::read_rom0c(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_rom0c(space, offset);
|
||||
return m_cart->read_rom0c(offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
@ -234,10 +234,10 @@ READ8_MEMBER(o2_cart_slot_device::read_rom0c)
|
||||
io_write
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE8_MEMBER(o2_cart_slot_device::io_write)
|
||||
void o2_cart_slot_device::io_write(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (m_cart)
|
||||
m_cart->io_write(space, offset, data);
|
||||
m_cart->io_write(offset, data);
|
||||
}
|
||||
|
||||
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user