diff --git a/docs/source/techspecs/device_rom_interface.rst b/docs/source/techspecs/device_rom_interface.rst index ab5eb18737b..3a40590fc01 100644 --- a/docs/source/techspecs/device_rom_interface.rst +++ b/docs/source/techspecs/device_rom_interface.rst @@ -15,7 +15,7 @@ as rom. In the region/block cases, banking is automatically handled. 2. Setup -------- -| **device_rom_interface**\ (const machine_config &mconfig, device_t &device, UINT8 addrwidth, endianness_t endian = ENDIANNESS_LITTLE, UINT8 datawidth = 8) +| **device_rom_interface**\ (const machine_config &mconfig, device_t &device, u8 addrwidth, endianness_t endian = ENDIANNESS_LITTLE, u8 datawidth = 8) The constructor of the interface wants, in addition to the standard parameters, the address bus width of the dedicated bus. In addition @@ -41,7 +41,16 @@ rom description for the system, it will be automatically picked up as the connected rom. An address map has priority over the region if present in the machine config. -| void **set_rom**\ (const void \*base, UINT32 size); +| void **set_rom_endianness**\ (endianness_t endian) +| void **set_rom_data_width**\ (u8 width) +| void **set_rom_addr_width**\ (u8 width) + +These methods, intended for generic devices with indefinite hardware +specifications, override the endianness, data bus width and address +bus width assigned through the constructor. They must be called from +within the device before **config_complete** time. + +| void **set_rom**\ (const void \*base, u32 size); At any time post- **interface_pre_start**, a memory block can be setup as the connected rom with that method. It overrides any @@ -51,10 +60,10 @@ times. 3. Rom access ------------- -| UINT8 **read_byte**\ (offs_t byteaddress) -| UINT16 **read_word**\ (offs_t byteaddress) -| UINT32 **read_dword**\ (offs_t byteaddress) -| UINT64 **read_qword**\ (offs_t byteaddress) +| u8 **read_byte**\ (offs_t byteaddress) +| u16 **read_word**\ (offs_t byteaddress) +| u32 **read_dword**\ (offs_t byteaddress) +| u64 **read_qword**\ (offs_t byteaddress) These methods provide read access to the connected rom. Out-of-bounds access results in standard unmapped read logerror messages. @@ -76,3 +85,8 @@ Using that interface makes the device derive from **device_memory_interface**. If the device wants to actually use the memory interface for itself, remember that AS_0/AS_PROGRAM is used by the rom interface, and don't forget to upcall **memory_space_config**. + +For devices which have outputs that can be used to address ROMs but +only to forward the data to another device for processing, it may be +helpful to disable the interface when it is not required. This can be +done by overriding **memory_space_config** to return an empty vector. diff --git a/hash/psx.xml b/hash/psx.xml index 05a84cbd878..4b482affe0e 100644 --- a/hash/psx.xml +++ b/hash/psx.xml @@ -42805,6 +42805,21 @@ The entries in this section are intended to replace the existing "low-grade" Jap + + + Fire Pro Wrestling G (Japan) (v1.1) + 2000 + Spike + + + + + + + + Gradius Gaiden (Japan) (v1.1) + 1997 + Konami + + + + + + + + Gunners Heaven (Japan) + 1995 + Media Vision + + + + + + + + Hokuto no Ken - Seikimatsu Kyuuseishu Densetsu (Japan) + 2000 + Bandai + + + + + + + + Jikkyou Oshaberi Parodius - Forever with Me (Japan) + 1996 + Konami + + + + + + + + Macross Digital Mission VF-X (Japan) + 1997 + Bandai + + + + + + + + + + Macross VF-X2 (Japan) + 1999 + Bandai + + + + + + + + Super Robot Taisen Alpha (Japan) (v1.1) + 2000 + Banpresto + + + + + + + + + + Super Robot Taisen Alpha Gaiden - Premium Edition (Japan) + 2001 + Banpresto + + + + + + + + + + Super Robot Taisen Alpha Gaiden - Shokai Genteiban (Japan) + 2001 + Banpresto + + + + + + + + + + Super Robot Taisen Complete Box (Japan) + 1999 + Banpresto + + + + + + + + + + + + + + + Super Robot Taisen F (Japan) + 1998 + Banpresto + + + + + + + + + + Super Robot Taisen F Kanketsuhen (Japan) + 1999 + Banpresto + + + + + + + + Zanac X Zanac (Japan) + 2001 + Compile + + + + + + + diff --git a/scripts/src/machine.lua b/scripts/src/machine.lua index d254c010116..38017680f93 100644 --- a/scripts/src/machine.lua +++ b/scripts/src/machine.lua @@ -2196,6 +2196,18 @@ if (MACHINES["RF5C296"]~=null) then } end +--------------------------------------------------- +-- +--@src/devices/machine/ripple_counter.h,MACHINES["RIPPLE_COUNTER"] = true +--------------------------------------------------- + +if (MACHINES["RIPPLE_COUNTER"]~=null) then + files { + MAME_DIR .. "src/devices/machine/ripple_counter.cpp", + MAME_DIR .. "src/devices/machine/ripple_counter.h", + } +end + --------------------------------------------------- -- --@src/devices/machine/roc10937.h,MACHINES["ROC10937"] = true diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua index 85342ebe188..f0af50fd870 100644 --- a/scripts/target/mame/arcade.lua +++ b/scripts/target/mame/arcade.lua @@ -535,6 +535,7 @@ MACHINES["RA17XX"] = true --MACHINES["R64H156"] = true MACHINES["RF5C296"] = true --MACHINES["RIOT6532"] = true +MACHINES["RIPPLE_COUNTER"] = true MACHINES["ROC10937"] = true MACHINES["RP5C01"] = true MACHINES["RP5C15"] = true diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index ea2ee8ef9ec..03a80c4a6f0 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -524,6 +524,7 @@ MACHINES["PROM82S129"] = true MACHINES["R64H156"] = true MACHINES["RF5C296"] = true MACHINES["RIOT6532"] = true +MACHINES["RIPPLE_COUNTER"] = true MACHINES["ROC10937"] = true MACHINES["RP5C01"] = true MACHINES["RP5C15"] = true diff --git a/src/devices/bus/ss50/mpc.cpp b/src/devices/bus/ss50/mpc.cpp index 7f587d6bb62..8a1ac577a5e 100644 --- a/src/devices/bus/ss50/mpc.cpp +++ b/src/devices/bus/ss50/mpc.cpp @@ -13,6 +13,7 @@ #include "bus/rs232/rs232.h" #include "machine/6821pia.h" #include "machine/input_merger.h" +#include "machine/ripple_counter.h" //************************************************************************** // TYPE DEFINITIONS @@ -29,10 +30,8 @@ public: ss50_card_interface(mconfig, *this), m_pia(*this, "pia"), m_loopback(*this, "loopback"), + m_counter(*this, "counter"), m_baud_jumper(*this, "BAUD"), - m_cd4024ae_count(0), - m_cd4024ae_clock(false), - m_cd4024ae_reset(true), m_count_select(false) { } @@ -53,17 +52,13 @@ private: DECLARE_WRITE_LINE_MEMBER(serial_input_w); DECLARE_WRITE_LINE_MEMBER(reader_control_w); DECLARE_READ_LINE_MEMBER(count_r); - DECLARE_WRITE_LINE_MEMBER(count_reset_w); DECLARE_WRITE_LINE_MEMBER(count_select_w); - DECLARE_WRITE_LINE_MEMBER(clock_input_w); required_device m_pia; required_device m_loopback; + required_device m_counter; required_ioport m_baud_jumper; - u8 m_cd4024ae_count; - bool m_cd4024ae_clock; - bool m_cd4024ae_reset; bool m_count_select; }; @@ -113,7 +108,7 @@ MACHINE_CONFIG_MEMBER(ss50_mpc_device::device_add_mconfig) MCFG_PIA_READPB_HANDLER(IOPORT("STOP")) MCFG_DEVCB_BIT(6) MCFG_DEVCB_CHAIN_INPUT(READLINE(ss50_mpc_device, count_r)) MCFG_DEVCB_BIT(7) MCFG_PIA_WRITEPB_HANDLER(WRITELINE(ss50_mpc_device, count_select_w)) MCFG_DEVCB_BIT(2) - MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE(ss50_mpc_device, count_reset_w)) MCFG_DEVCB_BIT(0) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("counter", ripple_counter_device, reset_w)) MCFG_DEVCB_BIT(0) //MCFG_PIA_IRQA_HANDLER(WRITELINE(ss50_mpc_device, pia_irq_w)) //MCFG_PIA_IRQB_HANDLER(WRITELINE(ss50_mpc_device, pia_irq_w)) @@ -126,6 +121,9 @@ MACHINE_CONFIG_MEMBER(ss50_mpc_device::device_add_mconfig) MCFG_INPUT_MERGER_ANY_HIGH("loopback") MCFG_INPUT_MERGER_OUTPUT_HANDLER(DEVWRITELINE("outgate", input_merger_device, in_w<1>)) + + MCFG_DEVICE_ADD("counter", RIPPLE_COUNTER, 0) // CD4024AE (IC3) + MCFG_RIPPLE_COUNTER_STAGES(7) // only Q5 (÷32) and Q4 (÷16) are actually used MACHINE_CONFIG_END @@ -135,9 +133,6 @@ MACHINE_CONFIG_END void ss50_mpc_device::device_start() { - save_item(NAME(m_cd4024ae_count)); - save_item(NAME(m_cd4024ae_clock)); - save_item(NAME(m_cd4024ae_reset)); save_item(NAME(m_count_select)); } @@ -155,14 +150,7 @@ WRITE_LINE_MEMBER(ss50_mpc_device::reader_control_w) READ_LINE_MEMBER(ss50_mpc_device::count_r) { - return BIT(m_cd4024ae_count, m_count_select ? 4 : 3); -} - -WRITE_LINE_MEMBER(ss50_mpc_device::count_reset_w) -{ - m_cd4024ae_reset = bool(state); - if (state) - m_cd4024ae_count = 0; + return BIT(m_counter->count(), m_count_select ? 4 : 3); } WRITE_LINE_MEMBER(ss50_mpc_device::count_select_w) @@ -170,16 +158,6 @@ WRITE_LINE_MEMBER(ss50_mpc_device::count_select_w) m_count_select = bool(state); } -WRITE_LINE_MEMBER(ss50_mpc_device::clock_input_w) -{ - if (m_cd4024ae_clock != bool(state)) - { - m_cd4024ae_clock = bool(state); - if (!state && !m_cd4024ae_reset) - m_cd4024ae_count++; - } -} - //------------------------------------------------- // register_read - read from a port register @@ -202,13 +180,13 @@ WRITE8_MEMBER(ss50_mpc_device::register_write) WRITE_LINE_MEMBER(ss50_mpc_device::f110_w) { if (m_baud_jumper->read()) - clock_input_w(state); + m_counter->clock_w(state); } WRITE_LINE_MEMBER(ss50_mpc_device::f300_w) { if (!m_baud_jumper->read()) - clock_input_w(state); + m_counter->clock_w(state); } diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp index 15379c18d7b..dd6d86928e2 100644 --- a/src/devices/cpu/i386/i386.cpp +++ b/src/devices/cpu/i386/i386.cpp @@ -3788,59 +3788,59 @@ void i386_device::pentium_smi() m_smi_latched = false; // save state - WRITE32(m_cr[4], smram_state+SMRAM_IP5_CR4); - WRITE32(m_sreg[ES].limit, smram_state+SMRAM_IP5_ESLIM); - WRITE32(m_sreg[ES].base, smram_state+SMRAM_IP5_ESBASE); - WRITE32(m_sreg[ES].flags, smram_state+SMRAM_IP5_ESACC); - WRITE32(m_sreg[CS].limit, smram_state+SMRAM_IP5_CSLIM); - WRITE32(m_sreg[CS].base, smram_state+SMRAM_IP5_CSBASE); - WRITE32(m_sreg[CS].flags, smram_state+SMRAM_IP5_CSACC); - WRITE32(m_sreg[SS].limit, smram_state+SMRAM_IP5_SSLIM); - WRITE32(m_sreg[SS].base, smram_state+SMRAM_IP5_SSBASE); - WRITE32(m_sreg[SS].flags, smram_state+SMRAM_IP5_SSACC); - WRITE32(m_sreg[DS].limit, smram_state+SMRAM_IP5_DSLIM); - WRITE32(m_sreg[DS].base, smram_state+SMRAM_IP5_DSBASE); - WRITE32(m_sreg[DS].flags, smram_state+SMRAM_IP5_DSACC); - WRITE32(m_sreg[FS].limit, smram_state+SMRAM_IP5_FSLIM); - WRITE32(m_sreg[FS].base, smram_state+SMRAM_IP5_FSBASE); - WRITE32(m_sreg[FS].flags, smram_state+SMRAM_IP5_FSACC); - WRITE32(m_sreg[GS].limit, smram_state+SMRAM_IP5_GSLIM); - WRITE32(m_sreg[GS].base, smram_state+SMRAM_IP5_GSBASE); - WRITE32(m_sreg[GS].flags, smram_state+SMRAM_IP5_GSACC); - WRITE32(m_ldtr.flags, smram_state+SMRAM_IP5_LDTACC); - WRITE32(m_ldtr.limit, smram_state+SMRAM_IP5_LDTLIM); - WRITE32(m_ldtr.base, smram_state+SMRAM_IP5_LDTBASE); - WRITE32(m_gdtr.limit, smram_state+SMRAM_IP5_GDTLIM); - WRITE32(m_gdtr.base, smram_state+SMRAM_IP5_GDTBASE); - WRITE32(m_idtr.limit, smram_state+SMRAM_IP5_IDTLIM); - WRITE32(m_idtr.base, smram_state+SMRAM_IP5_IDTBASE); - WRITE32(m_task.limit, smram_state+SMRAM_IP5_TRLIM); - WRITE32(m_task.base, smram_state+SMRAM_IP5_TRBASE); - WRITE32(m_task.flags, smram_state+SMRAM_IP5_TRACC); + WRITE32(smram_state + SMRAM_IP5_CR4, m_cr[4]); + WRITE32(smram_state + SMRAM_IP5_ESLIM, m_sreg[ES].limit); + WRITE32(smram_state + SMRAM_IP5_ESBASE, m_sreg[ES].base); + WRITE32(smram_state + SMRAM_IP5_ESACC, m_sreg[ES].flags); + WRITE32(smram_state + SMRAM_IP5_CSLIM, m_sreg[CS].limit); + WRITE32(smram_state + SMRAM_IP5_CSBASE, m_sreg[CS].base); + WRITE32(smram_state + SMRAM_IP5_CSACC, m_sreg[CS].flags); + WRITE32(smram_state + SMRAM_IP5_SSLIM, m_sreg[SS].limit); + WRITE32(smram_state + SMRAM_IP5_SSBASE, m_sreg[SS].base); + WRITE32(smram_state + SMRAM_IP5_SSACC, m_sreg[SS].flags); + WRITE32(smram_state + SMRAM_IP5_DSLIM, m_sreg[DS].limit); + WRITE32(smram_state + SMRAM_IP5_DSBASE, m_sreg[DS].base); + WRITE32(smram_state + SMRAM_IP5_DSACC, m_sreg[DS].flags); + WRITE32(smram_state + SMRAM_IP5_FSLIM, m_sreg[FS].limit); + WRITE32(smram_state + SMRAM_IP5_FSBASE, m_sreg[FS].base); + WRITE32(smram_state + SMRAM_IP5_FSACC, m_sreg[FS].flags); + WRITE32(smram_state + SMRAM_IP5_GSLIM, m_sreg[GS].limit); + WRITE32(smram_state + SMRAM_IP5_GSBASE, m_sreg[GS].base); + WRITE32(smram_state + SMRAM_IP5_GSACC, m_sreg[GS].flags); + WRITE32(smram_state + SMRAM_IP5_LDTACC, m_ldtr.flags); + WRITE32(smram_state + SMRAM_IP5_LDTLIM, m_ldtr.limit); + WRITE32(smram_state + SMRAM_IP5_LDTBASE, m_ldtr.base); + WRITE32(smram_state + SMRAM_IP5_GDTLIM, m_gdtr.limit); + WRITE32(smram_state + SMRAM_IP5_GDTBASE, m_gdtr.base); + WRITE32(smram_state + SMRAM_IP5_IDTLIM, m_idtr.limit); + WRITE32(smram_state + SMRAM_IP5_IDTBASE, m_idtr.base); + WRITE32(smram_state + SMRAM_IP5_TRLIM, m_task.limit); + WRITE32(smram_state + SMRAM_IP5_TRBASE, m_task.base); + WRITE32(smram_state + SMRAM_IP5_TRACC, m_task.flags); - WRITE32(m_sreg[ES].selector, smram_state+SMRAM_ES); - WRITE32(m_sreg[CS].selector, smram_state+SMRAM_CS); - WRITE32(m_sreg[SS].selector, smram_state+SMRAM_SS); - WRITE32(m_sreg[DS].selector, smram_state+SMRAM_DS); - WRITE32(m_sreg[FS].selector, smram_state+SMRAM_FS); - WRITE32(m_sreg[GS].selector, smram_state+SMRAM_GS); - WRITE32(m_ldtr.segment, smram_state+SMRAM_LDTR); - WRITE32(m_task.segment, smram_state+SMRAM_TR); + WRITE32(smram_state + SMRAM_ES, m_sreg[ES].selector); + WRITE32(smram_state + SMRAM_CS, m_sreg[CS].selector); + WRITE32(smram_state + SMRAM_SS, m_sreg[SS].selector); + WRITE32(smram_state + SMRAM_DS, m_sreg[DS].selector); + WRITE32(smram_state + SMRAM_FS, m_sreg[FS].selector); + WRITE32(smram_state + SMRAM_GS, m_sreg[GS].selector); + WRITE32(smram_state + SMRAM_LDTR, m_ldtr.segment); + WRITE32(smram_state + SMRAM_TR, m_task.segment); - WRITE32(m_dr[7], smram_state+SMRAM_DR7); - WRITE32(m_dr[6], smram_state+SMRAM_DR6); - WRITE32(REG32(EAX), smram_state+SMRAM_EAX); - WRITE32(REG32(ECX), smram_state+SMRAM_ECX); - WRITE32(REG32(EDX), smram_state+SMRAM_EDX); - WRITE32(REG32(EBX), smram_state+SMRAM_EBX); - WRITE32(REG32(ESP), smram_state+SMRAM_ESP); - WRITE32(REG32(EBP), smram_state+SMRAM_EBP); - WRITE32(REG32(ESI), smram_state+SMRAM_ESI); - WRITE32(REG32(EDI), smram_state+SMRAM_EDI); - WRITE32(m_eip, smram_state+SMRAM_EIP); - WRITE32(old_flags, smram_state+SMRAM_EFLAGS); - WRITE32(m_cr[3], smram_state+SMRAM_CR3); - WRITE32(old_cr0, smram_state+SMRAM_CR0); + WRITE32(smram_state + SMRAM_DR7, m_dr[7]); + WRITE32(smram_state + SMRAM_DR6, m_dr[6]); + WRITE32(smram_state + SMRAM_EAX, REG32(EAX)); + WRITE32(smram_state + SMRAM_ECX, REG32(ECX)); + WRITE32(smram_state + SMRAM_EDX, REG32(EDX)); + WRITE32(smram_state + SMRAM_EBX, REG32(EBX)); + WRITE32(smram_state + SMRAM_ESP, REG32(ESP)); + WRITE32(smram_state + SMRAM_EBP, REG32(EBP)); + WRITE32(smram_state + SMRAM_ESI, REG32(ESI)); + WRITE32(smram_state + SMRAM_EDI, REG32(EDI)); + WRITE32(smram_state + SMRAM_EIP, m_eip); + WRITE32(smram_state + SMRAM_EFLAGS, old_flags); + WRITE32(smram_state + SMRAM_CR3, m_cr[3]); + WRITE32(smram_state + SMRAM_CR0, old_cr0); m_sreg[DS].selector = m_sreg[ES].selector = m_sreg[FS].selector = m_sreg[GS].selector = m_sreg[SS].selector = 0; m_sreg[DS].base = m_sreg[ES].base = m_sreg[FS].base = m_sreg[GS].base = m_sreg[SS].base = 0x00000000; diff --git a/src/devices/cpu/m6809/m6809.cpp b/src/devices/cpu/m6809/m6809.cpp index 521d4a113b7..0521b745414 100644 --- a/src/devices/cpu/m6809/m6809.cpp +++ b/src/devices/cpu/m6809/m6809.cpp @@ -92,6 +92,15 @@ March 2013 NPW: divider to the MC6809E and not to the MC6809; the confusion resulting from this error is in the process of being straightened out. + Maximum clock ratings: + + Q & E EXTAL + MC6809(E) 1.0 MHz 4.0 MHz + MC68A09(E) 1.5 MHz 6.0 MHz + MC68B09(E) 2.0 MHz 8.0 MHz + HD63B09(E) 2.0 MHz 8.0 MHz + HD63C09(E) 3.0 MHz 12.0 MHz + *****************************************************************************/ #include "emu.h" diff --git a/src/devices/machine/ripple_counter.cpp b/src/devices/machine/ripple_counter.cpp new file mode 100644 index 00000000000..ae38d342d68 --- /dev/null +++ b/src/devices/machine/ripple_counter.cpp @@ -0,0 +1,202 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + Generic binary ripple counter emulation + + This device emulates basic ripple counter logic ICs with falling- + edge clocks and a synchronous reset inputs such as CD4040 and + 74LS393. + + The optional 8-bit ROM interface is intended to help stream ROM + data to sound chips that lack memory interfaces of their own + (e.g. MSM5205, TMS5110). + +**********************************************************************/ + +#include "emu.h" +#include "machine/ripple_counter.h" + +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +// device type definition +DEFINE_DEVICE_TYPE(RIPPLE_COUNTER, ripple_counter_device, "ripple_counter", "Generic ripple counter") + + +//************************************************************************** +// RIPPLE COUNTER DEVICE +//************************************************************************** + +//------------------------------------------------- +// ripple_counter_device - constructor +//------------------------------------------------- + +ripple_counter_device::ripple_counter_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, RIPPLE_COUNTER, tag, owner, clock), + device_rom_interface(mconfig, *this, 0, ENDIANNESS_LITTLE, 8), + m_count_out_cb(*this), + m_rom_out_cb(*this), + m_count_timer(nullptr), + m_count_mask(0), + m_count(1), + m_clk(false), + m_reset(false) +{ +} + + +//------------------------------------------------- +// static_set_stages - configure the number of +// stages used to count +//------------------------------------------------- + +void ripple_counter_device::static_set_stages(device_t &device, u8 stages) +{ + auto &dev = downcast(device); + dev.m_count_mask = (1U << stages) - 1; + dev.set_rom_addr_width(stages); +} + + +//------------------------------------------------- +// memory_space_config - return a description of +// any address spaces owned by this device +//------------------------------------------------- + +device_memory_interface::space_config_vector ripple_counter_device::memory_space_config() const +{ + if (m_rom_out_cb.isnull()) + return space_config_vector(); + else + return device_rom_interface::memory_space_config(); +} + + +//------------------------------------------------- +// device_validity_check - validate a device after +// the configuration has been constructed +//------------------------------------------------- + +void ripple_counter_device::device_validity_check(validity_checker &valid) const +{ + if (m_count_mask == 0) + osd_printf_error("No counting stages configured\n"); +} + + +//------------------------------------------------- +// device_resolve_objects - resolve objects that +// may be needed for other devices to set +// initial conditions at start time +//------------------------------------------------- + +void ripple_counter_device::device_resolve_objects() +{ + // resolve callbacks + m_count_out_cb.resolve_safe(); + m_rom_out_cb.resolve(); +} + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void ripple_counter_device::device_start() +{ + // initialize timers + m_count_timer = timer_alloc(TIMER_COUNT); + + // register internal state + save_item(NAME(m_count)); + save_item(NAME(m_clk)); + save_item(NAME(m_reset)); +} + + +//------------------------------------------------- +// device_clock_changed - called when the +// device clock is altered in any way +//------------------------------------------------- + +void ripple_counter_device::device_clock_changed() +{ + attotime freq = m_reset ? attotime::never : clocks_to_attotime(1); + m_count_timer->adjust(freq, 0, freq); +} + + +//------------------------------------------------- +// rom_bank_updated - called when the ROM bank +// is changed +//------------------------------------------------- + +void ripple_counter_device::rom_bank_updated() +{ + m_rom_out_cb(read_byte(m_count)); +} + + +//------------------------------------------------- +// set_count - update the count and associated +// outputs +//------------------------------------------------- + +void ripple_counter_device::set_count(u32 count) +{ + m_count = count; + m_count_out_cb(count); + if (!m_rom_out_cb.isnull()) + m_rom_out_cb(read_byte(count)); +} + + +//------------------------------------------------- +// clock_w - handle falling-edge clock input +//------------------------------------------------- + +WRITE_LINE_MEMBER(ripple_counter_device::clock_w) +{ + if (m_clk != bool(state)) + { + m_clk = bool(state); + if (!state && !m_reset) + set_count((m_count + 1) & m_count_mask); + } +} + + +//------------------------------------------------- +// reset_w - handle active-high reset input +//------------------------------------------------- + +WRITE_LINE_MEMBER(ripple_counter_device::reset_w) +{ + if (m_reset != bool(state)) + { + m_reset = bool(state); + if (state && m_count != 0) + set_count(0); + + // stop or start the count timer as required + notify_clock_changed(); + } +} + + +//------------------------------------------------- +// device_timer - called whenever a device timer +// fires +//------------------------------------------------- + +void ripple_counter_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + switch (id) + { + case TIMER_COUNT: + set_count((m_count + 1) & m_count_mask); + break; + } +} diff --git a/src/devices/machine/ripple_counter.h b/src/devices/machine/ripple_counter.h new file mode 100644 index 00000000000..f9e997f3348 --- /dev/null +++ b/src/devices/machine/ripple_counter.h @@ -0,0 +1,92 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + Generic binary ripple counter emulation + +**********************************************************************/ + +#ifndef MAME_MACHINE_RIPPLE_COUNTER_H +#define MAME_MACHINE_RIPPLE_COUNTER_H + +#pragma once + +//************************************************************************** +// CONFIGURATION MACROS +//************************************************************************** + +#define MCFG_RIPPLE_COUNTER_STAGES(_stages) \ + ripple_counter_device::static_set_stages(*device, _stages); + +// output callbacks +#define MCFG_RIPPLE_COUNTER_COUNT_OUT_CB(_devcb) \ + devcb = &ripple_counter_device::static_set_count_out_cb(*device, DEVCB_##_devcb); +#define MCFG_RIPPLE_COUNTER_ROM_OUT_CB(_devcb) \ + devcb = &ripple_counter_device::static_set_rom_out_cb(*device, DEVCB_##_devcb); + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> ripple_counter_device + +class ripple_counter_device : public device_t, public device_rom_interface +{ +public: + // construction/destruction + ripple_counter_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + + // static configuration + static void static_set_stages(device_t &device, u8 stages); + template static devcb_base &static_set_count_out_cb(device_t &device, Object &&cb) + { return downcast(device).m_count_out_cb.set_callback(std::forward(cb)); } + template static devcb_base &static_set_rom_out_cb(device_t &device, Object &&cb) + { return downcast(device).m_rom_out_cb.set_callback(std::forward(cb)); } + + // control line handlers + DECLARE_WRITE_LINE_MEMBER(clock_w); + DECLARE_WRITE_LINE_MEMBER(reset_w); + + // getters + u32 count() const { return m_count; } + +protected: + // device-level overrides + virtual void device_validity_check(validity_checker &valid) const override; + virtual void device_resolve_objects() override; + virtual void device_start() override; + virtual void device_clock_changed() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + + // device_rom_interface overrides + virtual space_config_vector memory_space_config() const override; + virtual void rom_bank_updated() override; + +private: + // internal helpers + void set_count(u32 count); + + // device callbacks + devcb_write32 m_count_out_cb; + devcb_write8 m_rom_out_cb; + + // device timers + enum + { + TIMER_COUNT + }; + emu_timer *m_count_timer; + + // configuration parameters + u32 m_count_mask; + + // running state + u32 m_count; + bool m_clk; + bool m_reset; +}; + +// device type definition +DECLARE_DEVICE_TYPE(RIPPLE_COUNTER, ripple_counter_device) + +#endif // MAME_MACHINE_RIPPLE_COUNTER_H diff --git a/src/devices/machine/vrc5074.cpp b/src/devices/machine/vrc5074.cpp index 8471d631c47..9959a60f06e 100644 --- a/src/devices/machine/vrc5074.cpp +++ b/src/devices/machine/vrc5074.cpp @@ -236,7 +236,7 @@ void vrc5074_device::device_start() // Save states // m_sdram save_item(NAME(m_sdram[0])); - save_item(NAME(m_sdram[1])); + if (m_sdram_size[1]) save_item(NAME(m_sdram[1])); save_item(NAME(m_cpu_regs)); save_item(NAME(m_nile_irq_state)); save_item(NAME(m_sdram_addr)); diff --git a/src/emu/dirom.cpp b/src/emu/dirom.cpp index 3a0ed23692f..87461926cf6 100644 --- a/src/emu/dirom.cpp +++ b/src/emu/dirom.cpp @@ -4,7 +4,9 @@ device_rom_interface::device_rom_interface(const machine_config &mconfig, device_t &device, u8 addrwidth, endianness_t endian, u8 datawidth) : device_memory_interface(mconfig, device), m_rom_tag(device.basetag()), - m_rom_config("rom", endian, datawidth, addrwidth) + m_rom_config("rom", endian, datawidth, addrwidth), + m_bank(nullptr), + m_cur_bank(-1) { } @@ -42,12 +44,14 @@ void device_rom_interface::set_rom_bank(int bank) bank = bank % m_bank_count; } - m_cur_bank = bank; - m_bank->set_entry(bank); - rom_bank_updated(); + if (m_cur_bank != bank) { + m_cur_bank = bank; + m_bank->set_entry(bank); + rom_bank_updated(); + } } -void device_rom_interface::reset_bank() +void device_rom_interface::interface_post_load() { if(m_bank) m_bank->set_entry(m_cur_bank); @@ -85,12 +89,12 @@ void device_rom_interface::set_rom(const void *base, u32 size) void device_rom_interface::interface_pre_start() { + if(!has_space(0)) + return; + m_rom_direct = space().direct<0>(); - m_bank = nullptr; - m_cur_bank = -1; device().save_item(NAME(m_cur_bank)); device().save_item(NAME(m_bank_count)); - device().machine().save().register_postload(save_prepost_delegate(FUNC(device_rom_interface::reset_bank), this)); if(!has_configured_map(0)) { memory_region *reg = device().owner()->memregion(m_rom_tag); diff --git a/src/emu/dirom.h b/src/emu/dirom.h index 2ea7edca810..aae6a7f5097 100644 --- a/src/emu/dirom.h +++ b/src/emu/dirom.h @@ -38,24 +38,22 @@ public: protected: virtual void rom_bank_updated() = 0; + virtual space_config_vector memory_space_config() const override; + + void set_rom_endianness(endianness_t endian) { assert(!device().configured()); m_rom_config.m_endianness = endian; } + void set_rom_data_width(u8 width) { assert(!device().configured()); m_rom_config.m_data_width = width; } + void set_rom_addr_width(u8 width) { assert(!device().configured()); m_rom_config.m_addr_width = m_rom_config.m_logaddr_width = width; } private: const char *m_rom_tag; - const address_space_config m_rom_config; + address_space_config m_rom_config; direct_read_data<0> *m_rom_direct; memory_bank *m_bank; int m_cur_bank, m_bank_count; - virtual space_config_vector memory_space_config() const override; virtual void interface_pre_start() override; - - DECLARE_READ8_MEMBER(z8_r); - DECLARE_READ16_MEMBER(z16_r); - DECLARE_READ32_MEMBER(z32_r); - DECLARE_READ64_MEMBER(z64_r); - - void reset_bank(); + virtual void interface_post_load() override; }; #endif // MAME_EMU_DIROM_H diff --git a/src/mame/drivers/cortex.cpp b/src/mame/drivers/cortex.cpp index 8c31f35eeb9..6281b1e88aa 100644 --- a/src/mame/drivers/cortex.cpp +++ b/src/mame/drivers/cortex.cpp @@ -16,21 +16,24 @@ of another TI or the Geneve. Chips: TMS9995 - CPU TMS9929 - Video -TMS9911 - DMA to floppy (not emulated) -TMS9909 - Floppy Disk Controller (not emulated) -TMS9902 - UART (x2) (not usable with rs232.h) +TMS9911 - DMA to floppy (unemulated device) +TMS9909 - Floppy Disk Controller (unemulated device) +TMS9902 - UART (x2) (device not usable with rs232.h) AY-5-2376 - Keyboard controller All input to be in uppercase. Note that "lowercase" is just smaller uppercase, and is not acceptable as input. +There's no option in BASIC to produce sound. It will beep if an invalid key +(usually a control key) is pressed. + +To clear the screen press Ctrl L. ToDo: -- Screen corrupts when scrolling - Unemulated devices +- Cassette - Keyboard to use AY device -- Banking -- Memory manager device +- Memory mapping unit (74LS610) - Various CRU I/O Note that the MAME implementation of CRU addresses is not the same as real @@ -48,6 +51,8 @@ packed into a single address-byte (CRU 0 = bit 0, etc). So the address is #include "video/tms9928a.h" //#include "machine/tms9902.h" #include "machine/keyboard.h" +#include "sound/beep.h" +#include "speaker.h" class cortex_state : public driver_device { @@ -55,27 +60,34 @@ public: cortex_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") - , m_p_ram(*this, "ram") + , m_beep(*this, "beeper") + , m_io_dsw(*this, "DSW") { } void kbd_put(u8 data); DECLARE_WRITE_LINE_MEMBER(keyboard_ack_w); + DECLARE_WRITE_LINE_MEMBER(romsw_w); + DECLARE_WRITE_LINE_MEMBER(vdp_int_w); DECLARE_READ8_MEMBER(pio_r); DECLARE_READ8_MEMBER(keyboard_r); + DECLARE_DRIVER_INIT(init); private: - bool m_cru0005; + bool m_kbd_ack; + bool m_vdp_int; uint8_t m_term_data; virtual void machine_reset() override; required_device m_maincpu; - required_shared_ptr m_p_ram; + required_device m_beep; + required_ioport m_io_dsw; }; static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, cortex_state ) - AM_RANGE(0x0000, 0xefff) AM_RAM AM_SHARE("ram") + AM_RANGE(0x0000, 0x7fff) AM_READ_BANK("bankr0") AM_WRITE_BANK("bankw0") + AM_RANGE(0x8000, 0xefff) AM_RAM AM_RANGE(0xf100, 0xf11f) AM_RAM // memory mapping unit - AM_RANGE(0xf120, 0xf120) AM_DEVREADWRITE("tms9928a", tms9928a_device, vram_read, vram_write) - AM_RANGE(0xf121, 0xf121) AM_DEVREADWRITE("tms9928a", tms9928a_device, register_read, register_write) + AM_RANGE(0xf120, 0xf120) AM_DEVREADWRITE("crtc", tms9928a_device, vram_read, vram_write) + AM_RANGE(0xf121, 0xf121) AM_DEVREADWRITE("crtc", tms9928a_device, register_read, register_write) //AM_RANGE(0xf140, 0xf147) // fdc tms9909 ADDRESS_MAP_END @@ -84,24 +96,31 @@ static ADDRESS_MAP_START( io_map, AS_IO, 8, cortex_state ) AM_RANGE(0x0000, 0x0007) AM_MIRROR(0x18) AM_DEVWRITE("control", ls259_device, write_d0) AM_RANGE(0x0000, 0x0000) AM_READ(pio_r) AM_RANGE(0x0001, 0x0001) AM_READ(keyboard_r) - // read ranges are incorrect - should be 1/8th of current values. - //AM_RANGE(0x0080, 0x00bf) AM_DEVREADWRITE("uart1", tms9902_device, cruread, cruwrite) // RS232 - //AM_RANGE(0x0180, 0x01bf) AM_DEVREADWRITE("uart2", tms9902_device, cruread, cruwrite) // Cassette - //AM_RANGE(0x01c0, 0x01ff) // DMA controller - TMS9911 - //AM_RANGE(0x0800, 0x080f) AM_WRITE(cent_data_w) - //AM_RANGE(0x0810, 0x0811) AM_WRITE(cent_strobe_w) - //AM_RANGE(0x0812, 0x0813) AM_READ(cent_stat_r) - //AM_RANGE(0x1ee0, 0x1eef) AM_READWRITE(cpu_int_r,cpu_int_w) - //AM_RANGE(0x1fda, 0x1fdb) AM_READWRITE(cpu_int1_r,cpu_int1_w) + //AM_RANGE(0x0040, 0x005f) AM_DEVWRITE("uart1", tms9902_device, cruwrite) // RS232 (r12 = 80-bf) + //AM_RANGE(0x0008, 0x000b) AM_DEVREAD("uart1", tms9902_device, cruread) // RS232 + //AM_RANGE(0x00c0, 0x00df) AM_DEVWRITE("uart2", tms9902_device, cruwrite) // Cassette (r12 = 180-1bf) + //AM_RANGE(0x0018, 0x001b) AM_DEVREAD("uart2", tms9902_device, cruread) // Cassette + //AM_RANGE(0x00e0, 0x00ff) AM_WRITE("dma", tms9911_device, write) // r12 = 1c0-1fe + //AM_RANGE(0x001c, 0x001f) AM_READ("dma", tms9911_device, read) // if reading is needed + //AM_RANGE(0x0400, 0x0407) AM_WRITE(cent_data_w) // r12 = 800-80e + //AM_RANGE(0x0408, 0x0408) AM_WRITE(cent_strobe_w) // r12 = 810 + //AM_RANGE(0x0081, 0x0081) AM_READ(cent_stat_r) // CRU 409 (r12 = 812) ADDRESS_MAP_END /* Input ports */ static INPUT_PORTS_START( cortex ) + PORT_START("DSW") + PORT_DIPNAME( 0x04, 0x00, "DISK SIZE") + PORT_DIPSETTING( 0x04, "20cm") + PORT_DIPSETTING( 0x00, "13cm") + PORT_DIPNAME( 0x08, 0x08, "DISK DENSITY") + PORT_DIPSETTING( 0x08, "Double") + PORT_DIPSETTING( 0x00, "Single") INPUT_PORTS_END READ8_MEMBER( cortex_state::pio_r ) { - return (m_cru0005 ? 0x20 : 0) | 0xdf; + return (m_kbd_ack ? 0x20 : 0) | (m_vdp_int ? 0x40 : 0) | m_io_dsw->read() | 0x93; } READ8_MEMBER( cortex_state::keyboard_r ) @@ -114,25 +133,46 @@ WRITE_LINE_MEMBER( cortex_state::keyboard_ack_w ) if (!state) { m_maincpu->set_input_line(INT_9995_INT4, CLEAR_LINE); - m_cru0005 = 1; + m_kbd_ack = 1; } } +WRITE_LINE_MEMBER( cortex_state::romsw_w ) +{ + membank("bankr0")->set_entry(state ? 0 : 1); +} + +WRITE_LINE_MEMBER( cortex_state::vdp_int_w ) +{ + m_vdp_int = state ? 0 : 1; // change polarity to match mame +} + void cortex_state::kbd_put(u8 data) { m_term_data = data; - m_cru0005 = 0; + m_kbd_ack = 0; m_maincpu->set_input_line(INT_9995_INT4, ASSERT_LINE); } void cortex_state::machine_reset() { - m_cru0005 = 1; - uint8_t* ROM = memregion("maincpu")->base(); - memcpy(m_p_ram, ROM, 0x6000); + m_kbd_ack = 1; + m_vdp_int = 0; + m_beep->set_state(0); + membank("bankr0")->set_entry(1); // point at rom + membank("bankw0")->set_entry(0); // always write to ram m_maincpu->ready_line(ASSERT_LINE); } +DRIVER_INIT_MEMBER( cortex_state, init ) +{ + uint8_t *main = memregion("maincpu")->base(); + + membank("bankr0")->configure_entry(1, &main[0x10000]); + membank("bankr0")->configure_entry(0, &main[0x00000]); + membank("bankw0")->configure_entry(0, &main[0x00000]); +} + static MACHINE_CONFIG_START( cortex ) /* basic machine hardware */ /* TMS9995 CPU @ 12.0 MHz */ @@ -146,35 +186,42 @@ static MACHINE_CONFIG_START( cortex ) //MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cortex_state, ebus_int_ack_w)) //MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cortex_state, ebus_to_en_w)) //MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cortex_state, disk_size_w)) - //MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(cortex_state, eprom_on_off_w)) - //MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(cortex_state, bell_en_w)) + MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(cortex_state, romsw_w)) + MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(DEVWRITELINE("beeper", beep_device, set_state)) /* video hardware */ - MCFG_DEVICE_ADD( "tms9928a", TMS9929A, XTAL_10_738635MHz / 2 ) + MCFG_DEVICE_ADD( "crtc", TMS9929A, XTAL_10_738635MHz / 2 ) + MCFG_TMS9928A_OUT_INT_LINE_CB(INPUTLINE("maincpu", INT_9995_INT1)) + MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE(cortex_state, vdp_int_w)) MCFG_TMS9928A_VRAM_SIZE(0x4000) MCFG_TMS9928A_SCREEN_ADD_PAL( "screen" ) - MCFG_SCREEN_UPDATE_DEVICE( "tms9928a", tms9928a_device, screen_update ) + MCFG_SCREEN_UPDATE_DEVICE( "crtc", tms9928a_device, screen_update ) MCFG_DEVICE_ADD("keyboard", GENERIC_KEYBOARD, 0) MCFG_GENERIC_KEYBOARD_CB(PUT(cortex_state, kbd_put)) //MCFG_DEVICE_ADD("uart1", TMS9902, XTAL_12MHz / 4) //MCFG_DEVICE_ADD("uart2", TMS9902, XTAL_12MHz / 4) + + /* Sound */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("beeper", BEEP, 950) // guess + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.05) MACHINE_CONFIG_END /* ROM definition */ ROM_START( cortex ) - ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF ) + ROM_REGION( 0x18000, "maincpu", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS(0, "basic", "Cortex Bios") - ROMX_LOAD( "cortex.ic47", 0x0000, 0x2000, CRC(bdb8c7bd) SHA1(340829dcb7a65f2e830fd5aff82a312e3ed7918f), ROM_BIOS(1)) - ROMX_LOAD( "cortex.ic46", 0x2000, 0x2000, CRC(4de459ea) SHA1(00a42fe556d4ffe1f85b2ce369f544b07fbd06d9), ROM_BIOS(1)) - ROMX_LOAD( "cortex.ic45", 0x4000, 0x2000, CRC(b0c9b6e8) SHA1(4e20c3f0b7546b803da4805cd3b8616f96c3d923), ROM_BIOS(1)) + ROMX_LOAD( "cortex.ic47", 0x10000, 0x2000, CRC(bdb8c7bd) SHA1(340829dcb7a65f2e830fd5aff82a312e3ed7918f), ROM_BIOS(1)) + ROMX_LOAD( "cortex.ic46", 0x12000, 0x2000, CRC(4de459ea) SHA1(00a42fe556d4ffe1f85b2ce369f544b07fbd06d9), ROM_BIOS(1)) + ROMX_LOAD( "cortex.ic45", 0x14000, 0x2000, CRC(b0c9b6e8) SHA1(4e20c3f0b7546b803da4805cd3b8616f96c3d923), ROM_BIOS(1)) ROM_SYSTEM_BIOS(1, "forth", "FIG-Forth") - ROMX_LOAD( "forth.ic47", 0x0000, 0x2000, CRC(999034be) SHA1(0dcc7404c38aa0ae913101eb0aa98da82104b5d4), ROM_BIOS(2)) - ROMX_LOAD( "forth.ic46", 0x2000, 0x2000, CRC(8eca54cc) SHA1(0f1680e941ef60bb9bde9a4b843b78f30dff3202), ROM_BIOS(2)) + ROMX_LOAD( "forth.ic47", 0x10000, 0x2000, CRC(999034be) SHA1(0dcc7404c38aa0ae913101eb0aa98da82104b5d4), ROM_BIOS(2)) + ROMX_LOAD( "forth.ic46", 0x12000, 0x2000, CRC(8eca54cc) SHA1(0f1680e941ef60bb9bde9a4b843b78f30dff3202), ROM_BIOS(2)) ROM_END /* Driver */ // YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS -COMP( 1982, cortex, 0, 0, cortex, cortex, cortex_state, 0, "Powertran Cybernetics", "Cortex", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) +COMP( 1982, cortex, 0, 0, cortex, cortex, cortex_state, init, "Powertran Cybernetics", "Cortex", MACHINE_NOT_WORKING ) diff --git a/src/mame/drivers/esq1.cpp b/src/mame/drivers/esq1.cpp index eb3aac72dbe..9b975c7679a 100644 --- a/src/mame/drivers/esq1.cpp +++ b/src/mame/drivers/esq1.cpp @@ -57,6 +57,7 @@ TODO: - Keyboard - Analog filters and VCA on the back end of the 5503 - SQ-80 support (additional banking, FDC) + SQ-80 is totally broken now, jumping into unmapped memory NOTES: Commands from KPC are all 2 bytes diff --git a/src/mame/drivers/gticlub.cpp b/src/mame/drivers/gticlub.cpp index 8deb21c4696..985218b3126 100644 --- a/src/mame/drivers/gticlub.cpp +++ b/src/mame/drivers/gticlub.cpp @@ -1500,8 +1500,8 @@ GAME( 1996, gticlub, 0, gticlub, gticlub, gticlub_state, gticlub, R GAME( 1996, gticlubu, gticlub, gticlub, gticlub, gticlub_state, gticlub, ROT0, "Konami", "GTI Club (ver UAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1996, gticluba, gticlub, gticlub, gticlub, gticlub_state, gticlub, ROT0, "Konami", "GTI Club (ver AAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1996, gticlubj, gticlub, gticlub, gticlub, gticlub_state, gticlub, ROT0, "Konami", "GTI Club (ver JAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) -GAME( 1996, thunderh, 0, thunderh, thunderh, gticlub_state, gticlub, ROT0, "Konami", "Operation Thunder Hurricane (ver EAA)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) -GAME( 1996, thunderhu, thunderh, thunderh, thunderh, gticlub_state, gticlub, ROT0, "Konami", "Operation Thunder Hurricane (ver UAA)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) +GAME( 1997, thunderh, 0, thunderh, thunderh, gticlub_state, gticlub, ROT0, "Konami", "Operation Thunder Hurricane (ver EAA)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) +GAME( 1997, thunderhu, thunderh, thunderh, thunderh, gticlub_state, gticlub, ROT0, "Konami", "Operation Thunder Hurricane (ver UAA)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) GAME( 1997, slrasslt, 0, slrasslt, slrasslt, gticlub_state, gticlub, ROT0, "Konami", "Solar Assault (ver UAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) // Based on Revised code GAME( 1997, slrassltj, slrasslt, slrasslt, slrasslt, gticlub_state, gticlub, ROT0, "Konami", "Solar Assault Revised (ver JAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1997, slrassltj1, slrasslt, slrasslt, slrasslt, gticlub_state, gticlub, ROT0, "Konami", "Solar Assault (ver JAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) diff --git a/src/mame/drivers/ironhors.cpp b/src/mame/drivers/ironhors.cpp index 209bbe35b73..29e7a6703fb 100644 --- a/src/mame/drivers/ironhors.cpp +++ b/src/mame/drivers/ironhors.cpp @@ -368,7 +368,9 @@ M6809E runs at 1.532mhz ( NOT 3.072mhz) Vsync is 61hz -These clocks make the emulation run too fast. Real hardware video: http://d.hatena.ne.jp/video/niconico/sm3842410 +Hsync is 15,56khz + +These clocks make the emulation run too fast. */ static MACHINE_CONFIG_START( ironhors ) diff --git a/src/mame/drivers/megasys1.cpp b/src/mame/drivers/megasys1.cpp index a86dc50fc0d..023c5708e0c 100644 --- a/src/mame/drivers/megasys1.cpp +++ b/src/mame/drivers/megasys1.cpp @@ -1106,6 +1106,49 @@ static INPUT_PORTS_START( kazan ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) INPUT_PORTS_END +static INPUT_PORTS_START( inyourfa ) + PORT_INCLUDE( megasys1_generic ) + + PORT_START("DSW") + PORT_DIPNAME( 0x0003, 0x0003, "Game Time" ) PORT_DIPLOCATION("SW1:1,2") + PORT_DIPSETTING( 0x0002, "00:50" ) + PORT_DIPSETTING( 0x0001, "01:00" ) + PORT_DIPSETTING( 0x0003, "01:10" ) + PORT_DIPSETTING( 0x0000, "01:20" ) + PORT_DIPUNKNOWN_DIPLOC( 0x0004, 0x0004, "SW1:3" ) + PORT_DIPUNKNOWN_DIPLOC( 0x0008, 0x0008, "SW1:4" ) + PORT_DIPUNKNOWN_DIPLOC( 0x0010, 0x0010, "SW1:5" ) + PORT_DIPUNKNOWN_DIPLOC( 0x0020, 0x0020, "SW1:6" ) + PORT_DIPUNKNOWN_DIPLOC( 0x0040, 0x0040, "SW1:7" ) + PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:8") + PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0700, 0x0700, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW2:1,2,3") + PORT_DIPSETTING( 0x0400, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x0200, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x0700, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x0300, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x0500, DEF_STR( 1C_3C ) ) + PORT_DIPSETTING( 0x0100, DEF_STR( 1C_4C ) ) + PORT_DIPSETTING( 0x0600, DEF_STR( 1C_5C ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( Free_Play ) ) + PORT_DIPNAME( 0x3800, 0x3800, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:4,5,6") + PORT_DIPSETTING( 0x0000, DEF_STR( 4C_1C ) ) + PORT_DIPSETTING( 0x2000, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x1000, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x3800, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x1800, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x2800, DEF_STR( 1C_3C ) ) + PORT_DIPSETTING( 0x0800, DEF_STR( 1C_4C ) ) + PORT_DIPSETTING( 0x3000, DEF_STR( 1C_5C ) ) + PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:7") + PORT_DIPSETTING( 0x4000, DEF_STR( On ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) + PORT_DIPNAME( 0x8000, 0x8000, "Freeze Screen (Cheat)") PORT_DIPLOCATION("SW2:8") + PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) +INPUT_PORTS_END + static INPUT_PORTS_START( jitsupro ) PORT_INCLUDE( hachoo ) @@ -2989,6 +3032,52 @@ ROM_START( iganinju ) ROM_LOAD( "iga.131", 0x0000, 0x0200, CRC(1d877538) SHA1(a5be0dc65dcfc36fbba10d1fddbe155e24b6122f) ) ROM_END +ROM_START( inyourfa ) + ROM_REGION( 0x60000, "maincpu", 0 ) /* Main CPU Code */ + ROM_LOAD16_BYTE( "02.27C1001", 0x000000, 0x020000, CRC(ae77e5b7) SHA1(222e1f4c3d82cdedb88ec524ea11500145bc8c87) ) + ROM_LOAD16_BYTE( "01.27C1001", 0x000001, 0x020000, CRC(e5ea92ef) SHA1(0afcaa1451572aee7486b76c21bdd4617d2b25d2) ) + ROM_LOAD16_BYTE( "03.27C512", 0x040000, 0x010000, CRC(a1efe9be) SHA1(3f49c337f0cd8634d0049c80631e32ea887d8fef) ) + ROM_LOAD16_BYTE( "04.27C512", 0x040001, 0x010000, CRC(f786cf3e) SHA1(83de4e679e34bbd2bdad62f2c3b707cf032942b5) ) + + ROM_REGION( 0x20000, "audiocpu", 0 ) /* Sound CPU Code */ + ROM_LOAD16_BYTE( "05.27C512", 0x000000, 0x010000, CRC(1737ed64) SHA1(20be59c43d7975fcc5048f1ee9ed5af893bdef85) ) + ROM_LOAD16_BYTE( "06.27C512", 0x000001, 0x010000, CRC(9f12bcb9) SHA1(7c5faf6a295b2124e16823f50e57b234b6127a38) ) + + ROM_REGION( 0x1000, "mcu", 0 ) /* M50747 MCU Code */ + ROM_LOAD( "m50747", 0x0000, 0x1000, NO_DUMP ) + + ROM_REGION( 0x080000, "scroll0", 0 ) /* Scroll 0 */ + ROM_LOAD( "11.27C1001", 0x000000, 0x020000, CRC(451a1428) SHA1(c017ef4dd3dffd26a93f5b926d80fd5e7bd7dea1) ) + ROM_LOAD( "12.27C1001", 0x020000, 0x020000, CRC(9ead7432) SHA1(0690b640ebe9d1461f44040a33236705a303dc7e) ) + ROM_LOAD( "13.27C1001", 0x040000, 0x020000, CRC(7e39842a) SHA1(00a4c86e8ef6e8e20d8f01eccd7d37f46be5f904) ) + ROM_LOAD( "14.27C1001", 0x060000, 0x020000, CRC(a91a3569) SHA1(0e530cdc0cf5ff0db589fb644c2181d35701fb2e) ) + + ROM_REGION( 0x080000, "scroll1", 0 ) /* Scroll 1 */ + ROM_LOAD( "15.27C1001", 0x000000, 0x020000, CRC(420081b6) SHA1(02fedf7bc18a1b8f12b4e549a910801c0e315a32) ) + ROM_LOAD( "16.27C1001", 0x020000, 0x020000, CRC(87b1a582) SHA1(75a8762041cbd72fad821083ce9ea65474e4b2c8) ) + ROM_LOAD( "17.27C1001", 0x040000, 0x020000, CRC(00857146) SHA1(1a2e6ac6efbec4a825525933b92de933233ad3b2) ) + ROM_FILL ( 0x60000, 0x20000, 0xff )// 18? not populated? + + ROM_REGION( 0x020000, "scroll2", 0 ) /* Scroll 2 */ + ROM_LOAD( "19.27C1001", 0x000000, 0x020000, CRC(b82c94ec) SHA1(cf83355fb8941cf4332b764bb7de01d4c2aead21) ) + + ROM_REGION( 0x080000, "sprites", 0 ) /* Sprites */ + ROM_LOAD( "20.27C1001", 0x000000, 0x020000, CRC(4a322d18) SHA1(17a514e50da13bbcbecfbe186bc99c5383eefd38) ) + ROM_LOAD( "21.27C1001", 0x020000, 0x020000, CRC(7bb4b35d) SHA1(001ef590a5245126182ab7af54bc1c56012ab218) ) + ROM_LOAD( "22.27C1001", 0x040000, 0x020000, CRC(1dc040d2) SHA1(bda3a441a20f253b67ca646d71d3703a8c59e210) ) + ROM_LOAD( "23.27C1001", 0x060000, 0x020000, CRC(50478530) SHA1(a17b8fdba4fbcbb2d0b715d5cfb2192edbf5a457) ) + + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ + ROM_LOAD( "09.27C1001", 0x000000, 0x020000, CRC(27f4bfb4) SHA1(36c8c8b73f26d812711403135a8210af520efb66) ) + ROM_LOAD( "10.27C1001", 0x020000, 0x020000, CRC(cf5430ff) SHA1(8d0b1ab9c25312a65fa534a758f7f3ab01b3b593) ) + + ROM_REGION( 0x040000, "oki2", 0 ) /* Samples */ + ROM_LOAD( "07.27C1001", 0x000000, 0x020000, CRC(dc254c7c) SHA1(4daed57c5603bd021f9effb228a4d40b569f72d4) ) + ROM_LOAD( "08.27C1001", 0x020000, 0x020000, CRC(cadd4731) SHA1(1c4e7ea7064b9c6b2dfdf01fd64f37de6d50bdfa) ) // 11xxxxxxxxxxxxxxx = 0xFF + + ROM_REGION( 0x0200, "proms", 0 ) /* Priority PROM */ + ROM_LOAD( "kazan.14m", 0x0000, 0x0200, BAD_DUMP CRC(85b30ac4) SHA1(b03f577ceb0f26b67453ffa52ef61fea76a93184) ) // wasn't dumped, this is wrong, might need to be handcrafted +ROM_END /*************************************************************************** @@ -4734,6 +4823,7 @@ GAME( 1990, rittam, rodland, system_A, rodland, megasys1_state, rit GAME( 1990, rodlandjb,rodland, system_A, rodland, megasys1_state, rodlandjb,ROT0, "bootleg","Rod-Land (Japan bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1990, phantasm, avspirit, system_A, phantasm, megasys1_state, phantasm, ROT0, "Jaleco", "Phantasm (Japan)", MACHINE_SUPPORTS_SAVE ) GAME( 1991, edfp, edf, system_A, edfp, megasys1_state, edfp, ROT0, "Jaleco", "E.D.F. : Earth Defense Force (Japan, prototype)", MACHINE_SUPPORTS_SAVE ) +GAME( 1991, inyourfa, 0, system_A, inyourfa, megasys1_state, iganinju, ROT0, "Jaleco", "In Your Face (World, prototype)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) // priorities aren't correct GAME( 1992, soldam, 0, system_A_soldam, soldam, megasys1_state, soldam, ROT0, "Jaleco", "Soldam", MACHINE_SUPPORTS_SAVE ) GAME( 1992, soldamj, soldam, system_A_soldam, soldam, megasys1_state, soldamj, ROT0, "Jaleco", "Soldam (Japan)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/mermaid.cpp b/src/mame/drivers/mermaid.cpp index 2ab899f4d38..eaf4c46fc59 100644 --- a/src/mame/drivers/mermaid.cpp +++ b/src/mame/drivers/mermaid.cpp @@ -180,21 +180,22 @@ ADDRESS_MAP_END WRITE_LINE_MEMBER(mermaid_state::rougien_sample_rom_lo_w) { m_adpcm_rom_sel = state | (m_adpcm_rom_sel & 2); + m_adpcm_counter->set_rom_bank(m_adpcm_rom_sel); } WRITE_LINE_MEMBER(mermaid_state::rougien_sample_rom_hi_w) { m_adpcm_rom_sel = (state <<1) | (m_adpcm_rom_sel & 1); + m_adpcm_counter->set_rom_bank(m_adpcm_rom_sel); } WRITE_LINE_MEMBER(mermaid_state::rougien_sample_playback_w) { if (state) { - m_adpcm_pos = m_adpcm_rom_sel*0x1000; - m_adpcm_end = m_adpcm_pos+0x1000; m_adpcm_idle = 0; m_adpcm->reset_w(0); + m_adpcm_counter->reset_w(0); } } @@ -366,13 +367,10 @@ void mermaid_state::machine_start() save_item(NAME(m_rougien_gfxbank2)); save_item(NAME(m_ay8910_enable)); - save_item(NAME(m_adpcm_pos)); - save_item(NAME(m_adpcm_end)); save_item(NAME(m_adpcm_idle)); save_item(NAME(m_adpcm_data)); save_item(NAME(m_adpcm_trigger)); save_item(NAME(m_adpcm_rom_sel)); - save_item(NAME(m_adpcm_play_reg)); } void mermaid_state::machine_reset() @@ -387,33 +385,32 @@ void mermaid_state::machine_reset() m_adpcm_idle = 1; m_adpcm_rom_sel = 0; - m_adpcm_play_reg = 0; + m_adpcm->reset_w(1); + m_adpcm_counter->reset_w(1); + m_adpcm_trigger = 0; + m_adpcm_data = 0; } /* Similar to Jantotsu, apparently the HW has three ports that controls what kind of sample should be played. Every sample size is 0x1000. */ +WRITE8_MEMBER(mermaid_state::adpcm_data_w) +{ + m_adpcm_data = data; + m_adpcm->data_w(m_adpcm_trigger ? (data & 0x0f) : (data & 0xf0) >> 4); +} + WRITE_LINE_MEMBER(mermaid_state::rougien_adpcm_int) { -// popmessage("%08x",m_adpcm_pos); + if (!state) + return; - if (m_adpcm_pos >= m_adpcm_end || m_adpcm_idle) + m_adpcm_trigger ^= 1; + m_adpcm->data_w(m_adpcm_trigger ? (m_adpcm_data & 0x0f) : (m_adpcm_data & 0xf0) >> 4); + m_adpcm_counter->clock_w(m_adpcm_trigger); + if (m_adpcm_trigger == 0 && m_adpcm_counter->count() == 0) { - //m_adpcm_idle = 1; + m_adpcm_idle = 1; m_adpcm->reset_w(1); - m_adpcm_trigger = 0; - } - else - { - uint8_t *ROM = memregion("adpcm")->base(); - - m_adpcm_data = ((m_adpcm_trigger ? (ROM[m_adpcm_pos] & 0x0f) : (ROM[m_adpcm_pos] & 0xf0) >> 4)); - m_adpcm->data_w(m_adpcm_data & 0xf); - m_adpcm_trigger ^= 1; - if (m_adpcm_trigger == 0) - { - m_adpcm_pos++; - //if ((ROM[m_adpcm_pos] & 0xff) == 0x70) - // m_adpcm_idle = 1; - } + m_adpcm_counter->reset_w(1); } } @@ -483,9 +480,14 @@ static MACHINE_CONFIG_DERIVED( rougien, mermaid ) MCFG_PALETTE_INIT_OWNER(mermaid_state,rougien) MCFG_SOUND_ADD("adpcm", MSM5205, 384000) - MCFG_MSM5205_VCLK_CB(WRITELINE(mermaid_state, rougien_adpcm_int)) /* interrupt function */ + MCFG_MSM5205_VCK_CALLBACK(WRITELINE(mermaid_state, rougien_adpcm_int)) MCFG_MSM5205_PRESCALER_SELECTOR(S96_4B) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00) + + MCFG_DEVICE_ADD("adpcm_counter", RIPPLE_COUNTER, 0) + MCFG_DEVICE_ROM("adpcm") + MCFG_RIPPLE_COUNTER_STAGES(12) + MCFG_RIPPLE_COUNTER_ROM_OUT_CB(WRITE8(mermaid_state, adpcm_data_w)) MACHINE_CONFIG_END /* ROMs */ diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index ebf4028652f..f7e9dba632e 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -124,28 +124,62 @@ INTERRUPT_GEN_MEMBER(pgm2_state::igs_interrupt) m_arm_aic->set_irq(0x47); } +WRITE16_MEMBER(pgm2_state::share_bank_w) +{ + COMBINE_DATA(&m_share_bank); +} + +READ8_MEMBER(pgm2_state::shareram_r) +{ + return m_shareram[offset + (m_share_bank & 1) * 128]; +} +WRITE8_MEMBER(pgm2_state::shareram_w) +{ + m_shareram[offset + (m_share_bank & 1) * 128] = data; +} + + TIMER_DEVICE_CALLBACK_MEMBER(pgm2_state::igs_interrupt2) { m_arm_aic->set_irq(0x46); } +static const uint8_t orleg2_china_card[32] = { + 0xA2, 0x13, 0x10, 0x91, 0x05, 0x0C, 0x81, 0x15, 0x10, 0x00, 0x00, 0x03, 0x00, 0x49, 0x47, 0x53, + 0x00, 0x00, 0x00, 0x00, 0x00, 0xD2, 0x76, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; +#ifdef UNUSED_DEFINITION +static const uint8_t kov2nl_china_card[32] = { + 0xA2, 0x13, 0x10, 0x91, 0x05, 0x0C, 0x81, 0x15, 0x06, 0x00, 0x00, 0x04, 0x00, 0x49, 0x47, 0x53, + 0x00, 0x00, 0x00, 0x00, 0x00, 0xD2, 0x76, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; +#endif + // "MPU" MCU HLE starts here +// TODO: make data cards using image_interface +// command delays is far not correct, might not work in other games +// command results probably either incorrect (except for explicit checked bytes) void pgm2_state::mcu_command(bool is_command) { uint8_t cmd = m_mcu_regs[0] & 0xff; - if (is_command && cmd != 0xf6) - logerror("MCU command %08x %08x\n", m_mcu_regs[0], m_mcu_regs[1]); +// if (is_command && cmd != 0xf6) +// logerror("MCU command %08x %08x\n", m_mcu_regs[0], m_mcu_regs[1]); if (is_command) { m_mcu_last_cmd = cmd; uint8_t status = 0xf7; // "command accepted" status int delay = 1; + + uint8_t arg1 = m_mcu_regs[0] >> 8; + uint8_t arg2 = m_mcu_regs[0] >> 16; + uint8_t arg3 = m_mcu_regs[0] >> 24; switch (cmd) { case 0xf6: // get result m_mcu_regs[3] = m_mcu_result0; m_mcu_regs[4] = m_mcu_result1; + m_mcu_last_cmd = 0; break; case 0xe0: // command port test m_mcu_result0 = m_mcu_regs[0]; @@ -155,28 +189,48 @@ void pgm2_state::mcu_command(bool is_command) case 0xe1: // shared ram access (unimplemented) { // MCU access to RAM shared at 0x30100000, 2x banks, in the same time CPU and MCU access different banks - // where is offset ? -// uint8_t mode = m_mcu_regs[0] >> 16; // 0 - ???, 1 - read, 2 - write -// uint8_t data = m_mcu_regs[0] >> 24; + uint8_t mode = m_mcu_regs[0] >> 16; // 0 - ???, 1 - read, 2 - write + uint8_t data = m_mcu_regs[0] >> 24; + if (mode == 2) + { + // where is offset ? so far assume this command fill whole page + memset(&m_shareram[(~m_share_bank & 1) * 128], data, 128); + } m_mcu_result0 = cmd; m_mcu_result1 = 0; } break; // unknown / unimplemented, all C0-C9 commands is IC Card RW related - // (m_mcu_regs[0] >> 8) & 0xff - target RW unit (player) # + // (m_mcu_regs[0] >> 8) & 0xff - target RW unit (player) case 0xc0: // insert card or/and check card presence. result: F7 - ok, F4 - no card - status = 0xf4; - case 0xc1: - case 0xc2: - case 0xc3: - case 0xc4: - case 0xc5: - case 0xc6: - case 0xc7: - case 0xc8: - case 0xc9: + if (!m_have_card[arg1]) + status = 0xf4; + m_mcu_result0 = cmd; + break; + case 0xc1: // check ready/busy ? + m_mcu_result0 = cmd; + break; + case 0xc2: // read data to shared ram, args - offset, len + memcpy(&m_shareram[(~m_share_bank & 1) * 128], &m_card_data[arg1][arg2], arg3); + m_mcu_result0 = cmd; + break; + case 0xc3: // save data from shared ram, args - offset, len + memcpy(&m_card_data[arg1][arg2], &m_shareram[(~m_share_bank & 1) * 128], arg3); + m_mcu_result0 = cmd; + break; + case 0xc7: // get card ID?, no args, result1 expected to be fixed value for new card + m_mcu_result1 = 0xf81f0000; + m_mcu_result0 = cmd; + break; + case 0xc8: // write byte, args - offset, data byte + m_card_data[arg1][arg2] = arg3; + m_mcu_result0 = cmd; + break; + case 0xc4: // not used + case 0xc5: // set new password?, args - offset, data byte (offs 0 - always 7, 1-3 password) + case 0xc6: // not used + case 0xc9: // card authentication, args - 3 byte password, ('I','G','S' for new cards) m_mcu_result0 = cmd; - m_mcu_result1 = 0; break; default: logerror("MCU unknown command %08x %08x\n", m_mcu_regs[0], m_mcu_regs[1]); @@ -188,10 +242,11 @@ void pgm2_state::mcu_command(bool is_command) } else // next step { - if (m_mcu_last_cmd && m_mcu_last_cmd != 0xf6) + if (m_mcu_last_cmd) { m_mcu_regs[3] = (m_mcu_regs[3] & 0xff00ffff) | 0x00F20000; // set "command done and return data" status - m_mcu_timer->adjust(attotime::from_msec(1)); + m_mcu_timer->adjust(attotime::from_usec(100)); + m_mcu_last_cmd = 0; } } } @@ -244,9 +299,10 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) what is the real size? */ AM_RANGE(0x300e0000, 0x300e03ff) AM_RAM AM_SHARE("lineram") AM_MIRROR(0x000fc00) - AM_RANGE(0x30100000, 0x301000ff) AM_RAM // MCU shared RAM, access at even bytes only (8bit device at 16bit bus?), 2x banks switched via 0x30120032 register (16bit) + AM_RANGE(0x30100000, 0x301000ff) AM_READWRITE8(shareram_r, shareram_w, 0x00ff00ff) AM_RANGE(0x30120000, 0x30120003) AM_RAM AM_SHARE("bgscroll") // scroll + AM_RANGE(0x30120030, 0x30120033) AM_WRITE16(share_bank_w, 0xffff0000) AM_RANGE(0x30120038, 0x3012003b) AM_WRITE(sprite_encryption_w) // there are other 0x301200xx regs @@ -370,6 +426,8 @@ void pgm2_state::machine_start() save_item(NAME(m_mcu_result0)); save_item(NAME(m_mcu_result1)); save_item(NAME(m_mcu_last_cmd)); + save_item(NAME(m_shareram)); + save_item(NAME(m_share_bank)); } void pgm2_state::machine_reset() @@ -377,6 +435,12 @@ void pgm2_state::machine_reset() m_spritekey = 0; m_realspritekey = 0; m_mcu_last_cmd = 0; + m_share_bank = 0; + + m_have_card[0] = true; + m_have_card[1] = m_have_card[2] = m_have_card[3] = false; + memcpy(m_card_data[0], orleg2_china_card, sizeof(orleg2_china_card)); +// memcpy(m_card_data[0], kov2nl_china_card, sizeof(kov2nl_china_card)); } static const gfx_layout tiles8x8_layout = diff --git a/src/mame/drivers/seattle.cpp b/src/mame/drivers/seattle.cpp index 8fcb6b77a22..908f13282a1 100644 --- a/src/mame/drivers/seattle.cpp +++ b/src/mame/drivers/seattle.cpp @@ -279,7 +279,8 @@ public: m_cage(*this, "cage"), m_dcs(*this, "dcs"), m_ethernet(*this, "ethernet"), - m_ioasic(*this, "ioasic") + m_ioasic(*this, "ioasic"), + m_io_analog(*this, "AN%u", 0) {} required_device m_nvram; @@ -288,6 +289,7 @@ public: optional_device m_dcs; optional_device m_ethernet; required_device m_ioasic; + optional_ioport_array<8> m_io_analog; widget_data m_widget; uint32_t m_interrupt_enable; @@ -306,6 +308,9 @@ public: uint32_t m_output; uint8_t m_output_mode; uint32_t m_gear; + int8_t m_wheel_force; + int m_wheel_offset; + bool m_wheel_calibrated; DECLARE_READ32_MEMBER(interrupt_state_r); DECLARE_READ32_MEMBER(interrupt_state2_r); DECLARE_READ32_MEMBER(interrupt_config_r); @@ -399,6 +404,7 @@ void seattle_state::machine_start() save_item(NAME(m_output)); save_item(NAME(m_output_mode)); save_item(NAME(m_gear)); + save_item(NAME(m_wheel_calibrated)); } @@ -409,6 +415,9 @@ void seattle_state::machine_reset() m_interrupt_config = 0; m_interrupt_enable = 0; m_gear = 1; + m_wheel_force = 0; + m_wheel_offset = 0; + m_wheel_calibrated = false; /* reset either the DCS2 board or the CAGE board */ if (machine().device("dcs") != nullptr) { @@ -602,11 +611,31 @@ READ32_MEMBER(seattle_state::analog_port_r) WRITE32_MEMBER(seattle_state::analog_port_w) { - static const char *const portnames[] = { "AN0", "AN1", "AN2", "AN3", "AN4", "AN5", "AN6", "AN7" }; - if (data < 8 || data > 15) logerror("%08X:Unexpected analog port select = %08X\n", space.device().safe_pc(), data); - m_pending_analog_read = ioport(portnames[data & 7])->read(); + int index = data & 7; + uint8_t currValue = m_io_analog[index].read_safe(0); + if (!m_wheel_calibrated && ((m_wheel_force > 20) || (m_wheel_force < -20))) { + if (m_wheel_force > 0 && m_wheel_offset < 128) + m_wheel_offset++; + else if (m_wheel_offset > -128) + m_wheel_offset--; + int tmpVal = int(currValue) + m_wheel_offset; + if (tmpVal < m_io_analog[index]->field(0xff)->minval()) + m_pending_analog_read = m_io_analog[index]->field(0xff)->minval(); + else if (tmpVal > m_io_analog[index]->field(0xff)->maxval()) + m_pending_analog_read = m_io_analog[index]->field(0xff)->maxval(); + else + m_pending_analog_read = tmpVal; + } + else { + m_pending_analog_read = currValue; + } + // Declare calibration finished as soon as non-middle value is detected, ie the user has turned the wheel + if (!m_wheel_calibrated && currValue != 0 && (currValue > (0x80 + 0x10) || currValue < (0x80 - 0x10))) { + m_wheel_calibrated = true; + //osd_printf_info("wheel calibration comlete wheel: %02x\n", currValue); + } } /************************************* @@ -628,6 +657,8 @@ WRITE32_MEMBER(seattle_state::wheel_board_w) { case 0x0: machine().output().set_value("wheel", arg); // target wheel angle. signed byte. + m_wheel_force = int8_t(arg); + //logerror("wheel_board_w: data = %08x op: %02x arg: %02x\n", data, op, arg); break; case 0x4: @@ -725,15 +756,19 @@ WRITE32_MEMBER(seattle_state::carnevil_gun_w) READ32_MEMBER(seattle_state::ethernet_r) { + uint32_t data = 0; if (!(offset & 8)) - return m_ethernet->read(space, offset & 7, mem_mask & 0xffff); + data = m_ethernet->read(space, offset & 7, mem_mask & 0xffff); else - return m_ethernet->read(space, offset & 7, mem_mask & 0x00ff); + data = m_ethernet->read(space, offset & 7, mem_mask & 0x00ff); + //logerror("ethernet_r: @%08x=%08x mask: %08x\n", offset, data, mem_mask); + return data; } WRITE32_MEMBER(seattle_state::ethernet_w) { + //logerror("ethernet_w: @%08x=%08x mask: %08x\n", offset, data, mem_mask); if (!(offset & 8)) m_ethernet->write(space, offset & 7, data & 0xffff, mem_mask | 0xffff); else @@ -798,6 +833,8 @@ WRITE32_MEMBER(seattle_state::output_w) case 0x04: output().set_value("wheel", arg); // wheel motor delta. signed byte. + m_wheel_force = int8_t(~arg); + //logerror("wheel_board_w: data = %08x op: %02x arg: %02x\n", data, op, arg); break; case 0x05: diff --git a/src/mame/drivers/segas16a.cpp b/src/mame/drivers/segas16a.cpp index 6650af776f7..3514bb5aa4b 100644 --- a/src/mame/drivers/segas16a.cpp +++ b/src/mame/drivers/segas16a.cpp @@ -2308,7 +2308,7 @@ ROM_START( afighterc ) ROM_LOAD( "epr-10284.12", 0x00000, 0x8000, CRC(8ff09116) SHA1(8b99b6d2499897cfbd037a7e7cf5bc53bce8a63a) ) ROM_REGION( 0x2000, "maincpu:key", 0 ) // decryption key - ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, NO_DUMP ) + ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, CRC(fee04be8) SHA1(c58d78299ef4cede517be823a8a8a90e46c6ba0d) ) ROM_END ROM_START( afighterd ) @@ -2339,7 +2339,7 @@ ROM_START( afighterd ) ROM_LOAD( "epr-10284.12", 0x00000, 0x8000, CRC(8ff09116) SHA1(8b99b6d2499897cfbd037a7e7cf5bc53bce8a63a) ) ROM_REGION( 0x2000, "maincpu:key", 0 ) // decryption key - ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, NO_DUMP ) + ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, CRC(fee04be8) SHA1(c58d78299ef4cede517be823a8a8a90e46c6ba0d) ) ROM_END //************************************************************************************************************************* @@ -3933,8 +3933,8 @@ GAME( 1988, aceattaca, aceattac, aceattaca_fd1094, aceattaca, segas16a GAME( 1986, afighter, 0, system16a_fd1089a_no7751, afighter, segas16a_state, generic, ROT270, "Sega", "Action Fighter (FD1089A 317-0018)", MACHINE_SUPPORTS_SAVE ) GAME( 1986, afightera, afighter, system16a_no7751, afighter, segas16a_state, generic, ROT270, "Sega", "Action Fighter (unprotected)", MACHINE_SUPPORTS_SAVE ) GAME( 1986, afighterb, afighter, system16a_no7751, afighter_analog, afighter_16a_analog_state,generic, ROT270, "Sega", "Action Fighter (unprotected, analog controls)", MACHINE_SUPPORTS_SAVE ) -GAME( 1986, afighterc, afighter, system16a_fd1089a_no7751, afighter, segas16a_state, generic, ROT270, "Sega", "Action Fighter (FD1089A 317-unknown)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // encrypted version of afightera -GAME( 1986, afighterd, afighter, system16a_fd1089a_no7751, afighter_analog, afighter_16a_analog_state,generic, ROT270, "Sega", "Action Fighter (FD1089A 317-unknown, analog controls)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // encrypted version of afighterb +GAME( 1986, afighterc, afighter, system16a_fd1089b_no7751, afighter, segas16a_state, generic, ROT270, "Sega", "Action Fighter (FD1089B 317-unknown)", MACHINE_SUPPORTS_SAVE ) // encrypted version of afightera (maybe 317-0017) +GAME( 1986, afighterd, afighter, system16a_fd1089b_no7751, afighter_analog, afighter_16a_analog_state,generic, ROT270, "Sega", "Action Fighter (FD1089B 317-unknown, analog controls)", MACHINE_SUPPORTS_SAVE ) // encrypted version of afighterb GAME( 1986, alexkidd, 0, system16a, alexkidd, segas16a_state,generic, ROT0, "Sega", "Alex Kidd: The Lost Stars (set 2, unprotected)", MACHINE_SUPPORTS_SAVE ) GAME( 1986, alexkidd1, alexkidd, system16a_fd1089a, alexkidd, segas16a_state,generic, ROT0, "Sega", "Alex Kidd: The Lost Stars (set 1, FD1089A 317-0021)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/segas16b.cpp b/src/mame/drivers/segas16b.cpp index a5de4a65df9..19aef83036c 100644 --- a/src/mame/drivers/segas16b.cpp +++ b/src/mame/drivers/segas16b.cpp @@ -4226,11 +4226,11 @@ ROM_START( afighterf ) ROM_LOAD( "epr10039.bin", 0x00000, 0x8000, CRC(b04757b0) SHA1(24bface5a23ed658675f414c9937bf9d7f7ed5ec) ) ROM_REGION( 0x2000, "maincpu:key", 0 ) // decryption key - ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, NO_DUMP ) + ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, CRC(fee04be8) SHA1(c58d78299ef4cede517be823a8a8a90e46c6ba0d) ) ROM_END -ROM_START( afighterg ) // could be 16A +ROM_START( afighterg ) ROM_REGION( 0x30000, "maincpu", 0 ) // 68000 code ROM_LOAD16_BYTE( "epr10160.bin", 0x00001, 0x08000, CRC(86f020da) SHA1(e7ac4b70dc375d9e2491f1a90ae154699e7627a2) ) // == encrypted 10169 (not perfect match) (same rev as 10354) ROM_LOAD16_BYTE( "epr10163.bin", 0x00000, 0x08000, CRC(6d62eccd) SHA1(a400850f717a71a3e0059173d77f0bd067f1b520) ) @@ -4258,7 +4258,7 @@ ROM_START( afighterg ) // could be 16A ROM_LOAD( "epr10039.bin", 0x00000, 0x8000, CRC(b04757b0) SHA1(24bface5a23ed658675f414c9937bf9d7f7ed5ec) ) ROM_REGION( 0x2000, "maincpu:key", 0 ) // decryption key - ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, NO_DUMP ) + ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, CRC(fee04be8) SHA1(c58d78299ef4cede517be823a8a8a90e46c6ba0d) ) ROM_END @@ -9090,8 +9090,8 @@ GAME( 1987, aliensyn3, aliensyn, system16b_fd1089a, aliensyn, segas16b_state, GAME( 1987, aliensynj, aliensyn, system16b_fd1089a, aliensynj,segas16b_state,generic_5358_small, ROT0, "Sega", "Alien Syndrome (set 6, Japan, new, System 16B, FD1089A 317-0033)", 0 ) GAME( 1986, afightere, afighter, system16b, afighter_analog,afighter_16b_analog_state,generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, unprotected, analog controls)", 0 ) -GAME( 1986, afighterf, afighter, system16b_fd1089a, afighter_analog,afighter_16b_analog_state,generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089A 317-unknown, analog controls)", MACHINE_NOT_WORKING ) // encrypted version of afightere -GAME( 1986, afighterg, afighter, system16b_fd1089a, afighter, segas16b_state, generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089A 317-unknown)", MACHINE_NOT_WORKING ) // same encryption as afighterf +GAME( 1986, afighterf, afighter, system16b_fd1089b, afighter_analog,afighter_16b_analog_state,generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089B 317-unknown, analog controls)", 0 ) // encrypted version of afightere +GAME( 1986, afighterg, afighter, system16b_fd1089b, afighter, segas16b_state, generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089B 317-unknown)", 0 ) // same encryption as afighterf GAME( 1986, afighterh, afighter, system16b_fd1089a, afighter, segas16b_state, generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089A 317-0018)", 0 ) // same rev as afighterg GAME( 1988, altbeast, 0, system16b_i8751, altbeast, segas16b_state,generic_5521, ROT0, "Sega", "Altered Beast (set 8) (8751 317-0078)", 0 ) diff --git a/src/mame/drivers/snk6502.cpp b/src/mame/drivers/snk6502.cpp index 4482b4a1e7d..2ae1ce7a377 100644 --- a/src/mame/drivers/snk6502.cpp +++ b/src/mame/drivers/snk6502.cpp @@ -1392,6 +1392,40 @@ ROM_START( fantasyg ) ROM_LOAD( "fs_f_11.bin", 0x5000, 0x0800, CRC(3a352e1f) SHA1(af880ce3daed0877d454421bd08c86ff71f6bf72) ) ROM_END +// SK-7A and SK-6 PCBs +ROM_START( fantasyg2 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "ts5.bin", 0x3000, 0x1000, CRC(6edca14e) SHA1(d9152e212f2b3cdb6e7968e4e7638454ea02c4a5) ) + ROM_LOAD( "fs1.bin", 0x4000, 0x1000, CRC(d99656e8) SHA1(6f5febaeca2ec167523f48361ae2395772bcef53) ) + ROM_LOAD( "ts2.bin", 0x5000, 0x1000, CRC(2db6ce28) SHA1(18cced543f27664b3eaddf103a41580a905ffae1) ) + ROM_LOAD( "ts3.bin", 0x6000, 0x1000, CRC(1a0aa7c5) SHA1(c8f34618ffc98c73db7067851de24f245b8988ad) ) + ROM_LOAD( "fs4.bin", 0x7000, 0x1000, CRC(c02ad442) SHA1(a90b2d04fc2e8b2dda634c18eafb88007eaedc67) ) + ROM_LOAD( "fs6.bin", 0x8000, 0x1000, CRC(e5b91bc2) SHA1(85515eb57c8040fc95a9c62706e1a504e6749f66) ) + ROM_RELOAD( 0xf000, 0x1000 ) /* for the reset and interrupt vectors */ + ROM_LOAD( "fs7.bin", 0x9000, 0x1000, CRC(cc18428e) SHA1(c7c0a031434cf9ce3c450b0c5dc2b154b08d19cf) ) + ROM_LOAD( "fs8.bin", 0xa000, 0x1000, CRC(371129fe) SHA1(c21759222aebcc9ea1292e367a41ac43a4dd3554) ) + ROM_LOAD( "fs9.bin", 0xb000, 0x1000, CRC(49574d4a) SHA1(37cae0df7e8705c300f684b3351b5bdba5e44ea2) ) + + ROM_REGION( 0x2000, "gfx1", 0 ) + ROM_LOAD( "fs10.bin", 0x0000, 0x1000, CRC(86a801c3) SHA1(c040b5807c25823072f7e8ceab57b95d4bed89fe) ) + ROM_LOAD( "fs11.bin", 0x1000, 0x1000, CRC(9dfff71c) SHA1(7a7c017170f2ea903a730a4e5ab69db379a4fc61) ) + + ROM_REGION( 0x0040, "proms", 0 ) + ROM_LOAD( "fantasy.ic7", 0x0000, 0x0020, CRC(361a5e99) SHA1(b9777ce658549c03971bd476482d5cc0be27d3a9) ) /* foreground colors */ + ROM_LOAD( "fantasy.ic6", 0x0020, 0x0020, CRC(33d974f7) SHA1(a6f6a531dec3f454b477bfdda8e213e9cad42748) ) /* background colors */ + + ROM_REGION( 0x1800, "snk6502", 0 ) /* sound ROMs */ + ROM_LOAD( "fs_b_51.bin", 0x0000, 0x0800, CRC(48094ec5) SHA1(7d6118133bc1eb8ebc5d8a95d10ef842daffef89) ) + ROM_LOAD( "fs_a_52.bin", 0x0800, 0x0800, CRC(1d0316e8) SHA1(6a3ab289b5fefef8663514bd1d5817c70fe58882) ) + ROM_LOAD( "fs_c_53.bin", 0x1000, 0x0800, CRC(49fd4ae8) SHA1(96ff1267c0ffab1e8a0769fa869516e2546ab640) ) + + ROM_REGION( 0x5800, "speech", 0 ) /* space for the speech ROMs (not supported) */ + //ROM_LOAD( "hd38882.bin", 0x0000, 0x4000, NO_DUMP ) /* HD38882 internal ROM */ + ROM_LOAD( "fs_d_7.bin", 0x4000, 0x0800, CRC(a7ef4cc6) SHA1(8df71cb18fcfe9a2f592f83bc01cf2314ae30e32) ) + ROM_LOAD( "fs_e_8.bin", 0x4800, 0x0800, CRC(19b8fb3e) SHA1(271c76f68866c28bc6755238a71970d5f7c81ecb) ) + ROM_LOAD( "fs_f_11.bin", 0x5000, 0x0800, CRC(3a352e1f) SHA1(af880ce3daed0877d454421bd08c86ff71f6bf72) ) +ROM_END + ROM_START( fantasyj ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "fs5jic12.bin", 0x3000, 0x1000, CRC(dd1eac89) SHA1(d63078d4666e3c6db0c9b3f8b45ef81606ed5a4f) ) @@ -1673,8 +1707,9 @@ GAME( 1981, satansatind, satansat, satansat, satansat, snk6502_state, 0, ROT90, GAME( 1981, vanguard, 0, vanguard, vanguard, snk6502_state, 0, ROT90, "SNK", "Vanguard (SNK)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) GAME( 1981, vanguardc, vanguard, vanguard, vanguard, snk6502_state, 0, ROT90, "SNK (Centuri license)", "Vanguard (Centuri)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) GAME( 1981, vanguardj, vanguard, vanguard, vanguard, snk6502_state, 0, ROT90, "SNK", "Vanguard (Japan)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) -GAME( 1981, fantasyg, fantasyu, fantasy, fantasy, snk6502_state, 0, ROT90, "SNK", "Fantasy (Germany)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // bootleg? GAME( 1981, fantasyu, 0, fantasy, fantasyu, snk6502_state, 0, ROT90, "SNK (Rock-Ola license)", "Fantasy (US)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) +GAME( 1981, fantasyg, fantasyu, fantasy, fantasy, snk6502_state, 0, ROT90, "SNK", "Fantasy (Germany, set 1)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // bootleg? +GAME( 1981, fantasyg2, fantasyu, fantasy, fantasy, snk6502_state, 0, ROT90, "SNK", "Fantasy (Germany, set 2)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // bootleg? GAME( 1981, fantasyj, fantasyu, fantasy, fantasyu, snk6502_state, 0, ROT90, "SNK", "Fantasy (Japan)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) GAME( 1982, pballoon, 0, pballoon, pballoon, snk6502_state, 0, ROT90, "SNK", "Pioneer Balloon", MACHINE_SUPPORTS_SAVE ) GAME( 1982, pballoonr, pballoon, pballoon, pballoon, snk6502_state, 0, ROT90, "SNK (Rock-Ola license)", "Pioneer Balloon (Rock-Ola license)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/taitojc.cpp b/src/mame/drivers/taitojc.cpp index 124b5e007e8..9fa681bfbde 100644 --- a/src/mame/drivers/taitojc.cpp +++ b/src/mame/drivers/taitojc.cpp @@ -1509,10 +1509,10 @@ ROM_END ROM_START( sidebs2ja ) /* Side by Side 2 Evoluzione Ver 2.4 J */ ROM_REGION(0x200000, "maincpu", 0) /* 68040 code */ - ROM_LOAD32_BYTE( "e38-23+.ic36", 0x000000, 0x80000, CRC(b3d8e2d9) SHA1(6de6a51c3d9ace532fa03517bab93101b5a3eaae) ) /* Actual label E38-23* */ - ROM_LOAD32_BYTE( "e38-24+.ic37", 0x000001, 0x80000, CRC(2a47d80d) SHA1(41b889e4a1397c7f0d4f6ef136ed8abfd7e1ed86) ) /* Actual label E38-24* */ - ROM_LOAD32_BYTE( "e38-25+.ic38", 0x000002, 0x80000, CRC(f1a8a4df) SHA1(e4cf75969fb0503df2290522194b097f5cb983a3) ) /* Actual label E38-25* */ - ROM_LOAD32_BYTE( "e38-26+.ic39", 0x000003, 0x80000, CRC(b550fbf2) SHA1(a0a461af7e71c6ad6468cfdee2bc7161ae31bbfb) ) /* Actual label E38-26* */ + ROM_LOAD32_BYTE( "e38-23+.ic36", 0x000000, 0x80000, CRC(b3d8e2d9) SHA1(6de6a51c3d9ace532fa03517bab93101b5a3eaae) ) /* Actually labeled E38-23* */ + ROM_LOAD32_BYTE( "e38-24+.ic37", 0x000001, 0x80000, CRC(2a47d80d) SHA1(41b889e4a1397c7f0d4f6ef136ed8abfd7e1ed86) ) /* Actually labeled E38-24* */ + ROM_LOAD32_BYTE( "e38-25+.ic38", 0x000002, 0x80000, CRC(f1a8a4df) SHA1(e4cf75969fb0503df2290522194b097f5cb983a3) ) /* Actually labeled E38-25* */ + ROM_LOAD32_BYTE( "e38-26+.ic39", 0x000003, 0x80000, CRC(b550fbf2) SHA1(a0a461af7e71c6ad6468cfdee2bc7161ae31bbfb) ) /* Actually labeled E38-26* */ ROM_REGION( 0x180000, "taito_en:audiocpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "e38-19.ic30", 0x100001, 0x040000, CRC(3f50cb7b) SHA1(76af65c9b74ede843a3182f79cecda8c3e3febe6) ) @@ -1991,7 +1991,64 @@ ROM_START( landgearja ) /* Landing Gear Ver 3.0 J, is there an alternate set wit ROM_LOAD( "e17-32.ic96", 0x0000, 0x0bac, CRC(1d590ca3) SHA1(733e9e34642c1e03fd880fda198b98927c1bb81d) ) ROM_END -ROM_START( dangcurv ) +ROM_START( dangcurv ) /* Dangerous Curves Ver 2.9 O */ + ROM_REGION( 0x200000, "maincpu", 0 ) /* 68040 code */ + ROM_LOAD32_BYTE( "e09-32-1+.ic36", 0x000000, 0x80000, CRC(82c0af83) SHA1(307e2dd441116ffaad0d5783cd139bde8fc23460) ) /* Actually labeled E09 32-1* */ + ROM_LOAD32_BYTE( "e09-33-1+.ic37", 0x000001, 0x80000, CRC(be6eca0b) SHA1(edb4ad0d379132e64c1238191ab17bd4400f3322) ) /* Actually labeled E09 33-1* */ + ROM_LOAD32_BYTE( "e09-34-1+.ic38", 0x000002, 0x80000, CRC(553de745) SHA1(474e96c810fee8097059e201b95810b3235c6cad) ) /* Actually labeled E09 34-1* */ + ROM_LOAD32_BYTE( "e09-35-1+.ic39", 0x000003, 0x80000, CRC(a60273fd) SHA1(511191506f04320775787e294a59a94c07364006) ) /* Actually labeled E09 35-1* */ + + ROM_REGION( 0x180000, "taito_en:audiocpu", 0 ) /* 68000 Code */ + ROM_LOAD16_BYTE( "e09-27.ic30", 0x100001, 0x40000, CRC(6d54839c) SHA1(a28c9b0727128b82bb0fa71dc951e3f03ee45e1b) ) + ROM_LOAD16_BYTE( "e09-28.ic31", 0x100000, 0x40000, CRC(566d7d83) SHA1(92661ccb631f843bf704c50d54fae28f6b5b272b) ) + + ROM_REGION( 0x4000, "dsp", ROMREGION_ERASE00 ) /* TMS320C51 internal rom */ + ROM_LOAD16_WORD( "e07-11.ic29", 0x0000, 0x4000, NO_DUMP ) + + ROM_REGION( 0x010000, "sub", 0 ) /* MC68HC11M0 code */ + ROM_LOAD( "e09-29.ic65", 0x000000, 0x010000, CRC(80ac1428) SHA1(5a2a1e60a11ecdb8743c20ddacfb61f9fd00f01c) ) + + ROM_REGION( 0x1800000, "gfx1", 0 ) + ROM_LOAD32_WORD( "e09-05.ic9", 0x0800002, 0x200000, CRC(a948782f) SHA1(2a2b0d2955e036ddf424c54131435a20dbba3dd4) ) + ROM_LOAD32_WORD( "e09-13.ic22", 0x0800000, 0x200000, CRC(985859e2) SHA1(8af9a73eba2151a5ef60799682fe667663a42743) ) + ROM_LOAD32_WORD( "e09-06.ic10", 0x0c00002, 0x200000, CRC(218dcb5b) SHA1(72aedd2890e076540195d738c76ba446769c8e89) ) + ROM_LOAD32_WORD( "e09-14.ic23", 0x0c00000, 0x200000, CRC(6d123616) SHA1(01ac1e920f7c4a03adf365c8a7831b8385f0b78b) ) + ROM_LOAD32_WORD( "e09-07.ic11", 0x1000002, 0x200000, CRC(37fd7efc) SHA1(24a275d302ec8940479d15f1aeb96a288868bd41) ) + ROM_LOAD32_WORD( "e09-15.ic24", 0x1000000, 0x200000, CRC(0d773f3b) SHA1(f867a4d5956c2ebfa9858499d9716b4dc723d76b) ) + ROM_LOAD32_WORD( "e09-08.ic12", 0x1400002, 0x200000, CRC(5c080485) SHA1(c950cd00df5b6d2d0a119ba318fa8b0a3f471b29) ) + ROM_LOAD32_WORD( "e09-16.ic25", 0x1400000, 0x200000, CRC(35cb8346) SHA1(c2ecedd3c2a28213ef83e776f3007c974128189b) ) + + ROM_REGION( 0x1000000, "gfx2", 0 ) /* only accessible to the TMS */ + ROM_LOAD( "e09-01.ic5", 0x0000000, 0x200000, CRC(22a6a53d) SHA1(6efa89151cd5ec43ab9bfa9b92694eb0018dd227) ) + ROM_LOAD( "e09-02.ic6", 0x0200000, 0x200000, CRC(405e2969) SHA1(376b9dd548d876af6798553a6da5deed4de00b76) ) + ROM_LOAD( "e09-03.ic7", 0x0400000, 0x200000, CRC(15327754) SHA1(bf08ab80875b400700241a66715e229dae6752d1) ) + ROM_LOAD( "e09-04.ic8", 0x0600000, 0x200000, CRC(fd598d6e) SHA1(679d9d64a0cd031a6c8cb5e170b77fc5811b6d73) ) + ROM_LOAD( "e09-09.ic18", 0x0800000, 0x200000, CRC(a527b387) SHA1(790240b4dfcdf2bf70edb943ec7aeb2f0d8cdfa9) ) + ROM_LOAD( "e09-10.ic19", 0x0a00000, 0x200000, CRC(4de6253c) SHA1(33517c0895b7ee04f4a84074d0b7bf42b53d5816) ) + ROM_LOAD( "e09-11.ic20", 0x0c00000, 0x200000, CRC(18cc0ba7) SHA1(626929a501def6f1b8bd6a468786efb0b0dda9fa) ) + ROM_LOAD( "e09-12.ic21", 0x0e00000, 0x200000, CRC(3273e438) SHA1(e9581d52f5db1c1924a860464579332a2f23e713) ) + + ROM_REGION16_BE( 0x1000000, "ensoniq.0", ROMREGION_ERASE00 ) + ROM_LOAD16_BYTE( "e09-17.ic32", 0x000000, 0x200000, CRC(a8a6512e) SHA1(71bd3ccd65b731270b92da334b9fb99c28e267fe) ) + ROM_LOAD16_BYTE( "e09-18.ic33", 0x400000, 0x200000, CRC(bdf1f5eb) SHA1(a568a99a90e0afbcd26ddd320f515ed62cf0db1a) ) + ROM_LOAD16_BYTE( "e09-19.ic34", 0x800000, 0x200000, CRC(3626c7ed) SHA1(7535f0457b3d9fe1d54712a26322d6144b9e7de6) ) + ROM_LOAD16_BYTE( "e09-20.ic35", 0xc00000, 0x200000, CRC(9652a5c4) SHA1(2933e4e8e57ff618ce21721036d96347471c5539) ) + + ROM_REGION( 0x1000, "pals", 0 ) /* PALCE 16V8 (unused now) */ + ROM_LOAD( "e07-02.ic4", 0x0000, 0x0117, CRC(21b3b349) SHA1(2c468a355caeb541fc649842f228fdc14b01afad) ) + ROM_LOAD( "e07-03.ic50", 0x0000, 0x0117, CRC(af68d73a) SHA1(11c9a6eee715066dc06766cc89774081ffedab3b) ) + ROM_LOAD( "e07-04.ic115", 0x0000, 0x0117, CRC(98383e84) SHA1(446e7a38f933b55706de71884f764c512912f571) ) + ROM_LOAD( "e07-05.ic22", 0x0000, 0x0117, CRC(3fe21bb8) SHA1(744dcfef2b2dbb2aa4b69d47e03cec7881e4cd4b) ) + ROM_LOAD( "e07-06.ic37", 0x0000, 0x0117, CRC(5cbeb11c) SHA1(e8cb4898d1285b72ae7ce003bfac33897417bb91) ) + ROM_LOAD( "e07-07.ic49", 0x0000, 0x0117, CRC(8914317b) SHA1(8b782ff4f2783d8531d0d9abe0215ecc10cd1f49) ) + ROM_LOAD( "e07-08.ic65", 0x0000, 0x0117, CRC(1831ddf3) SHA1(96bc0eb4b49c6d646e91630bb174f75c5d29337a) ) + ROM_LOAD( "e07-09.ic82", 0x0000, 0x0117, CRC(6ab127fb) SHA1(9beb74436968854fedacea915587e8fdffaec6c8) ) + ROM_LOAD( "e07-10.ic116", 0x0000, 0x0117, CRC(24d7939c) SHA1(fd3d87471252805de01c7c0abd60e55669885de0) ) + ROM_LOAD( "e09-21.ic69", 0x0000, 0x0117, CRC(ab2c7402) SHA1(df8b63a67bf693f9023794ad4e787e3248d10b7e) ) + ROM_LOAD( "e09-22.ic73", 0x0000, 0x0117, CRC(d43972cc) SHA1(ed9454d1a225a5fb6fefc0ae1aebe2b439ed460f) ) +ROM_END + +ROM_START( dangcurvj ) /* Dangerous Curves Ver 2.2 J */ ROM_REGION( 0x200000, "maincpu", 0 ) /* 68040 code */ ROM_LOAD32_BYTE( "e09-23.ic36", 0x000000, 0x80000, CRC(b4cdadd6) SHA1(84bd1d055ff15afb5438cd5151abf78b0000cebc) ) ROM_LOAD32_BYTE( "e09-24.ic37", 0x000001, 0x80000, CRC(fb2fc795) SHA1(2f58d043ab9fc0269a5b6827009777cd7ab832fc) ) @@ -2036,7 +2093,8 @@ ROM_START( dangcurv ) ROM_END -GAME( 1995, dangcurv, 0, taitojc, dangcurv, taitojc_state, dangcurv, ROT0, "Taito", "Dangerous Curves (Ver 2.2 J)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_TIMING ) // DANGEROUS CURVES VER 2.2 J 1995.07.20 17:45 +GAME( 1995, dangcurv, 0, taitojc, dangcurv, taitojc_state, dangcurv, ROT0, "Taito", "Dangerous Curves (Ver 2.9 O)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_TIMING ) // DANGEROUS CURVES VER 2.9 O 1995.08.24 17:45 +GAME( 1995, dangcurvj, dangcurv, taitojc, dangcurv, taitojc_state, dangcurv, ROT0, "Taito", "Dangerous Curves (Ver 2.2 J)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_TIMING ) // DANGEROUS CURVES VER 2.2 J 1995.07.20 17:45 GAME( 1995, landgear, 0, taitojc, landgear, taitojc_state, taitojc, ROT0, "Taito", "Landing Gear (Ver 4.2 O)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_TIMING ) // LANDING GEAR VER 4.2 O Feb 8 1996 09:46:22 GAME( 1995, landgearj, landgear, taitojc, landgear, taitojc_state, taitojc, ROT0, "Taito", "Landing Gear (Ver 4.2 J)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_TIMING ) // LANDING GEAR VER 4.2 J Feb 8 1996 09:46:22 GAME( 1995, landgeara, landgear, taitojc, landgear, taitojc_state, taitojc, ROT0, "Taito", "Landing Gear (Ver 3.1 O)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_TIMING ) // LANDING GEAR VER 3.1 O Feb 8 1996 09:46:22 diff --git a/src/mame/drivers/vegas.cpp b/src/mame/drivers/vegas.cpp index 2bffc4526f1..acf6e55bf9f 100644 --- a/src/mame/drivers/vegas.cpp +++ b/src/mame/drivers/vegas.cpp @@ -344,6 +344,9 @@ public: optional_device m_uart2; optional_ioport_array<8> m_io_analog; int m_a2d_shift; + int8_t m_wheel_force; + int m_wheel_offset; + bool m_wheel_calibrated; uint8_t m_vblank_state; uint8_t m_cpuio_data[4]; uint8_t m_sio_reset_ctrl; @@ -402,6 +405,7 @@ public: DECLARE_READ32_MEMBER(unknown_r); DECLARE_READ8_MEMBER(parallel_r); DECLARE_WRITE8_MEMBER(parallel_w); + DECLARE_WRITE8_MEMBER(mpsreset_w); DECLARE_WRITE32_MEMBER(i40_w); DECLARE_CUSTOM_INPUT_MEMBER(i40_r); DECLARE_CUSTOM_INPUT_MEMBER(keypad_r); @@ -453,6 +457,7 @@ void vegas_state::machine_start() save_item(NAME(m_i40_data)); save_item(NAME(m_keypad_select)); save_item(NAME(m_gear)); + save_item(NAME(m_wheel_calibrated)); } @@ -472,6 +477,9 @@ void vegas_state::machine_reset() m_i40_data = 0; m_keypad_select = 0; m_gear = 1; + m_wheel_force = 0; + m_wheel_offset = 0; + m_wheel_calibrated = false; } /************************************* @@ -876,13 +884,34 @@ WRITE32_MEMBER( vegas_state::analog_port_w ) { uint32_t shift_data = data >> m_a2d_shift; int index = shift_data & 0x7; - m_pending_analog_read = (m_io_analog[index].read_safe(0)); + uint8_t currValue = m_io_analog[index].read_safe(0); + if (!m_wheel_calibrated && ((m_wheel_force > 20) || (m_wheel_force < -20))) { + if (m_wheel_force > 0 && m_wheel_offset < 128) + m_wheel_offset++; + else if (m_wheel_offset > -128) + m_wheel_offset--; + int tmpVal = int(currValue) + m_wheel_offset; + if (tmpVal < m_io_analog[index]->field(0xff)->minval()) + m_pending_analog_read = m_io_analog[index]->field(0xff)->minval(); + else if (tmpVal > m_io_analog[index]->field(0xff)->maxval()) + m_pending_analog_read = m_io_analog[index]->field(0xff)->maxval(); + else + m_pending_analog_read = tmpVal; + } + else { + m_pending_analog_read = currValue; + } + // Declare calibration finished as soon as non-middle value is detected, ie the user has turned the wheel + if (!m_wheel_calibrated && currValue != 0 && (currValue > (0x80 + 0x10) || currValue < (0x80 - 0x10))) { + m_wheel_calibrated = true; + //osd_printf_info("wheel calibration comlete wheel: %02x\n", currValue); + } + //logerror("analog_port_w: wheel_force: %i read: %i\n", m_wheel_force, m_pending_analog_read); //logerror("%08X: analog_port_w = %08X & %08X index = %d\n", machine().device("maincpu")->safe_pc(), data, mem_mask, index); if (m_sio_irq_enable & 0x02) { m_sio_irq_state |= 0x02; update_sio_irqs(); } - } @@ -948,6 +977,14 @@ WRITE8_MEMBER(vegas_state::parallel_w) logerror("%06X: parallel_w %08x = %02x\n", machine().device("maincpu")->safe_pc(), offset, data); } +/************************************* +* MPS Reset +*************************************/ +WRITE8_MEMBER(vegas_state::mpsreset_w) +{ + logerror("%06X: mpsreset_w %08x = %02x\n", machine().device("maincpu")->safe_pc(), offset, data); +} + /************************************* * Optical 49 Way Joystick I40 Board *************************************/ @@ -1008,19 +1045,21 @@ CUSTOM_INPUT_MEMBER(vegas_state::i40_r) *************************************/ WRITE32_MEMBER(vegas_state::wheel_board_w) { - //logerror("wheel_board_w: data = %08x\n", data); /* two writes in pairs. bit 11 high, bit 10 flag, flag off first, on second. arg remains the same. */ bool valid = (data & (1 << 11)); bool flag = (data & (1 << 10)); uint8_t op = (data >> 8) & 0x3; uint8_t arg = data & 0xff; + //logerror("wheel_board_w: data = %08x op: %02x arg: %02x\n", data, op, arg); + if (valid && flag) { switch (op) { case 0x0: machine().output().set_value("wheel", arg); // target wheel angle. signed byte. + m_wheel_force = int8_t(~arg); break; case 0x1: @@ -1628,7 +1667,7 @@ static ADDRESS_MAP_START(vegas_cs8_map, AS_PROGRAM, 32, vegas_state) AM_RANGE(0x01000000, 0x0100001f) AM_DEVREADWRITE8("uart1", ns16550_device, ins8250_r, ins8250_w, 0xff) // Serial ttyS01 (TL16C552 CS0) AM_RANGE(0x01400000, 0x0140001f) AM_DEVREADWRITE8("uart2", ns16550_device, ins8250_r, ins8250_w, 0xff) // Serial ttyS02 (TL16C552 CS1) AM_RANGE(0x01800000, 0x0180001f) AM_READWRITE8(parallel_r, parallel_w, 0xff) // Parallel UART (TL16C552 CS2) - //AM_RANGE(0x01c00000, 0x0180001f) AM_READWRITE8(parallel_r, parallel_w, 0xff) // MPS Reset + AM_RANGE(0x01c00000, 0x01c00003) AM_WRITE8(mpsreset_w, 0xff) // MPS Reset ADDRESS_MAP_END /************************************* diff --git a/src/mame/includes/mermaid.h b/src/mame/includes/mermaid.h index 6c7e5451aed..62b78871823 100644 --- a/src/mame/includes/mermaid.h +++ b/src/mame/includes/mermaid.h @@ -5,6 +5,8 @@ Mermaid *************************************************************************/ + +#include "machine/ripple_counter.h" #include "sound/msm5205.h" #include "sound/ay8910.h" #include "screen.h" @@ -22,6 +24,7 @@ public: m_colorram(*this, "colorram"), m_maincpu(*this, "maincpu"), m_adpcm(*this, "adpcm"), + m_adpcm_counter(*this, "adpcm_counter"), m_ay8910(*this, "ay%u", 1), m_gfxdecode(*this, "gfxdecode"), m_screen(*this, "screen"), @@ -51,18 +54,16 @@ public: int m_rougien_gfxbank2; /* sound-related */ - uint32_t m_adpcm_pos; - uint32_t m_adpcm_end; uint8_t m_adpcm_idle; int m_adpcm_data; uint8_t m_adpcm_trigger; uint8_t m_adpcm_rom_sel; - uint8_t m_adpcm_play_reg; bool m_ay8910_enable[2]; /* devices */ required_device m_maincpu; optional_device m_adpcm; + optional_device m_adpcm_counter; required_device_array m_ay8910; required_device m_gfxdecode; required_device m_screen; @@ -77,6 +78,7 @@ public: DECLARE_WRITE_LINE_MEMBER(rougien_sample_rom_lo_w); DECLARE_WRITE_LINE_MEMBER(rougien_sample_rom_hi_w); DECLARE_WRITE_LINE_MEMBER(rougien_sample_playback_w); + DECLARE_WRITE8_MEMBER(adpcm_data_w); DECLARE_WRITE8_MEMBER(mermaid_videoram2_w); DECLARE_WRITE8_MEMBER(mermaid_videoram_w); DECLARE_WRITE8_MEMBER(mermaid_colorram_w); diff --git a/src/mame/includes/pgm2.h b/src/mame/includes/pgm2.h index 8e65d8af58a..c25e0b91add 100644 --- a/src/mame/includes/pgm2.h +++ b/src/mame/includes/pgm2.h @@ -48,6 +48,9 @@ public: DECLARE_WRITE32_MEMBER(fg_videoram_w); DECLARE_WRITE32_MEMBER(bg_videoram_w); DECLARE_WRITE32_MEMBER(mcu_w); + DECLARE_WRITE16_MEMBER(share_bank_w); + DECLARE_READ8_MEMBER(shareram_r); + DECLARE_WRITE8_MEMBER(shareram_w); DECLARE_READ32_MEMBER(orleg2_speedup_r); DECLARE_READ32_MEMBER(kov2nl_speedup_r); @@ -107,11 +110,15 @@ private: uint32_t m_realspritekey; int m_sprite_predecrypted; + uint8_t m_shareram[0x100]; + uint16_t m_share_bank; uint32_t m_mcu_regs[8]; uint32_t m_mcu_result0; uint32_t m_mcu_result1; uint8_t m_mcu_last_cmd; void mcu_command(bool is_command); + uint8_t m_card_data[4][0x100]; + bool m_have_card[4]; // devices required_device m_maincpu; diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 11ce34f844a..9310d3db24e 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -20445,6 +20445,7 @@ edfp // (c) 1991 (Japan, Prototype) hachoo // (c) 1989 hayaosi1 // (c) 1993 iganinju // (c) 1988 (Japan) +inyourfa // (c) 1988 (Japan) jitsupro // (c) 1989 (Japan) kazan // (c) 1988 (World) kickoff // (c) 1988 (Japan) @@ -34690,6 +34691,7 @@ worldwar // A6004 'WW' (c) 1987 @source:snk6502.cpp fantasyg // (c) 1981 SNK +fantasyg2 // (c) 1981 SNK fantasyj // (c) 1981 SNK fantasyu // (c) 1981 Rock-Ola nibbler // (c) 1982 Rock-ola (version 9) @@ -36119,6 +36121,7 @@ zooo // 2004.05 Zooo @source:taitojc.cpp dangcurv // 1995.?? E09 (c) 1995 Taito Corporation +dangcurvj // 1995.?? E09 (c) 1995 Taito Corporation dendego // 1997.03 E35 (c) 1996 Taito Corporation (Japan) - Ver 2.2 J dendego2 // 1998.03 E52 (c) 1998 Taito Corporation (Japan) - Ver 2.5 J dendego23k // 1998.08 E52 (c) 1998 Taito Corporation (Japan) - Ver 2.20 J diff --git a/src/mame/video/vectrex.cpp b/src/mame/video/vectrex.cpp index 50723ccc07e..194d5fc1f2d 100644 --- a/src/mame/video/vectrex.cpp +++ b/src/mame/video/vectrex.cpp @@ -91,7 +91,7 @@ WRITE8_MEMBER(vectrex_state::vectrex_via_w) case 9: m_via_timer2 = (m_via_timer2 & 0x00ff) | (data << 8); - period = (attotime::from_hz(m_maincpu->unscaled_clock()) * m_via_timer2); + period = m_maincpu->cycles_to_attotime(m_via_timer2); if (m_reset_refresh) m_refresh->adjust(period, 0, period); @@ -206,7 +206,7 @@ TIMER_CALLBACK_MEMBER(vectrex_state::update_signal) if (!m_ramp) { - length = m_maincpu->unscaled_clock() * INT_PER_CLOCK + length = m_maincpu->clocks_to_cycles(m_maincpu->clock()) * INT_PER_CLOCK * (machine().time() - m_vector_start_time).as_double(); m_x_int += length * (m_analog[A_X] + m_analog[A_ZR]); @@ -309,7 +309,7 @@ WRITE8_MEMBER(vectrex_state::v_via_pb_w) +(double)(m_pen_y - m_y_int) * (m_pen_y - m_y_int); d2 = b2 - ab * ab / a2; if (d2 < 2e10 && m_analog[A_Z] * m_blank > 0) - m_lp_t->adjust(attotime::from_double(ab / a2 / (m_maincpu->unscaled_clock() * INT_PER_CLOCK))); + m_lp_t->adjust(attotime::from_double(ab / a2 / (m_maincpu->clocks_to_cycles(m_maincpu->clock()) * INT_PER_CLOCK))); } } }