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VI timing period is now set dynamically from the VI registers.

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VI timing should now be accurate (for NTSC)
This commit is contained in:
Happy 2015-09-26 13:16:41 -06:00
parent 55a7498af4
commit f9e69549f6
3 changed files with 24 additions and 23 deletions
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17
src/mame/machine/n64.c
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@ -1006,17 +1006,16 @@ void n64_periphs::vi_scanline_tick()
// Video Interface
void n64_periphs::vi_recalculate_resolution()
{
//n64_state *state = machine().driver_data<n64_state>();
int x_start = (vi_hstart & 0x03ff0000) >> 16;
int x_end = vi_hstart & 0x000003ff;
int y_start = ((vi_vstart & 0x03ff0000) >> 16) / 2;
int y_end = (vi_vstart & 0x000003ff) / 2;
int y_start = ((vi_vstart & 0x03ff0000) >> 16) >> 1;
int y_end = (vi_vstart & 0x000003ff) >> 1;
int width = ((vi_xscale & 0x00000fff) * (x_end - x_start)) / 0x400;
int height = ((vi_yscale & 0x00000fff) * (y_end - y_start)) / 0x400;
rectangle visarea = m_screen->visible_area();
attoseconds_t period = m_screen->frame_period().attoseconds();
// DACRATE is the quarter pixel clock and period will be for a field, not a frame
attoseconds_t period = (vi_hsync & 0xfff) * (vi_vsync & 0xfff) * HZ_TO_ATTOSECONDS(DACRATE_NTSC);
if (width == 0 || height == 0)
{
@ -1042,8 +1041,6 @@ void n64_periphs::vi_recalculate_resolution()
{
}
//state->m_rdp->m_misc_state.m_fb_height = height;
visarea.max_x = width - 1;
visarea.max_y = height - 1;
m_screen->configure((vi_hsync & 0x00000fff)>>2, (vi_vsync & 0x00000fff), visarea, period);
@ -1071,7 +1068,7 @@ READ32_MEMBER( n64_periphs::vi_reg_r )
break;
case 0x10/4: // VI_CURRENT_REG
ret = (m_screen->vpos() << 1) + 1;
ret = (m_screen->vpos() & 0x3FE); // << 1);
break;
case 0x14/4: // VI_BURST_REG
@ -1144,7 +1141,7 @@ WRITE32_MEMBER( n64_periphs::vi_reg_w )
case 0x0c/4: // VI_INTR_REG
vi_intr = data;
vi_scanline_timer->adjust(m_screen->time_until_pos(vi_intr >> 1));
vi_scanline_timer->adjust(m_screen->time_until_pos(vi_intr)); // >> 1));
break;
case 0x10/4: // VI_CURRENT_REG
@ -1157,10 +1154,12 @@ WRITE32_MEMBER( n64_periphs::vi_reg_w )
case 0x18/4: // VI_V_SYNC_REG
vi_vsync = data;
vi_recalculate_resolution();
break;
case 0x1c/4: // VI_H_SYNC_REG
vi_hsync = data;
vi_recalculate_resolution();
break;
case 0x20/4: // VI_LEAP_REG

22
src/mame/video/n64.c
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@ -212,11 +212,11 @@ void n64_periphs::video_update16(bitmap_rgb32 &bitmap)
return;
}
if (hres > 640) // Needed by Top Gear Overdrive (E)
{
invisiblewidth += (hres - 640);
hres = 640;
}
//if (hres > 640) // Needed by Top Gear Overdrive (E)
//{
// invisiblewidth += (hres - 640);
// hres = 640;
//}
if (vres > bitmap.height()) // makes Perfect Dark boot w/o crashing
{
@ -241,7 +241,7 @@ void n64_periphs::video_update16(bitmap_rgb32 &bitmap)
d[i] = (r << 16) | (g << 8) | b;
pixels++;
}
pixels +=invisiblewidth;
pixels += invisiblewidth;
}
}
}
@ -268,11 +268,11 @@ void n64_periphs::video_update32(bitmap_rgb32 &bitmap)
return;
}
if (hres > 640) // Needed by Top Gear Overdrive (E)
{
invisiblewidth += (hres - 640);
hres = 640;
}
//if (hres > 640) // Needed by Top Gear Overdrive (E)
//{
// invisiblewidth += (hres - 640);
// hres = 640;
//}
if (frame_buffer32)
{

8
src/mess/drivers/n64.c
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@ -411,10 +411,12 @@ static MACHINE_CONFIG_START( n64, n64_mess_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
/* Video DACRATE is for quarter pixels, so the horizontal is also given in quarter pixels. However, the horizontal and vertical timing and sizing is adjustable by register and will be reset when the registers are written. */
MCFG_SCREEN_RAW_PARAMS(DACRATE_NTSC,3093,0,3093,525,0,525)
//MCFG_SCREEN_REFRESH_RATE(60)
//MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(640, 525)
MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 479)
//MCFG_SCREEN_SIZE(640, 525)
//MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 479)
MCFG_SCREEN_UPDATE_DRIVER(n64_state, screen_update_n64)
MCFG_SCREEN_VBLANK_DRIVER(n64_state, screen_eof_n64)