diff --git a/src/mame/drivers/galaga.c b/src/mame/drivers/galaga.c index 1dcd5b7d5b4..59d90a8c4f4 100644 --- a/src/mame/drivers/galaga.c +++ b/src/mame/drivers/galaga.c @@ -713,6 +713,7 @@ TODO: static emu_timer *cpu3_interrupt_timer; +static UINT8 custom_mod; @@ -768,8 +769,15 @@ static WRITE8_HANDLER( bosco_latch_w ) break; case 0x05: /* MOD 0 (xevious: n.c.) */ + custom_mod = (custom_mod & ~0x01) | (bit << 0); + break; + case 0x06: /* MOD 1 (xevious: n.c.) */ + custom_mod = (custom_mod & ~0x02) | (bit << 1); + break; + case 0x07: /* MOD 2 (xevious: n.c.) */ + custom_mod = (custom_mod & ~0x04) | (bit << 2); break; } } @@ -803,18 +811,23 @@ static const namco_51xx_interface namco_51xx_intf = } }; + +static READ8_DEVICE_HANDLER( custom_mod_r ) +{ + /* MOD0-2 is connected to K1-3; K0 is left unconnected */ + return custom_mod << 1; +} + static const namco_53xx_interface namco_53xx_intf = { - { /* port read handlers */ - DEVCB_INPUT_PORT("DSWA"), - DEVCB_INPUT_PORT("DSWA_HI"), - DEVCB_INPUT_PORT("DSWB"), - DEVCB_INPUT_PORT("DSWB_HI") + DEVCB_HANDLER(custom_mod_r), /* K port */ + { + DEVCB_INPUT_PORT("DSWA"), /* R0 port */ + DEVCB_INPUT_PORT("DSWA_HI"), /* R1 port */ + DEVCB_INPUT_PORT("DSWB"), /* R2 port */ + DEVCB_INPUT_PORT("DSWB_HI") /* R3 port */ }, - { /* port write handlers */ - DEVCB_NULL, - DEVCB_NULL - } + DEVCB_NULL /* P port */ }; diff --git a/src/mame/drivers/polepos.c b/src/mame/drivers/polepos.c index f3a2c4b00ba..8bbbad32c39 100644 --- a/src/mame/drivers/polepos.c +++ b/src/mame/drivers/polepos.c @@ -229,6 +229,12 @@ Notes: #define POLEPOS_TOGGLE PORT_TOGGLE +static UINT8 steer_last; +static UINT8 steer_delta; +static INT16 steer_accum; + + + /*************************************************************************************/ /* Pole Position II protection */ /*************************************************************************************/ @@ -372,18 +378,52 @@ static const namco_51xx_interface namco_51xx_intf = } }; + +static READ8_DEVICE_HANDLER( namco_53xx_k_r ) +{ + /* hardwired to 0 */ + return 0; +} + +static READ8_DEVICE_HANDLER( steering_changed_r ) +{ + /* read the current steering value and update our delta */ + UINT8 steer_new = input_port_read(device->machine, "STEER"); + steer_accum += (INT8)(steer_new - steer_last); + steer_last = steer_new; + + /* if we have delta, clock things */ + if (steer_accum < 0) + { + steer_delta = 1; + steer_accum++; + } + else if (steer_accum > 0) + { + steer_delta = 0; + steer_accum--; + } + else + steer_delta ^= 1; + + return steer_accum & 1; +} + +static READ8_DEVICE_HANDLER( steering_delta_r ) +{ + return steer_delta; +} + static const namco_53xx_interface namco_53xx_intf = { - { /* port read handlers */ - DEVCB_INPUT_PORT("STEER"), - DEVCB_INPUT_PORT("STEER_HI"), - DEVCB_INPUT_PORT("DSWA"), - DEVCB_INPUT_PORT("DSWA_HI") + DEVCB_HANDLER(namco_53xx_k_r), /* K port */ + { + DEVCB_HANDLER(steering_changed_r), /* R0 port */ + DEVCB_HANDLER(steering_delta_r), /* R1 port */ + DEVCB_INPUT_PORT("DSWA"), /* R2 port */ + DEVCB_INPUT_PORT("DSWA_HI") /* R3 port */ }, - { /* port write handlers */ - DEVCB_NULL, - DEVCB_NULL - } + DEVCB_NULL /* P port (connected to test socket) */ }; @@ -529,9 +569,6 @@ static INPUT_PORTS_START( polepos ) PORT_START("STEER") PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(30) PORT_KEYDELTA(4) - - PORT_START("STEER_HI") - PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "STEER") INPUT_PORTS_END @@ -612,9 +649,6 @@ static INPUT_PORTS_START( poleposa ) PORT_START("STEER") PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(30) PORT_KEYDELTA(4) - - PORT_START("STEER_HI") - PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "STEER") INPUT_PORTS_END @@ -693,9 +727,6 @@ static INPUT_PORTS_START( topracra ) PORT_START("STEER") PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(30) PORT_KEYDELTA(4) - - PORT_START("STEER_HI") - PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "STEER") INPUT_PORTS_END @@ -774,9 +805,6 @@ static INPUT_PORTS_START( polepos2 ) PORT_START("STEER") PORT_BIT ( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(30) PORT_KEYDELTA(4) - - PORT_START("STEER_HI") - PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "STEER") INPUT_PORTS_END diff --git a/src/mame/machine/namco06.c b/src/mame/machine/namco06.c index 72ea2d09c8b..149d714e80b 100644 --- a/src/mame/machine/namco06.c +++ b/src/mame/machine/namco06.c @@ -262,7 +262,10 @@ static DEVICE_START( namco_06xx ) state->write[devnum] = namco_51xx_write; } else if (type == NAMCO_53XX) + { state->read[devnum] = namco_53xx_read; + state->readreq[devnum] = namco_53xx_read_request; + } else if (type == NAMCO_54XX) state->write[devnum] = namco_54xx_write; else if (type == SOUND && sound_get_type(state->device[devnum]) == SOUND_NAMCO_52XX) diff --git a/src/mame/machine/namco53.c b/src/mame/machine/namco53.c index c3fb3a13653..27db21e566e 100644 --- a/src/mame/machine/namco53.c +++ b/src/mame/machine/namco53.c @@ -4,9 +4,6 @@ Namco 53XX This custom chip is a Fujitsu MB8843 MCU programmed to act as an I/O device. -The chip reads/writes the I/O ports when the /IRQ is pulled down. Pin 21 -determines whether a read or write should happen (1=R, 0=W). - MB8843 +------+ EXTAL|1 42|Vcc @@ -32,16 +29,13 @@ determines whether a read or write should happen (1=R, 0=W). GND|21 22|R0 +------+ +Bits K1-K3 select one of 8 modes in which the input data is interpreted. -commands: -00: nop -01 + 4 arguments: set coinage (xevious, possibly because of a bug, is different) -02: go in "credit" mode and enable start buttons -03: disable joystick remapping -04: enable joystick remapping -05: go in "switch" mode -06: nop -07: nop +Pole Position is hard-wired to use mode 0, which reads 4 steering inputs +and 4 DIP switches (only 1 of each is used). + +Dig Dug can control which mode to use via the MOD bit latches. It sets +these values to mode 7 when running. ***************************************************************************/ @@ -54,17 +48,14 @@ commands: #define LOG(x) do { if (VERBOSE) logerror x; } while (0) -#define READ_PORT(st,num) devcb_call_read8(&(st)->in[num], 0) -#define WRITE_PORT(st,num,data) devcb_call_write8(&(st)->out[num], 0, data) - - typedef struct _namco_53xx_state namco_53xx_state; struct _namco_53xx_state { const device_config * cpu; - int in_count; - devcb_resolved_read8 in[4]; - devcb_resolved_write8 out[2]; + UINT8 portO; + devcb_resolved_read8 k; + devcb_resolved_read8 in[4]; + devcb_resolved_write8 p; }; INLINE namco_53xx_state *get_safe_token(const device_config *device) @@ -78,23 +69,63 @@ INLINE namco_53xx_state *get_safe_token(const device_config *device) -READ8_DEVICE_HANDLER( namco_53xx_read ) +static READ8_HANDLER( namco_53xx_K_r ) { - namco_53xx_state *state = get_safe_token(device); + namco_53xx_state *state = get_safe_token(space->cpu->owner); + return devcb_call_read8(&state->k, 0); +} - LOG(("%s: custom 53XX read\n",cpuexec_describe_context(device->machine))); +static READ8_HANDLER( namco_53xx_Rx_r ) +{ + namco_53xx_state *state = get_safe_token(space->cpu->owner); + return devcb_call_read8(&state->in[offset], 0); +} -// digdug: ((state->in_count++) % 2) - switch ((state->in_count++) % 8) - { - case 0: return READ_PORT(state,0) | (READ_PORT(state,1) << 4); // steering -// digdug: case 1: - case 4: return READ_PORT(state,2) | (READ_PORT(state,3) << 4); // dip switches - default: return 0xff; // polepos2 hangs if 0 is returned - } +static WRITE8_HANDLER( namco_53xx_O_w ) +{ + namco_53xx_state *state = get_safe_token(space->cpu->owner); + UINT8 out = (data & 0x0f); + if (data & 0x10) + state->portO = (state->portO & 0x0f) | (out << 4); + else + state->portO = (state->portO & 0xf0) | (out); +} + +static WRITE8_HANDLER( namco_53xx_P_w ) +{ + namco_53xx_state *state = get_safe_token(space->cpu->owner); + devcb_call_write8(&state->p, 0, data); } +static TIMER_CALLBACK( namco_53xx_irq_clear ) +{ + namco_53xx_state *state = get_safe_token((const device_config *)ptr); + cpu_set_input_line(state->cpu, 0, CLEAR_LINE); +} + +void namco_53xx_read_request(const device_config *device) +{ + namco_53xx_state *state = get_safe_token(device); + cpu_set_input_line(state->cpu, 0, ASSERT_LINE); + + // The execution time of one instruction is ~4us, so we must make sure to + // give the cpu time to poll the /IRQ input before we clear it. + // The input clock to the 06XX interface chip is 64H, that is + // 18432000/6/64 = 48kHz, so it makes sense for the irq line to be + // asserted for one clock cycle ~= 21us. + timer_set(device->machine, ATTOTIME_IN_USEC(21), (void *)device, 0, namco_53xx_irq_clear); +} + +READ8_DEVICE_HANDLER( namco_53xx_read ) +{ + namco_53xx_state *state = get_safe_token(device); + UINT8 res = state->portO; + + namco_53xx_read_request(device); + + return res; +} /*************************************************************************** @@ -102,17 +133,16 @@ READ8_DEVICE_HANDLER( namco_53xx_read ) ***************************************************************************/ ADDRESS_MAP_START( namco_53xx_map_io, ADDRESS_SPACE_IO, 8 ) -// AM_RANGE(MB88_PORTK, MB88_PORTK) AM_READ(namco_53xx_K_r) -// AM_RANGE(MB88_PORTO, MB88_PORTO) AM_WRITE(namco_53xx_O_w) -// AM_RANGE(MB88_PORTR0, MB88_PORTR0) AM_READ(namco_53xx_R0_r) -// AM_RANGE(MB88_PORTR2, MB88_PORTR2) AM_READ(namco_53xx_R2_r) + AM_RANGE(MB88_PORTK, MB88_PORTK) AM_READ(namco_53xx_K_r) + AM_RANGE(MB88_PORTO, MB88_PORTO) AM_WRITE(namco_53xx_O_w) + AM_RANGE(MB88_PORTP, MB88_PORTP) AM_WRITE(namco_53xx_P_w) + AM_RANGE(MB88_PORTR0, MB88_PORTR3) AM_READ(namco_53xx_Rx_r) ADDRESS_MAP_END static MACHINE_DRIVER_START( namco_53xx ) MDRV_CPU_ADD("mcu", MB8843, DERIVED_CLOCK(1,1)) /* parent clock, internally divided by 6 */ MDRV_CPU_IO_MAP(namco_53xx_map_io) - MDRV_CPU_FLAGS(CPU_DISABLE) MACHINE_DRIVER_END @@ -139,17 +169,13 @@ static DEVICE_START( namco_53xx ) assert(state->cpu != NULL); astring_free(tempstring); - /* resolve our read callbacks */ + /* resolve our read/write callbacks */ + devcb_resolve_read8(&state->k, &config->k, device); devcb_resolve_read8(&state->in[0], &config->in[0], device); devcb_resolve_read8(&state->in[1], &config->in[1], device); devcb_resolve_read8(&state->in[2], &config->in[2], device); devcb_resolve_read8(&state->in[3], &config->in[3], device); - - /* resolve our write callbacks */ - devcb_resolve_write8(&state->out[0], &config->out[0], device); - devcb_resolve_write8(&state->out[1], &config->out[1], device); - - state_save_register_device_item(device, 0, state->in_count); + devcb_resolve_write8(&state->p, &config->p, device); } @@ -159,8 +185,7 @@ static DEVICE_START( namco_53xx ) static DEVICE_RESET( namco_53xx ) { - namco_53xx_state *state = get_safe_token(device); - state->in_count = 0; +// namco_53xx_state *state = get_safe_token(device); } diff --git a/src/mame/machine/namco53.h b/src/mame/machine/namco53.h index 40f53419f71..c36365b3828 100644 --- a/src/mame/machine/namco53.h +++ b/src/mame/machine/namco53.h @@ -7,8 +7,9 @@ typedef struct _namco_53xx_interface namco_53xx_interface; struct _namco_53xx_interface { + devcb_read8 k; /* read handlers for K port */ devcb_read8 in[4]; /* read handlers for ports A-D */ - devcb_write8 out[2]; /* write handlers for ports A-B */ + devcb_write8 p; /* write handler for P port */ }; @@ -20,6 +21,7 @@ struct _namco_53xx_interface MDRV_DEVICE_REMOVE(_tag) +void namco_53xx_read_request(const device_config *device); READ8_DEVICE_HANDLER( namco_53xx_read );