diff --git a/src/mame/drivers/saturn.c b/src/mame/drivers/saturn.c
index 6d253c6726b..3717f93ac83 100644
--- a/src/mame/drivers/saturn.c
+++ b/src/mame/drivers/saturn.c
@@ -216,9 +216,6 @@ static void scu_dma_indirect(address_space *space, UINT8 dma_ch); /*DMA level 0
 
 //static int scanline;
 
-static emu_timer *stv_rtc_timer;
-
-
 /*A-Bus IRQ checks,where they could be located these?*/
 #define ABUSIRQ(_irq_,_vector_) \
 	{ cputag_set_input_line_and_vector(device->machine(), "maincpu", _irq_, HOLD_LINE , _vector_); }
@@ -2627,7 +2624,7 @@ static MACHINE_START( stv )
     state->m_smpc_ram[0x2d] = DectoBCD(systime.local_time.minute);
     state->m_smpc_ram[0x2f] = DectoBCD(systime.local_time.second);
 
-	stv_rtc_timer = machine.scheduler().timer_alloc(FUNC(stv_rtc_increment));
+	state->m_stv_rtc_timer = machine.scheduler().timer_alloc(FUNC(stv_rtc_increment));
 }
 
 
@@ -2915,7 +2912,7 @@ static MACHINE_RESET( stv )
 	vblank_out_timer->adjust(machine.primary_screen->time_until_pos(0));
 	scan_timer->adjust(machine.primary_screen->time_until_pos(224, 352));
 
-	stv_rtc_timer->adjust(attotime::zero, 0, attotime::from_seconds(1));
+	state->m_stv_rtc_timer->adjust(attotime::zero, 0, attotime::from_seconds(1));
 	state->m_prev_bankswitch = 0xff;
 }
 
diff --git a/src/mame/includes/stv.h b/src/mame/includes/stv.h
index 9e36e2b8582..eab2a5f497d 100644
--- a/src/mame/includes/stv.h
+++ b/src/mame/includes/stv.h
@@ -6,27 +6,31 @@ public:
 	saturn_state(const machine_config &mconfig, device_type type, const char *tag)
 		: driver_device(mconfig, type, tag) { }
 
-	UINT32 *m_workram_l;
-	UINT32 *m_workram_h;
-	UINT8  *m_smpc_ram;
-	UINT32 *m_backupram;
-	UINT32 *m_scu_regs;
-	UINT8  m_NMI_reset;
-	UINT8  m_en_68k;
-	UINT16 *m_sound_ram;
+	UINT32    *m_workram_l;
+	UINT32    *m_workram_h;
+	UINT8     *m_smpc_ram;
+	UINT32    *m_backupram;
+	UINT32    *m_scu_regs;
+	UINT16    *m_sound_ram;
+	UINT8     m_NMI_reset;
+	UINT8     m_en_68k;
 
-	UINT32 m_scu_src[3];		/* Source DMA lv n address*/
-	UINT32 m_scu_dst[3];		/* Destination DMA lv n address*/
-	UINT32 m_scu_src_add[3];	/* Source Addition for DMA lv n*/
-	UINT32 m_scu_dst_add[3];	/* Destination Addition for DMA lv n*/
-    INT32  m_scu_size[3];		/* Transfer DMA size lv n*/
-    UINT32 m_scu_index[3];
-	UINT8  m_stv_multi_bank;
-	UINT8  m_prev_bankswitch;
-	int    m_minit_boost;
-	int    m_sinit_boost;
-	attotime m_minit_boost_timeslice;
-	attotime m_sinit_boost_timeslice;
+	UINT32    m_scu_src[3];		/* Source DMA lv n address*/
+	UINT32    m_scu_dst[3];		/* Destination DMA lv n address*/
+	UINT32    m_scu_src_add[3];	/* Source Addition for DMA lv n*/
+	UINT32    m_scu_dst_add[3];	/* Destination Addition for DMA lv n*/
+    INT32     m_scu_size[3];		/* Transfer DMA size lv n*/
+    UINT32    m_scu_index[3];
+
+	int       m_minit_boost;
+	int       m_sinit_boost;
+	attotime  m_minit_boost_timeslice;
+	attotime  m_sinit_boost_timeslice;
+
+	/* ST-V specific */
+	UINT8     m_stv_multi_bank;
+	UINT8     m_prev_bankswitch;
+    emu_timer *m_stv_rtc_timer;
 
 	legacy_cpu_device* m_maincpu;
 	legacy_cpu_device* m_slave;