mirror of
https://github.com/holub/mame
synced 2025-04-24 01:11:11 +03:00
octopus: added more components, hooked up DIP switches. All systems tests now pass.
This commit is contained in:
mahlemiut
parent
52e5c4109a
commit
fa0e6b3fbd
@ -134,7 +134,8 @@ public:
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m_rtc(*this, "rtc"),
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m_fdc(*this, "fdc"),
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m_floppy0(*this, "fdc:floppy0"),
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m_floppy1(*this, "fdc:floppy1")
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m_floppy1(*this, "fdc:floppy1"),
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m_current_dma(-1)
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{ }
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virtual void machine_reset() override;
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@ -143,6 +144,27 @@ public:
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DECLARE_READ8_MEMBER(vram_r);
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DECLARE_WRITE8_MEMBER(vram_w);
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DECLARE_READ8_MEMBER(get_slave_ack);
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DECLARE_WRITE_LINE_MEMBER(fdc_drq);
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DECLARE_READ8_MEMBER(bank_sel_r);
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DECLARE_WRITE8_MEMBER(bank_sel_w);
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DECLARE_READ8_MEMBER(dma_read);
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DECLARE_WRITE8_MEMBER(dma_write);
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DECLARE_WRITE_LINE_MEMBER(dma_hrq_changed);
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DECLARE_READ8_MEMBER(system_r);
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DECLARE_WRITE8_MEMBER(system_w);
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DECLARE_READ8_MEMBER(cntl_r);
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DECLARE_WRITE8_MEMBER(cntl_w);
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DECLARE_READ8_MEMBER(gpo_r);
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DECLARE_WRITE8_MEMBER(gpo_w);
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DECLARE_WRITE_LINE_MEMBER(dack0_w) { m_dma1->hack_w(state ? 0 : 1); } // for all unused DMA channel?
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DECLARE_WRITE_LINE_MEMBER(dack1_w) { if(!state) m_current_dma = 1; else if(m_current_dma == 1) m_current_dma = -1; } // HD
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DECLARE_WRITE_LINE_MEMBER(dack2_w) { if(!state) m_current_dma = 2; else if(m_current_dma == 2) m_current_dma = -1; } // RAM refresh
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DECLARE_WRITE_LINE_MEMBER(dack3_w) { m_dma1->hack_w(state ? 0 : 1); }
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DECLARE_WRITE_LINE_MEMBER(dack4_w) { m_dma1->hack_w(state ? 0 : 1); }
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DECLARE_WRITE_LINE_MEMBER(dack5_w) { if(!state) m_current_dma = 5; else if(m_current_dma == 5) m_current_dma = -1; } // Floppy
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DECLARE_WRITE_LINE_MEMBER(dack6_w) { m_dma1->hack_w(state ? 0 : 1); }
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DECLARE_WRITE_LINE_MEMBER(dack7_w) { m_dma1->hack_w(state ? 0 : 1); }
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private:
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_subcpu;
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@ -157,6 +179,14 @@ private:
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required_device<fd1793_t> m_fdc;
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required_device<floppy_connector> m_floppy0;
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required_device<floppy_connector> m_floppy1;
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UINT8 m_hd_bank; // HD bank select
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UINT8 m_fd_bank; // Floppy bank select
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UINT8 m_z80_bank; // Z80 bank / RAM refresh
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INT8 m_current_dma; // current DMA channel (-1 for none)
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UINT8 m_current_drive;
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UINT8 m_cntl; // RTC / FDC control (PPI port B)
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UINT8 m_gpo; // General purpose outputs (PPI port C)
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};
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@ -165,9 +195,13 @@ static ADDRESS_MAP_START( octopus_mem, AS_PROGRAM, 8, octopus_state )
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AM_RANGE(0x00000, 0x1ffff) AM_RAM
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// second 128kB for 256kB system
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// expansion RAM, up to 512kB extra
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AM_RANGE(0x20000, 0xcffff) AM_NOP
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AM_RANGE(0xd0000, 0xdffff) AM_RAM AM_SHARE("vram")
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AM_RANGE(0xe0000, 0xe3fff) AM_NOP
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AM_RANGE(0xe4000, 0xe5fff) AM_RAM AM_SHARE("fram")
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AM_RANGE(0xe6000, 0xf3fff) AM_NOP
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AM_RANGE(0xf4000, 0xf5fff) AM_ROM AM_REGION("chargen",0)
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AM_RANGE(0xf6000, 0xfbfff) AM_NOP
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AM_RANGE(0xfc000, 0xfffff) AM_ROM AM_REGION("user1",0)
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ADDRESS_MAP_END
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@ -175,12 +209,12 @@ static ADDRESS_MAP_START( octopus_io, AS_IO, 8, octopus_state )
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x00, 0x0f) AM_DEVREADWRITE("dma1", am9517a_device, read, write)
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AM_RANGE(0x10, 0x1f) AM_DEVREADWRITE("dma2", am9517a_device, read, write)
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// 0x20: System type switch (read), Z80 NMI (write)
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// 0x21: Parity fail reset (write), bit5 SLCTOUT from parallel, bit6 option board parity fail bit7 main board parity fail (read)
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// 0x28: Z80 enable (write)
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AM_RANGE(0x20, 0x20) AM_READ_PORT("DSWA")
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AM_RANGE(0x21, 0x2f) AM_READWRITE(system_r, system_w)
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// 0x31: hard disk bank
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// 0x32: floppy bank
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// 0x33: RAM refresh / Z80 bank
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AM_RANGE(0x31, 0x33) AM_READWRITE(bank_sel_r, bank_sel_w)
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// 0x50-51: Keyboard (i8251)
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// 0x70-73: HD controller
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// 0x80-83: serial timers (i8253)
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@ -192,7 +226,7 @@ static ADDRESS_MAP_START( octopus_io, AS_IO, 8, octopus_state )
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AM_RANGE(0xc9, 0xc9) AM_DEVREADWRITE("crtc", scn2674_device, buffer_r, buffer_w)
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AM_RANGE(0xca, 0xca) AM_RAM // attribute writes go here
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// 0xcf: mode control
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AM_RANGE(0xd0, 0xdf) AM_DEVREADWRITE("fdc", fd1793_t, read, write)
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AM_RANGE(0xd0, 0xd3) AM_DEVREADWRITE("fdc", fd1793_t, read, write)
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// 0xe0: Z80 interrupt vector for RS232
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// 0xe4: Z80 interrupt vector for RS422
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// 0xf0-f1: Parallel interface data I/O (Centronics), and control/status
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@ -214,6 +248,32 @@ ADDRESS_MAP_END
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/* Input ports */
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static INPUT_PORTS_START( octopus )
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PORT_START("DSWA")
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PORT_DIPNAME( 0x03, 0x02, "Number of floppy drives" ) PORT_DIPLOCATION("SWA:1,2")
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PORT_DIPSETTING( 0x00, "None" )
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PORT_DIPSETTING( 0x01, "1 Floppy" )
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PORT_DIPSETTING( 0x02, "2 Floppies" )
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PORT_DIPSETTING( 0x03, "Not used" )
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PORT_DIPNAME( 0x04, 0x00, "Quad drives" ) PORT_DIPLOCATION("SWA:3")
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PORT_DIPSETTING( 0x00, "Disabled" )
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PORT_DIPSETTING( 0x04, "Enabled" )
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PORT_DIPNAME( 0x38, 0x00, "Winchester drive type" ) PORT_DIPLOCATION("SWA:4,5,6")
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PORT_DIPSETTING( 0x00, "None" )
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PORT_DIPSETTING( 0x08, "RO201" )
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PORT_DIPSETTING( 0x10, "RO202" )
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PORT_DIPSETTING( 0x18, "Reserved" )
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PORT_DIPSETTING( 0x20, "RO204" )
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PORT_DIPSETTING( 0x28, "Reserved" )
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PORT_DIPSETTING( 0x30, "RO208" )
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PORT_DIPSETTING( 0x38, "Reserved" )
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PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unused ) ) PORT_DIPLOCATION("SWA:7")
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, "Colour monitor connected" ) PORT_DIPLOCATION("SWA:8")
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PORT_DIPSETTING( 0x00, DEF_STR( No ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Yes ) )
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INPUT_PORTS_END
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@ -227,10 +287,148 @@ READ8_MEMBER(octopus_state::vram_r)
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return m_vram[offset];
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}
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WRITE_LINE_MEMBER(octopus_state::fdc_drq)
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{
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// TODO
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}
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READ8_MEMBER(octopus_state::bank_sel_r)
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{
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switch(offset)
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{
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case 0:
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return m_hd_bank;
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case 1:
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return m_fd_bank;
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case 2:
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return m_z80_bank;
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}
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return 0xff;
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}
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WRITE8_MEMBER(octopus_state::bank_sel_w)
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{
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switch(offset)
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{
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case 0:
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m_hd_bank = data;
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logerror("HD bank = %i\n",data);
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break;
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case 1:
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m_fd_bank = data;
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logerror("Floppy bank = %i\n",data);
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break;
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case 2:
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m_z80_bank = data;
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logerror("Z80/RAM bank = %i\n",data);
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break;
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}
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}
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// System control
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// 0x20: read: System type, write: Z80 NMI
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// 0x21: read: bit5=SLCTOUT from parallel interface, bit6=option board parity fail, bit7=main board parity fail
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// write: parity fail reset
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// ports 0x20 and 0x21 read out the DIP switch configuration (the firmware function to get system config simply does IN AX,20h)
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// 0x28: write: Z80 enable
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WRITE8_MEMBER(octopus_state::system_w)
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{
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logerror("SYS: System control offset %i data %02x\n",offset,data);
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}
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READ8_MEMBER(octopus_state::system_r)
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{
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switch(offset)
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{
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case 0:
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return 0x1f; // do bits 0-4 mean anything? Language?
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}
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return 0xff;
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}
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// RTC/FDC control
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// bit4-5: write precomp.
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// bit6-7: drive select
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READ8_MEMBER(octopus_state::cntl_r)
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{
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return m_cntl;
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}
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WRITE8_MEMBER(octopus_state::cntl_w)
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{
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m_cntl = data;
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m_current_drive = (data & 0xc0) >> 6;
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switch(m_current_drive)
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{
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case 1:
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m_fdc->set_floppy(m_floppy0->get_device());
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break;
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case 2:
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m_fdc->set_floppy(m_floppy1->get_device());
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break;
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}
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logerror("Selected floppy drive %i\n",m_current_drive);
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}
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// General Purpose Outputs - PPI port C
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// bit 2 - floppy side select
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// bit 1 - parallel data I/O (0 = output)
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// bit 0 - parallel control I/O (0 = output)
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READ8_MEMBER(octopus_state::gpo_r)
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{
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return m_gpo;
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}
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WRITE8_MEMBER(octopus_state::gpo_w)
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{
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m_gpo = data;
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switch(m_current_drive)
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{
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case 1:
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m_floppy0->get_device()->ss_w(data & 0x04);
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break;
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case 2:
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m_floppy1->get_device()->ss_w(data & 0x04);
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break;
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default:
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logerror("Attempted to set side on unknown drive %i\n",m_current_drive);
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}
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}
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READ8_MEMBER(octopus_state::dma_read)
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{
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UINT8 byte;
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address_space& prog_space = m_maincpu->space(AS_PROGRAM); // get the right address space
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if(m_current_dma == -1)
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return 0;
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logerror("DMA: MEMR off %06x\n",offset);
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byte = prog_space.read_byte(offset);
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return byte;
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}
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WRITE8_MEMBER(octopus_state::dma_write)
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{
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address_space& prog_space = m_maincpu->space(AS_PROGRAM); // get the right address space
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if(m_current_dma == -1)
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return;
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logerror("DMA: MEMW off %06x data %02x\n",offset,data);
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prog_space.write_byte(offset, data);
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}
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WRITE_LINE_MEMBER( octopus_state::dma_hrq_changed )
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{
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m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
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/* Assert HLDA */
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m_dma2->hack_w(state);
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}
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void octopus_state::machine_reset()
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{
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m_subcpu->set_input_line(INPUT_LINE_HALT,ASSERT_LINE); // halt Z80 to start with
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m_current_dma = -1;
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m_current_drive = 0;
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}
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void octopus_state::video_start()
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@ -251,7 +449,6 @@ SCN2674_DRAW_CHARACTER_MEMBER(octopus_state::display_pixels)
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READ8_MEMBER( octopus_state::get_slave_ack )
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{
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logerror("slave_ack: %i\n",offset);
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if (offset==7)
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return m_pic2->acknowledge();
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@ -274,8 +471,36 @@ static MACHINE_CONFIG_START( octopus, octopus_state )
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MCFG_CPU_IO_MAP(octopus_sub_io)
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MCFG_DEVICE_ADD("dma1", AM9517A, XTAL_24MHz / 6) // 4MHz
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MCFG_I8237_OUT_HREQ_CB(DEVWRITELINE("dma2", am9517a_device, dreq0_w))
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MCFG_I8237_IN_MEMR_CB(READ8(octopus_state,dma_read))
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MCFG_I8237_OUT_MEMW_CB(WRITE8(octopus_state,dma_write))
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MCFG_I8237_IN_IOR_0_CB(NOOP)
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MCFG_I8237_IN_IOR_1_CB(NOOP) // HDC
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MCFG_I8237_IN_IOR_2_CB(NOOP) // RAM Refresh
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MCFG_I8237_IN_IOR_3_CB(NOOP)
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MCFG_I8237_OUT_IOW_0_CB(NOOP)
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MCFG_I8237_OUT_IOW_1_CB(NOOP) // HDC
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MCFG_I8237_OUT_IOW_2_CB(NOOP) // RAM Refresh
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MCFG_I8237_OUT_IOW_3_CB(NOOP)
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MCFG_I8237_OUT_DACK_0_CB(WRITELINE(octopus_state, dack0_w))
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MCFG_I8237_OUT_DACK_1_CB(WRITELINE(octopus_state, dack1_w))
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MCFG_I8237_OUT_DACK_2_CB(WRITELINE(octopus_state, dack2_w))
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MCFG_I8237_OUT_DACK_3_CB(WRITELINE(octopus_state, dack3_w))
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MCFG_DEVICE_ADD("dma2", AM9517A, XTAL_24MHz / 6) // 4MHz
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MCFG_I8237_IN_MEMR_CB(READ8(octopus_state,dma_read))
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MCFG_I8237_OUT_MEMW_CB(WRITE8(octopus_state,dma_write))
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MCFG_I8237_IN_IOR_0_CB(NOOP)
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MCFG_I8237_IN_IOR_1_CB(DEVREAD8("fdc",fd1793_t,data_r)) // FDC
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MCFG_I8237_IN_IOR_2_CB(NOOP)
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MCFG_I8237_IN_IOR_3_CB(NOOP)
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MCFG_I8237_OUT_IOW_0_CB(NOOP)
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MCFG_I8237_OUT_IOW_1_CB(DEVWRITE8("fdc",fd1793_t,data_w)) // FDC
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MCFG_I8237_OUT_IOW_2_CB(NOOP)
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MCFG_I8237_OUT_IOW_3_CB(NOOP)
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MCFG_I8237_OUT_DACK_0_CB(WRITELINE(octopus_state, dack4_w))
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MCFG_I8237_OUT_DACK_1_CB(WRITELINE(octopus_state, dack5_w))
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MCFG_I8237_OUT_DACK_2_CB(WRITELINE(octopus_state, dack6_w))
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MCFG_I8237_OUT_DACK_3_CB(WRITELINE(octopus_state, dack7_w))
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MCFG_PIC8259_ADD("pic_master", INPUTLINE("maincpu",0), VCC, READ8(octopus_state,get_slave_ack))
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MCFG_PIC8259_ADD("pic_slave", DEVWRITELINE("pic_master",pic8259_device, ir7_w), GND, NOOP)
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@ -283,15 +508,17 @@ static MACHINE_CONFIG_START( octopus, octopus_state )
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// RTC (MC146818 via i8255 PPI) TODO: hook up RTC to PPI
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MCFG_DEVICE_ADD("ppi", I8255, 0)
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MCFG_I8255_IN_PORTA_CB(NOOP)
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MCFG_I8255_IN_PORTB_CB(NOOP)
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MCFG_I8255_IN_PORTC_CB(NOOP)
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MCFG_I8255_IN_PORTB_CB(READ8(octopus_state,cntl_r))
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MCFG_I8255_IN_PORTC_CB(READ8(octopus_state,gpo_r))
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MCFG_I8255_OUT_PORTA_CB(NOOP)
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MCFG_I8255_OUT_PORTB_CB(NOOP)
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MCFG_I8255_OUT_PORTC_CB(NOOP)
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MCFG_I8255_OUT_PORTB_CB(WRITE8(octopus_state,cntl_w))
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MCFG_I8255_OUT_PORTC_CB(WRITE8(octopus_state,gpo_w))
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MCFG_MC146818_ADD("rtc", XTAL_32_768kHz)
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MCFG_MC146818_IRQ_HANDLER(DEVWRITELINE("pic_slave",pic8259_device, ir4_w))
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MCFG_FD1793_ADD("fdc",XTAL_16MHz / 8)
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MCFG_WD_FDC_INTRQ_CALLBACK(DEVWRITELINE("pic_master",pic8259_device, ir5_w))
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MCFG_WD_FDC_DRQ_CALLBACK(DEVWRITELINE("dma2",am9517a_device, dreq1_w))
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MCFG_FLOPPY_DRIVE_ADD("fdc:floppy0", octopus_floppies, "525dd", floppy_image_device::default_floppy_formats)
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MCFG_FLOPPY_DRIVE_ADD("fdc:floppy1", octopus_floppies, "525dd", floppy_image_device::default_floppy_formats)
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