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m6509: Fixed EA zero page indirect + Y (post indexed). [Curt Coder]

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This commit is contained in:
Curt Coder 2012-09-26 14:11:46 +00:00
parent 037ce8cfc1
commit fa40275471
2 changed files with 49 additions and 10 deletions
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36
src/emu/cpu/m6502/m6509.c
View File

@ -81,6 +81,7 @@ struct m6509_Regs {
address_space *space; address_space *space;
direct_read_data *direct; direct_read_data *direct;
int int_occured;
int icount; int icount;
devcb_resolved_read8 rdmem_id; /* readmem callback for indexed instructions */ devcb_resolved_read8 rdmem_id; /* readmem callback for indexed instructions */
@ -157,6 +158,18 @@ static CPU_INIT( m6509 )
cpustate->rdmem_id.resolve(nullrcb, *device); cpustate->rdmem_id.resolve(nullrcb, *device);
cpustate->wrmem_id.resolve(nullwcb, *device); cpustate->wrmem_id.resolve(nullwcb, *device);
} }
device->save_item(NAME(cpustate->pc.w.l));
device->save_item(NAME(cpustate->sp.w.l));
device->save_item(NAME(cpustate->p));
device->save_item(NAME(cpustate->a));
device->save_item(NAME(cpustate->x));
device->save_item(NAME(cpustate->y));
device->save_item(NAME(cpustate->pending_irq));
device->save_item(NAME(cpustate->after_cli));
device->save_item(NAME(cpustate->nmi_state));
device->save_item(NAME(cpustate->irq_state));
device->save_item(NAME(cpustate->so_state));
} }
static CPU_RESET( m6509 ) static CPU_RESET( m6509 )
@ -177,7 +190,8 @@ static CPU_RESET( m6509 )
cpustate->p = F_T|F_B|F_I|F_Z|(P&F_D); /* set T, I and Z flags */ cpustate->p = F_T|F_B|F_I|F_Z|(P&F_D); /* set T, I and Z flags */
cpustate->pending_irq = 0; /* nonzero if an IRQ is pending */ cpustate->pending_irq = 0; /* nonzero if an IRQ is pending */
cpustate->after_cli = 0; /* pending IRQ and last insn cleared I */ cpustate->after_cli = 0; /* pending IRQ and last insn cleared I */
cpustate->irq_callback = NULL; cpustate->irq_state = 0;
cpustate->nmi_state = 0;
} }
static CPU_EXIT( m6509 ) static CPU_EXIT( m6509 )
@ -239,9 +253,18 @@ static CPU_EXECUTE( m6509 )
LOG((": irq line is clear\n")); LOG((": irq line is clear\n"));
} }
} }
else else {
if( cpustate->pending_irq ) if ( cpustate->pending_irq == 2 ) {
m6509_take_irq(cpustate); if ( cpustate->int_occured - cpustate->icount > 1 ) {
cpustate->pending_irq = 1;
}
}
if( cpustate->pending_irq == 1 )
m6509_take_irq(cpustate);
if ( cpustate->pending_irq == 2 ) {
cpustate->pending_irq = 1;
}
}
} while (cpustate->icount > 0); } while (cpustate->icount > 0);
} }
@ -284,6 +307,7 @@ static void m6509_set_irq_line(m6509_Regs *cpustate, int irqline, int state)
{ {
LOG(( "M6509 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag())); LOG(( "M6509 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag()));
cpustate->pending_irq = 1; cpustate->pending_irq = 1;
cpustate->int_occured = cpustate->icount;
} }
} }
} }
@ -401,7 +425,7 @@ CPU_GET_INFO( m6509 )
cpustate->p & 0x01 ? 'C':'.'); cpustate->p & 0x01 ? 'C':'.');
break; break;
case CPUINFO_STR_REGISTER + M6509_PC: sprintf(info->s, "PC:%04X", cpustate->pc.w.l); break; case CPUINFO_STR_REGISTER + M6509_PC: sprintf(info->s, "PC:%05X", cpustate->pc.d); break;
case CPUINFO_STR_REGISTER + M6509_S: sprintf(info->s, "S:%02X", cpustate->sp.b.l); break; case CPUINFO_STR_REGISTER + M6509_S: sprintf(info->s, "S:%02X", cpustate->sp.b.l); break;
case CPUINFO_STR_REGISTER + M6509_P: sprintf(info->s, "P:%02X", cpustate->p); break; case CPUINFO_STR_REGISTER + M6509_P: sprintf(info->s, "P:%02X", cpustate->p); break;
case CPUINFO_STR_REGISTER + M6509_A: sprintf(info->s, "A:%02X", cpustate->a); break; case CPUINFO_STR_REGISTER + M6509_A: sprintf(info->s, "A:%02X", cpustate->a); break;
@ -409,7 +433,7 @@ CPU_GET_INFO( m6509 )
case CPUINFO_STR_REGISTER + M6509_Y: sprintf(info->s, "Y:%02X", cpustate->y); break; case CPUINFO_STR_REGISTER + M6509_Y: sprintf(info->s, "Y:%02X", cpustate->y); break;
case CPUINFO_STR_REGISTER + M6509_PC_BANK: sprintf(info->s, "M0:%01X", cpustate->pc_bank.b.h2); break; case CPUINFO_STR_REGISTER + M6509_PC_BANK: sprintf(info->s, "M0:%01X", cpustate->pc_bank.b.h2); break;
case CPUINFO_STR_REGISTER + M6509_IND_BANK: sprintf(info->s, "M1:%01X", cpustate->ind_bank.b.h2); break; case CPUINFO_STR_REGISTER + M6509_IND_BANK: sprintf(info->s, "M1:%01X", cpustate->ind_bank.b.h2); break;
case CPUINFO_STR_REGISTER + M6509_EA: sprintf(info->s, "EA:%04X", cpustate->ea.w.l); break; case CPUINFO_STR_REGISTER + M6509_EA: sprintf(info->s, "EA:%05X", cpustate->ea.d); break;
case CPUINFO_STR_REGISTER + M6509_ZP: sprintf(info->s, "ZP:%03X", cpustate->zp.w.l); break; case CPUINFO_STR_REGISTER + M6509_ZP: sprintf(info->s, "ZP:%03X", cpustate->zp.w.l); break;
} }
} }

23
src/emu/cpu/m6502/ops09.h
View File

@ -128,9 +128,24 @@
EAH = RDMEM(ZPD); \ EAH = RDMEM(ZPD); \
EAWH = PBWH; \ EAWH = PBWH; \
if (EAL + Y > 0xff) \ if (EAL + Y > 0xff) \
cpustate->icount--; \ cpustate->icount--; \
EAW += Y EAW += Y
/***************************************************************
* EA = zero page indirect + Y (post indexed)
* subtract 1 cycle if page boundary is crossed
***************************************************************/
#undef EA_IDY_P
#define EA_IDY_P \
ZPL = RDOPARG(); \
EAL = RDMEM(ZPD); \
ZPL++; \
EAH = RDMEM(ZPD); \
EAWH = PBWH; \
if (EAL + Y > 0xff) { \
RDMEM( ( EAH << 8 ) | ( ( EAL + Y ) & 0xff ) ); \
} \
EAW += Y;
/*************************************************************** /***************************************************************
* EA = zero page indirect + Y (post indexed) * EA = zero page indirect + Y (post indexed)
@ -144,7 +159,7 @@
EAH = RDMEM(ZPD); \ EAH = RDMEM(ZPD); \
EAWH = IBWH; \ EAWH = IBWH; \
if (EAL + Y > 0xff) \ if (EAL + Y > 0xff) \
cpustate->icount--; \ cpustate->icount--; \
EAW += Y EAW += Y
/*************************************************************** /***************************************************************
@ -172,13 +187,13 @@
{ \ { \
tmp = RDOPARG(); \ tmp = RDOPARG(); \
EAW = PCW + (signed char)tmp; \ EAW = PCW + (signed char)tmp; \
cpustate->icount -= (PCH == EAH) ? 1 : 2; \ cpustate->icount -= (PCH == EAH) ? 1 : 2; \
PCD = EAD|PB; \ PCD = EAD|PB; \
} \ } \
else \ else \
{ \ { \
PCW++; \ PCW++; \
cpustate->icount -= 1; \ cpustate->icount -= 1; \
} }
/* 6502 ******************************************************** /* 6502 ********************************************************