From fa467244bf7fb4a1adb8aa8ea4f2db7b3501d8f8 Mon Sep 17 00:00:00 2001
From: hap <happppp@users.noreply.github.com>
Date: Tue, 9 Mar 2021 16:43:11 +0100
Subject: [PATCH] pps41: add remaining mm78 opcodes

---
 src/devices/cpu/pps41/mm76op.cpp    | 21 ++++++-----
 src/devices/cpu/pps41/mm78op.cpp    | 54 +++++++++++++++++++++++++++--
 src/devices/cpu/pps41/pps41base.cpp |  1 -
 3 files changed, 63 insertions(+), 13 deletions(-)

diff --git a/src/devices/cpu/pps41/mm76op.cpp b/src/devices/cpu/pps41/mm76op.cpp
index 3c3278ebcf3..cd674ef1176 100644
--- a/src/devices/cpu/pps41/mm76op.cpp
+++ b/src/devices/cpu/pps41/mm76op.cpp
@@ -96,11 +96,12 @@ void mm76_device::op_sb()
 	// Bu falling or Bu == 3: SOS
 	if (((m_prev2_b & 0x30) == 0x30 && (m_prev_b & 0x30) != 0x30) || (m_prev_b & 0x30) == 0x30)
 	{
-		if ((m_ram_addr & 0xf) > m_d_pins)
-			logerror("SOS invalid pin %d at $%03X\n", m_ram_addr & 0xf, m_prev_pc);
+		u8 bl = m_ram_addr & 0xf;
+		if (bl > m_d_pins)
+			logerror("SOS invalid pin %d at $%03X\n", bl, m_prev_pc);
 		else
 		{
-			m_d_output = (m_d_output | (1 << (m_ram_addr & 0xf))) & m_d_mask;
+			m_d_output = (m_d_output | (1 << bl)) & m_d_mask;
 			m_write_d(m_d_output);
 		}
 	}
@@ -124,11 +125,12 @@ void mm76_device::op_rb()
 	// Bu falling or Bu == 3: ROS
 	if (((m_prev2_b & 0x30) == 0x30 && (m_prev_b & 0x30) != 0x30) || (m_prev_b & 0x30) == 0x30)
 	{
-		if ((m_ram_addr & 0xf) > m_d_pins)
-			logerror("ROS invalid pin %d at $%03X\n", m_ram_addr & 0xf, m_prev_pc);
+		u8 bl = m_ram_addr & 0xf;
+		if (bl > m_d_pins)
+			logerror("ROS invalid pin %d at $%03X\n", bl, m_prev_pc);
 		else
 		{
-			m_d_output = m_d_output & ~(1 << (m_ram_addr & 0xf));
+			m_d_output = m_d_output & ~(1 << bl);
 			m_write_d(m_d_output);
 		}
 	}
@@ -152,10 +154,11 @@ void mm76_device::op_skbf()
 	// Bu falling or Bu == 3: SKISL
 	if (((m_prev2_b & 0x30) == 0x30 && (m_prev_b & 0x30) != 0x30) || (m_prev_b & 0x30) == 0x30)
 	{
-		if ((m_ram_addr & 0xf) > m_d_pins)
-			logerror("SKISL invalid pin %d at $%03X\n", m_ram_addr & 0xf, m_prev_pc);
+		u8 bl = m_ram_addr & 0xf;
+		if (bl > m_d_pins)
+			logerror("SKISL invalid pin %d at $%03X\n", bl, m_prev_pc);
 		else
-			m_skip = !BIT((m_d_output | m_read_d()) & m_d_mask, m_ram_addr & 0xf);
+			m_skip = !BIT((m_d_output | m_read_d()) & m_d_mask, bl);
 	}
 
 	// Bu != 3: SKBF
diff --git a/src/devices/cpu/pps41/mm78op.cpp b/src/devices/cpu/pps41/mm78op.cpp
index 82ec94aa449..05c2dac9d36 100644
--- a/src/devices/cpu/pps41/mm78op.cpp
+++ b/src/devices/cpu/pps41/mm78op.cpp
@@ -54,19 +54,67 @@ void mm78_device::op_skbf()
 void mm78_device::op_sos()
 {
 	// SOS: SB/SOS opcodes are separated
-	op_todo();
+
+	// B7 must be low
+	if (m_ram_addr & 0x40)
+	{
+		logerror("SOS invalid access at $%03X\n", m_prev_pc);
+		return;
+	}
+
+	u8 bl = m_ram_addr & 0xf;
+	if (bl < 10)
+	{
+		m_d_output = (m_d_output | (1 << bl)) & m_d_mask;
+		m_write_d(m_d_output);
+	}
+	else if (bl < 12)
+		m_int_ff[~bl & 1] = 1;
+	else
+		logerror("SOS invalid pin %d at $%03X\n", bl, m_prev_pc);
 }
 
 void mm78_device::op_ros()
 {
 	// ROS: RB/ROS opcodes are separated
-	op_todo();
+
+	// B7 must be low
+	if (m_ram_addr & 0x40)
+	{
+		logerror("ROS invalid access at $%03X\n", m_prev_pc);
+		return;
+	}
+
+	u8 bl = m_ram_addr & 0xf;
+	if (bl < 10)
+	{
+		m_d_output = m_d_output & ~(1 << bl);
+		m_write_d(m_d_output);
+	}
+	else if (bl < 12)
+		m_int_ff[~bl & 1] = 0;
+	else
+		logerror("ROS invalid pin %d at $%03X\n", bl, m_prev_pc);
 }
 
 void mm78_device::op_skisl()
 {
 	// SKISL: SKBF/SKISL opcodes are separated
-	op_todo();
+
+	// B7 must be low
+	if (m_ram_addr & 0x40)
+	{
+		logerror("SKISL invalid access at $%03X\n", m_prev_pc);
+		return;
+	}
+
+	u8 bl = m_ram_addr & 0xf;
+	if (bl < 10)
+		m_skip = !BIT((m_d_output | m_read_d()) & m_d_mask, bl);
+	else if (bl < 12)
+		m_skip = !m_int_ff[~bl & 1];
+	else
+		logerror("SKISL invalid pin %d at $%03X\n", bl, m_prev_pc);
 }
 
 
diff --git a/src/devices/cpu/pps41/pps41base.cpp b/src/devices/cpu/pps41/pps41base.cpp
index 1fb6eba3b82..9c9786403c0 100644
--- a/src/devices/cpu/pps41/pps41base.cpp
+++ b/src/devices/cpu/pps41/pps41base.cpp
@@ -41,7 +41,6 @@ TODO:
 - allowed opcodes after TAB should be limited
 - add MCU mask options, there's one for inverting interrupts
 - add serial i/o
-- finish MM78 opcodes
 - add MM78LA
 
 */