mirror of
https://github.com/holub/mame
synced 2025-04-25 17:56:43 +03:00
Various hooks, nw
This commit is contained in:
Angelo Salese
parent
0903edf1b4
commit
fa82b34e8b
@ -15,6 +15,7 @@ XTAL: 12.000 Mhz
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#include "emu.h"
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#include "cpu/z80/z80.h"
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#include "sound/okim6295.h"
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#include "video/mc6845.h"
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@ -40,13 +41,16 @@ public:
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m_bg_tilemap->mark_tile_dirty(offset / 2);
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}
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DECLARE_WRITE8_MEMBER(mux_w);
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DECLARE_READ8_MEMBER(mux_r);
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tilemap_t *m_fg_tilemap;
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tilemap_t *m_bg_tilemap;
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required_shared_ptr<UINT8> m_fgram;
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required_shared_ptr<UINT8> m_bgram;
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UINT8 mux_data;
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};
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static TILE_GET_INFO( get_fg_tile_info )
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@ -85,13 +89,18 @@ VIDEO_START( chance32 )
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state->m_fg_tilemap->set_flip(TILE_FLIPX|TILE_FLIPY);
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state->m_bg_tilemap->set_flip(TILE_FLIPX|TILE_FLIPY);
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}
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SCREEN_UPDATE_IND16( chance32 )
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{
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chance32_state *state = screen.machine().driver_data<chance32_state>();
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/* TODO: wtf? */
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state->m_bg_tilemap->set_scrollx(0, 352);
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state->m_bg_tilemap->set_scrolly(0, 160);
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state->m_fg_tilemap->set_scrollx(0, 352);
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state->m_fg_tilemap->set_scrolly(0, 160);
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state->m_bg_tilemap->draw(bitmap, cliprect, 0, 0);
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state->m_fg_tilemap->draw(bitmap, cliprect, 0, 0);
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@ -107,17 +116,284 @@ static ADDRESS_MAP_START( chance32_map, AS_PROGRAM, 8, chance32_state )
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AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(chance32_fgram_w) AM_SHARE("fgram")
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AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(chance32_bgram_w) AM_SHARE("bgram")
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ADDRESS_MAP_END
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WRITE8_MEMBER(chance32_state::mux_w)
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{
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mux_data = data;
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}
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READ8_MEMBER(chance32_state::mux_r)
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{
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UINT8 res,i;
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const char *const muxnames[4] = { "IN0", "IN1", "IN2", "IN3" };
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res = 0;
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for(i=0;i<4;i++)
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{
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if(mux_data & 1 << i)
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res |= input_port_read(machine(),muxnames[i]);
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}
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return res;
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}
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static ADDRESS_MAP_START( chance32_portmap, AS_IO, 8, chance32_state )
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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//AM_RANGE(0x10, 0x10) AM_WRITENOP // ?
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AM_RANGE(0x13, 0x13) AM_WRITE(mux_w)
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AM_RANGE(0x20, 0x20) AM_READ_PORT("DSW0")
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AM_RANGE(0x21, 0x21) AM_READ_PORT("DSW1")
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AM_RANGE(0x22, 0x22) AM_READ_PORT("DSW2")
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AM_RANGE(0x23, 0x23) AM_READ_PORT("DSW3")
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AM_RANGE(0x24, 0x24) AM_READ_PORT("DSW4")
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AM_RANGE(0x25, 0x25) AM_READ(mux_r)
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// AM_RANGE(0x26, 0x26) AM_READ_PORT("UNK") // vblank?
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AM_RANGE(0x30, 0x30) AM_DEVWRITE("crtc", mc6845_device, address_w)
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AM_RANGE(0x31, 0x31) AM_DEVWRITE("crtc", mc6845_device, register_w)
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AM_RANGE(0x50, 0x50) AM_DEVREADWRITE("oki", okim6295_device, read, write)
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// AM_RANGE(0x60, 0x60) AM_WRITENOP // lamps
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ADDRESS_MAP_END
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static INPUT_PORTS_START( chance32 )
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PORT_START("UNK")
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PORT_START("DSW0")
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PORT_DIPNAME( 0x01, 0x00, "DSW0" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_START("DSW1")
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PORT_DIPNAME( 0x01, 0x00, "DSW1" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_START("DSW2")
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PORT_DIPNAME( 0x01, 0x00, "DSW2" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_START("DSW3")
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PORT_DIPNAME( 0x01, 0x00, "DSW3" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_START("DSW4")
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PORT_DIPNAME( 0x01, 0x00, "DSW4" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_START("IN0")
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PORT_DIPNAME( 0x01, 0x00, "0" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_START("IN1")
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PORT_DIPNAME( 0x01, 0x00, "1" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_START("IN2")
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PORT_DIPNAME( 0x01, 0x00, "2" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_START("IN3")
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PORT_DIPNAME( 0x01, 0x00, "3" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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INPUT_PORTS_END
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|
||||
static const gfx_layout tiles8x8_layout =
|
||||
@ -148,13 +424,27 @@ static MACHINE_RESET( chance32 )
|
||||
|
||||
}
|
||||
|
||||
static const mc6845_interface mc6845_intf =
|
||||
{
|
||||
"screen", /* screen we are acting on */
|
||||
16, /* number of pixels per video memory address */
|
||||
NULL, /* before pixel update callback */
|
||||
NULL, /* row update callback */
|
||||
NULL, /* after pixel update callback */
|
||||
DEVCB_NULL, /* callback for display state changes */
|
||||
DEVCB_NULL, /* callback for cursor state changes */
|
||||
DEVCB_NULL, /* HSYNC callback */
|
||||
DEVCB_NULL, /* VSYNC callback */
|
||||
NULL /* update address callback */
|
||||
};
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( chance32, chance32_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", Z80,12000000/2)
|
||||
MCFG_CPU_PROGRAM_MAP(chance32_map)
|
||||
MCFG_CPU_IO_MAP(chance32_portmap)
|
||||
|
||||
MCFG_CPU_VBLANK_INT("screen", irq0_line_hold)
|
||||
|
||||
MCFG_MACHINE_START(chance32)
|
||||
@ -164,10 +454,12 @@ static MACHINE_CONFIG_START( chance32, chance32_state )
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
||||
MCFG_SCREEN_SIZE(35*16, 29*8)
|
||||
MCFG_SCREEN_SIZE(40*16, 32*8)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 35*16-1, 0, 29*8-1)
|
||||
MCFG_SCREEN_UPDATE_STATIC(chance32)
|
||||
|
||||
MCFG_MC6845_ADD("crtc", H46505, 12000000/14, mc6845_intf) /* hand tuned to get ~60 fps */
|
||||
|
||||
MCFG_GFXDECODE(chance32)
|
||||
MCFG_PALETTE_LENGTH(0x800)
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user