diff --git a/src/emu/cpu/superfx/superfx.c b/src/emu/cpu/superfx/superfx.c
index 08f3ba0a617..9b0a5c760a9 100644
--- a/src/emu/cpu/superfx/superfx.c
+++ b/src/emu/cpu/superfx/superfx.c
@@ -530,6 +530,8 @@ void superfx_mmio_write(const device_config *cpu, UINT32 addr, UINT8 data)
 
 	addr &= 0xffff;
 
+	//printf( "superfx_mmio_write: %08x = %02x\n", addr, data );
+
 	if(addr >= 0x3100 && addr <= 0x32ff)
 	{
 		return superfx_cache_mmio_write(cpustate, addr - 0x3100, data);
@@ -573,11 +575,11 @@ void superfx_mmio_write(const device_config *cpu, UINT32 addr, UINT8 data)
 			break;
 
 		case 0x3033:
-			cpustate->bramr = data;
+			cpustate->bramr = data & 1;
 			break;
 
 		case 0x3034:
-			cpustate->pbr = data;
+			cpustate->pbr = data & 0x7f;
 			superfx_cache_flush(cpustate);
 			break;
 
@@ -591,7 +593,7 @@ void superfx_mmio_write(const device_config *cpu, UINT32 addr, UINT8 data)
 			break;
 
 		case 0x3039:
-			cpustate->clsr = data;
+			cpustate->clsr = data & 1;
 			superfx_update_speed(cpustate);
 			break;
 
@@ -1169,7 +1171,7 @@ static CPU_EXECUTE( superfx )
 				{ // DIV2
 					cpustate->sfr &= ~SUPERFX_SFR_CY;
 					cpustate->sfr |= (*(cpustate->sreg) & 1) ? SUPERFX_SFR_CY : 0;
-					superfx_gpr_write(cpustate, cpustate->dreg_idx, ((INT16)(*(cpustate->sreg)) >> 1) + ((*(cpustate->sreg) + 1) >> 16));
+					superfx_gpr_write(cpustate, cpustate->dreg_idx, ((INT16)(*(cpustate->sreg)) >> 1) + ((UINT32)(*(cpustate->sreg) + 1) >> 16));
 					superfx_dreg_sfr_sz_update(cpustate);
 					superfx_regs_reset(cpustate);
 				}
@@ -1194,7 +1196,7 @@ static CPU_EXECUTE( superfx )
 				}
 				else
 				{ // LJMP
-					cpustate->pbr = cpustate->r[op & 0xf];
+					cpustate->pbr = cpustate->r[op & 0xf] & 0x7f;
 					superfx_gpr_write(cpustate, 15, *(cpustate->sreg));
 					cpustate->cbr = cpustate->r[15] & 0xfff0;
 					superfx_cache_flush(cpustate);
@@ -1319,12 +1321,12 @@ static CPU_EXECUTE( superfx )
 						break;
 					case SUPERFX_SFR_ALT2: // RAMB
 						superfx_rambuffer_sync(cpustate);
-						cpustate->rambr = *(cpustate->sreg);
+						cpustate->rambr = ((*(cpustate->sreg)) & 1) ? 1 : 0;
 						superfx_regs_reset(cpustate);
 						break;
 					case SUPERFX_SFR_ALT3: // ROMB
 						superfx_rombuffer_sync(cpustate);
-						cpustate->rombr = *(cpustate->sreg);
+						cpustate->rombr = *(cpustate->sreg) & 0x7f;
 						superfx_regs_reset(cpustate);
 						break;
 				}
diff --git a/src/mame/machine/snes.c b/src/mame/machine/snes.c
index 269841af364..76a3603ac9a 100644
--- a/src/mame/machine/snes.c
+++ b/src/mame/machine/snes.c
@@ -1354,8 +1354,6 @@ WRITE8_HANDLER( snes_w_io )
 			break;
 	}
 
-	logerror("Unsupported MMIO write: offset %08x = %02x\n", offset, data);
-
 	snes_ram[offset] = data;
 }
 
@@ -1520,7 +1518,12 @@ READ8_HANDLER( snes_r_bank3 )
 	UINT8 value;
 	UINT16 address = offset & 0xffff;
 
-	if (snes_cart.mode & 5)							/* Mode 20 & 22 */
+	if (snes_has_addon_chip == HAS_SUPERFX)
+	{
+		//printf( "snes_r_bank3: %08x\n", offset );
+		return snes_ram[0x400000 + offset];
+	}
+	else if (snes_cart.mode & 5)							/* Mode 20 & 22 */
 	{
 		if ((address < 0x8000) && (snes_cart.mode == SNES_MODE_20)) //FIXME: check this
 			value =  snes_ram[0x200000 + ((offset & ~0x8000) | 0x8000)];							/* Reserved */
@@ -1669,7 +1672,9 @@ WRITE8_HANDLER( snes_w_bank1 )
 		snes_w_io(space, address, data);
 	else if (address < 0x8000)
 	{
-		if (snes_has_addon_chip == HAS_OBC1)
+		if (snes_has_addon_chip == HAS_SUPERFX)
+			snes_ram[0x700000 + (address & 0x1fff)] = data;
+		else if (snes_has_addon_chip == HAS_OBC1)
 			obc1_write(space, offset, data);
 		else if ((snes_has_addon_chip == HAS_DSP2) && (offset >= 0x200000))
 			DSP2_write(data);
@@ -2478,5 +2483,6 @@ WRITE8_HANDLER( superfx_w_bank2 )
 
 WRITE8_HANDLER( superfx_w_bank3 )
 {
+	//printf( "superfx_w_bank3: %08x = %02x\n", 0x600000 + offset, data );
 	snes_ram[0x600000 + offset] = data;
 }