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https://github.com/holub/mame
synced 2025-04-18 22:49:58 +03:00
Add disassembler for CDC 160(-A) architecture
This commit is contained in:
AJR
parent
f3d02b6425
commit
fb6b48711a
@ -3521,6 +3521,16 @@ if opt_tool(CPUS, "SIGMA2") then
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table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/sigma2/sigma2d.h")
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end
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--------------------------------------------------
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-- Control Data Corporation 160 (disassembler only)
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--@src/devices/cpu/cdc160/cdc160.h,CPUS["CDC160"] = true
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--------------------------------------------------
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if opt_tool(CPUS, "CDC160") then
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table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/cdc160/cdc160d.cpp")
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table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/cdc160/cdc160d.h")
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end
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--------------------------------------------------
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-- Control Data Corporation 1700 (disassembler only)
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--@src/devices/cpu/cdc1700/cdc1700.h,CPUS["CDC1700"] = true
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379
src/devices/cpu/cdc160/cdc160d.cpp
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379
src/devices/cpu/cdc160/cdc160d.cpp
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@ -0,0 +1,379 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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/***************************************************************************
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CDC 160/160-A disassembler
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Some departures from the syntax used by CDC's assemblers:
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— Two-word instructions are always written on one line each. This
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was not necessarily permitted, especially for INP and OUT.
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— For forward and backward addressing modes, the effective address is
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given rather than the 6-bit displacement to be added to P.
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— For 160-A only, a synthetic two-word instruction JPM (Jump Memory)
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represents the common pattern of using JFI with a 1-word displacement
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to jump to any address in the 4096-word bank.
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***************************************************************************/
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#include "emu.h"
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#include "cdc160d.h"
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cdc160_disassembler::cdc160_disassembler()
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: util::disasm_interface()
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{
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}
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u32 cdc160_disassembler::opcode_alignment() const
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{
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return 1;
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}
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cdc160a_disassembler::cdc160a_disassembler()
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: cdc160_disassembler()
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{
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}
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u32 cdc160a_disassembler::interface_flags() const
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{
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return PAGED;
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}
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u32 cdc160a_disassembler::page_address_bits() const
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{
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return 12;
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}
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namespace {
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const char *const f_160a_bank_ops[7] =
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{
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"SRJ", "SIC", "IRJ", "SDC", "DRJ", "SID", "ACJ"
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};
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const char *const f_160_alu_ops[10] =
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{
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"LP", "LS", "LD", "LC", "AD", "SB", "ST", "SR", "RA", "AO"
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};
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const char *const f_160a_alu_ops[10] =
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{
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"LP", "SC", "LD", "LC", "AD", "SB", "ST", "SR", "RA", "AO"
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};
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const char *const f_cond_jp_ops[6] =
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{
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"ZJ", "NZ", "PJ", "NJ"
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};
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// 12-bit ones' complement addition
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inline u16 add_relative(uint_fast16_t a, uint_fast16_t b) noexcept
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{
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u16 c = (a & 07777) + (b & 07777);
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if (c >= 07777)
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c -= 07777;
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return c;
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}
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} // anonymous namespace
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offs_t cdc160_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms)
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{
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u16 inst = opcodes.r16(pc) & 07777;
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if (inst < 0200)
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{
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util::stream_format(stream, "%s %o", BIT(inst, 6) ? "SHA" : "ERR", inst & 0077);
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return 1 | SUPPORTED;
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}
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else if (inst < 01000)
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{
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// No address (6-bit immediate) mode
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util::stream_format(stream, "%sN %o", f_160_alu_ops[BIT(inst, 6, 3) - 2], inst & 0077);
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return 1 | SUPPORTED;
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}
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else if (inst < 06000)
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{
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if (BIT(inst, 7))
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{
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// Relative forward or backward address mode
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util::stream_format(stream, "%s%c %04o", f_160_alu_ops[BIT(inst, 8, 4) - 2], BIT(inst, 6) ? 'B' : 'F',
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add_relative(pc, BIT(inst, 6) ? ~(inst & 0077) : inst & 0077));
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return 1 | SUPPORTED;
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}
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else
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{
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// Direct or indirect address mode
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util::stream_format(stream, "%s%c %02o", f_160_alu_ops[BIT(inst, 8, 4) - 2], BIT(inst, 6) ? 'I' : 'D', inst & 0077);
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return 1 | SUPPORTED;
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}
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}
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else if (inst < 07000)
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{
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// Relative conditional jumps
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util::stream_format(stream, "%s%c %04o", f_cond_jp_ops[BIT(inst, 6, 2)], BIT(inst, 8) ? 'B' : 'F',
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add_relative(pc, BIT(inst, 8) ? ~(inst & 0077) : inst & 0077));
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return 1 | STEP_COND | SUPPORTED;
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}
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else switch (BIT(inst, 6, 3))
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{
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case 0:
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util::stream_format(stream, "JPI %02o", inst & 0077);
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return 1 | STEP_OUT | SUPPORTED;
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case 1:
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// Jump forward indirect
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util::stream_format(stream, "JFI %04o", add_relative(pc, inst & 0077));
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return 1 | SUPPORTED;
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case 2: case 3:
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util::stream_format(stream, "%s %04o %04o", BIT(inst, 6) ? "OUT" : "INP", add_relative(pc, inst & 0077), opcodes.r16(pc + 1) & 07777);
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return 2 | SUPPORTED;
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case 4:
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// Output direct
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util::stream_format(stream, "OTN %02o", inst & 0077);
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return 1 | SUPPORTED;
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case 5:
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// External function
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util::stream_format(stream, "EXF %04o", (pc + (inst & 0077)) & 07777);
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return 1 | SUPPORTED;
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case 6:
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util::stream_format(stream, "INA %o", inst & 0077);
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return 1 | SUPPORTED;
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case 7: default:
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util::stream_format(stream, "HLT %02o", inst & 0077);
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return 1 | SUPPORTED;
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}
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}
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offs_t cdc160a_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms)
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{
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u16 inst = opcodes.r16(pc) & 07777;
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if (inst < 0200)
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{
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if (inst >= 0010 && inst < 0100)
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{
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util::stream_format(stream, "%s %d", f_160a_bank_ops[BIT(inst, 3, 3) - 1], inst & 0007);
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return 1 | SUPPORTED;
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}
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else switch (inst)
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{
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case 0000:
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stream << "ERR";
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return 1 | SUPPORTED;
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case 0001:
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stream << "NOP";
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return 1 | SUPPORTED;
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case 0100:
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util::stream_format(stream, "BLS %04o", opcodes.r16(pc + 1) & 07777);
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return 2 | STEP_COND | SUPPORTED;
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case 0101:
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stream << "PTA";
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return 1 | (BIT(opcodes.r16(pc + 1), 6, 3) == 070 ? STEP_OVER | step_over_extra(1) : 0) | SUPPORTED;
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case 0102:
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stream << "LS1";
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return 1 | SUPPORTED;
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case 0103:
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stream << "LS2";
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return 1 | SUPPORTED;
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case 0104:
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stream << "CBC";
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return 1 | SUPPORTED;
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case 0105:
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util::stream_format(stream, "ATE %04o", opcodes.r16(pc + 1) & 07777);
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return 2 | STEP_COND | SUPPORTED;
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case 0106:
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util::stream_format(stream, "ATX %04o", opcodes.r16(pc + 1) & 07777);
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return 2 | STEP_COND | SUPPORTED;
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case 0107:
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stream << "ETA";
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return 1 | SUPPORTED;
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case 0110:
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stream << "LS3";
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return 1 | SUPPORTED;
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case 0111:
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stream << "LS6";
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return 1 | SUPPORTED;
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case 0112:
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stream << "MUT";
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return 1 | SUPPORTED;
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case 0113:
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stream << "MUH";
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return 1 | SUPPORTED;
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case 0114:
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stream << "RS1";
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return 1 | SUPPORTED;
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case 0115:
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stream << "RS2";
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return 1 | SUPPORTED;
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case 0120:
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stream << "CIL";
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return 1 | SUPPORTED;
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case 0130:
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stream << "CTA";
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return 1 | SUPPORTED;
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case 0140: case 0141: case 0142: case 0143: case 0144: case 0145: case 0146: case 0147:
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util::stream_format(stream, "SBU %d", inst & 0007);
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return 1 | SUPPORTED;
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case 0150: case 0151: case 0152: case 0153: case 0154: case 0155: case 0156: case 0157:
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util::stream_format(stream, "STP %02o", inst & 0077);
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return 1 | SUPPORTED;
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case 0160: case 0161: case 0162: case 0163: case 0164: case 0165: case 0166: case 0167:
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util::stream_format(stream, "STE %02o", inst & 0077);
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return 1 | SUPPORTED;
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default:
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util::stream_format(stream, "%04o", inst);
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return 1 | SUPPORTED;
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}
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}
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else if (inst < 01000)
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{
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// No address (6-bit immediate) mode
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util::stream_format(stream, "%sN %o", f_160a_alu_ops[BIT(inst, 6, 3) - 2], inst & 0077);
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return 1 | SUPPORTED;
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}
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else if (inst < 06000)
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{
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if (BIT(inst, 7))
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{
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if ((inst & 0077) != 0)
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{
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// Relative forward or backward address mode
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util::stream_format(stream, "%s%c %04o", f_160a_alu_ops[BIT(inst, 8, 4) - 2], BIT(inst, 6) ? 'B' : 'F',
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add_relative(pc, BIT(inst, 6) ? ~(inst & 0077) : inst & 0077));
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return 1 | SUPPORTED;
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}
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else if (BIT(inst, 6))
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{
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// Specific address mode
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util::stream_format(stream, "%sS", f_160a_alu_ops[BIT(inst, 8, 4) - 2]);
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return 1 | SUPPORTED;
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}
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else
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{
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// Constant address (12-bit immediate) mode
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util::stream_format(stream, "%sC %04o", f_160a_alu_ops[BIT(inst, 8, 4) - 2], opcodes.r16(pc + 1) & 07777);
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return 2 | SUPPORTED;
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}
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}
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else if ((inst & 0177) == 0100)
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{
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// Memory address mode
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util::stream_format(stream, "%sM %04o", f_160a_alu_ops[BIT(inst, 8, 4) - 2], opcodes.r16(pc + 1) & 07777);
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return 2 | SUPPORTED;
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}
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else
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{
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// Direct or indirect address mode
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util::stream_format(stream, "%s%c %02o", f_160a_alu_ops[BIT(inst, 8, 4) - 2], BIT(inst, 6) ? 'I' : 'D', inst & 0077);
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return 1 | SUPPORTED;
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}
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}
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else if (inst < 07000)
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{
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// Relative conditional jumps
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util::stream_format(stream, "%s%c %04o", f_cond_jp_ops[BIT(inst, 6, 2)], BIT(inst, 8) ? 'B' : 'F',
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add_relative(pc, BIT(inst, 8) ? ~(inst & 0077) : inst & 0077));
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return 1 | STEP_COND | SUPPORTED;
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}
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else switch (BIT(inst, 6, 3))
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{
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case 0:
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util::stream_format(stream, "JPI %02o", inst & 0077);
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return 1 | STEP_OUT | SUPPORTED;
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case 1:
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if ((inst & 0077) <= 1)
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{
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util::stream_format(stream, "JP%c %04o", BIT(inst, 0) ? 'M' : 'R', opcodes.r16(pc + 1) & 07777);
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return 2 | (BIT(inst, 0) ? 0 : STEP_OVER) | SUPPORTED;
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}
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else
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{
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util::stream_format(stream, "JFI %04o", add_relative(pc, inst & 0077));
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return 1 | SUPPORTED;
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}
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case 2: case 3:
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if ((inst & 0077) == 0)
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{
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// Buffer input/output
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util::stream_format(stream, "IB%c %04o", BIT(inst, 6) ? 'O' : 'I', opcodes.r16(pc + 1) & 07777);
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return 2 | STEP_COND | SUPPORTED;
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}
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else
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{
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// Normal input/output
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util::stream_format(stream, "%s %04o %04o", BIT(inst, 6) ? "OUT" : "INP", add_relative(pc, inst & 0077), opcodes.r16(pc + 1) & 07777);
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return 2 | SUPPORTED;
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}
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return 1 | SUPPORTED;
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case 4:
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// Output direct
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util::stream_format(stream, "OTN %02o", inst & 0077);
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return 1 | SUPPORTED;
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case 5:
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// External function
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if ((inst & 0077) == 0)
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{
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util::stream_format(stream, "EXC %04o", opcodes.r16(pc + 1) & 07777);
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return 2 | SUPPORTED;
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}
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else
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{
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util::stream_format(stream, "EXF %04o", (pc + (inst & 0077)) & 07777);
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return 1 | SUPPORTED;
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}
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case 6:
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if ((inst & 0077) == 0)
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stream << "INA";
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else if ((inst & 0077) == 0077)
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stream << "OTA";
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else
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util::stream_format(stream, "HWI %02o", inst & 0077);
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return 1 | SUPPORTED;
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case 7: default:
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if ((inst & 0077) == 0 || (inst & 0077) == 0077)
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{
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stream << "HLT";
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return 1 | SUPPORTED;
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}
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else if ((inst & 070) == 0)
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{
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util::stream_format(stream, "SLS %d", inst & 0007);
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return 1 | SUPPORTED;
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}
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else
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{
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util::stream_format(stream, "%s %02o %04o", (inst & 0007) != 0 ? "SJS" : "SLJ", inst & 077, opcodes.r16(pc + 1) & 07777);
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return 2 | STEP_COND | SUPPORTED;
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}
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}
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}
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34
src/devices/cpu/cdc160/cdc160d.h
Normal file
34
src/devices/cpu/cdc160/cdc160d.h
Normal file
@ -0,0 +1,34 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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#ifndef MAME_CPU_CDC160_CDC160D_H
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#define MAME_CPU_CDC160_CDC160D_H
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#pragma once
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class cdc160_disassembler : public util::disasm_interface
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{
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public:
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// construction/destruction
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cdc160_disassembler();
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protected:
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// util::disasm_interface overrides
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virtual u32 opcode_alignment() const override;
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virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override;
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};
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class cdc160a_disassembler : public cdc160_disassembler
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{
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public:
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// construction/destruction
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cdc160a_disassembler();
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protected:
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// util::disasm_interface overrides
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virtual u32 interface_flags() const override;
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virtual u32 page_address_bits() const override;
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virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override;
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};
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#endif // MAME_CPU_CDC160_CDC160D_H
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@ -30,6 +30,7 @@ using util::BIT;
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#include "cpu/c33/c33dasm.h"
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#include "cpu/capricorn/capricorn_dasm.h"
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#include "cpu/ccpu/ccpudasm.h"
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#include "cpu/cdc160/cdc160d.h"
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#include "cpu/cdc1700/cdc1700d.h"
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#include "cpu/clipper/clipperd.h"
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#include "cpu/cop400/cop410ds.h"
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@ -423,6 +424,8 @@ static const dasm_table_entry dasm_table[] =
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{ "c33", le, 0, []() -> util::disasm_interface * { return new c33_disassembler; } },
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{ "capricorn", le, 0, []() -> util::disasm_interface * { return new capricorn_disassembler; } },
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{ "ccpu", le, 0, []() -> util::disasm_interface * { return new ccpu_disassembler; } },
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{ "cdc160", be, -1, []() -> util::disasm_interface * { return new cdc160_disassembler; } },
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{ "cdc160a", be, -1, []() -> util::disasm_interface * { return new cdc160a_disassembler; } },
|
||||
{ "cdc1700", be, -1, []() -> util::disasm_interface * { return new cdc1700_disassembler; } },
|
||||
{ "cdp1801", le, 0, []() -> util::disasm_interface * { return new cosmac_disassembler(cosmac_disassembler::TYPE_1801); } },
|
||||
{ "cdp1802", le, 0, []() -> util::disasm_interface * { return new cosmac_disassembler(cosmac_disassembler::TYPE_1802); } },
|
||||
|
||||
Loading…
Reference in New Issue
Block a user