Added opcode $b2, Night Gal Summer shows some garbage now

This commit is contained in:
angelosa 2016-02-08 23:54:33 +01:00
parent feba972bc6
commit fb922ca520
5 changed files with 33 additions and 9 deletions

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@ -2284,7 +2284,7 @@ OP_HANDLER( stx_ex )
WM16(EAD,&m_x);
}
/* NCS specific, guessed opcodes (tested by Night Gal Summer) */
/* NSC8105 specific, guessed opcodes (tested by Night Gal Summer) */
// $bb - load A from [X + $0]
OP_HANDLER( ldax_imm )
{
@ -2294,6 +2294,17 @@ OP_HANDLER( ldax_imm )
SET_NZ8(A);
}
// $b2 - assuming correct, store first byte to (X + $disp8)
OP_HANDLER( nsc_unk )
{
IMM8;
UINT8 val = RM(EAD);
IMM8;
EA = X + RM(EAD);
WM(EAD,val);
}
// $00 - store A to [X + $0]
OP_HANDLER( stax_imm )
{

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@ -150,7 +150,7 @@ const m6800_cpu_device::op_func m6800_cpu_device::nsc8105_insn[0x100] = {
// a8
&m6800_cpu_device::asl_ix, &m6800_cpu_device::dec_ix, &m6800_cpu_device::rol_ix, &m6800_cpu_device::illegal,&m6800_cpu_device::inc_ix, &m6800_cpu_device::jmp_ix, &m6800_cpu_device::tst_ix, &m6800_cpu_device::clr_ix,
// b0
&m6800_cpu_device::neg_ex, &m6800_cpu_device::illegal,&m6800_cpu_device::illegal,&m6800_cpu_device::com_ex, &m6800_cpu_device::lsr_ex, &m6800_cpu_device::ror_ex, &m6800_cpu_device::illegal,&m6800_cpu_device::asr_ex,
&m6800_cpu_device::neg_ex, &m6800_cpu_device::illegal,&m6800_cpu_device::nsc_unk,&m6800_cpu_device::com_ex, &m6800_cpu_device::lsr_ex, &m6800_cpu_device::ror_ex, &m6800_cpu_device::illegal,&m6800_cpu_device::asr_ex,
// b8
&m6800_cpu_device::asl_ex, &m6800_cpu_device::dec_ex, &m6800_cpu_device::rol_ex, &m6800_cpu_device::ldax_imm,&m6800_cpu_device::inc_ex, &m6800_cpu_device::jmp_ex, &m6800_cpu_device::tst_ex, &m6800_cpu_device::clr_ex,
&m6800_cpu_device::subb_im,&m6800_cpu_device::sbcb_im,&m6800_cpu_device::cmpb_im,&m6800_cpu_device::illegal,&m6800_cpu_device::andb_im,&m6800_cpu_device::ldb_im, &m6800_cpu_device::bitb_im,&m6800_cpu_device::stb_im,

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@ -428,6 +428,7 @@ protected:
void trap();
void ldax_imm();
void stax_imm();
void nsc_unk();
};

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@ -105,8 +105,7 @@ WRITE8_MEMBER( jangou_blitter_device::blitter_process_w )
int count = 0;
int xcount, ycount;
printf("%02x %02x %02x %02x %02x %02x %02x\n", m_blit_data[0], m_blit_data[1], m_blit_data[2],
m_blit_data[3], m_blit_data[4], m_blit_data[5],m_blit_data[6]);
//printf("%02x %02x %02x %02x %02x %02x %02x\n", m_blit_data[0], m_blit_data[1], m_blit_data[2],m_blit_data[3], m_blit_data[4], m_blit_data[5],m_blit_data[6]);
w = (m_blit_data[4] & 0xff) + 1;
h = (m_blit_data[5] & 0xff) + 1;
src = ((m_blit_data[1] << 8)|(m_blit_data[0] << 0));
@ -148,6 +147,7 @@ WRITE8_MEMBER( jangou_blitter_device::blitter_process_w )
WRITE8_MEMBER( jangou_blitter_device::blitter_alt_process_w)
{
// TODO: convert this into a more useable function
switch(offset)
{
case 0: blitter_process_w(space,0,data); break;
@ -157,7 +157,6 @@ WRITE8_MEMBER( jangou_blitter_device::blitter_alt_process_w)
case 4: blitter_process_w(space,3,data); break;
case 5: blitter_process_w(space,4,data); break;
case 6: blitter_process_w(space,5,data); break;
}
}

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@ -1071,7 +1071,7 @@ ROM_START( ngalsumr )
ROM_LOAD( "2s.ic6", 0x04000, 0x04000, CRC(ca2a735f) SHA1(5980525a67fb0ffbfa04b82d805eee2463236ce3) )
ROM_LOAD( "3s.ic5", 0x08000, 0x04000, CRC(5cf15267) SHA1(72e4b2aa59a50af6b1b25d5279b3b125bfe06d86) )
ROM_REGION( 0x20000, "gfx", 0 )
ROM_REGION( 0x20000, "gfx", ROMREGION_ERASEFF )
ROM_LOAD( "1.3a", 0x00000, 0x04000, CRC(9626f812) SHA1(ca7162811a0ba05dfaa2aa8cc93a2e898b326e9e) )
ROM_LOAD( "2.3c", 0x04000, 0x04000, CRC(0d59cf7a) SHA1(600bc70d29853fb936f8adaef048d925cbae0ce9) )
ROM_LOAD( "3.3d", 0x08000, 0x04000, CRC(2fb2ec0b) SHA1(2f1735e33906783b8c0b283455a2a079431e6f11) )
@ -1094,17 +1094,30 @@ DRIVER_INIT_MEMBER(nightgal_state,royalqn)
DRIVER_INIT_MEMBER(nightgal_state,ngalsumr)
{
//UINT8 *ROM = memregion("subrom")->base();
#if 0
UINT8 *ROM = memregion("subrom")->base();
// ROM[0x165a] = 0x02; // illegal
// ROM[0x165b] = 0x02; // sts xx xx xx
// ROM[0x165c] = 0x02;
// ROM[0x165d] = 0x02;
// ROM[0x165e] = 0x02; // sts xx xx xx
// ROM[0x165f] = 0x02;
// ROM[0x1660] = 0x02;
// ROM[0x1661] = 0x02; // sts xx xx xx
ROM[0x1662] = 0x20;
// ROM[0x1663] = 0x02;
/* patch blantantly wrong ROM checks */
//ROM[0xd6ce] = 0x02;
//ROM[0xd6cf] = 0x02;
ROM[0x16ce] = 0x02;
ROM[0x16cf] = 0x02;
// adcx $05 converted to 0x04 for debug purposes
//ROM[0x1782] = 0x04;
//ROM[0xd655] = 0x20;
//ROM[0xd3f9] = 0x02;
//ROM[0xd3fa] = 0x02;
//ROM[0xd3a0] = 0x02;
#endif
}
/* Type 1 HW */