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Fixed i86/i386 POP SP and POP ESP thanks to bug report for Xenix boot by bs666 [Miodrag Milanovic]

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This commit is contained in:
Miodrag Milanovic 2011-04-26 12:38:11 +00:00
parent 8cd463515b
commit fbbbaa20ae
2 changed files with 13 additions and 13 deletions
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24
src/emu/cpu/i386/i386priv.h
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@ -832,13 +832,13 @@ INLINE UINT8 POP8(i386_state *cpustate)
UINT8 value; UINT8 value;
UINT32 ea; UINT32 ea;
if( STACK_32BIT ) { if( STACK_32BIT ) {
ea = i386_translate(cpustate, SS, REG32(ESP) );
value = READ8(cpustate, ea );
REG32(ESP) += 1; REG32(ESP) += 1;
} else { ea = i386_translate(cpustate, SS, REG32(ESP) - 1);
ea = i386_translate(cpustate, SS, REG16(SP) );
value = READ8(cpustate, ea ); value = READ8(cpustate, ea );
} else {
REG16(SP) += 1; REG16(SP) += 1;
ea = i386_translate(cpustate, SS, REG16(SP) - 1);
value = READ8(cpustate, ea );
} }
return value; return value;
} }
@ -847,13 +847,13 @@ INLINE UINT16 POP16(i386_state *cpustate)
UINT16 value; UINT16 value;
UINT32 ea; UINT32 ea;
if( STACK_32BIT ) { if( STACK_32BIT ) {
ea = i386_translate(cpustate, SS, REG32(ESP) );
value = READ16(cpustate, ea );
REG32(ESP) += 2; REG32(ESP) += 2;
} else { ea = i386_translate(cpustate, SS, REG32(ESP) - 2);
ea = i386_translate(cpustate, SS, REG16(SP) );
value = READ16(cpustate, ea ); value = READ16(cpustate, ea );
} else {
REG16(SP) += 2; REG16(SP) += 2;
ea = i386_translate(cpustate, SS, REG16(SP) - 2);
value = READ16(cpustate, ea );
} }
return value; return value;
} }
@ -862,13 +862,13 @@ INLINE UINT32 POP32(i386_state *cpustate)
UINT32 value; UINT32 value;
UINT32 ea; UINT32 ea;
if( STACK_32BIT ) { if( STACK_32BIT ) {
ea = i386_translate(cpustate, SS, REG32(ESP) );
value = READ32(cpustate, ea );
REG32(ESP) += 4; REG32(ESP) += 4;
} else { ea = i386_translate(cpustate, SS, REG32(ESP) - 4);
ea = i386_translate(cpustate, SS, REG16(SP) );
value = READ32(cpustate, ea ); value = READ32(cpustate, ea );
} else {
REG16(SP) += 4; REG16(SP) += 4;
ea = i386_translate(cpustate, SS, REG16(SP) - 4);
value = READ32(cpustate, ea );
} }
return value; return value;
} }

2
src/emu/cpu/i86/i86priv.h
View File

@ -118,7 +118,7 @@ typedef enum {
#define FETCHWORD(var) { var = cpustate->direct->read_raw_byte(cpustate->pc, cpustate->fetch_xor); var += (cpustate->direct->read_raw_byte(cpustate->pc + 1, cpustate->fetch_xor) << 8); cpustate->pc += 2; } #define FETCHWORD(var) { var = cpustate->direct->read_raw_byte(cpustate->pc, cpustate->fetch_xor); var += (cpustate->direct->read_raw_byte(cpustate->pc + 1, cpustate->fetch_xor) << 8); cpustate->pc += 2; }
#define CHANGE_PC(addr) #define CHANGE_PC(addr)
#define PUSH(val) { cpustate->regs.w[SP] -= 2; WriteWord(((cpustate->base[SS] + cpustate->regs.w[SP]) & AMASK), val); } #define PUSH(val) { cpustate->regs.w[SP] -= 2; WriteWord(((cpustate->base[SS] + cpustate->regs.w[SP]) & AMASK), val); }
#define POP(var) { var = ReadWord(((cpustate->base[SS] + cpustate->regs.w[SP]) & AMASK)); cpustate->regs.w[SP] += 2; } #define POP(var) { cpustate->regs.w[SP] += 2; var = ReadWord(((cpustate->base[SS] + (cpustate->regs.w[SP]-2)) & AMASK)); }
/************************************************************************/ /************************************************************************/