From fc1e0be5f7e26ca94ec8972d28fcd908fa08be5b Mon Sep 17 00:00:00 2001
From: Ted Green <tedgreen99@protonmail.com>
Date: Thu, 28 Dec 2017 13:52:15 -0700
Subject: [PATCH] vrc5074: Only assert/clear interrupts on a change.  Prevents
 clearing of MIPS3 timer interrupt inadvertantly. (nw)

---
 src/devices/machine/vrc5074.cpp | 31 ++++++++++++++++++-------------
 src/devices/machine/vrc5074.h   |  1 +
 2 files changed, 19 insertions(+), 13 deletions(-)

diff --git a/src/devices/machine/vrc5074.cpp b/src/devices/machine/vrc5074.cpp
index 9959a60f06e..ae53b1851f1 100644
--- a/src/devices/machine/vrc5074.cpp
+++ b/src/devices/machine/vrc5074.cpp
@@ -241,6 +241,7 @@ void vrc5074_device::device_start()
 	save_item(NAME(m_nile_irq_state));
 	save_item(NAME(m_sdram_addr));
 	save_item(NAME(m_uart_irq));
+	save_item(NAME(m_irq_pins));
 	save_item(NAME(m_timer_period));
 	machine().save().register_postload(save_prepost_delegate(FUNC(vrc5074_device::postload), this));
 }
@@ -262,6 +263,7 @@ void vrc5074_device::device_reset()
 	m_sdram_addr[0] = 0;
 	m_sdram_addr[1] = 0;
 	m_uart_irq = 0;
+	m_irq_pins = 0;
 }
 
 void vrc5074_device::map_cpu_space()
@@ -678,7 +680,7 @@ void vrc5074_device::update_nile_irqs()
 {
 	uint32_t intctll = m_cpu_regs[NREG_INTCTRL + 0];
 	uint32_t intctlh = m_cpu_regs[NREG_INTCTRL + 1];
-	uint8_t irq[6];
+	uint8_t irq = 0;
 	int i;
 
 	/* check for UART transmit IRQ enable and synthsize one */
@@ -687,7 +689,6 @@ void vrc5074_device::update_nile_irqs()
 	else
 		m_nile_irq_state &= ~0x0010;
 
-	irq[0] = irq[1] = irq[2] = irq[3] = irq[4] = irq[5] = 0;
 	m_cpu_regs[NREG_INTSTAT0 + 0] = 0;
 	m_cpu_regs[NREG_INTSTAT0 + 1] = 0;
 	m_cpu_regs[NREG_INTSTAT1 + 0] = 0;
@@ -701,7 +702,7 @@ void vrc5074_device::update_nile_irqs()
 				int vector = (intctll >> (4 * i)) & 7;
 				if (vector < 6)
 				{
-					irq[vector] = 1;
+					irq |= 1 << vector;
 					m_cpu_regs[NREG_INTSTAT0 + vector / 2] |= 1 << (i + 16 * (vector & 1));
 				}
 			}
@@ -714,26 +715,30 @@ void vrc5074_device::update_nile_irqs()
 				int vector = (intctlh >> (4 * i)) & 7;
 				if (vector < 6)
 				{
-					irq[vector] = 1;
+					irq |= 1 << vector;
 					m_cpu_regs[NREG_INTSTAT0 + vector / 2] |= 1 << (i + 8 + 16 * (vector & 1));
 				}
 			}
 
 	/* push out the state */
+	uint8_t change = m_irq_pins ^ irq;
 	if (LOG_NILE_IRQS) logerror("NILE IRQs:");
 	for (i = 0; i < 6; i++)
 	{
-		if (irq[i])
-		{
-			if (LOG_NILE_IRQS) logerror(" 1");
-			m_cpu->set_input_line(MIPS3_IRQ0 + i, ASSERT_LINE);
-		}
-		else
-		{
-			if (LOG_NILE_IRQS) logerror(" 0");
-			m_cpu->set_input_line(MIPS3_IRQ0 + i, CLEAR_LINE);
+		if (change & (1 << i)) {
+			if (irq & (1 << i))
+			{
+				if (LOG_NILE_IRQS) logerror(" 1");
+				m_cpu->set_input_line(MIPS3_IRQ0 + i, ASSERT_LINE);
+			}
+			else
+			{
+				if (LOG_NILE_IRQS) logerror(" 0");
+				m_cpu->set_input_line(MIPS3_IRQ0 + i, CLEAR_LINE);
+			}
 		}
 	}
+	m_irq_pins = irq;
 	if (LOG_NILE_IRQS) logerror("\n");
 }
 
diff --git a/src/devices/machine/vrc5074.h b/src/devices/machine/vrc5074.h
index c49902d9491..f5055cf8212 100644
--- a/src/devices/machine/vrc5074.h
+++ b/src/devices/machine/vrc5074.h
@@ -114,6 +114,7 @@ private:
 	uint32_t m_cpu_regs[0x1ff / 4];
 	uint16_t m_nile_irq_state;
 	int m_uart_irq;
+	uint8_t m_irq_pins;
 
 	void setup_pci_space();
 	uint32_t m_pci_laddr[2], m_pci_mask[2], m_pci_type[2];