diff --git a/src/mame/drivers/squale.cpp b/src/mame/drivers/squale.cpp
index def2dd00257..7677d1301f1 100644
--- a/src/mame/drivers/squale.cpp
+++ b/src/mame/drivers/squale.cpp
@@ -1,9 +1,13 @@
 // license:BSD-3-Clause
-// copyright-holders:Miodrag Milanovic
+// copyright-holders:Miodrag Milanovic, Jean-François DEL NERO
 /***************************************************************************
 
     Apollo 7 Squale
 
+    The following hardware description is an extract of the Squale hardware analysis
+    presented on this page : http://hxc2001.free.fr/Squale.
+    This is a work in progress and is subject to changes 
+
     PCB Ref Qty Manufacturer Ref    Description / Datasheet
     ============================================================================================
     U1              1   EF6809P             8-BIT MICROPROCESSOR UNIT (MPU)
@@ -24,7 +28,7 @@
     Memory map
     ==========
 
-    Periphiriques                               Adresses
+    Devices                                     Adresses
     =========================================================
     EPROM                                       0xF100-0xFFFF
     Extension Port                              0xF080-0xF0FF
@@ -43,32 +47,66 @@
 
 
     Notes:
-    1) For 8KB versions of the monitor, the bank switching is done via bit 7 of REG1.
+    1) For 8KB versions of the monitor, the bank switching is done with the bit 7 of REG1.
     2) VID_RD1 : [7..0] = I0,R0,G0,B0,I1,R1,G1,B1 (I=Intensity,R=Red,G=Green,B=Blue)
     3) VID_RD2 : [7..0] = I2,R2,G2,B2,I3,R3,G3,B3 (I=Intensity,R=Red,G=Green,B=Blue)
     3) REG1 : [7..0] = EPROM Bank,-,Modem,K7,I,R,G,B (I=Intensity,R=Red,V=Green,B=Blue)
+
 ****************************************************************************/
 
 #include "emu.h"
 #include "cpu/m6809/m6809.h"
+#include "machine/6821pia.h"
+#include "machine/6850acia.h"
+#include "sound/ay8910.h"
+
+#define MAIN_CLOCK           XTAL_14MHz
+#define AY_CLOCK             MAIN_CLOCK / 8     /* 1.75 Mhz */
+#define CPU_CLOCK            MAIN_CLOCK / 4     /* 3.50 Mhz */
 
 class squale_state : public driver_device
 {
 public:
 	squale_state(const machine_config &mconfig, device_type type, const char *tag)
 		: driver_device(mconfig, type, tag)
+		, m_acia(*this,  "ef6850")
+		, m_ay8910(*this,  "ay8910")
+		, m_pia_u72(*this, "pia_u72")
+		, m_pia_u75(*this, "pia_u75")
 		, m_maincpu(*this, "maincpu")
 	{ }
 
+	DECLARE_WRITE8_MEMBER(ctrl_w);
+
+	virtual void machine_start();
+	virtual void machine_reset();
+
 private:
+	required_device<acia6850_device> m_acia;
+	required_device<ay8910_device> m_ay8910;
+	required_device<pia6821_device> m_pia_u72;
+	required_device<pia6821_device> m_pia_u75;
 	required_device<cpu_device> m_maincpu;
 };
 
+/*************************
+*      Misc Handlers     *
+*************************/
+
+WRITE8_MEMBER(squale_state::ctrl_w)
+{
+	membank("rom_bank")->set_entry(data >> 7);
+}
 
 static ADDRESS_MAP_START(squale_mem, AS_PROGRAM, 8, squale_state)
 	ADDRESS_MAP_UNMAP_HIGH
 	AM_RANGE(0x0000,0xefff) AM_RAM
-	AM_RANGE(0xf100,0xffff) AM_ROM AM_REGION("maincpu", 0x100)
+	AM_RANGE(0xf010,0xf01f) AM_WRITE( ctrl_w )
+	AM_RANGE(0xf044,0xf047) AM_DEVREADWRITE("pia_u75", pia6821_device, read_alt, write_alt)
+	AM_RANGE(0xf048,0xf04b) AM_DEVREADWRITE("pia_u72", pia6821_device, read_alt, write_alt)
+	AM_RANGE(0xf050,0xf05f) AM_DEVREADWRITE("ef6850", acia6850_device, data_r, data_w)
+	AM_RANGE(0xf060,0xf06f) AM_DEVREADWRITE("ay8910", ay8910_device, data_r, address_data_w)
+	AM_RANGE(0xf100,0xffff) AM_ROMBANK("rom_bank");
 ADDRESS_MAP_END
 
 static ADDRESS_MAP_START( squale_io, AS_IO, 8, squale_state)
@@ -79,18 +117,49 @@ ADDRESS_MAP_END
 static INPUT_PORTS_START( squale )
 INPUT_PORTS_END
 
+void squale_state::machine_start()
+{
+	membank("rom_bank")->configure_entry(0, memregion("maincpu")->base() + 0x100);
+	membank("rom_bank")->configure_entry(1, memregion("maincpu")->base() + 0x1100);
+	membank("rom_bank")->set_entry( 0 );
+}
+
+void squale_state::machine_reset()
+{
+}
 
 static MACHINE_CONFIG_START( squale, squale_state )
 	/* basic machine hardware */
-	MCFG_CPU_ADD("maincpu",M6809, XTAL_1MHz)
+	MCFG_CPU_ADD("maincpu",M6809, CPU_CLOCK)
 	MCFG_CPU_PROGRAM_MAP(squale_mem)
 	MCFG_CPU_IO_MAP(squale_io)
+
+	/* Cartridge pia */
+	MCFG_DEVICE_ADD("pia_u72", PIA6821, 0)
+	// TODO : Add port I/O handler
+
+	/* Keyboard pia */
+	MCFG_DEVICE_ADD("pia_u75", PIA6821, 0)
+	// TODO : Add port I/O handler
+
+	/* sound hardware */
+	MCFG_SPEAKER_STANDARD_MONO("mono")
+	MCFG_SOUND_ADD("ay8910", AY8910, AY_CLOCK)
+	// TODO : Add port I/O handler
+	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
+	
+	MCFG_DEVICE_ADD ("ef6850", ACIA6850, 0)
 MACHINE_CONFIG_END
 
 /* ROM definition */
 ROM_START( squale )
 	ROM_REGION( 0x2000, "maincpu", 0 )
-	ROM_LOAD( "sqm2r1.bin", 0x0000, 0x2000, CRC(ed57c707) SHA1(c8bd33a6fb07fe7f881f2605ad867b7e82366bfc) )
+	ROM_DEFAULT_BIOS("v201")
+	ROM_SYSTEM_BIOS(0, "v102", "Version 1.2")
+	ROMX_LOAD( "sqmon_1v2.bin", 0x0000, 0x1000, CRC(c8635598) SHA1(fd944be3c17ec2be2de91c705e90214ca55aa63c), ROM_BIOS(1) )
+	ROM_RELOAD( 0x1000, 0x1000 )
+	ROM_SYSTEM_BIOS(1, "v201", "Version 2.1")
+	ROMX_LOAD( "sqmon_2r1.bin", 0x0000, 0x2000, CRC(ed57c707) SHA1(c8bd33a6fb07fe7f881f2605ad867b7e82366bfc), ROM_BIOS(2) )
 ROM_END
 
 /* Driver */