osborne1nv: restore row/col portion masking (fixes horizontal scroll), update comments

This commit is contained in:
Vas Crabb 2017-02-09 01:24:35 +11:00
parent 9b48fc922c
commit fcac51c274
2 changed files with 7 additions and 12 deletions

View File

@ -83,14 +83,8 @@ TODO:
Centronics parallel over the same physical interface, so this should be
tested, too.
* Fix emulation of the Nuevo Video board (scrolling, interrupts, CRTC video
RAM updates). It would be nice to get a schematic for this. The board
doesn't appear to have adders necessary to combine the MA output of the
CRTC with the PIA outputs, and without additional connections to the
mainboard it would be pretty hard to actually get the PIA output at all.
However, both vertical scrolling and both manual (ctrl-left/right) and
automatic horizontal scrolling work when booted to stock Osborne CP/M,
so something must be getting the values to the CRTC.
* Complete emulation of the Nuevo Video board (interrupts, CRTC video RAM
updates). It would be nice to get a schematic for this.
***************************************************************************/
@ -133,7 +127,7 @@ static ADDRESS_MAP_START( osborne1nv_io, AS_IO, 8, osborne1_state )
AM_RANGE( 0x00, 0x03 ) AM_WRITE(bankswitch_w)
AM_RANGE( 0x04, 0x04 ) AM_DEVREADWRITE("crtc", mc6845_device, status_r, address_w)
AM_RANGE( 0x05, 0x05 ) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w)
// seems to be something at 0x06 as well, but no idea what
// seems to be something at 0x06 as well, but no idea what - BIOS writes 0x07 on boot
ADDRESS_MAP_END

View File

@ -516,12 +516,13 @@ void osborne1_state::update_acia_rxc_txc()
MC6845_UPDATE_ROW(osborne1nv_state::crtc_update_row)
{
rgb_t const *const palette = m_palette->palette()->entry_list_raw();
ma = (ma >> 1) | 0xf000;
uint16_t const base = (ma >> 1) & 0xF80;
uint32_t *p = &bitmap.pix32(y);
for (uint8_t x = 0; x < x_count; ++x)
{
uint8_t const chr = m_ram->pointer()[ma + x];
uint8_t const clr = BIT(m_ram->pointer()[ma + x + 0x1000], 7) ? 2 : 1;
uint16_t const offset = base | ((ma + x) & 0x7F);
uint8_t const chr = m_ram->pointer()[0xF000 | offset];
uint8_t const clr = BIT(m_ram->pointer()[0x10000 | offset], 7) ? 2 : 1;
uint8_t const gfx = ((chr & 0x80) && (ra == 9)) ? 0xFF : m_p_nuevo[(ra << 7) | (chr & 0x7F)];