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uses a devcb2 for cpu to cd controller communication, the address decoding is internal to the cpu & the cd controller is on it's own 8 bit bus. [smf]

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smf- 2013-01-20 19:40:52 +00:00
parent 0a1584e417
commit fcd97973dd
5 changed files with 48 additions and 29 deletions
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19
src/emu/cpu/psx/psx.c
View File

@ -1535,7 +1535,7 @@ static ADDRESS_MAP_START( psxcpu_internal_map, AS_PROGRAM, 32, psxcpu_device )
AM_RANGE(0x1f801070, 0x1f801077) AM_DEVREADWRITE( "irq", psxirq_device, read, write )
AM_RANGE(0x1f801080, 0x1f8010ff) AM_DEVREADWRITE( "dma", psxdma_device, read, write )
AM_RANGE(0x1f801100, 0x1f80112f) AM_DEVREADWRITE( "rcnt", psxrcnt_device, read, write )
/* 1f801800-1f801803 cd */
AM_RANGE(0x1f801800, 0x1f801803) AM_READWRITE8( cd_r, cd_w, 0xffffffff )
AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE( gpu_r, gpu_w )
AM_RANGE(0x1f801820, 0x1f801827) AM_DEVREADWRITE( "mdec", psxmdec_device, read, write )
AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16_LEGACY( spu_r, spu_w, 0xffffffff )
@ -1563,6 +1563,7 @@ static ADDRESS_MAP_START( cxd8661r_internal_map, AS_PROGRAM, 32, psxcpu_device )
AM_RANGE(0x1f801070, 0x1f801077) AM_DEVREADWRITE( "irq", psxirq_device, read, write )
AM_RANGE(0x1f801080, 0x1f8010ff) AM_DEVREADWRITE( "dma", psxdma_device, read, write )
AM_RANGE(0x1f801100, 0x1f80112f) AM_DEVREADWRITE( "rcnt", psxrcnt_device, read, write )
AM_RANGE(0x1f801800, 0x1f801803) AM_READWRITE8( cd_r, cd_w, 0xffffffff )
AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE( gpu_r, gpu_w )
AM_RANGE(0x1f801820, 0x1f801827) AM_DEVREADWRITE( "mdec", psxmdec_device, read, write )
AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16_LEGACY( spu_r, spu_w, 0xffffffff )
@ -1588,7 +1589,9 @@ psxcpu_device::psxcpu_device(const machine_config &mconfig, device_type type, co
cpu_device(mconfig, type, name, tag, owner, clock),
m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0, internal_map),
m_gpu_read_handler(*this),
m_gpu_write_handler(*this)
m_gpu_write_handler(*this),
m_cd_read_handler(*this),
m_cd_write_handler(*this)
{
}
@ -1775,6 +1778,8 @@ void psxcpu_device::device_start()
m_gpu_read_handler.resolve_safe(0);
m_gpu_write_handler.resolve_safe();
m_cd_read_handler.resolve_safe(0);
m_cd_write_handler.resolve_safe();
}
@ -3173,6 +3178,16 @@ WRITE32_HANDLER( psxcpu_device::gpu_w )
m_gpu_write_handler( space, offset, data, mem_mask );
}
READ8_HANDLER( psxcpu_device::cd_r )
{
return m_cd_read_handler( space, offset, mem_mask );
}
WRITE8_HANDLER( psxcpu_device::cd_w )
{
m_cd_write_handler( space, offset, data, mem_mask );
}
WRITE32_HANDLER( psxcpu_device::com_delay_w )
{
COMBINE_DATA( &m_com_delay );

12
src/emu/cpu/psx/psx.h
View File

@ -115,6 +115,11 @@ enum
#define MCFG_PSX_GPU_WRITE_HANDLER(_devcb) \
devcb = &psxcpu_device::set_gpu_write_handler(*device, DEVCB2_##_devcb);
#define MCFG_PSX_CD_READ_HANDLER(_devcb) \
devcb = &psxcpu_device::set_cd_read_handler(*device, DEVCB2_##_devcb);
#define MCFG_PSX_CD_WRITE_HANDLER(_devcb) \
devcb = &psxcpu_device::set_cd_write_handler(*device, DEVCB2_##_devcb);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -130,6 +135,8 @@ public:
// static configuration helpers
template<class _Object> static devcb2_base &set_gpu_read_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_gpu_read_handler.set_callback(object); }
template<class _Object> static devcb2_base &set_gpu_write_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_gpu_write_handler.set_callback(object); }
template<class _Object> static devcb2_base &set_cd_read_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_cd_read_handler.set_callback(object); }
template<class _Object> static devcb2_base &set_cd_write_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_cd_write_handler.set_callback(object); }
// public interfaces
DECLARE_WRITE32_MEMBER( biu_w );
@ -140,6 +147,9 @@ public:
DECLARE_WRITE32_MEMBER( gpu_w );
DECLARE_READ32_MEMBER( gpu_r );
DECLARE_WRITE8_MEMBER( cd_w );
DECLARE_READ8_MEMBER( cd_r );
DECLARE_WRITE32_MEMBER( com_delay_w );
DECLARE_READ32_MEMBER( com_delay_r );
@ -281,6 +291,8 @@ protected:
devcb2_read32 m_gpu_read_handler;
devcb2_write32 m_gpu_write_handler;
devcb2_read8 m_cd_read_handler;
devcb2_write8 m_cd_write_handler;
};
class cxd8530aq_device : public psxcpu_device

25
src/mess/drivers/psx.c
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@ -37,8 +37,6 @@ public:
UINT8 m_cd_io_status;
UINT8 m_cd_param[8];
UINT8 m_cd_result[8];
DECLARE_READ8_MEMBER(psx_cd_r);
DECLARE_WRITE8_MEMBER(psx_cd_w);
DECLARE_DIRECT_UPDATE_MEMBER(psx_default);
DECLARE_DIRECT_UPDATE_MEMBER(psx_setopbase);
DECLARE_DRIVER_INIT(psx);
@ -477,23 +475,8 @@ static void cd_dma_write( psxcd_device *psxcd, UINT32 *p_n_psxram, UINT32 n_addr
printf("cd_dma_write?!: addr %x, size %x\n", n_address, n_size);
}
READ8_MEMBER(psx1_state::psx_cd_r)
{
psxcd_device *psxcd = machine().device<psxcd_device>(PSXCD_TAG);
return psxcd->read_byte(offset);
}
WRITE8_MEMBER(psx1_state::psx_cd_w)
{
psxcd_device *psxcd = machine().device<psxcd_device>(PSXCD_TAG);
psxcd->write_byte(offset, data);
}
static ADDRESS_MAP_START( psx_map, AS_PROGRAM, 32, psx1_state )
AM_RANGE(0x00000000, 0x001fffff) AM_RAM AM_MIRROR(0x00600000) AM_SHARE("share1") /* ram */
AM_RANGE(0x1f801800, 0x1f801803) AM_READWRITE8(psx_cd_r, psx_cd_w, 0xffffffff)
AM_RANGE(0x1fc00000, 0x1fc7ffff) AM_ROM AM_SHARE("share2") AM_REGION("user1", 0) /* bios */
AM_RANGE(0x80000000, 0x801fffff) AM_RAM AM_MIRROR(0x00600000) AM_SHARE("share1") /* ram mirror */
AM_RANGE(0x9fc00000, 0x9fc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */
@ -535,6 +518,10 @@ static MACHINE_CONFIG_START( psxntsc, psx1_state )
MCFG_CDROM_ADD("cdrom",psx_cdrom)
MCFG_SOFTWARE_LIST_ADD("cd_list","psx")
MCFG_DEVICE_MODIFY( "maincpu" )
MCFG_PSX_CD_READ_HANDLER( DEVREAD8( PSXCD_TAG, psxcd_device, read ) )
MCFG_PSX_CD_WRITE_HANDLER( DEVWRITE8( PSXCD_TAG, psxcd_device, write ) )
MCFG_PSXCD_ADD("cdrom")
MCFG_PSXCD_IRQ_HANDLER(DEVWRITELINE("maincpu:irq", psxirq_device, intin2))
MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 3, psx_dma_read_delegate( FUNC( cd_dma_read ), (psxcd_device *) device ) )
@ -566,6 +553,10 @@ static MACHINE_CONFIG_START( psxpal, psx1_state )
MCFG_CDROM_ADD("cdrom",psx_cdrom)
MCFG_SOFTWARE_LIST_ADD("cd_list","psx")
MCFG_DEVICE_MODIFY( "maincpu" )
MCFG_PSX_CD_READ_HANDLER( DEVREAD8( PSXCD_TAG, psxcd_device, read ) )
MCFG_PSX_CD_WRITE_HANDLER( DEVWRITE8( PSXCD_TAG, psxcd_device, write ) )
MCFG_PSXCD_ADD("cdrom")
MCFG_PSXCD_IRQ_HANDLER(DEVWRITELINE("maincpu:irq", psxirq_device, intin2))
MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 3, psx_dma_read_delegate( FUNC( cd_dma_read ), (psxcd_device *) device ) )

16
src/mess/machine/psxcd.c
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@ -194,11 +194,11 @@ void psxcd_device::device_reset()
//
//
unsigned char psxcd_device::read_byte(const unsigned int addr)
READ8_MEMBER( psxcd_device::read )
{
unsigned char ret = 0;
switch (addr&3)
switch (offset&3)
{
case 0: ret=sr; break;
case 1:
@ -233,16 +233,16 @@ unsigned char psxcd_device::read_byte(const unsigned int addr)
//
//
void psxcd_device::write_byte(const unsigned int addr, const unsigned char byte)
WRITE8_MEMBER( psxcd_device::write )
{
#ifdef debug_cdrom_registers
printf("cdrom: write byte %08x = %02x (PC=%x)\n",addr,byte,machine().device("maincpu")->safe_pc());
#endif
switch (addr&3)
switch (offset&3)
{
case 0:
cmdmode=byte&1;
cmdmode=data&1;
if (cmdmode==0)
{
cbp=cmdbuf;
@ -295,14 +295,14 @@ void psxcd_device::write_byte(const unsigned int addr, const unsigned char byte)
case 1:
if (cmdmode==0)
{
write_command(byte);
write_command(data);
}
break;
case 2:
if (cmdmode==0)
{
*cbp++=byte;
*cbp++=data;
} else
{
// ?flush buffer?
@ -310,7 +310,7 @@ void psxcd_device::write_byte(const unsigned int addr, const unsigned char byte)
break;
case 3:
if (byte==0x07)
if (data==0x07)
{
if (cur_res)
{

5
src/mess/machine/psxcd.h
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@ -33,6 +33,7 @@ const int num_commands=0x20;
#define MCFG_PSXCD_DEVNAME(_name) \
psxcd_device::static_set_devname(*device, _name);
struct psxcd_interface
{
};
@ -154,8 +155,8 @@ public:
void start_dma(UINT8 *mainram, UINT32 size);
unsigned char read_byte(const unsigned int addr);
void write_byte(const unsigned int addr, const unsigned char byte);
DECLARE_WRITE8_MEMBER( write );
DECLARE_READ8_MEMBER( read );
private:
emu_timer *m_timer;