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srcclean (nw)

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This commit is contained in:
Vas Crabb 2017-11-26 13:33:54 +11:00
parent 54e23ba3ac
commit fd195fdd8a
98 changed files with 755 additions and 755 deletions
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8
src/devices/bus/a2bus/ssbapple.cpp
View File

@ -4,8 +4,8 @@
ssbapple.c
Implementation of the SSB Apple speech card
Must be in slot 2 for the provided software to work!
Implementation of the SSB Apple speech card
Must be in slot 2 for the provided software to work!
*********************************************************************/
@ -82,10 +82,10 @@ bool a2bus_ssb_device::take_c800()
uint8_t a2bus_ssb_device::read_cnxx(address_space &space, uint8_t offset)
{
return 0x1f | m_tms->status_r(space, 0);
return 0x1f | m_tms->status_r(space, 0);
}
void a2bus_ssb_device::write_cnxx(address_space &space, uint8_t offset, uint8_t data)
{
m_tms->data_w(space, 0, data);
}
}

6
src/devices/bus/a2bus/ssbapple.h
View File

@ -28,7 +28,7 @@ public:
// construction/destruction
a2bus_ssb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
static constexpr feature_type imperfect_features() { return feature::SOUND; }
required_device<tms5220_device> m_tms;
protected:
@ -39,8 +39,8 @@ protected:
virtual void device_add_mconfig(machine_config &config) override;
// overrides of standard a2bus slot functions
virtual uint8_t read_cnxx(address_space &space, uint8_t offset) override;
virtual void write_cnxx(address_space &space, uint8_t offset, uint8_t data) override;
virtual uint8_t read_cnxx(address_space &space, uint8_t offset) override;
virtual void write_cnxx(address_space &space, uint8_t offset, uint8_t data) override;
virtual bool take_c800() override;
};

28
src/devices/bus/a2bus/transwarp.cpp
View File

@ -4,13 +4,13 @@
transwarp.cpp
Implementation of the Applied Engineering TransWarp accelerator
TODO:
- needs built-in language card, it's advertised to work w/o one.
- C074 speed control
- Doesn't work with Swyft but advertised to; how does h/w get
around the Fxxx ROM not checksumming right?
Implementation of the Applied Engineering TransWarp accelerator
TODO:
- needs built-in language card, it's advertised to work w/o one.
- C074 speed control
- Doesn't work with Swyft but advertised to; how does h/w get
around the Fxxx ROM not checksumming right?
*********************************************************************/
@ -37,7 +37,7 @@ ADDRESS_MAP_END
ROM_START( warprom )
ROM_REGION(0x1000, "twrom", 0)
ROM_LOAD( "ae transwarp rom v1.4.bin", 0x000000, 0x001000, CRC(afe37f55) SHA1(7b75534e7895e04859a0b1337801c6eeb0cef52a) )
ROM_LOAD( "ae transwarp rom v1.4.bin", 0x000000, 0x001000, CRC(afe37f55) SHA1(7b75534e7895e04859a0b1337801c6eeb0cef52a) )
ROM_END
static INPUT_PORTS_START( warp )
@ -133,7 +133,7 @@ a2bus_transwarp_device::a2bus_transwarp_device(const machine_config &mconfig, de
device_t(mconfig, type, tag, owner, clock),
device_a2bus_card_interface(mconfig, *this),
m_bEnabled(false),
m_ourcpu(*this, CPU_TAG),
m_ourcpu(*this, CPU_TAG),
m_rom(*this, "twrom"),
m_dsw1(*this, "DSW1"),
m_dsw2(*this, "DSW2")
@ -174,7 +174,7 @@ void a2bus_transwarp_device::device_reset()
}
else
{
m_ourcpu->set_unscaled_clock(1021800);
m_ourcpu->set_unscaled_clock(1021800);
}
}
@ -187,7 +187,7 @@ void a2bus_transwarp_device::device_timer(emu_timer &timer, device_timer_id id,
else
m_ourcpu->set_unscaled_clock(A2BUS_7M_CLOCK / 2);
}
m_timer->adjust(attotime::never);
m_timer->adjust(attotime::never);
}
READ8_MEMBER( a2bus_transwarp_device::dma_r )
@ -212,7 +212,7 @@ READ8_MEMBER( a2bus_transwarp_device::dma_r )
WRITE8_MEMBER( a2bus_transwarp_device::dma_w )
{
//if ((offset >= 0xc070) && (offset <= 0xc07f)) printf("%02x to %04x\n", data, offset);
//if ((offset >= 0xc070) && (offset <= 0xc07f)) printf("%02x to %04x\n", data, offset);
if (offset == 0xc072)
{
@ -236,7 +236,7 @@ void a2bus_transwarp_device::hit_slot(int slot)
{
// only do slot slowdown if acceleration is enabled
if (!(m_dsw2->read() & 0x80))
{
{
// accleration's on, check the specific slot
if (m_dsw2->read() & (1<<(slot-1)))
{
@ -245,4 +245,4 @@ void a2bus_transwarp_device::hit_slot(int slot)
m_timer->adjust(attotime::from_usec(20));
}
}
}
}

16
src/devices/bus/a2bus/transwarp.h
View File

@ -24,9 +24,9 @@ class a2bus_transwarp_device:
public:
// construction/destruction
a2bus_transwarp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual const tiny_rom_entry *device_rom_region() const override;
DECLARE_READ8_MEMBER( dma_r );
DECLARE_WRITE8_MEMBER( dma_w );
@ -37,9 +37,9 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_add_mconfig(machine_config &config) override;
virtual ioport_constructor device_input_ports() const override;
virtual ioport_constructor device_input_ports() const override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
// overrides of standard a2bus slot functions
virtual bool take_c800() override;
@ -47,10 +47,10 @@ private:
bool m_bEnabled;
bool m_bReadA2ROM;
emu_timer *m_timer;
required_device<cpu_device> m_ourcpu;
required_region_ptr<uint8_t> m_rom;
required_ioport m_dsw1, m_dsw2;
required_device<cpu_device> m_ourcpu;
required_region_ptr<uint8_t> m_rom;
required_ioport m_dsw1, m_dsw2;
void hit_slot(int slot);
};

2
src/devices/bus/einstein/pipe/speculator.h
View File

@ -49,7 +49,7 @@ protected:
private:
offs_t address_translate(offs_t offset);
required_device<ttl74123_device> m_ic5a;
required_device<ttl74123_device> m_ic5b;
required_device<cassette_image_device> m_cassette;

2
src/devices/bus/einstein/pipe/tk02.cpp
View File

@ -22,7 +22,7 @@ DEFINE_DEVICE_TYPE(TK02_80COL, tk02_device, "tk02", "TK02 80 Column Monochrome U
//-------------------------------------------------
DEVICE_ADDRESS_MAP_START(map, 8, tk02_device)
// AM_RANGE(0x00, 0x07) AM_SELECT(0xff00) AM_READWRITE(ram_r, ram_w) // no AM_SELECT (or AM_MASK) support here
// AM_RANGE(0x00, 0x07) AM_SELECT(0xff00) AM_READWRITE(ram_r, ram_w) // no AM_SELECT (or AM_MASK) support here
AM_RANGE(0x08, 0x08) AM_MIRROR(0xff00) AM_DEVWRITE("crtc", mc6845_device, address_w)
AM_RANGE(0x09, 0x09) AM_MIRROR(0xff00) AM_DEVWRITE("crtc", mc6845_device, register_w)
AM_RANGE(0x0c, 0x0c) AM_MIRROR(0xff00) AM_READ(status_r)

2
src/devices/bus/interpro/sr/gt.cpp
View File

@ -83,7 +83,7 @@ gt_device_base::gt_device_base(const machine_config &mconfig, device_type type,
mpcb963_device::mpcb963_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: gt_device_base(mconfig, MPCB963, tag, owner, clock)
, m_screen{ { { *this, "ramdac0" }, {}, true } }
, m_screen{ { { *this, "ramdac0" }, {}, true } }
{
}

2
src/devices/bus/lpci/southbridge.cpp
View File

@ -122,7 +122,7 @@ southbridge_device::southbridge_device(const machine_config &mconfig, device_typ
m_isabus(*this, "isabus"),
m_speaker(*this, "speaker"),
m_ide(*this, "ide"),
m_ide2(*this, "ide2"),
m_ide2(*this, "ide2"),
m_at_spkrdata(0), m_pit_out2(0), m_dma_channel(0), m_cur_eop(false), m_dma_high_byte(0), m_at_speaker(0), m_refresh(false), m_channel_check(0), m_nmi_enabled(0)
{
}

2
src/devices/bus/tmc600/euro.cpp
View File

@ -63,7 +63,7 @@ SLOT_INTERFACE_START( tmc600_euro_bus_cards )
//SLOT_INTERFACE("tmc710", TMC710) // 5-way expander
//SLOT_INTERFACE("tmc720", TMC720) // 5-way expander (new model)
//SLOT_INTERFACE("tmce200", TMCE200) // 8 KB RAM (CMOS)
//SLOT_INTERFACE("tmce220", TMCE220) // 16/32 KB RAM/EPROM
//SLOT_INTERFACE("tmce220", TMCE220) // 16/32 KB RAM/EPROM
//SLOT_INTERFACE("tmce225", TMCE225) // 16 KB RAM (CMOS)
//SLOT_INTERFACE("tmce250", TMCE250) // 32-way input/output
//SLOT_INTERFACE("tmce260", TMCE260) // RS-232

2
src/devices/bus/tmc600/euro.h
View File

@ -53,7 +53,7 @@
// CONSTANTS
//**************************************************************************
#define TMC600_EURO_BUS_TAG "bus"
#define TMC600_EURO_BUS_TAG "bus"

12
src/devices/cpu/arm7/arm7.cpp
View File

@ -1252,15 +1252,15 @@ READ32_MEMBER( arm946es_cpu_device::arm7_rt_r_callback )
uint8_t cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT;
uint32_t data = 0;
//printf("arm7946: read cpnum %d cReg %d op2 %d op3 %d (%x)\n", cpnum, cReg, op2, op3, opcode);
//printf("arm7946: read cpnum %d cReg %d op2 %d op3 %d (%x)\n", cpnum, cReg, op2, op3, opcode);
if (cpnum == 15)
{
switch( cReg )
{
case 0:
case 0:
switch (op2)
{
case 0: // chip ID
case 0: // chip ID
data = 0x41059461;
break;
@ -1305,13 +1305,13 @@ WRITE32_MEMBER( arm946es_cpu_device::arm7_rt_w_callback )
uint8_t op3 = opcode & INSN_COPRO_OP3;
uint8_t cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT;
// printf("arm7946: copro %d write %x to cReg %d op2 %d op3 %d (mask %08x)\n", cpnum, data, cReg, op2, op3, mem_mask);
// printf("arm7946: copro %d write %x to cReg %d op2 %d op3 %d (mask %08x)\n", cpnum, data, cReg, op2, op3, mem_mask);
if (cpnum == 15)
{
switch (cReg)
{
case 1: // control
case 1: // control
cp15_control = data;
RefreshDTCM();
RefreshITCM();
@ -1344,7 +1344,7 @@ WRITE32_MEMBER( arm946es_cpu_device::arm7_rt_w_callback )
{
cp15_itcm_reg = data;
RefreshITCM();
}
}
}
break;
}

2
src/devices/cpu/arm7/arm7dasm.cpp
View File

@ -220,7 +220,7 @@ static uint32_t arm7_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode
WriteBranchAddress( stream, pc, opcode, true );
}
else if( (opcode&0x0ff000f0)==0x01200030 ) // (BLX - v5)
else if( (opcode&0x0ff000f0)==0x01200030 ) // (BLX - v5)
{
/* BLX(2) */
util::stream_format( stream, "BLX" );

2
src/devices/cpu/arm7/arm7ops.cpp
View File

@ -1660,7 +1660,7 @@ void arm7_cpu_device::arm7ops_0123(uint32_t insn)
R15--;
}
}
else if ((insn & 0x0ff000f0) == 0x01200030) // BLX Rn - v5
else if ((insn & 0x0ff000f0) == 0x01200030) // BLX Rn - v5
{
// save link address
SetRegister(14, R15 + 4);

4
src/devices/cpu/e132xs/e132xs.cpp
View File

@ -625,8 +625,8 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val)
#define S_BIT ((OP & 0x100) >> 8)
#define D_BIT ((OP & 0x200) >> 9)
#define N_VALUE (((OP & 0x100) >> 4) | (OP & 0x0f))
#define HI_N_VALUE (0x10 | (OP & 0x0f))
#define LO_N_VALUE (OP & 0x0f)
#define HI_N_VALUE (0x10 | (OP & 0x0f))
#define LO_N_VALUE (OP & 0x0f)
#define N_OP_MASK (m_op & 0x10f)
#define DST_CODE ((OP & 0xf0) >> 4)
#define SRC_CODE (OP & 0x0f)

256
src/devices/cpu/e132xs/e132xs.h
View File

@ -341,134 +341,134 @@ private:
#endif
#if 0
void generate_op00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op04(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op05(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op06(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op07(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op08(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op09(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op0a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op0c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op0e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op14(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op16(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op17(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op18(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op19(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op1a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op1c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op1e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op20(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op21(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op22(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op23(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op24(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op25(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op26(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op27(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op28(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op29(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op2a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op2c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op2e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op30(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op31(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op32(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op33(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op34(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op35(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op36(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op37(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op38(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op39(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op3a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op3c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op3e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op40(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op41(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op42(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op43(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op44(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op45(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op46(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op47(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op48(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op49(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op4a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op4c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op4e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op50(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op51(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op52(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op53(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op54(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op55(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op56(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op57(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op58(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op59(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op5a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op5c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op5e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op60(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op61(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op62(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op63(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op65(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op66(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op67(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op68(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op69(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op6a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op6c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op6e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op70(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op71(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op72(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op73(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op74(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op75(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op76(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op77(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op78(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op79(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op7a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op7c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op7e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op80(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op81(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op82(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op83(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op84(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op85(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op86(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op87(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op88(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op8a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op8c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op8e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op90(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op91(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op92(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op93(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op94(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op95(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op96(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op97(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op98(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op99(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op9a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op9c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op9e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opa0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opa2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opa4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opa6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opa8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opaa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opac(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opad(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opae(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opaf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opb0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opb2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opb4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opb6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opb8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opba(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opbc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opbe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opc0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opc2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opc4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opc6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opc8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opca(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opcc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opce(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opd0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opd2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opd4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opd6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opd8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opda(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opdc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opde(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_ope0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_ope2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_ope4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_ope6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_ope8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opeb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opec(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_oped(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opee(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opef(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opf0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opf2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opf4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opf6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opf8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opfa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opfc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opfe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opff(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op04(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op05(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op06(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op07(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op08(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op09(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op0a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op0c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op0e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op14(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op16(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op17(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op18(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op19(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op1a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op1c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op1e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op20(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op21(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op22(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op23(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op24(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op25(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op26(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op27(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op28(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op29(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op2a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op2c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op2e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op30(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op31(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op32(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op33(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op34(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op35(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op36(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op37(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op38(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op39(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op3a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op3c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op3e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op40(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op41(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op42(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op43(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op44(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op45(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op46(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op47(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op48(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op49(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op4a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op4c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op4e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op50(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op51(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op52(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op53(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op54(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op55(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op56(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op57(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op58(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op59(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op5a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op5c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op5e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op60(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op61(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op62(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op63(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op65(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op66(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op67(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op68(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op69(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op6a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op6c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op6e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op70(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op71(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op72(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op73(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op74(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op75(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op76(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op77(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op78(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op79(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op7a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op7c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op7e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op80(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op81(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op82(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op83(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op84(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op85(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op86(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op87(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op88(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op8a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op8c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op8e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op90(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op91(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op92(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op93(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op94(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op95(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op96(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op97(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op98(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op99(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op9a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op9c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_op9e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opa0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opa2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opa4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opa6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opa8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opaa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opac(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opad(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opae(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opaf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opb0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opb2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opb4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opb6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opb8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opba(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opbc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opbe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opc0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opc2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opc4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opc6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opc8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opca(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opcc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opce(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opd0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opd2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opd4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opd6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opd8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opda(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opdc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opde(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_ope0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_ope2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_ope4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_ope6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_ope8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opeb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opec(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_oped(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opee(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opef(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opf0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opf2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opf4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opf6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opf8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opfa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opfc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
void generate_opfe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opff(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
#endif
};

12
src/devices/cpu/mcs48/mcs48.cpp
View File

@ -8,12 +8,12 @@
- T0 output clock
- get rid of i/o addressmap, use devcb for mcu pins
- add CMOS devices, 1 new opcode (01 HALT)
- make timer update cleaner:
timer is updated on S4 while I/O happens on S5
due to very bad coding, Kaypro 10 keyboard depends on being able to see T=0 before interrupt is taken
right now this is implemented with a hack in the mov_a_t handler
in theory it should also be possible to see the timer flag before the interrupt is taken
mov_t_a should also update the T register after it's incremented
- make timer update cleaner:
timer is updated on S4 while I/O happens on S5
due to very bad coding, Kaypro 10 keyboard depends on being able to see T=0 before interrupt is taken
right now this is implemented with a hack in the mov_a_t handler
in theory it should also be possible to see the timer flag before the interrupt is taken
mov_t_a should also update the T register after it's incremented
*/
/***************************************************************************

6
src/devices/cpu/mcs48/mcs48.h
View File

@ -243,11 +243,11 @@ protected:
static const mcs48_ophandler s_opcode_table[256];
/* ROM is mapped to AS_PROGRAM */
uint8_t program_r(offs_t a) { return m_program->read_byte(a); }
uint8_t program_r(offs_t a) { return m_program->read_byte(a); }
/* RAM is mapped to AS_DATA */
uint8_t ram_r(offs_t a) { return m_data->read_byte(a); }
void ram_w(offs_t a, uint8_t v) { m_data->write_byte(a, v); }
uint8_t ram_r(offs_t a) { return m_data->read_byte(a); }
void ram_w(offs_t a, uint8_t v) { m_data->write_byte(a, v); }
/* ports are mapped to AS_IO and callbacks */
uint8_t ext_r(offs_t a) { return m_io->read_byte(a); }

2
src/devices/cpu/sh/sh4.cpp
View File

@ -3068,7 +3068,7 @@ bool sh34_base_device::generate_group_4_LDCSR(drcuml_block *block, compiler_stat
UML_CALLC(block, cfunc_LDCSR, this);
load_fast_iregs(block);
compiler->checkints = true;
compiler->checkints = true;
return true;
}

2
src/devices/cpu/z80/z80daisy_generic.cpp
View File

@ -2,7 +2,7 @@
// copyright-holders: Dirk Best
/***************************************************************************
Generic Z80 daisy chain device
Generic Z80 daisy chain device
***************************************************************************/

2
src/devices/cpu/z80/z80daisy_generic.h
View File

@ -2,7 +2,7 @@
// copyright-holders: Dirk Best
/***************************************************************************
Generic Z80 daisy chain device
Generic Z80 daisy chain device
***************************************************************************/

4
src/devices/machine/adc0844.cpp
View File

@ -126,7 +126,7 @@ void adc0844_device::device_timer(emu_timer &timer, device_timer_id id, int para
case 0x0d: m_result = clamp(0xff - (m_ch4_cb(0) - m_ch2_cb(0))); break;
case 0x0e: m_result = clamp(0xff - (m_ch4_cb(0) - m_ch3_cb(0))); break;
// undefined
case 0x0f: m_result = 0x00; break;
case 0x0f: m_result = 0x00; break;
}
m_intr_cb(ASSERT_LINE);
@ -171,7 +171,7 @@ void adc0848_device::device_timer(emu_timer &timer, device_timer_id id, int para
case 0x1d: m_result = clamp(0xff - (m_ch8_cb(0) - m_ch6_cb(0))); break;
case 0x1e: m_result = clamp(0xff - (m_ch8_cb(0) - m_ch7_cb(0))); break;
// undefined
case 0x1f: m_result = 0x00; break;
case 0x1f: m_result = 0x00; break;
}
m_intr_cb(ASSERT_LINE);

36
src/devices/machine/atmel_arm_aic.cpp
View File

@ -18,24 +18,24 @@ DEFINE_DEVICE_TYPE(ARM_AIC, arm_aic_device, "arm_aic", "ARM Advanced Interrupt C
DEVICE_ADDRESS_MAP_START( regs_map, 32, arm_aic_device )
AM_RANGE(0x000, 0x07f) AM_READWRITE(aic_smr_r, aic_smr_w) // AIC_SMR[32] (AIC_SMR) Source Mode Register
AM_RANGE(0x080, 0x0ff) AM_READWRITE(aic_svr_r, aic_svr_w) // AIC_SVR[32] (AIC_SVR) Source Vector Register
AM_RANGE(0x100, 0x103) AM_READ(irq_vector_r) // AIC_IVR IRQ Vector Register
AM_RANGE(0x104, 0x107) AM_READ(firq_vector_r) // AIC_FVR FIQ Vector Register
// 0x108 AIC_ISR Interrupt Status Register
// 0x10C AIC_IPR Interrupt Pending Register
// 0x110 AIC_IMR Interrupt Mask Register
// 0x114 AIC_CISR Core Interrupt Status Register
AM_RANGE(0x120, 0x123) AM_WRITE(aic_iecr_w) // 0x120 AIC_IECR Interrupt Enable Command Register
AM_RANGE(0x124, 0x127) AM_WRITE(aic_idcr_w) // 0x124 AIC_IDCR Interrupt Disable Command Register
AM_RANGE(0x128, 0x12b) AM_WRITE(aic_iccr_w) // 0x128 AIC_ICCR Interrupt Clear Command Register
// 0x12C AIC_ISCR Interrupt Set Command Register
AM_RANGE(0x130, 0x133) AM_WRITE(aic_eoicr_w) // 0x130 AIC_EOICR End of Interrupt Command Register
// 0x134 AIC_SPU Spurious Vector Register
// 0x138 AIC_DCR Debug Control Register (Protect)
// 0x140 AIC_FFER Fast Forcing Enable Register
// 0x144 AIC_FFDR Fast Forcing Disable Register
// 0x148 AIC_FFSR Fast Forcing Status Register
AM_RANGE(0x000, 0x07f) AM_READWRITE(aic_smr_r, aic_smr_w) // AIC_SMR[32] (AIC_SMR) Source Mode Register
AM_RANGE(0x080, 0x0ff) AM_READWRITE(aic_svr_r, aic_svr_w) // AIC_SVR[32] (AIC_SVR) Source Vector Register
AM_RANGE(0x100, 0x103) AM_READ(irq_vector_r) // AIC_IVR IRQ Vector Register
AM_RANGE(0x104, 0x107) AM_READ(firq_vector_r) // AIC_FVR FIQ Vector Register
// 0x108 AIC_ISR Interrupt Status Register
// 0x10C AIC_IPR Interrupt Pending Register
// 0x110 AIC_IMR Interrupt Mask Register
// 0x114 AIC_CISR Core Interrupt Status Register
AM_RANGE(0x120, 0x123) AM_WRITE(aic_iecr_w) // 0x120 AIC_IECR Interrupt Enable Command Register
AM_RANGE(0x124, 0x127) AM_WRITE(aic_idcr_w) // 0x124 AIC_IDCR Interrupt Disable Command Register
AM_RANGE(0x128, 0x12b) AM_WRITE(aic_iccr_w) // 0x128 AIC_ICCR Interrupt Clear Command Register
// 0x12C AIC_ISCR Interrupt Set Command Register
AM_RANGE(0x130, 0x133) AM_WRITE(aic_eoicr_w) // 0x130 AIC_EOICR End of Interrupt Command Register
// 0x134 AIC_SPU Spurious Vector Register
// 0x138 AIC_DCR Debug Control Register (Protect)
// 0x140 AIC_FFER Fast Forcing Enable Register
// 0x144 AIC_FFDR Fast Forcing Disable Register
// 0x148 AIC_FFSR Fast Forcing Status Register
ADDRESS_MAP_END
READ32_MEMBER(arm_aic_device::irq_vector_r)

4
src/devices/machine/atmel_arm_aic.h
View File

@ -21,7 +21,7 @@ public:
arm_aic_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, ARM_AIC, tag, owner, clock),
m_irq_out(*this)
{
{
}
// configuration
@ -48,7 +48,7 @@ public:
protected:
virtual void device_start() override;
virtual void device_reset() override;
private:
uint32_t m_irqs_enabled;
uint32_t m_current_irq_vector;

18
src/devices/machine/ds1315.cpp
View File

@ -7,9 +7,9 @@
Dallas Semiconductor's Phantom Time Chip DS1315.
NOTE: writes are decoded, but the host's time will always be returned when asked.
November 2017: R. Belmont added capability to emulate DS1216 and other DS121x
parts where the clock sits in the same place as a ROM. The backing callback
returns the ROM contents when the RTC is locked.
November 2017: R. Belmont added capability to emulate DS1216 and other DS121x
parts where the clock sits in the same place as a ROM. The backing callback
returns the ROM contents when the RTC is locked.
April 2015: chip enable / chip reset / phantom writes by Karl-Ludwig Deisenhofer
@ -33,9 +33,9 @@
DEFINE_DEVICE_TYPE(DS1315, ds1315_device, "ds1315", "Dallas DS1315 Phantom Time Chip")
ds1315_device::ds1315_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, DS1315, tag, owner, clock),
m_backing_read(*this),
m_mode(),
: device_t(mconfig, DS1315, tag, owner, clock),
m_backing_read(*this),
m_mode(),
m_count(0)
{
}
@ -106,14 +106,14 @@ READ8_MEMBER( ds1315_device::read )
m_mode = DS_SEEK_MATCHING;
}
return m_backing_read(offset);
}
return m_backing_read(offset);
}
else if (m_mode == DS_CALENDAR_IO)
{
return read_data(space, offset);
}
return 0xff; // shouldn't happen, but compilers don't know that
return 0xff; // shouldn't happen, but compilers don't know that
}

4
src/devices/machine/ds1315.h
View File

@ -37,7 +37,7 @@ public:
// this handler automates the bits 0/2 stuff
DECLARE_READ8_MEMBER(read);
DECLARE_READ8_MEMBER(read_0);
DECLARE_READ8_MEMBER(read_1);
DECLARE_READ8_MEMBER(read_data);
@ -56,7 +56,7 @@ protected:
private:
devcb_read8 m_backing_read;
enum mode_t : u8
{
DS_SEEK_MATCHING,

8
src/devices/sound/ymz770.cpp
View File

@ -81,7 +81,7 @@ void ymz770_device::device_start()
save_item(NAME(m_bsl));
save_item(NAME(m_cpl));
for (int ch = 0; ch < 16; ch++) // TODO array size
for (int ch = 0; ch < 16; ch++) // TODO array size
{
save_item(NAME(m_channels[ch].phrase), ch);
save_item(NAME(m_channels[ch].pan), ch);
@ -166,9 +166,9 @@ void ymz770_device::sound_stream_update(sound_stream &stream, stream_sample_t **
if (channel.output_remaining > 0)
{
// force finish current block
int32_t smpl = (channel.output_data[channel.output_ptr++] * channel.volume) >> 7; // volume is linear, 0 - 128 (100%)
int32_t smpl = (channel.output_data[channel.output_ptr++] * channel.volume) >> 7; // volume is linear, 0 - 128 (100%)
smpl = (smpl * channel.volume2) >> 7;
mixr += (smpl * channel.pan) >> 7; // pan seems linear, 0 - 128, where 0 = 100% left, 128 = 100% right, 64 = 50% left 50% right
mixr += (smpl * channel.pan) >> 7; // pan seems linear, 0 - 128, where 0 = 100% left, 128 = 100% right, 64 = 50% left 50% right
mixl += (smpl * (128 - channel.pan)) >> 7;
channel.output_remaining--;
@ -222,7 +222,7 @@ retry:
}
}
mixr *= m_vlma; // main volume is linear, 0 - 255, where 128 = 100%
mixr *= m_vlma; // main volume is linear, 0 - 255, where 128 = 100%
mixl *= m_vlma;
mixr >>= 7 - m_bsl;
mixl >>= 7 - m_bsl;

78
src/devices/video/imagetek_i4100.cpp
View File

@ -2,17 +2,17 @@
// copyright-holders:Luca Elia,David Haywood,Angelo Salese
/***************************************************************************
Imagetek I4100 / I4220 / I4300 device files
device emulation by Angelo Salese, based off from original metro.cpp
implementation by Luca Elia & David Haywood
TODO:
- interrupt enable/acknowledge/vector;
- soundlatch delegate;
- inputs for i4300;
- hyprduel.cpp uses scanline attribute which crawls to unusable state
with current video routines here;
Imagetek I4100 / I4220 / I4300 device files
device emulation by Angelo Salese, based off from original metro.cpp
implementation by Luca Elia & David Haywood
TODO:
- interrupt enable/acknowledge/vector;
- soundlatch delegate;
- inputs for i4300;
- hyprduel.cpp uses scanline attribute which crawls to unusable state
with current video routines here;
============================================================================
@ -51,7 +51,7 @@
an exponential curve of sizes (with one zoom value for both width
and height)
***************************************************************************/
#include "emu.h"
@ -94,7 +94,7 @@ DEVICE_ADDRESS_MAP_START( map, 16, imagetek_i4100_device)
AM_RANGE(0x78852, 0x78853) AM_READWRITE(screen_xoffset_r, screen_xoffset_w)
AM_RANGE(0x78860, 0x7886b) AM_READWRITE(window_r, window_w) AM_SHARE("windowregs")
AM_RANGE(0x78870, 0x7887b) AM_READWRITE(scroll_r, scroll_w) AM_SHARE("scrollregs")
AM_RANGE(0x78880, 0x78881) AM_WRITE(crtc_vert_w)
AM_RANGE(0x78890, 0x78891) AM_WRITE(crtc_horz_w)
AM_RANGE(0x788a0, 0x788a1) AM_WRITE(crtc_unlock_w)
@ -121,7 +121,7 @@ DEVICE_ADDRESS_MAP_START( v2_map, 16, imagetek_i4220_device)
AM_RANGE(0x78852, 0x78853) AM_READWRITE(screen_xoffset_r, screen_xoffset_w)
AM_RANGE(0x78860, 0x7886b) AM_READWRITE(window_r, window_w) AM_SHARE("windowregs")
AM_RANGE(0x78870, 0x7887b) AM_READWRITE(scroll_r, scroll_w) AM_SHARE("scrollregs")
AM_RANGE(0x78880, 0x78881) AM_WRITE(crtc_vert_w)
AM_RANGE(0x78890, 0x78891) AM_WRITE(crtc_horz_w)
AM_RANGE(0x788a0, 0x788a1) AM_WRITE(crtc_unlock_w)
@ -139,7 +139,7 @@ DEVICE_ADDRESS_MAP_START( v2_map, 16, imagetek_i4220_device)
// repeated here in Puzzlet compatibility mode
AM_RANGE(0x78800, 0x78801) AM_READWRITE(sprite_count_r, sprite_count_w)
// ... this one breaks Blazing Tornado tho
// AM_RANGE(0x78802, 0x78803) AM_READWRITE(sprite_priority_r, sprite_priority_w)
// AM_RANGE(0x78802, 0x78803) AM_READWRITE(sprite_priority_r, sprite_priority_w)
AM_RANGE(0x78804, 0x78805) AM_READWRITE(sprite_yoffset_r, sprite_yoffset_w)
AM_RANGE(0x78806, 0x78807) AM_READWRITE(sprite_xoffset_r, sprite_xoffset_w)
AM_RANGE(0x78808, 0x78809) AM_READWRITE(sprite_color_code_r, sprite_color_code_w)
@ -279,12 +279,12 @@ void imagetek_i4100_device::expand_gfx1()
// TODO: remove from device_reset (otherwise you get broken sprites in i4220+ games because gfx rom isn't yet inited!)
if(m_inited_hack == true)
return;
m_inited_hack = true;
uint32_t length = m_gfxrom_size * 2;
m_expanded_gfx1 = std::make_unique<uint8_t[]>(length);
for (int i = 0; i < length; i += 2)
{
uint8_t src = m_gfxrom[i / 2];
@ -311,21 +311,21 @@ void imagetek_i4100_device::device_start()
save_item(NAME(m_screen_yoffset));
save_item(NAME(m_layer_priority));
save_item(NAME(m_background_color));
// save_item(NAME(m_window));
// save_item(NAME(m_scroll));
// save_item(NAME(m_window));
// save_item(NAME(m_scroll));
save_item(NAME(m_screen_blank));
save_item(NAME(m_screen_flip));
// memory_region *devregion = machine().root_device().memregion(":gfx1");
// m_gfxrom = devregion->base();
// memory_region *devregion = machine().root_device().memregion(":gfx1");
// m_gfxrom = devregion->base();
if (m_gfxrom == nullptr)
fatalerror("Imagetek i4100 %s: \"gfx1\" memory base not found",this->tag());
m_gfxrom_size = m_gfxrom.bytes();
m_blit_irq_cb.resolve_safe();
m_blit_done_timer = timer_alloc(TIMER_BLIT_END);
}
@ -432,9 +432,9 @@ WRITE16_MEMBER(imagetek_i4100_device::sprite_color_code_w) { COMBINE_DATA(&m_spr
*
************************************************************/
READ16_MEMBER(imagetek_i4100_device::layer_priority_r)
{
return (m_layer_priority[2]<<4) | (m_layer_priority[1]<<2) | m_layer_priority[0];
READ16_MEMBER(imagetek_i4100_device::layer_priority_r)
{
return (m_layer_priority[2]<<4) | (m_layer_priority[1]<<2) | m_layer_priority[0];
}
WRITE16_MEMBER(imagetek_i4100_device::layer_priority_w)
@ -460,7 +460,7 @@ READ16_MEMBER(imagetek_i4100_device::background_color_r)
WRITE16_MEMBER(imagetek_i4100_device::background_color_w)
{
COMBINE_DATA(&m_background_color);
m_background_color &= 0x0fff;
if(data & 0xf000)
logerror("%s warning: background_color_w write with %04x %04x\n",this->tag(),data,mem_mask);
@ -469,9 +469,9 @@ WRITE16_MEMBER(imagetek_i4100_device::background_color_w)
/***************************************************************************
*
* 0.w Sprite Y center point
* 2.w Sprite X center point
* 2.w Sprite X center point
*
* Appears to apply only for sprites, maybe they applies to tilemaps too under
* Appears to apply only for sprites, maybe they applies to tilemaps too under
* certain conditions
*
***************************************************************************/
@ -498,7 +498,7 @@ WRITE16_MEMBER(imagetek_i4100_device::scroll_w) { COMBINE_DATA(&m_scroll[offset]
* ---- ---- ---- ---0 Flip Screen
*
****************************************************/
WRITE16_MEMBER(imagetek_i4100_device::screen_ctrl_w)
WRITE16_MEMBER(imagetek_i4100_device::screen_ctrl_w)
{
m_layer_tile_select[2] = BIT(data,7);
m_layer_tile_select[1] = BIT(data,6);
@ -507,7 +507,7 @@ WRITE16_MEMBER(imagetek_i4100_device::screen_ctrl_w)
// TODO: some of these must be externalized
m_screen_blank = BIT(data,1);
m_screen_flip = BIT(data,0);
if(data & 0xff1c)
logerror("%s warning: screen_ctrl_w write with %04x %04x\n",this->tag(),data,mem_mask);
@ -950,7 +950,7 @@ void imagetek_i4100_device::draw_sprites( screen_device &screen, bitmap_ind16 &b
}
}
inline uint8_t imagetek_i4100_device::get_tile_pix( uint16_t code, uint8_t x, uint8_t y, bool big, uint16_t *pix )
{
int table_index;
@ -1054,7 +1054,7 @@ void imagetek_i4100_device::draw_sprites( screen_device &screen, bitmap_ind16 &b
* 00-ff, but on later chips supporting it, xf means 256 color tile and palette x
***************************************************************************/
void imagetek_i4100_device::draw_tilemap( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, uint32_t flags, uint32_t pcode,
int sx, int sy, int wx, int wy, bool big, uint16_t *tilemapram, int layer )
{
@ -1134,7 +1134,7 @@ void imagetek_i4100_device::draw_tilemap( screen_device &screen, bitmap_ind16 &b
}
}
void imagetek_i4100_device::draw_layers( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pri )
{
// Draw all the layers with priority == pri
@ -1162,11 +1162,11 @@ void imagetek_i4100_device::draw_layers( screen_device &screen, bitmap_ind16 &bi
}
}
uint32_t imagetek_i4100_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
screen.priority().fill(0, cliprect);
bitmap.fill(m_background_color, cliprect);
if (m_screen_blank == true)
@ -1176,6 +1176,6 @@ uint32_t imagetek_i4100_device::screen_update(screen_device &screen, bitmap_ind1
draw_layers(screen, bitmap, cliprect, pri);
draw_sprites(screen, bitmap, cliprect);
return 0;
}

24
src/devices/video/imagetek_i4100.h
View File

@ -2,7 +2,7 @@
// copyright-holders:Luca Elia,David Haywood,Angelo Salese
/***************************************************************************
Imagetek I4100 / I4220 / I4300 device files
Imagetek I4100 / I4220 / I4300 device files
***************************************************************************/
@ -20,7 +20,7 @@
#define MCFG_I4100_GFXDECODE(gfxtag) \
imagetek_i4100_device::static_set_gfxdecode_tag(*device, ("^" gfxtag));
#define MCFG_I4100_BLITTER_END_CALLBACK(_devcb) \
devcb = &imagetek_i4100_device::static_set_blitter_irq_callback(*device, DEVCB_##_devcb);
@ -38,7 +38,7 @@
// ======================> i4100_device
class imagetek_i4100_device : public device_t,
public device_video_interface
public device_video_interface
{
public:
// construction/destruction
@ -52,7 +52,7 @@ public:
template <class Object> static devcb_base &static_set_blitter_irq_callback(device_t &device, Object &&cb) { return downcast<imagetek_i4100_device &>(device).m_blit_irq_cb.set_callback(std::forward<Object>(cb)); }
// I/O operations
DECLARE_READ16_MEMBER( vram_0_r );
DECLARE_READ16_MEMBER( vram_1_r );
@ -91,13 +91,13 @@ public:
DECLARE_WRITE16_MEMBER( screen_xoffset_w );
DECLARE_READ16_MEMBER( screen_yoffset_r );
DECLARE_WRITE16_MEMBER( screen_yoffset_w );
DECLARE_READ16_MEMBER( window_r );
DECLARE_WRITE16_MEMBER( window_w );
DECLARE_READ16_MEMBER( scroll_r );
DECLARE_WRITE16_MEMBER( scroll_w );
DECLARE_READ16_MEMBER( gfxrom_r );
DECLARE_WRITE16_MEMBER( crtc_vert_w );
DECLARE_WRITE16_MEMBER( crtc_horz_w );
@ -106,7 +106,7 @@ public:
DECLARE_WRITE16_MEMBER( screen_ctrl_w );
DECLARE_WRITE16_MEMBER( rombank_w );
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
protected:
@ -128,7 +128,7 @@ protected:
required_shared_ptr<uint16_t> m_tiletable;
required_shared_ptr<uint16_t> m_window;
required_shared_ptr<uint16_t> m_scroll;
required_device<palette_device> m_palette;
required_device<gfxdecode_device> m_gfxdecode;
required_region_ptr<uint8_t> m_gfxrom;
@ -160,10 +160,10 @@ protected:
{
TIMER_BLIT_END = 1
};
emu_timer *m_blit_done_timer;
void draw_layers( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pri );
void draw_layers( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pri );
inline uint8_t get_tile_pix( uint16_t code, uint8_t x, uint8_t y, bool big, uint16_t *pix );
void draw_tilemap( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, uint32_t flags, uint32_t pcode,
int sx, int sy, int wx, int wy, bool big, uint16_t *tilemapram, int layer );
@ -177,7 +177,7 @@ protected:
// A smaller 512 x 256 window defines the actual tilemap
static constexpr uint32_t WIN_NX = (0x40);
static constexpr uint32_t WIN_NY = (0x20);
bool m_inited_hack;
};

2
src/emu/drivers/xtal.h
View File

@ -34,7 +34,7 @@
MAME doesn't yet support fractions in crystal frequencies. For example,
XTAL_3_579545MHz should actually be 3579545.454545...Hz (39375000/11).
This is no problem though: see above note about tolerance.
In the "Examples" column, please don't add 1000 examples, this is just
for interest, so two or three examples is enough.
The actual reference where the xtals are used can be found in the

16
src/mame/audio/flower.cpp
View File

@ -2,13 +2,13 @@
// copyright-holders:Angelo Salese
/***************************************************************************
Flower custom sound chip
Flower custom sound chip
Similar to Wiping and Namco 15xx designs
Similar to Wiping and Namco 15xx designs
TODO:
- several unknown registers (effects and unknown register tied to repeat port);
- repeat certainly needs a cutoff, which is unknown about how it works;
TODO:
- several unknown registers (effects and unknown register tied to repeat port);
- repeat certainly needs a cutoff, which is unknown about how it works;
***************************************************************************/
@ -47,10 +47,10 @@ flower_sound_device::flower_sound_device(const machine_config &mconfig, const ch
device_memory_interface(mconfig, *this),
m_io_space_config("io", ENDIANNESS_LITTLE, 8, 7, 0, *ADDRESS_MAP_NAME(regs_map)),
m_stream(nullptr),
m_mixer_table(nullptr),
m_mixer_table(nullptr),
m_mixer_lookup(nullptr),
m_mixer_buffer(nullptr),
m_last_channel(nullptr)
m_mixer_buffer(nullptr),
m_last_channel(nullptr)
{
}

10
src/mame/audio/flower.h
View File

@ -2,7 +2,7 @@
// copyright-holders:Angelo Salese
/***************************************************************************
Flower custom sound chip
Flower custom sound chip
***************************************************************************/
@ -18,8 +18,8 @@
// ======================> flower_sound_device
class flower_sound_device : public device_t,
public device_sound_interface,
public device_memory_interface
public device_sound_interface,
public device_memory_interface
{
public:
// construction/destruction
@ -28,8 +28,8 @@ public:
// I/O operations
DECLARE_WRITE8_MEMBER( lower_write );
DECLARE_WRITE8_MEMBER( upper_write );
// virtual DECLARE_ADDRESS_MAP(lower_map, 8);
// virtual DECLARE_ADDRESS_MAP(upper_map, 8);
// virtual DECLARE_ADDRESS_MAP(lower_map, 8);
// virtual DECLARE_ADDRESS_MAP(upper_map, 8);
DECLARE_WRITE8_MEMBER( frequency_w );
DECLARE_WRITE8_MEMBER( repeat_w );
DECLARE_WRITE8_MEMBER( unk_w );

4
src/mame/drivers/acd.cpp
View File

@ -15,11 +15,11 @@ class acd_state : public driver_device
public:
acd_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// , m_maincpu(*this, "maincpu")
// , m_maincpu(*this, "maincpu")
{ }
private:
// required_device<cpu_device> m_maincpu;
// required_device<cpu_device> m_maincpu;
};
//static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, acd_state )

4
src/mame/drivers/alto1.cpp
View File

@ -18,11 +18,11 @@ class alto1_state : public driver_device
public:
alto1_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// , m_maincpu(*this, "maincpu")
// , m_maincpu(*this, "maincpu")
{ }
private:
// required_device<cpu_device> m_maincpu;
// required_device<cpu_device> m_maincpu;
};

4
src/mame/drivers/ampscarp.cpp
View File

@ -15,11 +15,11 @@ class ampscarp_state : public driver_device
public:
ampscarp_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// , m_maincpu(*this, "maincpu")
// , m_maincpu(*this, "maincpu")
{ }
private:
// required_device<cpu_device> m_maincpu;
// required_device<cpu_device> m_maincpu;
};
//static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, ampscarp_state )

10
src/mame/drivers/amusco.cpp
View File

@ -129,7 +129,7 @@ public:
DECLARE_PALETTE_INIT(amusco);
protected:
virtual void video_start() override;
virtual void machine_start() override;
virtual void machine_start() override;
private:
uint8_t *m_videoram;
tilemap_t *m_bg_tilemap;
@ -179,9 +179,9 @@ void amusco_state::video_start()
{
m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(amusco_state::get_bg_tile_info),this), TILEMAP_SCAN_ROWS, 8, 10, 74, 24);
m_blink_state = false;
m_videoram = auto_alloc_array_clear(machine(), uint8_t, videoram_size);
save_pointer(NAME(m_videoram), videoram_size);
}
@ -492,8 +492,8 @@ PALETTE_INIT_MEMBER(amusco_state,amusco)
/**/palette.set_pen_color(3*8+0, pal1bit(0), pal1bit(0), pal1bit(0));
/**/palette.set_pen_color(3*8+1, pal1bit(0), pal1bit(1), pal1bit(0));
palette.set_pen_color(5*8+0, pal1bit(0), pal1bit(0), pal1bit(0));
/**/palette.set_pen_color(5*8+1, pal2bit(0), pal2bit(0), pal2bit(1));
/**/palette.set_pen_color(5*8+2, pal1bit(1), pal1bit(1), pal1bit(0));

2
src/mame/drivers/apple2.cpp
View File

@ -1349,7 +1349,7 @@ static SLOT_INTERFACE_START(apple2_cards)
SLOT_INTERFACE("ezcgi9938", A2BUS_EZCGI_9938) /* E-Z Color Graphics Interface (TMS9938) */
SLOT_INTERFACE("ezcgi9958", A2BUS_EZCGI_9958) /* E-Z Color Graphics Interface (TMS9958) */
SLOT_INTERFACE("ssprite", A2BUS_SSPRITE) /* Synetix SuperSprite Board */
SLOT_INTERFACE("ssbapple", A2BUS_SSBAPPLE) /* SSB Apple speech board */
SLOT_INTERFACE("ssbapple", A2BUS_SSBAPPLE) /* SSB Apple speech board */
// SLOT_INTERFACE("magicmusician", A2BUS_MAGICMUSICIAN) /* Magic Musician Card */
SLOT_INTERFACE_END

18
src/mame/drivers/apple2e.cpp
View File

@ -80,11 +80,11 @@
Like IIc with memory expansion, but with licensed built-in Zip Chip which
runs the 65C02 at 4 MHz turbo speed with a small cache RAM.
The machine has an internal "Apple 3.5" drive plus a custom chip
named "MIG" (Multidrive Interface Glue) which helps with the control
of the drive. This gets around the fact that 1 MHz isn't
sufficient to handle direct Woz-style control of a double-density
3.5" drive.
The machine has an internal "Apple 3.5" drive plus a custom chip
named "MIG" (Multidrive Interface Glue) which helps with the control
of the drive. This gets around the fact that 1 MHz isn't
sufficient to handle direct Woz-style control of a double-density
3.5" drive.
External drive port allows IIgs-style daisy-chaining.
@ -464,7 +464,7 @@ uint8_t apple2e_state::mig_r(uint16_t offset)
if (offset == 0x20)
{
m_migpage += 0x20;
m_migpage &= 0x7ff; // make sure we wrap
m_migpage &= 0x7ff; // make sure we wrap
}
// reset MIG RAM window
@ -489,7 +489,7 @@ void apple2e_state::mig_w(uint16_t offset, uint8_t data)
if (offset == 0x20)
{
m_migpage += 0x20;
m_migpage &= 0x7ff; // make sure we wrap
m_migpage &= 0x7ff; // make sure we wrap
}
// reset MIG RAM window
@ -3823,8 +3823,8 @@ static SLOT_INTERFACE_START(apple2_cards)
// SLOT_INTERFACE("magicmusician", A2BUS_MAGICMUSICIAN) /* Magic Musician Card */
SLOT_INTERFACE("pcxport", A2BUS_PCXPORTER) /* Applied Engineering PC Transporter */
SLOT_INTERFACE("ssprite", A2BUS_SSPRITE) /* Synetix SuperSprite Board */
SLOT_INTERFACE("ssbapple", A2BUS_SSBAPPLE) /* SSB Apple speech board */
SLOT_INTERFACE("twarp", A2BUS_TRANSWARP) /* AE TransWarp accelerator */
SLOT_INTERFACE("ssbapple", A2BUS_SSBAPPLE) /* SSB Apple speech board */
SLOT_INTERFACE("twarp", A2BUS_TRANSWARP) /* AE TransWarp accelerator */
SLOT_INTERFACE_END
static SLOT_INTERFACE_START(apple2eaux_cards)

8
src/mame/drivers/at.cpp
View File

@ -987,7 +987,7 @@ ROM_START( at486 )
ROM_SYSTEM_BIOS(8, "ficgiovt2_326", "FIC 486-GIO-VT2 3.26G") /* 1994-07-06 */
ROMX_LOAD("326g1c00.awd", 0x10000, 0x10000, CRC(2e729ab5) SHA1(b713f97fa0e0b62856dab917f417f5b21020b354), ROM_BIOS(9))
ROM_SYSTEM_BIOS(9, "486_gio_vt2","VBS1.08H 486-GVT-2") /* 1995-06-19 */
ROM_SYSTEM_BIOS(9, "486_gio_vt2","VBS1.08H 486-GVT-2") /* 1995-06-19 */
ROMX_LOAD("award_486_gio_vt2.bin", 0x10000, 0x10000, CRC(58d7c7f9) SHA1(097f15ec2bd672cb3f1763298ca802c7ff26021f), ROM_BIOS(10)) // Vobis version, Highscreen boot logo
ROM_SYSTEM_BIOS(10, "ficgiovt2_3276", "FIC 486-GIO-VT2 3.276") /* 1997-07-17 */
ROMX_LOAD("32760000.bin", 0x10000, 0x10000, CRC(ad179128) SHA1(595f67ba4a1c8eb5e118d75bf657fff3803dcf4f), ROM_BIOS(11))
@ -1260,7 +1260,7 @@ ROM_START( comportiii )
ROMX_LOAD( "cpiii_87c128_106778-002.bin", 0x18001, 0x4000, CRC(c259f628) SHA1(df0ca8aaead617114fbecb4ececbd1a3bb1d5f30), ROM_SKIP(1) | ROM_BIOS(1) )
// ROM_LOAD( "cpiii_106436-001.bin", 0x0000, 0x1000, CRC(5acc716b) SHA(afe166ecf99136d15269e44ebf2d66317945bf9c) ) // keyboard
ROM_SYSTEM_BIOS(1, "109737-002", "109737-002")
ROMX_LOAD( "109738-002.bin", 0x10000, 0x8000, CRC(db131b8a) SHA1(6a8517a771272edf16870501fc1ed94c7555ef45), ROM_SKIP(1) | ROM_BIOS(2) )
ROMX_LOAD( "109738-002.bin", 0x10000, 0x8000, CRC(db131b8a) SHA1(6a8517a771272edf16870501fc1ed94c7555ef45), ROM_SKIP(1) | ROM_BIOS(2) )
ROMX_LOAD( "109737-002.bin", 0x10001, 0x8000, CRC(8463cc41) SHA1(cb9801591e4a2cd13bbcc40739c9e675ba84c079), ROM_SKIP(1) | ROM_BIOS(2) )
ROM_END
@ -1309,8 +1309,8 @@ COMP ( 1990, xb42664a, ibm5170, 0, at386, 0, at_state, at,
COMP ( 1993, apxena1, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot XEN PC (A1 Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1993, apxenp2, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot XEN PC (P2 Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1990, c386sx16, ibm5170, 0, at386sx, 0, at_state, at, "Commodore Business Machines", "Commodore 386SX-16", MACHINE_NOT_WORKING )
COMP ( 1988, pc30iii, ibm5170, 0, pc30iii, 0, at_state, at, "Commodore Business Machines", "PC 30-III", MACHINE_NOT_WORKING )
COMP ( 1988, pc40iii, ibm5170, 0, pc40iii, 0, at_state, at, "Commodore Business Machines", "PC 40-III", MACHINE_NOT_WORKING )
COMP ( 1988, pc30iii, ibm5170, 0, pc30iii, 0, at_state, at, "Commodore Business Machines", "PC 30-III", MACHINE_NOT_WORKING )
COMP ( 1988, pc40iii, ibm5170, 0, pc40iii, 0, at_state, at, "Commodore Business Machines", "PC 40-III", MACHINE_NOT_WORKING )
COMP ( 1995, ficpio2, ibm5170, 0, ficpio2, 0, at_state, atpci, "FIC", "486-PIO-2", MACHINE_NOT_WORKING )
COMP ( 1985, k286i, ibm5170, 0, k286i, 0, at_state, at, "Kaypro", "286i", MACHINE_NOT_WORKING )
COMP ( 1991, t2000sx, ibm5170, 0, at386sx, 0, at_state, at, "Toshiba", "T2000SX", MACHINE_NOT_WORKING )

20
src/mame/drivers/attache.cpp
View File

@ -49,12 +49,12 @@
* ( - GPIB Listener/Talker Test
* ) - GPIB Controller Test
*
* The Attache 8:16 is an upgraded Attache adding an 8086 (+ optional 8087) board with its own 256kB of RAM,
* The Attache 8:16 is an upgraded Attache adding an 8086 (+ optional 8087) board with its own 256kB of RAM,
* and optionally a GPIB controller (TMS9914A) and serial synchronous port (Z8530 SCC). It also has modifications
* to the main Z80 board, specifically the display circuitry, adding a high-resolution display, and replacing
* the character ROM with a larger ROM containing an IBM character set.
* It effectively allows the Attache to run MS-DOS and use a 10MB hard disk.
*
*
* TODO:
* - Keyboard repeat
* - Get at least some of the system tests to pass
@ -241,7 +241,7 @@ public:
m_z80_rx_ready(false),
m_z80_tx_ready(false)
{ }
DECLARE_WRITE8_MEMBER(x86_comms_w);
DECLARE_READ8_MEMBER(x86_comms_r);
DECLARE_WRITE8_MEMBER(x86_irq_enable);
@ -258,7 +258,7 @@ public:
private:
required_device<cpu_device> m_extcpu;
required_device<i8255_device> m_ppi;
uint8_t m_comms_val;
uint8_t m_x86_irq_enable;
bool m_z80_rx_ready;
@ -862,7 +862,7 @@ WRITE8_MEMBER(attache816_state::z80_comms_w)
m_z80_tx_ready = true;
m_ppi->pc4_w(0);
machine().scheduler().synchronize();
// m_ppi->write(space,0,data);
// m_ppi->write(space,0,data);
}
// Z80 comms status
@ -871,7 +871,7 @@ WRITE8_MEMBER(attache816_state::z80_comms_w)
READ8_MEMBER(attache816_state::z80_comms_status_r)
{
uint8_t ret = 0xf0; // low nibble always high?
if(m_z80_rx_ready)
ret |= 0x01;
if(m_z80_tx_ready)
@ -1106,7 +1106,7 @@ static MACHINE_CONFIG_START( attache )
MCFG_Z80_DAISY_CHAIN(attache_daisy_chain)
MCFG_QUANTUM_TIME(attotime::from_hz(60))
MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::green())
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(64)) /* not accurate */
@ -1167,7 +1167,7 @@ static MACHINE_CONFIG_START( attache816 )
MCFG_Z80_DAISY_CHAIN(attache_daisy_chain)
MCFG_QUANTUM_TIME(attotime::from_hz(60))
MCFG_CPU_ADD("extcpu",I8086,XTAL_24MHz / 3)
MCFG_CPU_PROGRAM_MAP(attache_x86_map)
MCFG_CPU_IO_MAP(attache_x86_io)
@ -1198,7 +1198,7 @@ static MACHINE_CONFIG_START( attache816 )
MCFG_DEVICE_ADD("ctc", Z80CTC, XTAL_8MHz / 4)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD("ppi", I8255A, 0)
MCFG_I8255_OUT_PORTA_CB(WRITE8(attache816_state, x86_comms_w))
MCFG_I8255_IN_PORTA_CB(READ8(attache816_state, x86_comms_r))
@ -1286,7 +1286,7 @@ ROM_START( attache816 )
ROM_REGION(0x2000, "x86bios", 0)
ROM_LOAD16_BYTE("u4.bin", 0x0000, 0x1000, CRC(658c8f93) SHA1(ce4b388af5b73884194f548afa706964305462f7) )
ROM_LOAD16_BYTE("u9.bin", 0x0001, 0x1000, CRC(cc4cd938) SHA1(6a1d316628641f9b4de5c8c46f9430ef5bd6120f) )
ROM_END
// YEAR NAME PARENT COMPAT MACHINE INPUT DEVICE INIT COMPANY FULLNAME FLAGS

10
src/mame/drivers/bishi.cpp
View File

@ -363,7 +363,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( dobouchn )
PORT_INCLUDE( bishi )
PORT_MODIFY("IN0")
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
@ -371,14 +371,14 @@ static INPUT_PORTS_START( dobouchn )
PORT_BIT( 0x001f, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P1 Shoot")
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY("SYSTEM")
PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("M. Ack") // ???
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_NAME("Coin 2 (Medal)")
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_MODIFY("DSW")
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3")
PORT_DIPSETTING( 0x00, "5 Coins / 2 Credits" )
@ -425,7 +425,7 @@ static INPUT_PORTS_START( dobouchn )
PORT_DIPSETTING( 0x3000, "12 seconds" )
// TODO: needs NVRAM hookup and default hookup
PORT_DIPNAME( 0x4000, 0x0000, "Backup RAM clear" ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x4000, DEF_STR( No ) )
PORT_DIPSETTING( 0x4000, DEF_STR( No ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Yes ) )
PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
@ -487,7 +487,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( dobouchn, bishi )
// TODO: change accordingly (ASCII charset definitely not 8bpp, 5bpp perhaps?)
MCFG_DEVICE_MODIFY("k056832")
// MCFG_K056832_CB(bishi_state, dobouchn_tile_callback)
// MCFG_K056832_CB(bishi_state, dobouchn_tile_callback)
MCFG_K056832_CONFIG("gfx1", K056832_BPP_8, 1, 0, "none")
MACHINE_CONFIG_END

8
src/mame/drivers/bogeyman.cpp
View File

@ -238,10 +238,10 @@ static MACHINE_CONFIG_START( bogeyman )
// video hardware
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
// MCFG_SCREEN_REFRESH_RATE(60)
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
// MCFG_SCREEN_SIZE(32*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 1*8, 31*8-1)
// MCFG_SCREEN_REFRESH_RATE(60)
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
// MCFG_SCREEN_SIZE(32*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 1*8, 31*8-1)
// DECO video CRTC, unverified
MCFG_SCREEN_RAW_PARAMS(XTAL_12MHz/2,384,0,256,272,8,248)
MCFG_SCREEN_UPDATE_DRIVER(bogeyman_state, screen_update)

2
src/mame/drivers/c65.cpp
View File

@ -458,7 +458,7 @@ READ8_MEMBER(c65_state::cia0_portb_r)
WRITE8_MEMBER(c65_state::cia0_porta_w)
{
m_keyb_c0_c7 = ~data;
// printf("%02x\n",m_keyb_c0_c7);
// printf("%02x\n",m_keyb_c0_c7);
}
WRITE8_MEMBER(c65_state::cia0_portb_w)

18
src/mame/drivers/cdc721.cpp
View File

@ -28,7 +28,7 @@ public:
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_DRIVER_INIT(init);
DECLARE_PALETTE_INIT(cdc721);
// DECLARE_WRITE8_MEMBER(port70_w) { membank("bankr0")->set_entry(BIT(data, 3)); }
// DECLARE_WRITE8_MEMBER(port70_w) { membank("bankr0")->set_entry(BIT(data, 3)); }
private:
u8 m_flashcnt;
@ -40,7 +40,7 @@ private:
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, cdc721_state )
AM_RANGE(0x0000, 0x4fff) AM_ROM AM_REGION("maincpu", 0x10000)
// AM_RANGE(0x0000, 0x4fff) AM_READ_BANK("bankr0") AM_WRITE_BANK("bankw0")
// AM_RANGE(0x0000, 0x4fff) AM_READ_BANK("bankr0") AM_WRITE_BANK("bankw0")
AM_RANGE(0x8000, 0xe10f) AM_RAM
AM_RANGE(0xe110, 0xffff) AM_RAM AM_SHARE("videoram")
ADDRESS_MAP_END
@ -48,7 +48,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( io_map, AS_IO, 8, cdc721_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x10, 0x1f) AM_DEVREADWRITE("crtc", tms9927_device, read, write)
// AM_RANGE(0x70, 0x70) AM_WRITE(port70_w)
// AM_RANGE(0x70, 0x70) AM_WRITE(port70_w)
ADDRESS_MAP_END
static INPUT_PORTS_START( cdc721 )
@ -56,17 +56,17 @@ INPUT_PORTS_END
void cdc721_state::machine_reset()
{
// membank("bankr0")->set_entry(0);
// membank("bankw0")->set_entry(0);
// membank("bankr0")->set_entry(0);
// membank("bankw0")->set_entry(0);
}
DRIVER_INIT_MEMBER( cdc721_state, init )
{
// uint8_t *main = memregion("maincpu")->base();
// uint8_t *main = memregion("maincpu")->base();
// membank("bankr0")->configure_entry(1, &main[0x14000]);
// membank("bankr0")->configure_entry(0, &main[0x4000]);
// membank("bankw0")->configure_entry(0, &main[0x4000]);
// membank("bankr0")->configure_entry(1, &main[0x14000]);
// membank("bankr0")->configure_entry(0, &main[0x4000]);
// membank("bankw0")->configure_entry(0, &main[0x4000]);
}
/* F4 Character Displayer */

8
src/mame/drivers/chanbara.cpp
View File

@ -393,10 +393,10 @@ static MACHINE_CONFIG_START( chanbara )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
// MCFG_SCREEN_REFRESH_RATE(57.4122)
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
// MCFG_SCREEN_SIZE(32*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(0, 32*8-1, 2*8, 30*8-1)
// MCFG_SCREEN_REFRESH_RATE(57.4122)
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
// MCFG_SCREEN_SIZE(32*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(0, 32*8-1, 2*8, 30*8-1)
// DECO video CRTC
MCFG_SCREEN_RAW_PARAMS(XTAL_12MHz/2,384,0,256,272,16,240)
MCFG_SCREEN_UPDATE_DRIVER(chanbara_state, screen_update_chanbara)

16
src/mame/drivers/chqflag.cpp
View File

@ -77,8 +77,8 @@ WRITE8_MEMBER(chqflag_state::chqflag_vreg_w)
* 0x80 is used when rain shows up (which should be white/highlighted)
* 0x88 is for when night shows up (max amount of highlight)
* 0x08 is used at dawn after 0x88 state
* The shadow part looks ugly when rain starts/ends pouring (-> black colored with a setting of 0x00),
* the reference shows dimmed background when this event occurs (which is handled via reg 1 bit 0 of k051960 device),
* The shadow part looks ugly when rain starts/ends pouring (-> black colored with a setting of 0x00),
* the reference shows dimmed background when this event occurs (which is handled via reg 1 bit 0 of k051960 device),
* might be actually disabling the shadow here (-> setting 1.0f instead).
*
* TODO: true values aren't known, also shadow_factors table probably scales towards zero instead (game doesn't use those)
@ -86,9 +86,9 @@ WRITE8_MEMBER(chqflag_state::chqflag_vreg_w)
const double shadow_factors[4] = {0.8, 1.33, 1.66, 2.0 };
const double highlight_factors[4] = {1.0, 1.33, 1.66, 2.0 };
uint8_t shadow_value = ((data & 0x80) >> 6) | ((data & 0x08) >> 3);
m_palette->set_shadow_factor(m_last_vreg != 0 ? highlight_factors[shadow_value] : shadow_factors[shadow_value] );
#if 0
if ((data & 0x80) != m_last_vreg)
{
@ -98,7 +98,7 @@ WRITE8_MEMBER(chqflag_state::chqflag_vreg_w)
update_background_shadows(data);
}
#endif
//if ((data & 0xf8) && (data & 0xf8) != 0x88)
// popmessage("chqflag_vreg_w %02x",data);
@ -311,8 +311,8 @@ inline void chqflag_state::update_background_shadows(uint8_t data)
WRITE_LINE_MEMBER(chqflag_state::background_brt_w)
{
// popmessage("%d",state);
// popmessage("%d",state);
if (state != m_last_vreg)
{
m_last_vreg = state;
@ -359,7 +359,7 @@ static MACHINE_CONFIG_START( chqflag )
MCFG_K051960_IRQ_HANDLER(INPUTLINE("maincpu", KONAMI_IRQ_LINE))
MCFG_K051960_NMI_HANDLER(INPUTLINE("maincpu", INPUT_LINE_NMI))
MCFG_K051960_VREG_CONTRAST_HANDLER(WRITELINE(chqflag_state,background_brt_w))
MCFG_DEVICE_ADD("k051316_1", K051316, 0)
MCFG_GFX_PALETTE("palette")
MCFG_K051316_OFFSETS(7, 0)

6
src/mame/drivers/coco12.cpp
View File

@ -610,13 +610,13 @@ ROM_END
ROM_START(cd6809)
ROM_REGION(0x8000,MAINCPU_TAG,0)
ROM_DEFAULT_BIOS("84")
ROM_DEFAULT_BIOS("84")
ROM_SYSTEM_BIOS( 0, "83", "1983" )
ROM_SYSTEM_BIOS( 0, "83", "1983" )
ROMX_LOAD("cd6809bas83.rom", 0x2000, 0x2000, CRC(f8e64142) SHA1(c0fd689119e2619ec226a2d67aeeb32070c14e38), ROM_BIOS(1))
ROMX_LOAD("cd6809extbas83.rom", 0x0000, 0x2000, CRC(e5d5aa15) SHA1(0cd4a3d9e4af1d0176964e35e3d15a9fa0e68ac4), ROM_BIOS(1))
ROM_SYSTEM_BIOS( 1, "84", "1984" )
ROM_SYSTEM_BIOS( 1, "84", "1984" )
ROMX_LOAD("cd6809bas84.rom", 0x2000, 0x2000, CRC(8a9971da) SHA1(5cb5f1ffc983a85ba92af68b1d571b270f6db559), ROM_BIOS(2))
ROMX_LOAD("cd6809extbas84.rom", 0x0000, 0x2000, CRC(8dc853e2) SHA1(d572ce4497c115af53d2b0feeb52d3c7a7fec175), ROM_BIOS(2))
ROM_END

34
src/mame/drivers/cyclemb.cpp
View File

@ -129,8 +129,8 @@ public:
DECLARE_WRITE8_MEMBER(skydest_i8741_0_w);
DECLARE_READ8_MEMBER(skydest_i8741_1_r);
DECLARE_WRITE8_MEMBER(skydest_i8741_1_w);
// DECLARE_WRITE_LINE_MEMBER(ym_irq);
// DECLARE_WRITE_LINE_MEMBER(ym_irq);
DECLARE_DRIVER_INIT(skydest);
DECLARE_DRIVER_INIT(cyclemb);
virtual void machine_start() override;
@ -606,23 +606,23 @@ READ8_MEMBER(cyclemb_state::skydest_i8741_1_r)
// status
if(offset == 1)
return 1;
if(m_mcu[1].rst == 1)
return 0x40;
return m_soundlatch->read(space,0);
}
WRITE8_MEMBER(cyclemb_state::skydest_i8741_1_w)
{
// printf("%02x %02x\n",offset,data);
// printf("%02x %02x\n",offset,data);
if(offset == 1)
{
if(data == 0xf0)
m_mcu[1].rst = 1;
}
//else
// m_soundlatch->clear_w(space, 0, 0);
// m_soundlatch->clear_w(space, 0, 0);
}
@ -857,10 +857,10 @@ static INPUT_PORTS_START( skydest )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x18, 0x10, "Lives" )
PORT_DIPSETTING( 0x00, "4" )
PORT_DIPSETTING( 0x08, "3" )
PORT_DIPSETTING( 0x10, "2" )
PORT_DIPSETTING( 0x18, "1" )
PORT_DIPSETTING( 0x00, "4" )
PORT_DIPSETTING( 0x08, "3" )
PORT_DIPSETTING( 0x10, "2" )
PORT_DIPSETTING( 0x18, "1" )
PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_START("DSW2")
@ -901,7 +901,7 @@ static INPUT_PORTS_START( skydest )
PORT_DIPNAME( 0x80, 0x00, "Invincibility (Cheat)" )
PORT_DIPSETTING( 0x80, DEF_STR( Yes ) )
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
INPUT_PORTS_END
@ -985,8 +985,8 @@ static MACHINE_CONFIG_START( cyclemb )
MCFG_GENERIC_LATCH_8_ADD("soundlatch2")
MCFG_SOUND_ADD("ymsnd", YM2203, XTAL_18MHz/12)
// MCFG_YM2203_IRQ_HANDLER(WRITELINE(cyclemb_state, ym_irq))
// MCFG_AY8910_PORT_B_READ_CB(IOPORT("UNK")) /* port B read */
// MCFG_YM2203_IRQ_HANDLER(WRITELINE(cyclemb_state, ym_irq))
// MCFG_AY8910_PORT_B_READ_CB(IOPORT("UNK")) /* port B read */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
MACHINE_CONFIG_END
@ -1081,10 +1081,10 @@ ROM_END
DRIVER_INIT_MEMBER(cyclemb_state,cyclemb)
{
uint8_t *rom = memregion("audiocpu")->base();
membank("bank1")->configure_entries(0, 4, memregion("maincpu")->base() + 0x10000, 0x1000);
m_dsw_pc_hack = 0x760;
// patch audio CPU crash + ROM checksum
rom[0x282] = 0x00;
rom[0x283] = 0x00;
@ -1097,10 +1097,10 @@ DRIVER_INIT_MEMBER(cyclemb_state,cyclemb)
DRIVER_INIT_MEMBER(cyclemb_state,skydest)
{
uint8_t *rom = memregion("audiocpu")->base();
membank("bank1")->configure_entries(0, 4, memregion("maincpu")->base() + 0x10000, 0x1000);
m_dsw_pc_hack = 0x554;
// patch audio CPU crash + ROM checksum
rom[0x286] = 0x00;
rom[0x287] = 0x00;

10
src/mame/drivers/dec0.cpp
View File

@ -503,7 +503,7 @@ READ16_MEMBER(dec0_state::slyspy_controls_r)
// TODO: this can be a timer access, maybe video counter returns (and used as RNG in both games)
READ16_MEMBER(dec0_state::slyspy_protection_r)
{
switch (offset<<1)
switch (offset<<1)
{
/* These values are for Boulderdash, I have no idea what they do in Slyspy */
case 0: return 0;
@ -513,7 +513,7 @@ READ16_MEMBER(dec0_state::slyspy_protection_r)
// sly spy uses this port as RNG, for now let's do same thing as bootleg (i.e. reads 0x306028)
// chances are that it actually ties to the main CPU xtal instead.
// (reads at 6958 6696)
case 0xc: return m_ram[0x2028/2] >> 8;
case 0xc: return m_ram[0x2028/2] >> 8;
}
logerror("%04x, Unknown protection read at 30c000 %d\n", space.device().safe_pc(), offset);
@ -688,7 +688,7 @@ READ8_MEMBER(dec0_state::slyspy_sound_state_r)
m_slyspy_sound_state ++;
m_slyspy_sound_state &= 3;
m_sndprotect->set_bank(m_slyspy_sound_state);
// returned value doesn't matter
return 0xff;
}
@ -697,7 +697,7 @@ READ8_MEMBER(dec0_state::slyspy_sound_state_reset_r)
{
m_slyspy_sound_state = 0;
m_sndprotect->set_bank(m_slyspy_sound_state);
// returned value doesn't matter
return 0xff;
}
@ -1980,7 +1980,7 @@ static MACHINE_CONFIG_DERIVED( slyspy, dec1 )
MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(21)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x80000)
/* video hardware */
MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_UPDATE_DRIVER(dec0_state, screen_update_slyspy)

2
src/mame/drivers/einstein.cpp
View File

@ -535,7 +535,7 @@ static INPUT_PORTS_START( einstein )
PORT_BIT(0xfc, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_START("analogue_1_x")
PORT_BIT(0xff, 0x80, IPT_AD_STICK_X) PORT_SENSITIVITY(100) PORT_KEYDELTA(100) PORT_CENTERDELTA(100) PORT_MINMAX(0,0xff) PORT_PLAYER(1)
PORT_BIT(0xff, 0x80, IPT_AD_STICK_X) PORT_SENSITIVITY(100) PORT_KEYDELTA(100) PORT_CENTERDELTA(100) PORT_MINMAX(0,0xff) PORT_PLAYER(1)
PORT_CODE_DEC(KEYCODE_4_PAD) PORT_CODE_INC(KEYCODE_6_PAD)
PORT_CODE_DEC(JOYCODE_X_LEFT_SWITCH) PORT_CODE_INC(JOYCODE_X_RIGHT_SWITCH)

16
src/mame/drivers/firetrap.cpp
View File

@ -628,10 +628,10 @@ static MACHINE_CONFIG_START( firetrap )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
// MCFG_SCREEN_REFRESH_RATE(57.4034) // PCB measurement
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
// MCFG_SCREEN_SIZE(32*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 1*8, 31*8-1)
// MCFG_SCREEN_REFRESH_RATE(57.4034) // PCB measurement
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
// MCFG_SCREEN_SIZE(32*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 1*8, 31*8-1)
// DECO video CRTC, unverified
MCFG_SCREEN_RAW_PARAMS(FIRETRAP_XTAL/2,384,0,256,272,8,248)
MCFG_SCREEN_UPDATE_DRIVER(firetrap_state, screen_update_firetrap)
@ -673,10 +673,10 @@ static MACHINE_CONFIG_START( firetrapbl )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
// MCFG_SCREEN_REFRESH_RATE(57.4034)
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
// MCFG_SCREEN_SIZE(32*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 1*8, 31*8-1)
// MCFG_SCREEN_REFRESH_RATE(57.4034)
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
// MCFG_SCREEN_SIZE(32*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 1*8, 31*8-1)
// DECO video CRTC, unverified
MCFG_SCREEN_RAW_PARAMS(FIRETRAP_XTAL/2,384,0,256,272,8,248)
MCFG_SCREEN_UPDATE_DRIVER(firetrap_state, screen_update_firetrap)

6
src/mame/drivers/flower.cpp
View File

@ -8,9 +8,9 @@
original "wiped off due of not anymore licenseable" driver by insideoutboy.
TODO:
- priority might be wrong in some places (title screen stars around the
galaxy, planet ship 3rd boss, 2nd boss);
- sound chips (similar to Namco custom chips?)
- priority might be wrong in some places (title screen stars around the
galaxy, planet ship 3rd boss, 2nd boss);
- sound chips (similar to Namco custom chips?)
===============================================================================

2
src/mame/drivers/fmtowns.cpp
View File

@ -2672,7 +2672,7 @@ void towns_state::driver_start()
save_pointer(m_video.towns_crtc_reg,"CRTC registers",32);
save_pointer(m_video.towns_video_reg,"Video registers",2);
m_maincpu->space(AS_PROGRAM).install_ram(0x100000,m_ram->size()-1,nullptr);
}

72
src/mame/drivers/gladiatr.cpp
View File

@ -397,27 +397,27 @@ READ8_MEMBER(ppking_state::ppking_f1_r)
*
* Ping Pong King MCU simulation
*
* 0x8ad =
* 0x8ad =
* 0x8f6 = IO check (must return 0x40)
*
*
**********************************/
//#include "debugger.h"
inline bool ppking_state::mcu_parity_check()
{
int i;
uint8_t res = 0;
for(i=0;i<8;i++)
{
if(m_mcu[0].rxd & (1 << i))
res++;
}
if(res % 2)
return false;
return true;
}
@ -442,7 +442,7 @@ inline void ppking_state::mcu_input_check()
READ8_MEMBER(ppking_state::ppking_qx0_r)
{
// status
// status
if(offset == 1)
return 1;
@ -461,11 +461,11 @@ READ8_MEMBER(ppking_state::ppking_qx0_r)
else
{
m_mcu[0].rxd = ((ioport("SYSTEM")->read()) & 0x9f);
}
}
break;
}
case 2:
{
m_mcu[0].packet_type^=1;
@ -479,10 +479,10 @@ READ8_MEMBER(ppking_state::ppking_qx0_r)
m_mcu[0].rxd = ((ioport("P1")->read()) & 0x3f);
m_mcu[0].rxd |= ((ioport("SYSTEM")->read()) & 0x80);
}
break;
}
case 3:
{
m_mcu[0].packet_type^=1;
@ -496,22 +496,22 @@ READ8_MEMBER(ppking_state::ppking_qx0_r)
m_mcu[0].rxd = ((ioport("P2")->read()) & 0x3f);
m_mcu[0].rxd |= ((ioport("SYSTEM")->read()) & 0x80);
}
break;
}
}
if(mcu_parity_check() == false)
m_mcu[0].rxd |= 0x40;
}
//printf("%04x rst %d\n",m_maincpu->pc(),m_mcu[0].rst);
return m_mcu[0].rxd;
}
WRITE8_MEMBER(ppking_state::ppking_qx0_w)
{
{
if(offset == 1)
{
switch(data)
@ -580,10 +580,10 @@ READ8_MEMBER(ppking_state::ppking_qx1_r)
// status
if(offset == 1)
return 1;
if(m_mcu[1].rst == 1)
return 0x40;
return m_soundlatch2->read(space,0);
}
@ -591,7 +591,7 @@ READ8_MEMBER(ppking_state::ppking_qx3_r)
{
if(offset == 1)
return 1;
return 0;
}
@ -602,7 +602,7 @@ READ8_MEMBER(ppking_state::ppking_qxcomu_r)
{
if(offset == 1)
return 1;
return 0;
}
@ -612,7 +612,7 @@ WRITE8_MEMBER(ppking_state::ppking_qxcomu_w)
}
MACHINE_RESET_MEMBER(ppking_state, ppking)
{
{
// yes, it expects to read DSW1 without sending commands first ...
m_mcu[0].rxd = (ioport("DSW1")->read() & 0x1f) << 2;;
m_mcu[0].rst = 0;
@ -640,7 +640,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( ppking_cpu1_io, AS_IO, 8, ppking_state )
// ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0xc000, 0xc007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
// AM_RANGE(0xc004, 0xc004) AM_NOP // WRITE(ppking_irq_patch_w)
// AM_RANGE(0xc004, 0xc004) AM_NOP // WRITE(ppking_irq_patch_w)
AM_RANGE(0xc09e, 0xc09f) AM_READ(ppking_qx0_r) AM_WRITE(ppking_qx0_w)
AM_RANGE(0xc0bf, 0xc0bf) AM_NOP // watchdog
AM_RANGE(0xc0c0, 0xc0c1) AM_READ(ppking_qxcomu_r) AM_WRITE(ppking_qxcomu_w)
@ -708,9 +708,9 @@ static INPUT_PORTS_START( ppking )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 )
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 )
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 )
PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_START("P2")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
@ -734,7 +734,7 @@ static INPUT_PORTS_START( ppking )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
PORT_BIT( 0x60, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(2)
PORT_START("DSW1")
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7,6")
PORT_DIPSETTING( 0x03, DEF_STR( Easy ) )
@ -749,7 +749,7 @@ static INPUT_PORTS_START( ppking )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
PORT_DIPSETTING( 0x10, DEF_STR( No ) )
PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_START("DSW2")
// TODO: coinage not working (controlled by MCU)
PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW2:8,7")
@ -766,7 +766,7 @@ static INPUT_PORTS_START( ppking )
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x10, DEF_STR( Cocktail ) )
PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_START("DSW3")
PORT_DIPNAME( 0x01, 0x00, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
@ -956,19 +956,19 @@ static MACHINE_CONFIG_START( ppking )
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // 5L on main board
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(ppking_state, spritebuffer_w))
// MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(gladiatr_state, spritebank_w))
// MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(MEMBANK("bank1"))
// MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(ppking_state, nmi_mask_w))
// MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(INPUTLINE("sub", INPUT_LINE_RESET)) // shadowed by aforementioned hack
// MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(gladiatr_state, spritebank_w))
// MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(MEMBANK("bank1"))
// MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(ppking_state, nmi_mask_w))
// MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(INPUTLINE("sub", INPUT_LINE_RESET)) // shadowed by aforementioned hack
// Q6 used
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(ppking_state, flipscreen_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
// MCFG_SCREEN_REFRESH_RATE(60)
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
// MCFG_SCREEN_SIZE(32*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
// MCFG_SCREEN_REFRESH_RATE(60)
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
// MCFG_SCREEN_SIZE(32*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
MCFG_SCREEN_RAW_PARAMS(XTAL_12MHz/2,384,0,256,264,16,240) // assume same as Arkanoid
MCFG_SCREEN_UPDATE_DRIVER(ppking_state, screen_update_ppking)
MCFG_SCREEN_PALETTE("palette")
@ -1115,7 +1115,7 @@ ROM_START( ppking )
ROM_RELOAD( 0x08000, 0x2000 )
ROM_LOAD( "q0_18.5m", 0x0e000, 0x2000, CRC(89ba64f8) SHA1(fa01316ea744b4277ee64d5f14cb6d7e3a949f2b) )
ROM_RELOAD( 0x0c000, 0x2000 )
ROM_REGION( 0x02000, "gfx1", 0 )
ROM_LOAD( "q0_15.1r", 0x00000, 0x2000, CRC(fbd33219) SHA1(78b9bb327ededaa818d26c41c5e8fd1c041ef142) )

12
src/mame/drivers/hp2100.cpp
View File

@ -21,7 +21,7 @@ See https://en.wikipedia.org/wiki/HP_2100 for more info.
077F 5081-2361
**HP 1000 firmware:
13207-60001
13207-60001
1816-
@ -96,7 +96,7 @@ E-Series Control Memory Map
Control Memory Module Allocation Module No Octal Software Entry Point
HP Base Set -+ 0 00000-00377 yes 1k
| 1 00400-00777 yes
| 1 00400-00777 yes
| 2 01000-01377 yes
+ 3 01400-01777 yes
Available For User Microprogramming -+ 4 02000-02377 no 2k
@ -113,7 +113,7 @@ Available For User Microprogramming -+ 4 02000-02377 no 2k
| 15 07400-07777 no
| 16 10000-10377 no 5k
| 17 10400-10777 no
| 18 11000-11377 no
| 18 11000-11377 no
| 19 11400-11777 no
| 20 12000-12377 no 6k
| 21 12400-12777 no
@ -165,7 +165,7 @@ F-Series Control Memory Map
Control Memory Module Allocation Module No Octal Software Entry Point
HP Base Set -+ 0 00000-00377 yes 1k
| 1 00400-00777 yes
| 1 00400-00777 yes
| 2 01000-01377 yes
+ 3 01400-01777 yes
HP Reserved -+ 4 02000-02377 yes 2k
@ -238,11 +238,11 @@ class hp2100_state : public driver_device
public:
hp2100_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// , m_maincpu(*this, "maincpu")
// , m_maincpu(*this, "maincpu")
{ }
private:
// required_device<cpu_device> m_maincpu;
// required_device<cpu_device> m_maincpu;
};
//static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 16, hp2100_state )

2
src/mame/drivers/hp80.cpp
View File

@ -1195,7 +1195,7 @@ void hp85_state::prt_do_printing()
m_prt_busy_timer->adjust(attotime::from_msec(PRT_BUSY_MSEC));
}
#define IOP_MASK(x) BIT_MASK<ioport_value>((x))
#define IOP_MASK(x) BIT_MASK<ioport_value>((x))
static INPUT_PORTS_START(hp85)
// Keyboard is arranged in a matrix of 10 rows and 8 columns. In addition there are 3 keys with

2
src/mame/drivers/itech8.cpp
View File

@ -2396,7 +2396,7 @@ ROM_END
ROM_START( arlingtn ) /* PCB p/n 1030 rev. 1A */
ROM_REGION( 0x1c000, "maincpu", 0 ) /* banks are loaded in the opposite order from the others, */
ROM_REGION( 0x1c000, "maincpu", 0 ) /* banks are loaded in the opposite order from the others, */
ROM_LOAD( "ahr-d_v_1.21.u5", 0x10000, 0x4000, CRC(00aae02e) SHA1(3bcfbd256c34ae222dde24ba9544f19da70b698e) ) /* Service menu reports version as 1.21-D */
ROM_CONTINUE( 0x04000, 0xc000 )
ROM_COPY( "maincpu", 0x8000, 0x14000, 0x8000 )

42
src/mame/drivers/kaypro.cpp
View File

@ -23,16 +23,16 @@
C: floppy
ToDo:
- Find original Kaycomp ROMs
- Find original Kaycomp ROMs
- Need dump of 87C51 cpu in a Kaypro II keyboard variant
- Kaypro 2x, 4a: floppy not working "No operating system present on this disk"
- Kaypro 10: Boots from floppy, but needs hard drive added.
- "Univeral"-ROM 81-478A: Boots, but fails with CP/M "BDOS Error on A:", was working until MAME v0190
- fix Kayplus 84 ROM screen corruption
- "Univeral"-ROM 81-478A: Boots, but fails with CP/M "BDOS Error on A:", was working until MAME v0190
- fix Kayplus 84 ROM screen corruption
- Kaypro iip88, 484p88: works as a normal Kaypro 4, extra hardware not done
- Kaypro Robie: has twin 2.6MB 5.25 floppy drives which we don't support, no software available
- Handyman ROM is really an add-on board with 16K proprietory RAM
- Handyman ROM is really an add-on board with 16K proprietory RAM
- Hard Disk not emulated.
The controller is a WD1002-HD0 (original version, for Winchester drives), HD is 10MB, e.g. Shugart 712
@ -279,7 +279,7 @@ static MACHINE_CONFIG_DERIVED( kayproiv, kayproii )
MCFG_DEVICE_REMOVE("fdc:1")
MCFG_FLOPPY_DRIVE_ADD("fdc:0", kaypro_floppies, "525dd", floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_SOUND(true)
MCFG_FLOPPY_DRIVE_ADD("fdc:1", kaypro_floppies, "525dd", floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fdc:1", kaypro_floppies, "525dd", floppy_image_device::default_floppy_formats)
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( kaypro484 )
@ -466,7 +466,7 @@ ROM_START(kaypro10)
ROM_SYSTEM_BIOS( 2, "turbo", "Advent Turbo ROM")
ROMX_LOAD("trom34.rom", 0x0000, 0x2000, CRC(0ec6d39a) SHA1(8c2a92b8642e144452c28300bf50a00a11a060cd), ROM_BIOS(3) )
ROM_SYSTEM_BIOS( 3, "kplus83", "MICROCode Consulting KayPLUS 83")
ROMX_LOAD("kplus83.rom", 0x0000, 0x2000, CRC(5e9b817d) SHA1(26ea875ee3659a964cbded4ed0c82a3af42db64b), ROM_BIOS(4) )
ROMX_LOAD("kplus83.rom", 0x0000, 0x2000, CRC(5e9b817d) SHA1(26ea875ee3659a964cbded4ed0c82a3af42db64b), ROM_BIOS(4) )
ROM_REGION(0x10000, "rambank", ROMREGION_ERASEFF)
ROM_REGION(0x1000, "chargen",0)
@ -479,7 +479,7 @@ ROM_START(kaypro1084)
ROM_SYSTEM_BIOS( 0, "302", "V1.9E for Kaypro Bd. 81-181")
ROMX_LOAD("81-302.u42", 0x0000, 0x1000, CRC(3f9bee20) SHA1(b29114a199e70afe46511119b77a662e97b093a0), ROM_BIOS(1) )
ROM_SYSTEM_BIOS( 1, "1.9ee", "V1.9ee")
ROMX_LOAD("rom19ee.bin", 0x0000, 0x0fee, BAD_DUMP CRC(c3515bd0) SHA1(48a0a43c164e4d3e75e8e916498421ef616943cf), ROM_BIOS(2) )
ROMX_LOAD("rom19ee.bin", 0x0000, 0x0fee, BAD_DUMP CRC(c3515bd0) SHA1(48a0a43c164e4d3e75e8e916498421ef616943cf), ROM_BIOS(2) )
ROM_SYSTEM_BIOS( 2, "277", "V1.9E(F)")
ROMX_LOAD("81-277.u42", 0x0000, 0x1000, CRC(e4e1831f) SHA1(1de31ed532a461ace7a4abad1f6647eeddceb3e7), ROM_BIOS(3) )
ROM_SYSTEM_BIOS( 3, "478", "V2.01 for Kaypro Bd. 81-582 (universal)")
@ -488,7 +488,7 @@ ROM_START(kaypro1084)
ROMX_LOAD("trom34.rom", 0x0000, 0x2000, CRC(0ec6d39a) SHA1(8c2a92b8642e144452c28300bf50a00a11a060cd), ROM_BIOS(5) )
ROM_SYSTEM_BIOS( 5, "kplus", "MICROCode Consulting KayPLUS 84")
ROMX_LOAD("kplus84.rom", 0x0000, 0x2000, CRC(4551905a) SHA1(48f0964edfad05b214810ae5595638245c30e5c0), ROM_BIOS(6) )
ROM_REGION(0x10000, "rambank", ROMREGION_ERASEFF)
ROM_REGION(0x1000, "chargen",0)
@ -507,7 +507,7 @@ ROM_START(kaypro484) // later renamed in 2X (or 2X MTC to signify the inclusion
ROMX_LOAD("pro884mx.rom", 0x0000, 0x2000, CRC(febc6f51) SHA1(1f009aa9b7c9a3eddd0ee6ea7321a1c47c3e9807), ROM_BIOS(4) )
ROM_SYSTEM_BIOS( 4, "pro8v5", "MicroCornucopia Pro8 V5")
ROMX_LOAD("pro884v5.rom", 0x0000, 0x2000, CRC(fe0051b1) SHA1(cac429154d40e21174ae05ceb0017b62473cdebd), ROM_BIOS(5) )
ROM_REGION(0x10000, "rambank", ROMREGION_ERASEFF)
ROM_REGION(0x1000, "chargen",0)
@ -527,7 +527,7 @@ ROM_START(kaypro284)
ROMX_LOAD("pro884mx.rom", 0x0000, 0x2000, CRC(febc6f51) SHA1(1f009aa9b7c9a3eddd0ee6ea7321a1c47c3e9807), ROM_BIOS(4) )
ROM_SYSTEM_BIOS( 4, "pro8v5", "MicroCornucopia Pro8 V5")
ROMX_LOAD("pro884v5.rom", 0x0000, 0x2000, CRC(fe0051b1) SHA1(cac429154d40e21174ae05ceb0017b62473cdebd), ROM_BIOS(5) )
ROM_REGION(0x10000, "rambank", ROMREGION_ERASEFF)
ROM_REGION(0x1000, "chargen",0)
@ -535,7 +535,7 @@ ROM_START(kaypro284)
ROM_END
// Kaypro 2X, a 4'84 without modem and RTC, later the 4'84 is renamed 2X, this fully decked out variant is called 2X MTC
ROM_START(kaypro2x)
ROM_START(kaypro2x)
ROM_REGION(0x8000, "roms",0)
ROM_SYSTEM_BIOS( 0, "292a", "81-292a for Kaypro Bd. 81-184")
ROMX_LOAD("81-292a.u34", 0x0000, 0x1000, CRC(241f27a5) SHA1(82711289d19e9b165e35324da010466d225e503a), ROM_BIOS(1) )
@ -551,8 +551,8 @@ ROM_START(kaypro2x)
ROMX_LOAD("pro884mx.rom", 0x0000, 0x2000, CRC(febc6f51) SHA1(1f009aa9b7c9a3eddd0ee6ea7321a1c47c3e9807), ROM_BIOS(6) )
ROM_SYSTEM_BIOS( 6, "pro8v5", "MicroCornucopia Pro8 V5")
ROMX_LOAD("pro884v5.rom", 0x0000, 0x2000, CRC(fe0051b1) SHA1(cac429154d40e21174ae05ceb0017b62473cdebd), ROM_BIOS(7) )
ROM_SYSTEM_BIOS( 7, "handyman", "Hitech Research Handyman") // http://content.thetechnickel.com/misc/kaypro-handyman/kaypro-4-plus-88-06.jpg
ROMX_LOAD( "handyman.bin", 0x0000, 0x8000, CRC(f020d82c) SHA1(576a6608270d4ec7cf814c9de46ecf4e2869d30a), ROM_BIOS(8) ) // fits any classic Kaypro, needs its own 16K RAM
ROM_SYSTEM_BIOS( 7, "handyman", "Hitech Research Handyman") // http://content.thetechnickel.com/misc/kaypro-handyman/kaypro-4-plus-88-06.jpg
ROMX_LOAD( "handyman.bin", 0x0000, 0x8000, CRC(f020d82c) SHA1(576a6608270d4ec7cf814c9de46ecf4e2869d30a), ROM_BIOS(8) ) // fits any classic Kaypro, needs its own 16K RAM
ROM_REGION(0x10000, "rambank", ROMREGION_ERASEFF)
@ -577,13 +577,13 @@ ROM_START(kayproiip88)
ROM_END
// Kaypro 4'84 plus 88, the "KAYPRO-88" board has 128k or 256k of its own ram on it, it's a factory installed SWP CoPower 88
ROM_START(kaypro484p88)
ROM_START(kaypro484p88)
ROM_REGION(0x4000, "roms",0)
ROM_SYSTEM_BIOS( 0, "292a", "292A")
ROMX_LOAD("81-292a.u34", 0x0000, 0x1000, CRC(241f27a5) SHA1(82711289d19e9b165e35324da010466d225e503a), ROM_BIOS(1) )
ROM_SYSTEM_BIOS( 1, "kplus", "MICROCode Consulting KayPLUS 84")
ROMX_LOAD("kplus84.rom", 0x0000, 0x2000, CRC(4551905a) SHA1(48f0964edfad05b214810ae5595638245c30e5c0), ROM_BIOS(2) )
ROM_REGION(0x10000, "rambank", ROMREGION_ERASEFF)
ROM_REGION(0x1000, "chargen",0)
@ -597,7 +597,7 @@ ROM_START(kaypronew2)
ROMX_LOAD("81-478.u42", 0x0000, 0x2000, CRC(de618380) SHA1(c8d6312e6eeb62a53e741f1ff3b878bdcb7b5aaa), ROM_BIOS(1) )
ROM_SYSTEM_BIOS( 1, "kplus", "MICROCode Consulting KayPLUS 84")
ROMX_LOAD("kplus84.rom", 0x0000, 0x2000, CRC(4551905a) SHA1(48f0964edfad05b214810ae5595638245c30e5c0), ROM_BIOS(2) )
ROM_REGION(0x10000, "rambank", ROMREGION_ERASEFF)
ROM_REGION(0x1000, "chargen",0)
@ -668,10 +668,10 @@ ROM_START(omni4)
ROM_END
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */
COMP( 1982, kayproii, 0, 0, kayproii, kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro II - 2/83" , 0 )
COMP( 1983, kayproiv, kayproii, 0, kayproiv, kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro IV - 4/83" , 0 ) // model 81-004
COMP( 1983, kaypro10, 0, 0, kaypro10, kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro 10 - 1983", 0 )
COMP( 1983, kaypro10, 0, 0, kaypro10, kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro 10 - 1983", 0 )
COMP( 1983, kayproiip88, kayproii, 0, kayproii, kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro 4 plus88 - 4/83" , MACHINE_NOT_WORKING ) // model 81-004 with an added 8088 daughterboard and rom
COMP( 1984, kaypro484, 0, 0, kaypro484, kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro 4/84" , MACHINE_NOT_WORKING ) // model 81-015
COMP( 1984, kaypro284, kaypro484, 0, kaypro284, kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro 2/84" , MACHINE_NOT_WORKING ) // model 81-015
@ -679,8 +679,8 @@ COMP( 1984, kaypro484p88,kaypro484, 0, kaypro484, kaypro, kaypro_state, kay
COMP( 1984, kaypro1084, kaypro10, 0, kaypro10, kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro 10" , MACHINE_NOT_WORKING ) // model 81-005
COMP( 1984, robie, 0, 0, kaypro484, kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro Robie" , MACHINE_NOT_WORKING )
COMP( 1985, kaypro2x, kaypro484, 0, kaypro484, kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro 2x" , MACHINE_NOT_WORKING ) // model 81-025
COMP( 1985, kaypronew2, 0, 0, kaypronew2,kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro New 2", MACHINE_NOT_WORKING )
COMP( 1985, kaypro4x, robie, 0, kaypro484, kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro 4x" , MACHINE_NOT_WORKING )
COMP( 1986, kaypro1, kaypro484, 0, kaypro484, kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro 1", MACHINE_NOT_WORKING )
COMP( 1985, kaypronew2, 0, 0, kaypronew2,kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro New 2", MACHINE_NOT_WORKING )
COMP( 1985, kaypro4x, robie, 0, kaypro484, kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro 4x" , MACHINE_NOT_WORKING )
COMP( 1986, kaypro1, kaypro484, 0, kaypro484, kaypro, kaypro_state, kaypro, "Non Linear Systems", "Kaypro 1", MACHINE_NOT_WORKING )
COMP( 198?, omni2, kayproii, 0, omni2, kaypro, kaypro_state, kaypro, "Non Linear Systems", "Omni II Logic Analyzer" , 0 )
COMP( 198?, omni4, kaypro484, 0, kaypro484, kaypro, kaypro_state, kaypro, "Omni Logic Inc.", "Omni 4 Logic Analyzer" , MACHINE_NOT_WORKING )

4
src/mame/drivers/lilith.cpp
View File

@ -15,11 +15,11 @@ class lilith_state : public driver_device
public:
lilith_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// , m_maincpu(*this, "maincpu")
// , m_maincpu(*this, "maincpu")
{ }
private:
// required_device<cpu_device> m_maincpu;
// required_device<cpu_device> m_maincpu;
};
//static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, lilith_state )

138
src/mame/drivers/marinedt.cpp
View File

@ -2,19 +2,19 @@
// copyright-holders:Angelo Salese
/*****************************************************************************************************************
Marine Date (c) 1981 Taito
Marine Date (c) 1981 Taito
driver by Angelo Salese,
original "wiped off due of not anymore licenseable" driver by insideoutboy.
TODO:
- discrete sound
- imperfect colors: unused bit 2 of color prom, guesswokred sea gradient, mg16 entirely unused.
also unused colors 0x10-0x1f (might be a flashing bank)
- collision detection isn't perfect, sometimes octopus gets stuck and dies even if moves are still available.
HW collision detection isn't perfect even from the reference, presumably needs a trojan run on the real HW.
- ROM writes (irq mask?)
- Merge devices with crbaloon/bking/grchamp drivers (PC3259).
TODO:
- discrete sound
- imperfect colors: unused bit 2 of color prom, guesswokred sea gradient, mg16 entirely unused.
also unused colors 0x10-0x1f (might be a flashing bank)
- collision detection isn't perfect, sometimes octopus gets stuck and dies even if moves are still available.
HW collision detection isn't perfect even from the reference, presumably needs a trojan run on the real HW.
- ROM writes (irq mask?)
- Merge devices with crbaloon/bking/grchamp drivers (PC3259).
*****************************************************************************************************************
@ -97,7 +97,7 @@ Notes:
J4 1-2, 4-5, 7-8, 10-11
Top and Middle PCBs are plugged in with the solder-sides together.
Lower PCB is plugged in with components facing up.
*****************************************************************************************************************/
#include "emu.h"
@ -132,7 +132,7 @@ public:
DECLARE_WRITE8_MEMBER(sfx_w);
DECLARE_WRITE8_MEMBER(layer_enable_w);
DECLARE_WRITE8_MEMBER(output_w);
TILE_GET_INFO_MEMBER(get_tile_info);
TILE_GET_INFO_MEMBER(get_tile_info);
protected:
// driver_device overrides
@ -146,7 +146,7 @@ private:
required_device<cpu_device> m_maincpu;
required_device<screen_device> m_screen;
required_shared_ptr<uint8_t> m_vram;
required_device<gfxdecode_device> m_gfxdecode;
required_device<gfxdecode_device> m_gfxdecode;
required_ioport_array<4> m_in_track;
tilemap_t *m_tilemap;
@ -158,12 +158,12 @@ private:
uint8_t y;
bitmap_ind16 bitmap;
}m_obj[2];
uint8_t m_layer_en;
uint8_t m_in_select;
bool m_screen_flip;
uint8_t m_sea_bank;
void init_seabitmap();
void obj_reg_w(uint8_t which,uint8_t reg, uint8_t data);
uint32_t obj_to_obj_collision();
@ -184,8 +184,8 @@ void marinedt_state::init_seabitmap()
m_seabitmap[0] = std::make_unique<bitmap_ind16>(512, 512);
m_seabitmap[1] = std::make_unique<bitmap_ind16>(512, 512);
m_seabitmap[0]->fill(64, clip);
m_seabitmap[1]->fill(64+32, clip);
m_seabitmap[0]->fill(64, clip);
m_seabitmap[1]->fill(64+32, clip);
for (int y = clip.min_y; y <= clip.max_y; y++)
{
@ -196,7 +196,7 @@ void marinedt_state::init_seabitmap()
// clamp
if(blue_pen > 0x5f)
blue_pen = 0x5f;
m_seabitmap[0]->pix16(y, x) = blue_pen;
m_seabitmap[1]->pix16(y, x) = blue_pen+0x20;
}
@ -206,18 +206,18 @@ void marinedt_state::init_seabitmap()
void marinedt_state::video_start()
{
m_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(marinedt_state::get_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 32, 32);
m_tilemap->set_transparent_pen(0);
init_seabitmap();
// m_obj[0].bitmap = std::make_unique<bitmap_ind16>(512, 512);
// m_obj[1].bitmap = std::make_unique<bitmap_ind16>(512, 512);
// m_screen->register_screen_bitmap(m_seabitmap);
m_tilemap->set_transparent_pen(0);
init_seabitmap();
// m_obj[0].bitmap = std::make_unique<bitmap_ind16>(512, 512);
// m_obj[1].bitmap = std::make_unique<bitmap_ind16>(512, 512);
// m_screen->register_screen_bitmap(m_seabitmap);
m_screen->register_screen_bitmap(m_obj[0].bitmap);
m_screen->register_screen_bitmap(m_obj[1].bitmap);
save_item(NAME(m_obj[0].x));
save_item(NAME(m_obj[0].y));
save_item(NAME(m_obj[0].offs));
@ -237,12 +237,12 @@ uint32_t marinedt_state::screen_update( screen_device &screen, bitmap_ind16 &bit
else
bitmap.fill(0,cliprect);
m_tilemap->draw(screen, bitmap, cliprect, 0, 0);
m_tilemap->draw(screen, bitmap, cliprect, 0, 0);
if(m_layer_en & 2)
copybitmap_trans(bitmap, m_obj[1].bitmap, 0, 0, 0, 0, cliprect, 0);
copybitmap_trans(bitmap, m_obj[1].bitmap, 0, 0, 0, 0, cliprect, 0);
if(m_layer_en & 1)
copybitmap_trans(bitmap, m_obj[0].bitmap, 0, 0, 0, 0, cliprect, 0);
copybitmap_trans(bitmap, m_obj[0].bitmap, 0, 0, 0, 0, cliprect, 0);
return 0;
}
@ -258,7 +258,7 @@ inline void marinedt_state::obj_reg_w(uint8_t which, uint8_t reg,uint8_t data)
rectangle visarea = m_screen->visible_area();
//const uint8_t base_pen;// = which == 0 ? 0x30 : 0x20;
gfx_element *gfx = m_gfxdecode->gfx(which+1);
switch(reg)
{
case 0: m_obj[which].offs = data; break;
@ -266,12 +266,12 @@ inline void marinedt_state::obj_reg_w(uint8_t which, uint8_t reg,uint8_t data)
case 1: m_obj[which].x = (data + 4) & 0xff; break;
case 2: m_obj[which].y = (data + 1) & 0xff; break;
}
const uint8_t tilenum = ((m_obj[which].offs & 4) << 1) | ( (m_obj[which].offs & 0x38) >> 3);
const uint8_t color = (m_obj[which].offs & 3);
const bool fx = BIT(m_obj[which].offs,6);
const bool fy = BIT(m_obj[which].offs,7);
//base_pen = (which == 0 ? 0x30 : 0x20) + color*4;
m_obj[which].bitmap.fill(0,visarea);
// redraw sprite in framebuffer using above
@ -296,25 +296,25 @@ WRITE8_MEMBER(marinedt_state::bgm_w)
WRITE8_MEMBER(marinedt_state::sfx_w)
{
/*
x--- ---- unknown, probably ties to PC3259 pin 16 like crbaloon
--x- ---- jet sound SFX
x--- ---- unknown, probably ties to PC3259 pin 16 like crbaloon
--x- ---- jet sound SFX
---x ---- foam SFX
---- x--- ink SFX
---- -x-- collision SFX
---- --x- dots hit SFX
---- ---x irq mask in crbaloon, doesn't seem to apply here?
*/
// if(data & 0x7e)
// popmessage("%02x",data);
// if(data & 0x7e)
// popmessage("%02x",data);
}
WRITE8_MEMBER(marinedt_state::layer_enable_w)
WRITE8_MEMBER(marinedt_state::layer_enable_w)
{
/*
---x ---- enabled when shark appears (enables red gradient on sea bitmap apparently)
---- x--- sea layer draw enable (disabled in test mode)
---- --x- obj 2 draw enable
---- ---x obj 1 draw enable
---- x--- sea layer draw enable (disabled in test mode)
---- --x- obj 2 draw enable
---- ---x obj 1 draw enable
*/
m_layer_en = data & 0xf;
m_sea_bank = (data & 0x10) >> 4;
@ -323,12 +323,12 @@ WRITE8_MEMBER(marinedt_state::layer_enable_w)
WRITE8_MEMBER(marinedt_state::output_w)
{
/*
---- x--- trackball input select (x/y)
---- -x-- trackball player select
---- --x- flipscreen
---- ---x global coin lockout (disabled in service mode)
---- x--- trackball input select (x/y)
---- -x-- trackball player select
---- --x- flipscreen
---- ---x global coin lockout (disabled in service mode)
*/
m_in_select = (data & 0xc) >> 2;
m_screen_flip = BIT(data,1);
flip_screen_set(!m_screen_flip);
@ -348,19 +348,19 @@ inline uint32_t marinedt_state::obj_to_obj_collision()
for(int x=0;x<32;x++)
{
int resx,resy;
resx = m_obj[0].x + x;
resy = m_obj[0].y + y;
if((m_obj[0].bitmap.pix16(resy,resx) & 3) == 0)
continue;
// return value is never read most likely
if(m_obj[1].bitmap.pix16(resy,resx) != 0)
return ((resy / 8) * 32) | (((resx / 8) - 1) & 0x1f);
}
}
return 0;
}
@ -375,16 +375,16 @@ inline uint32_t marinedt_state::obj_to_layer_collision()
for(int x=0;x<32;x++)
{
uint16_t resx,resy;
resx = m_obj[0].x + x;
resy = m_obj[0].y + y;
if((m_obj[0].bitmap.pix16(resy,resx) & 3) == 0)
continue;
if(!m_screen_flip)
resy -= 32;
// TODO: non screen flip path doesn't work properly
if(m_tilemap->pixmap().pix16(resy,resx) != 0)
{
@ -395,7 +395,7 @@ inline uint32_t marinedt_state::obj_to_layer_collision()
}
}
}
return 0;
}
@ -414,7 +414,7 @@ READ8_MEMBER(marinedt_state::pc3259_r)
xo = reso & 0xf;
return xt|(xo<<4);
case 1:
xt = (rest & 0xf0) >> 4;
xt = (rest & 0xf0) >> 4;
xo = (reso & 0xf0) >> 4;
return xt|(xo<<4);
case 2:
@ -429,7 +429,7 @@ READ8_MEMBER(marinedt_state::pc3259_r)
return res;
}
}
return 0;
}
@ -437,7 +437,7 @@ READ8_MEMBER(marinedt_state::pc3259_r)
static ADDRESS_MAP_START( marinedt_map, AS_PROGRAM, 8, marinedt_state )
ADDRESS_MAP_GLOBAL_MASK(0x7fff) /* A15 is not decoded */
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_REGION("ipl",0)
AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0x0400) AM_RAM
AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0x0400) AM_RAM
AM_RANGE(0x4800, 0x4bff) AM_MIRROR(0x0400) AM_RAM_WRITE(vram_w) AM_SHARE("vram")
ADDRESS_MAP_END
@ -447,11 +447,11 @@ static ADDRESS_MAP_START( marinedt_io, AS_IO, 8, marinedt_state )
AM_RANGE(0x01, 0x01) AM_READ(trackball_r)
AM_RANGE(0x02, 0x02) AM_SELECT(0xc) AM_READ(pc3259_r)
AM_RANGE(0x02, 0x04) AM_WRITE(obj_0_w)
AM_RANGE(0x03, 0x03) AM_READ_PORT("SYSTEM")
AM_RANGE(0x03, 0x03) AM_READ_PORT("SYSTEM")
AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
AM_RANGE(0x05, 0x05) AM_WRITE(bgm_w)
AM_RANGE(0x06, 0x06) AM_WRITE(sfx_w)
AM_RANGE(0x08, 0x0b) AM_WRITE(obj_1_w)
AM_RANGE(0x08, 0x0b) AM_WRITE(obj_1_w)
AM_RANGE(0x0d, 0x0d) AM_WRITE(layer_enable_w)
AM_RANGE(0x0e, 0x0e) AM_WRITENOP // watchdog
AM_RANGE(0x0f, 0x0f) AM_WRITE(output_w)
@ -467,7 +467,7 @@ static INPUT_PORTS_START( marinedt )
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("P2 Ink Button") PORT_COCKTAIL
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_START2 )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_START1 )
// TODO: diplocations needs to be verified
PORT_START("DSW1")
PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWA:4,3,2,1")
@ -504,7 +504,7 @@ static INPUT_PORTS_START( marinedt )
PORT_DIPSETTING( 0x50, DEF_STR( 1C_6C ) )
PORT_DIPSETTING( 0x60, DEF_STR( 1C_7C ) )
PORT_DIPSETTING( 0x70, DEF_STR( 1C_8C ) )
PORT_START("DSW2")
PORT_DIPNAME( 0x01, 0x00, "DSWB" ) PORT_DIPLOCATION("SWB:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
@ -512,7 +512,7 @@ static INPUT_PORTS_START( marinedt )
PORT_DIPNAME( 0x02, 0x00, "Disable sprite-tile collision (Cheat)" ) PORT_DIPLOCATION("SWB:2")
PORT_DIPSETTING( 0x02, DEF_STR( Yes ) )
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_SERVICE_DIPLOC( 0x04, IP_ACTIVE_HIGH, "SWB:3")
PORT_SERVICE_DIPLOC( 0x04, IP_ACTIVE_HIGH, "SWB:3")
PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SWB:4")
PORT_DIPSETTING( 0x08, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
@ -586,13 +586,13 @@ PALETTE_INIT_MEMBER(marinedt_state, marinedt)
int i;
int bit0, bit1, bit2;
int r, g, b;
for (i = 0; i < 64; i++)
{
/* red component */
bit0 = (color_prom[i] >> 0) & 0x01;
bit1 = (color_prom[i] >> 1) & 0x01;
// bit2 = (color_prom[i] >> 2) & 0x01;
// bit2 = (color_prom[i] >> 2) & 0x01;
r = (0x55 * bit0 + 0xaa * bit1);
/* green component */
@ -608,11 +608,11 @@ PALETTE_INIT_MEMBER(marinedt_state, marinedt)
// matches yellow haired siren
if(bit2 == 0)
b/=2;
palette.set_pen_color(i, rgb_t(r, g, b));
}
for (i = 0; i < 32; i++)
{
b = color_prom[i+0x60];
@ -627,8 +627,8 @@ static MACHINE_CONFIG_START( marinedt )
MCFG_CPU_ADD("maincpu",Z80,MAIN_CLOCK/4)
MCFG_CPU_PROGRAM_MAP(marinedt_map)
MCFG_CPU_IO_MAP(marinedt_io)
MCFG_CPU_VBLANK_INT_DRIVER("screen", marinedt_state, irq0_line_hold)
MCFG_CPU_VBLANK_INT_DRIVER("screen", marinedt_state, irq0_line_hold)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_UPDATE_DRIVER(marinedt_state, screen_update)

2
src/mame/drivers/mcr3.cpp
View File

@ -248,7 +248,7 @@ WRITE8_MEMBER(mcr3_state::maxrpm_op6_w)
4 bits of input from OP5 are routed to a transceiver at U2, and
ultimately on to the low 4 I/O pins of the ADC0844. The /EN on
the transceiver is directly connected to J2-2. Note that two bits
get swapped in the process: OP53 = MA3 and OP54 = MA2.
get swapped in the process: OP53 = MA3 and OP54 = MA2.
In order to perform a read or a write to the ADC0844, the /RD and
/WR signals are directly controlled via J2-8 and J2-7 respectively.

30
src/mame/drivers/metro.cpp
View File

@ -228,7 +228,7 @@ INTERRUPT_GEN_MEMBER(metro_state::metro_periodic_interrupt)
TIMER_DEVICE_CALLBACK_MEMBER(metro_state::bangball_scanline)
{
int scanline = param;
// vblank irq
if(scanline == 224)
{
@ -2151,9 +2151,9 @@ static INPUT_PORTS_START( lastfort )
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
// PORT_DIPNAME( 0x0080, 0x0080, "Tiles" ) PORT_DIPLOCATION("SW2:8")
// PORT_DIPSETTING( 0x0080, "Mahjong" )
// PORT_DIPSETTING( 0x0000, "Cards" ) // Not working - See notes
// PORT_DIPNAME( 0x0080, 0x0080, "Tiles" ) PORT_DIPLOCATION("SW2:8")
// PORT_DIPSETTING( 0x0080, "Mahjong" )
// PORT_DIPSETTING( 0x0000, "Cards" ) // Not working - See notes
PORT_DIPUNUSED_DIPLOC( 0x0080, 0x0080, "SW2:8" )
PORT_START("IN3") // $c0000e
@ -3092,7 +3092,7 @@ MACHINE_CONFIG_END
// TODO: these comes from the CRTC inside the i4100
static MACHINE_CONFIG_START( i4100_config_360x224 )
MCFG_FRAGMENT_ADD( i4100_config )
MCFG_DEVICE_MODIFY("screen")
MCFG_SCREEN_SIZE(360, 224)
MCFG_SCREEN_VISIBLE_AREA(0, 360-1, 0, 224-1)
@ -3100,7 +3100,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( i4220_config_320x240 )
MCFG_FRAGMENT_ADD( i4220_config )
MCFG_DEVICE_MODIFY("screen")
MCFG_SCREEN_SIZE(320, 240)
MCFG_SCREEN_VISIBLE_AREA(0, 320-1, 0, 240-1)
@ -3185,7 +3185,7 @@ static MACHINE_CONFIG_DERIVED( batlbubl, msgogo )
MCFG_CPU_VBLANK_INT_REMOVE()
MCFG_CPU_PERIODIC_INT_REMOVE()
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", metro_state, bangball_scanline, "screen", 0, 1)
// doesn't like 58.2 Hz
MCFG_DEVICE_MODIFY("screen")
MCFG_SCREEN_REFRESH_RATE(60)
@ -3254,7 +3254,7 @@ static MACHINE_CONFIG_START( dharma )
/* video hardware */
MCFG_FRAGMENT_ADD(i4220_config)
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -3276,7 +3276,7 @@ static MACHINE_CONFIG_START( karatour )
MCFG_CPU_PERIODIC_INT_DRIVER(metro_state, metro_periodic_interrupt, 8*60) // ?
MCFG_FRAGMENT_ADD(metro_upd7810_sound)
/* video hardware */
MCFG_FRAGMENT_ADD(i4100_config)
@ -3305,7 +3305,7 @@ static MACHINE_CONFIG_START( 3kokushi )
/* video hardware */
MCFG_FRAGMENT_ADD( i4220_config_320x240 )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -3403,7 +3403,7 @@ static MACHINE_CONFIG_START( dokyusp )
/* video hardware */
MCFG_FRAGMENT_ADD( i4300_config_384x224 )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -3429,7 +3429,7 @@ static MACHINE_CONFIG_START( gakusai )
/* video hardware */
MCFG_FRAGMENT_ADD( i4300_config_320x240 )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -3531,7 +3531,7 @@ static MACHINE_CONFIG_START( pururun )
/* video hardware */
MCFG_FRAGMENT_ADD( i4220_config )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -3555,7 +3555,7 @@ static MACHINE_CONFIG_START( skyalert )
MCFG_CPU_PERIODIC_INT_DRIVER(metro_state, metro_periodic_interrupt, 8*60) // ?
MCFG_FRAGMENT_ADD(metro_upd7810_sound)
MCFG_FRAGMENT_ADD(i4100_config_360x224)
@ -3701,7 +3701,7 @@ static MACHINE_CONFIG_DERIVED( gstrik2, blzntrnd )
MCFG_DEVICE_MODIFY("k053936")
MCFG_K053936_OFFSETS(-77, -19)
MCFG_DEVICE_MODIFY("vdp2")
MCFG_I4100_TILEMAP_XOFFSETS(0,-8,0)
MACHINE_CONFIG_END

4
src/mame/drivers/mightyframe.cpp
View File

@ -21,11 +21,11 @@ class mightyframe_state : public driver_device
public:
mightyframe_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// , m_maincpu(*this, "maincpu")
// , m_maincpu(*this, "maincpu")
{ }
private:
// required_device<cpu_device> m_maincpu;
// required_device<cpu_device> m_maincpu;
};
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 16, mightyframe_state )

6
src/mame/drivers/model3.cpp
View File

@ -1892,14 +1892,14 @@ static INPUT_PORTS_START( model3 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
PORT_START("DSW")
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) /* Dip switches */
INPUT_PORTS_END
static INPUT_PORTS_START( von2 )
PORT_INCLUDE( common )
PORT_START("IN2")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Left Lever Shot Trigger")
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Left Lever Turbo Button")
@ -1919,7 +1919,7 @@ static INPUT_PORTS_START( von2 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_UP ) PORT_8WAY
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_RIGHT ) PORT_8WAY
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_LEFT ) PORT_8WAY
// TODO: not here
PORT_START("DSW")
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) /* Dip switches */

66
src/mame/drivers/nds.cpp
View File

@ -9,8 +9,8 @@
Tech info: http://problemkaputt.de/gbatek.htm
Notes:
Timers and DMAs 0-3 are ARM9's, 4-7 are ARM7's.
Interrupt registers [0] is ARM9, [1] is ARM7.
Timers and DMAs 0-3 are ARM9's, 4-7 are ARM7's.
Interrupt registers [0] is ARM9, [1] is ARM7.
***************************************************************************/
@ -29,31 +29,31 @@
#define INT_TM1_OVERFLOW 0x00000010
#define INT_TM2_OVERFLOW 0x00000020
#define INT_TM3_OVERFLOW 0x00000040
#define INT_SIO 0x00000080 // also RCNT/RTC (arm7 only)
#define INT_SIO 0x00000080 // also RCNT/RTC (arm7 only)
#define INT_DMA0 0x00000100
#define INT_DMA1 0x00000200
#define INT_DMA2 0x00000400
#define INT_DMA3 0x00000800
#define INT_KEYPAD 0x00001000
#define INT_GAMEPAK 0x00002000 // GBA slot IRQ line (never used?)
#define INT_NA1 0x00004000 // unused
#define INT_NA2 0x00008000 // unused
#define INT_IPCSYNC 0x00010000
#define INT_IPCSENDEMPTY 0x00020000
#define INT_IPCRECVNOTEMPTY 0x00040000
#define INT_CARDXFERCOMPLETE 0x00080000
#define INT_CARDIREQ 0x00100000
#define INT_GEOCMDFIFO 0x00200000 // arm9 only
#define INT_SCREENUNFOLD 0x00400000 // arm7 only
#define INT_SPIBUS 0x00800000 // arm7 only
#define INT_WIFI 0x01000000 // arm7 only - also DSP on DSi
#define INT_CAMERA 0x02000000 // DSi only
#define INT_NA3 0x04000000
#define INT_NA4 0x08000000
#define INT_NEWDMA0 0x10000000 // DSi only
#define INT_NEWDMA1 0x20000000 // DSi only
#define INT_NEWDMA2 0x40000000 // DSi only
#define INT_NEWDMA3 0x80000000 // DSi only
#define INT_GAMEPAK 0x00002000 // GBA slot IRQ line (never used?)
#define INT_NA1 0x00004000 // unused
#define INT_NA2 0x00008000 // unused
#define INT_IPCSYNC 0x00010000
#define INT_IPCSENDEMPTY 0x00020000
#define INT_IPCRECVNOTEMPTY 0x00040000
#define INT_CARDXFERCOMPLETE 0x00080000
#define INT_CARDIREQ 0x00100000
#define INT_GEOCMDFIFO 0x00200000 // arm9 only
#define INT_SCREENUNFOLD 0x00400000 // arm7 only
#define INT_SPIBUS 0x00800000 // arm7 only
#define INT_WIFI 0x01000000 // arm7 only - also DSP on DSi
#define INT_CAMERA 0x02000000 // DSi only
#define INT_NA3 0x04000000
#define INT_NA4 0x08000000
#define INT_NEWDMA0 0x10000000 // DSi only
#define INT_NEWDMA1 0x20000000 // DSi only
#define INT_NEWDMA2 0x40000000 // DSi only
#define INT_NEWDMA3 0x80000000 // DSi only
static const uint32_t timer_clks[4] = { MASTER_CLOCK, MASTER_CLOCK / 64, MASTER_CLOCK / 256, MASTER_CLOCK / 1024 };
@ -84,7 +84,7 @@ READ32_MEMBER(nds_state::arm7_io_r)
double time, ticks;
int timer = (offset - TIMER_OFFSET) + 4;
printf("Read timer reg %x (PC=%x)\n", timer, space.device().safe_pc());
printf("Read timer reg %x (PC=%x)\n", timer, space.device().safe_pc());
// update times for
if (m_timer_regs[timer] & 0x800000)
@ -213,7 +213,7 @@ WRITE32_MEMBER(nds_state::arm7_io_w)
m_timer_regs[timer] = (m_timer_regs[timer] & ~(mem_mask & 0xFFFF0000)) | (data & (mem_mask & 0xFFFF0000));
printf("%08x to timer %d (mask %08x PC %x)\n", data, timer, ~mem_mask, space.device().safe_pc());
printf("%08x to timer %d (mask %08x PC %x)\n", data, timer, ~mem_mask, space.device().safe_pc());
if (ACCESSING_BITS_0_15)
{
@ -241,7 +241,7 @@ WRITE32_MEMBER(nds_state::arm7_io_w)
m_timer_recalc[timer] = 0;
printf("Enabling timer %d @ %f Hz regs %08x\n", timer, final, m_timer_regs[timer]);
printf("Enabling timer %d @ %f Hz regs %08x\n", timer, final, m_timer_regs[timer]);
// enable the timer
if( !(data & 0x40000) ) // if we're not in Count-Up mode
@ -346,7 +346,7 @@ WRITE32_MEMBER(nds_state::arm7_io_w)
{
if ((data>>8) & 0x80)
{
printf("arm7: HALT\n"); // halts the arm7 until an interrupt occurs
printf("arm7: HALT\n"); // halts the arm7 until an interrupt occurs
m_arm7->suspend(SUSPEND_REASON_HALT, 1);
m_arm7halted = true;
}
@ -371,7 +371,7 @@ READ32_MEMBER(nds_state::arm9_io_r)
double time, ticks;
int timer = (offset - TIMER_OFFSET);
//printf("Read timer reg %x (PC=%x)\n", timer, space.device().safe_pc());
//printf("Read timer reg %x (PC=%x)\n", timer, space.device().safe_pc());
// update times for
if (m_timer_regs[timer] & 0x800000)
@ -450,7 +450,7 @@ WRITE32_MEMBER(nds_state::arm9_io_w)
m_timer_regs[timer] = (m_timer_regs[timer] & ~(mem_mask & 0xFFFF0000)) | (data & (mem_mask & 0xFFFF0000));
printf("%x to timer %d (mask %x PC %x)\n", data, timer, ~mem_mask, space.device().safe_pc());
printf("%x to timer %d (mask %x PC %x)\n", data, timer, ~mem_mask, space.device().safe_pc());
if (ACCESSING_BITS_0_15)
{
@ -478,7 +478,7 @@ WRITE32_MEMBER(nds_state::arm9_io_w)
m_timer_recalc[timer] = 0;
printf("Enabling timer %d @ %f Hz\n", timer, final);
printf("Enabling timer %d @ %f Hz\n", timer, final);
// enable the timer
if( !(data & 0x40000) ) // if we're not in Count-Up mode
@ -513,7 +513,7 @@ WRITE32_MEMBER(nds_state::arm9_io_w)
break;
case VRAMCNT_A_OFFSET:
if (ACCESSING_BITS_0_7) // VRAMCNT_A
if (ACCESSING_BITS_0_7) // VRAMCNT_A
{
m_vramcnta = data & 0xff;
}
@ -532,7 +532,7 @@ WRITE32_MEMBER(nds_state::arm9_io_w)
break;
case WRAMCNT_OFFSET:
if (ACCESSING_BITS_0_7) // VRAMCNT_E
if (ACCESSING_BITS_0_7) // VRAMCNT_E
{
m_vramcnte = data & 0xff;
}
@ -553,7 +553,7 @@ WRITE32_MEMBER(nds_state::arm9_io_w)
break;
case VRAMCNT_H_OFFSET:
if (ACCESSING_BITS_0_7) // VRAMCNT_H
if (ACCESSING_BITS_0_7) // VRAMCNT_H
{
m_vramcnth = data & 0xff;
}
@ -614,7 +614,7 @@ static ADDRESS_MAP_START( nds9_wram_map, AS_PROGRAM, 32, nds_state )
AM_RANGE(0x0c000, 0x0ffff) AM_READWRITE(wram_second_half_r, wram_second_half_w)
AM_RANGE(0x10000, 0x13fff) AM_READWRITE(wram_first_half_r, wram_first_half_w)
AM_RANGE(0x14000, 0x17fff) AM_READWRITE(wram_first_half_r, wram_first_half_w)
AM_RANGE(0x18000, 0x1ffff) AM_NOP AM_WRITENOP // probably actually open bus? GBATEK describes as "random"
AM_RANGE(0x18000, 0x1ffff) AM_NOP AM_WRITENOP // probably actually open bus? GBATEK describes as "random"
ADDRESS_MAP_END
READ32_MEMBER(nds_state::wram_first_half_r) { return m_WRAM[offset]; }

2
src/mame/drivers/neoprint.cpp
View File

@ -72,7 +72,7 @@ public:
protected:
virtual void machine_start() override;
virtual void video_start() override;
private:
required_shared_ptr<uint16_t> m_npvidram;
required_shared_ptr<uint16_t> m_npvidregs;

2
src/mame/drivers/peplus.cpp
View File

@ -8313,7 +8313,7 @@ ROM_START( peps0239 ) /* Normal board : Jackpot Jewels Slots (PS0239) - Payout 9
ROM_REGION( 0x020000, "gfx1", 0 )
ROM_LOAD( "mro-cg1151.u72", 0x00000, 0x8000, BAD_DUMP CRC(596f1207) SHA1(d66acfa509e33e9fe2dce89ef4c19909a578b3bf) ) /* 08/24/92 @ IGT MN */
ROM_LOAD( "mgo-cg1151.u73", 0x08000, 0x8000, BAD_DUMP CRC(aa4984ca) SHA1(2bbf2eba739b6cac7459a8021535967520c198ba) )
ROM_LOAD( "mgo-cg1151.u73", 0x08000, 0x8000, BAD_DUMP CRC(aa4984ca) SHA1(2bbf2eba739b6cac7459a8021535967520c198ba) )
ROM_LOAD( "mbo-cg1151.u74", 0x10000, 0x8000, BAD_DUMP CRC(cf13bf00) SHA1(beaaa9acf660bb2c59d68f9f971b1e8f11bd81e9) ) /* one of these four roms are bad as there are 7 rogue */
ROM_LOAD( "mxo-cg1151.u75", 0x18000, 0x8000, BAD_DUMP CRC(659d72db) SHA1(973ccd71a7993d1885f1dbd0f877f18133650616) ) /* "green" dots in the single BAR with Diamond graphic */

4
src/mame/drivers/perq.cpp
View File

@ -18,11 +18,11 @@ class perq_state : public driver_device
public:
perq_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// , m_maincpu(*this, "maincpu")
// , m_maincpu(*this, "maincpu")
{ }
private:
// required_device<cpu_device> m_maincpu;
// required_device<cpu_device> m_maincpu;
};
//static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, perq_state )

56
src/mame/drivers/pgm2.cpp
View File

@ -40,18 +40,18 @@
Puzzle of Ocha / Ochainu No Pazuru
ToDo (emulation issues):
ToDo (emulation issues):
Support remaining games (need IGS036 dumps)
Identify which regions each game was released in and either dump alt. internal ROMs for each region, or
create them until that can be done.
RTC (integrated into the CPU with the SRAM?)
Memory Card system (there's an MCU on the motherboard that will need simulating or dumping somehow)
Verify Sprite Zoom (check exactly which pixels are doubled / missed on hardware for flipped , non-flipped cases etc.)
Simplify IGS036 encryption based on tables in internal roms
Fix ARM? bug that means Oriental Legend 2 needs a patch (might also be that it needs the card reader, and is running a
codepath that would not exist in a real environment at the moment)
Fix Save States (is this a driver problem or an ARM core problem, they don't work unless you get through the startup tests)
Support remaining games (need IGS036 dumps)
Identify which regions each game was released in and either dump alt. internal ROMs for each region, or
create them until that can be done.
RTC (integrated into the CPU with the SRAM?)
Memory Card system (there's an MCU on the motherboard that will need simulating or dumping somehow)
Verify Sprite Zoom (check exactly which pixels are doubled / missed on hardware for flipped , non-flipped cases etc.)
Simplify IGS036 encryption based on tables in internal roms
Fix ARM? bug that means Oriental Legend 2 needs a patch (might also be that it needs the card reader, and is running a
codepath that would not exist in a real environment at the moment)
Fix Save States (is this a driver problem or an ARM core problem, they don't work unless you get through the startup tests)
*/
@ -81,7 +81,7 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state )
AM_RANGE(0x00000000, 0x00003fff) AM_ROM //AM_REGION("user1", 0x00000) // internal ROM
AM_RANGE(0x02000000, 0x0200ffff) AM_RAM AM_SHARE("sram") // 'battery ram' (in CPU?)
// could be the card reader, looks a bit like a standard IGS MCU comms protocol going on here
AM_RANGE(0x03600000, 0x03600003) AM_WRITENOP
AM_RANGE(0x03620000, 0x03620003) AM_WRITENOP
@ -103,9 +103,9 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state )
AM_RANGE(0x30060000, 0x30063fff) AM_RAM_DEVWRITE("sp_palette", palette_device, write) AM_SHARE("sp_palette")
AM_RANGE(0x30080000, 0x30081fff) AM_RAM_DEVWRITE("bg_palette", palette_device, write) AM_SHARE("bg_palette")
AM_RANGE(0x30080000, 0x30081fff) AM_RAM_DEVWRITE("bg_palette", palette_device, write) AM_SHARE("bg_palette")
AM_RANGE(0x300a0000, 0x300a07ff) AM_RAM_DEVWRITE("tx_palette", palette_device, write) AM_SHARE("tx_palette")
AM_RANGE(0x300a0000, 0x300a07ff) AM_RAM_DEVWRITE("tx_palette", palette_device, write) AM_SHARE("tx_palette")
AM_RANGE(0x300c0000, 0x300c01ff) AM_RAM AM_SHARE("sp_zoom") // sprite zoom table - it uploads the same data 4x, maybe xshrink,xgrow,yshrink,ygrow or just redundant mirrors
@ -121,7 +121,7 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state )
// there are other 0x301200xx regs
AM_RANGE(0x40000000, 0x40000003) AM_DEVREADWRITE8("ymz774", ymz774_device, read, write, 0xffffffff)
// internal to IGS036? - various other writes down here on startup too - could be other standard ATMEL peripherals like the ARM_AIC mixed with custom bits
AM_RANGE(0xffffec00, 0xffffec5f) AM_RAM
AM_RANGE(0xfffffc00, 0xfffffcff) AM_RAM // confirmed as encryption table for main program rom (see code at 3950)
@ -133,7 +133,7 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state )
AM_RANGE(0xfffffd28, 0xfffffd2b) AM_READNOP // often
// AM_RANGE(0xfffffa08, 0xfffffa0b) AM_WRITE(table_done_w) // after uploading encryption? table might actually send it or enable external ROM?
// AM_RANGE(0xfffffa08, 0xfffffa0b) AM_WRITE(table_done_w) // after uploading encryption? table might actually send it or enable external ROM?
AM_RANGE(0xfffffa0c, 0xfffffa0f) AM_READ(unk_startup_r)
ADDRESS_MAP_END
@ -233,7 +233,7 @@ INPUT_PORTS_END
WRITE_LINE_MEMBER(pgm2_state::irq)
{
// printf("irq\n");
// printf("irq\n");
if (state == ASSERT_LINE) m_maincpu->set_input_line(ARM7_IRQ_LINE, ASSERT_LINE);
else m_maincpu->set_input_line(ARM7_IRQ_LINE, CLEAR_LINE);
}
@ -382,12 +382,12 @@ static MACHINE_CONFIG_START( pgm2 )
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(pgm2_state, screen_vblank_pgm2))
MCFG_GFXDECODE_ADD("gfxdecode2", "tx_palette", pgm2_tx)
MCFG_GFXDECODE_ADD("gfxdecode3", "bg_palette", pgm2_bg)
MCFG_PALETTE_ADD("sp_palette", 0x4000/4) // sprites
MCFG_PALETTE_FORMAT(XRGB)
MCFG_PALETTE_ADD("tx_palette", 0x800/4) // text
MCFG_PALETTE_FORMAT(XRGB)
@ -670,11 +670,11 @@ static void sprite_colour_decode(uint16_t* rom, int len)
for (i = 0; i < len / 2; i++)
{
rom[i] = BITSWAP16(rom[i], 15, 14, /* unused - 6bpp */
13, 12, 11,
5, 4, 3,
7, 6, /* unused - 6bpp */
10, 9, 8,
2, 1, 0 );
13, 12, 11,
5, 4, 3,
7, 6, /* unused - 6bpp */
10, 9, 8,
2, 1, 0 );
}
}
@ -688,7 +688,7 @@ READ32_MEMBER(pgm2_state::orleg2_speedup_r)
}
/*else
{
printf("pc is %08x\n", pc);
printf("pc is %08x\n", pc);
}*/
return m_mainram[0x20114 / 4];
@ -706,7 +706,7 @@ READ32_MEMBER(pgm2_state::kov2nl_speedup_r)
/*
else
{
printf("pc is %08x\n", pc);
printf("pc is %08x\n", pc);
}
*/
@ -731,7 +731,7 @@ DRIVER_INIT_MEMBER(pgm2_state,orleg2)
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x20020114, 0x20020117, read32_delegate(FUNC(pgm2_state::orleg2_speedup_r),this));
/* HACK!
patch out an ingame assert that ends up being triggered after the 5 element / fire chariot boss due to an invalid value in R3
patch out an ingame assert that ends up being triggered after the 5 element / fire chariot boss due to an invalid value in R3
todo: why does this happen? ARM core bug? is patching out the assert actually safe? game continues as normal like this, but there could be memory corruption.
*/
uint16_t* rom;
@ -844,7 +844,7 @@ GAME( 2007, orleg2, 0, pgm2, pgm2, pgm2_state, orleg2,
GAME( 2007, orleg2_103, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V103, China)", MACHINE_NOT_WORKING )
GAME( 2007, orleg2_101, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V101, China)", MACHINE_NOT_WORKING )
// Knights of Valour 2 New Legend
// Knights of Valour 2 New Legend
GAME( 2008, kov2nl, 0, pgm2, pgm2, pgm2_state, kov2nl, ROT0, "IGS", "Knights of Valour 2 New Legend (V302, China)", MACHINE_NOT_WORKING )
GAME( 2008, kov2nl_301, kov2nl, pgm2, pgm2, pgm2_state, kov2nl, ROT0, "IGS", "Knights of Valour 2 New Legend (V301, China)", MACHINE_NOT_WORKING )
GAME( 2008, kov2nl_300, kov2nl, pgm2, pgm2, pgm2_state, kov2nl, ROT0, "IGS", "Knights of Valour 2 New Legend (V300, China)", MACHINE_NOT_WORKING ) // was dumped from a Taiwan board tho

10
src/mame/drivers/powerstack.cpp
View File

@ -16,23 +16,23 @@ class powerstack_state : public driver_device
public:
powerstack_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// , m_maincpu(*this, "maincpu")
// , m_maincpu(*this, "maincpu")
{ }
private:
// required_device<cpu_device> m_maincpu;
// required_device<cpu_device> m_maincpu;
};
//static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 64, powerstack_state )
// AM_RANGE(0xFFF80000, 0xFFFFFFFF) AM_ROM AM_REGION("roms", 0)
// AM_RANGE(0xFFF80000, 0xFFFFFFFF) AM_ROM AM_REGION("roms", 0)
//ADDRESS_MAP_END
static INPUT_PORTS_START( powerstack )
INPUT_PORTS_END
static MACHINE_CONFIG_START( powerstack )
// MCFG_CPU_ADD("maincpu", PPC604, 300'000'000) // PPC604E @ 300MHz
// MCFG_CPU_PROGRAM_MAP(mem_map)
// MCFG_CPU_ADD("maincpu", PPC604, 300'000'000) // PPC604E @ 300MHz
// MCFG_CPU_PROGRAM_MAP(mem_map)
MACHINE_CONFIG_END
ROM_START( powerstk )

30
src/mame/drivers/seibucats.cpp
View File

@ -4,15 +4,15 @@
Seibu CATS E-Touch Mahjong Series (c) 2001 Seibu Kaihatsu
TODO:
- verify obj roms (maybe bad or wrong decryption);
- coins inputs are ok?
- touchscreen;
- sound;
- DVD player;
TODO:
- verify obj roms (maybe bad or wrong decryption);
- coins inputs are ok?
- touchscreen;
- sound;
- DVD player;
=========================================================================================================================================================
CPU and system control devices:
- Intel i386DX (U0169; lower right corner)
- SEI600 SB08-1513 custom DMA chip (U0154; above i386DX)
@ -101,7 +101,7 @@ class seibucats_state : public seibuspi_state
public:
seibucats_state(const machine_config &mconfig, device_type type, const char *tag)
: seibuspi_state(mconfig, type, tag)
// m_key(*this, "KEY.%u", 0)
// m_key(*this, "KEY.%u", 0)
{
}
@ -126,9 +126,9 @@ protected:
private:
uint16_t m_input_select;
// optional_ioport_array<5> m_key;
// optional_ioport m_special;
// optional_ioport_array<5> m_key;
// optional_ioport m_special;
};
// identical to EJ Sakura
@ -140,7 +140,7 @@ READ16_MEMBER(seibucats_state::input_mux_r)
for (int i = 0; i < 5; i++)
if (m_input_select >> i & 1)
ret &= m_key[i]->read();
return ret;
}
@ -371,7 +371,7 @@ ROM_START( emjscanb )
ROM_REGION( 0x900000, "gfx2", ROMREGION_ERASEFF ) /* background layer roms - none! */
SEIBUCATS_OBJ_LOAD
DISK_REGION("dvd")
DISK_IMAGE_READONLY( "Scandal Blue SKTP-10008", 0, SHA1(17fe67698a9bc5dbd452c4b1afa739294ec2011c) )
ROM_END
@ -388,7 +388,7 @@ ROM_START( emjtrapz )
ROM_REGION( 0x900000, "gfx2", ROMREGION_ERASEFF ) /* background layer roms - none! */
SEIBUCATS_OBJ_LOAD
DISK_REGION("dvd")
DISK_IMAGE_READONLY( "Trap Zone SKTP-00009", 0, SHA1(b4a51f42eeaeefc329031651859caa108418a96e) )
ROM_END
@ -410,7 +410,7 @@ DRIVER_INIT_MEMBER(seibucats_state,seibucats)
*src++ = tmp[offset];
}
}
// seibuspi_rise11_sprite_decrypt_rfjet(memregion("gfx3")->base(), 0x300000);
// seibuspi_rise11_sprite_decrypt_rfjet(memregion("gfx3")->base(), 0x300000);
}
// Gravure Collection

10
src/mame/drivers/shanghai.cpp
View File

@ -9,7 +9,7 @@ driver by Nicola Salmoria
TODO:
- games are currently too fast (especially noticeable with kothello screen transitions), maybe unemulated HD63484 wait state penalties?
- minor glitch with gfx copy on shanghai stage info panel (garbage on right);
- irq ack, shanghai and shangha2 uses it, kothello auto acks, maybe latter really runs on NMI instead
- irq ack, shanghai and shangha2 uses it, kothello auto acks, maybe latter really runs on NMI instead
(vector 2 matches same pattern as shanghai games);
- shanghai: IC37 returns bad in service mode;
@ -42,7 +42,7 @@ public:
DECLARE_WRITE8_MEMBER(shanghai_coin_w);
DECLARE_PALETTE_INIT(shanghai);
INTERRUPT_GEN_MEMBER(half_vblank_irq);
private:
required_device<cpu_device> m_maincpu;
required_device<screen_device> m_screen;
@ -261,7 +261,7 @@ static INPUT_PORTS_START( shanghai_common )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_NAME("P2 Cancel Button")
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) PORT_NAME("P2 Help Button")
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("SYSTEM")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
@ -271,11 +271,11 @@ static INPUT_PORTS_START( shanghai_common )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
INPUT_PORTS_END
INPUT_PORTS_END
static INPUT_PORTS_START( shanghai )
PORT_INCLUDE( shanghai_common )
PORT_START("DSW1")
PORT_SERVICE_DIPLOC( 0x01, IP_ACTIVE_LOW, "SW1:8" )
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:7")

4
src/mame/drivers/solbourne.cpp
View File

@ -15,11 +15,11 @@ class solbourne_state : public driver_device
public:
solbourne_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// , m_maincpu(*this, "maincpu")
// , m_maincpu(*this, "maincpu")
{ }
private:
// required_device<cpu_device> m_maincpu;
// required_device<cpu_device> m_maincpu;
};
//static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, solbourne_state )

8
src/mame/drivers/ssozumo.cpp
View File

@ -210,10 +210,10 @@ static MACHINE_CONFIG_START( ssozumo )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
// MCFG_SCREEN_REFRESH_RATE(60)
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
// MCFG_SCREEN_SIZE(32*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8 - 1, 1*8, 31*8 - 1)
// MCFG_SCREEN_REFRESH_RATE(60)
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
// MCFG_SCREEN_SIZE(32*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8 - 1, 1*8, 31*8 - 1)
// DECO video CRTC, unverified
MCFG_SCREEN_RAW_PARAMS(XTAL_12MHz/2,384,0,256,272,8,248)
MCFG_SCREEN_UPDATE_DRIVER(ssozumo_state, screen_update)

68
src/mame/drivers/tattack.cpp
View File

@ -4,7 +4,7 @@
Time Attacker
driver by Tomasz Slanina analog[at]op.pl
improvements by Angelo Salese
improvements by Angelo Salese
Z80A,
xtal 8MHz,
@ -17,12 +17,12 @@
TODO:
- non-tilemap video offsets/sizes are guessworked;
- random brick flickering effect is guessworked too, leave MACHINE_IMPERFECT_COLORS in until is tested on HW.
- outputs (coin counter port same as sound writes?);
- some dipswitches;
- random brick flickering effect is guessworked too, leave MACHINE_IMPERFECT_COLORS in until is tested on HW.
- outputs (coin counter port same as sound writes?);
- some dipswitches;
- sound (requires Epson 7910 Multi-Melody emulation?)
\- victory BGM cuts off too late?
\- victory BGM cuts off too late?
Connector pinout from manual
Solder Side Parts Side
@ -92,10 +92,10 @@ private:
int m_paddle_ysize;
bool m_bottom_edge_enable;
bool m_bricks_color_bank;
void draw_gameplay_bitmap(bitmap_ind16 &bitmap, const rectangle &cliprect);
void draw_edge_bitmap(bitmap_ind16 &bitmap, const rectangle &cliprect);
static const uint8_t white_pen = 0xf;
static const uint8_t green_pen = 0x5;
static const uint8_t yellow_pen = 0x7;
@ -122,7 +122,7 @@ TILE_GET_INFO_MEMBER(tattack_state::get_tile_info)
}
void tattack_state::draw_edge_bitmap(bitmap_ind16 &bitmap, const rectangle &cliprect)
{
{
// left column
bitmap.plot_box(0,16,216,4,white_pen);
// upper row
@ -144,25 +144,25 @@ void tattack_state::draw_gameplay_bitmap(bitmap_ind16 &bitmap, const rectangle &
for(ram_offs=ram_base;ram_offs<ram_base+0xe;ram_offs++)
{
uint8_t cur_column = m_ram[ram_offs];
for(int bit=7;bit>-1;bit--)
{
bool draw_block = ((cur_column >> bit) & 1) == 1;
// blinking
// If player hits a blinking brick then a 30 seconds bonus is awarded.
// Sometimes game forgets to update the location or the blinking itself (both bits 0)
// can be either intentional or a game bug.
// TODO: the mask used here is guessed
// TODO: the mask used here is guessed
if((m_ram[0x33] & 0x3) == 3)
{
int blink_row = m_ram[0x2b];
int blink_col = m_ram[0x2c];
if(bit == blink_col && (ram_offs & 0xf) == blink_row)
draw_block = false;
}
if(draw_block == true)
{
for(xi=0;xi<3;xi++)
@ -171,7 +171,7 @@ void tattack_state::draw_gameplay_bitmap(bitmap_ind16 &bitmap, const rectangle &
{
int resx = bit*4+xi+160+x_base;
int resy = (ram_offs & 0xf)*16+yi+16;
if(cliprect.contains(resx,resy))
bitmap.pix16(resy, resx) = m_bricks_color_bank == true ? red_pen : (bit & 4 ? yellow_pen : green_pen);
}
@ -179,7 +179,7 @@ void tattack_state::draw_gameplay_bitmap(bitmap_ind16 &bitmap, const rectangle &
}
}
}
// draw paddle
if(m_bottom_edge_enable == false)
{
@ -192,7 +192,7 @@ void tattack_state::draw_gameplay_bitmap(bitmap_ind16 &bitmap, const rectangle &
if(cliprect.contains(resx,resy))
bitmap.pix16(resy, resx) = white_pen;
}
}
}
// draw ball
for(xi=0;xi<3;xi++)
for(yi=0;yi<3;yi++)
@ -209,7 +209,7 @@ uint32_t tattack_state::screen_update_tattack(screen_device &screen, bitmap_ind1
{
m_tmap->mark_all_dirty();
m_tmap->draw(screen, bitmap, cliprect, 0,0);
// draw bricks/ball/paddle
draw_gameplay_bitmap(bitmap, cliprect);
// draw edges
@ -237,7 +237,7 @@ WRITE8_MEMBER(tattack_state::ball_w)
WRITE8_MEMBER(tattack_state::brick_dma_w)
{
// bit 7: 0->1 transfers from RAM to internal video buffer
// bit 6: bricks color bank
// bit 6: bricks color bank
m_bricks_color_bank = BIT(data,6);
// bit 5: flip screen
flip_screen_set(!(data & 0x20));
@ -245,7 +245,7 @@ WRITE8_MEMBER(tattack_state::brick_dma_w)
m_paddle_ysize = data & 0x10 ? 8 : 16;
// bit 3: enable bottom edge
m_bottom_edge_enable = BIT(data,3);
// popmessage("%02x",data&0x7f);
// popmessage("%02x",data&0x7f);
}
WRITE8_MEMBER(tattack_state::sound_w)
@ -258,7 +258,7 @@ WRITE8_MEMBER(tattack_state::sound_w)
if(data & 1 << i && m_samples->playing(i) == false)
m_samples->start(i,i);
//if((data & 1 << i) == 0 && m_samples->playing(i) == true)
// m_samples->stop(i);
// m_samples->stop(i);
}
}
@ -345,7 +345,7 @@ static INPUT_PORTS_START( tattack )
PORT_DIPSETTING( 0x40, "5" )
PORT_DIPSETTING( 0x80, "7" )
PORT_DIPSETTING( 0xc0, DEF_STR( Infinite ) )
PORT_START("AN_PADDLE")
PORT_BIT( 0xff, 0x00, IPT_PADDLE ) PORT_MINMAX(0,0xff) PORT_SENSITIVITY(10) PORT_KEYDELTA(10) PORT_CENTERDELTA(0)
INPUT_PORTS_END
@ -391,9 +391,9 @@ static const char *const tattack_sample_names[] =
{
"*tattack",
"paddle_hit",
"wall_hit",
"brick_destroy",
"win_bgm",
"wall_hit",
"brick_destroy",
"win_bgm",
nullptr
};
@ -446,18 +446,18 @@ ROM_END
DRIVER_INIT_MEMBER(tattack_state,tattack)
{
// uint8_t *rom = memregion("maincpu")->base();
// uint8_t *rom = memregion("maincpu")->base();
// rom[0x1b4]=0;
// rom[0x1b5]=0;
// rom[0x1b4]=0;
// rom[0x1b5]=0;
// rom[0x262]=0;
// rom[0x263]=0;
// rom[0x264]=0;
// rom[0x262]=0;
// rom[0x263]=0;
// rom[0x264]=0;
// rom[0x32a]=0;
// rom[0x32b]=0;
// rom[0x32c]=0;
// rom[0x32a]=0;
// rom[0x32b]=0;
// rom[0x32c]=0;
/*
possible jumps to 0 (protection checks?)

10
src/mame/drivers/terco.cpp
View File

@ -71,7 +71,7 @@
* 555 - analog timer circuit
* 6800 - 8 bit CPU
* 6821 - PIA paralell interface
* 6850 - ACIA serial interface
* 6850 - ACIA serial interface
* 7400 - Quad 2 input NAND gates
* 7402 - Quad 2 input NOR gates
* 7408 - Quad 2 input AND gates
@ -81,15 +81,15 @@
* 7476 - Dual JK flip flops with preset and clear
* 7490 - Decade Counters, divide by 2 and divide by 5 outputs
* 74116 - Dual 4-bit latches
* 74138 - 3 to 8 line decoder/demultiplexer
* 74139 - Dual 2 to 4 line decoder/demultiplexer
* 74138 - 3 to 8 line decoder/demultiplexer
* 74139 - Dual 2 to 4 line decoder/demultiplexer
* 74154 - 4 line to 16 line decoders/multiplexers
* 74164 - 8 bit paralell output serial shift register
* 74174 - 6 D-type flip flops
* 74240 - Inverted 3-state outputs
* 74244 - Non-inverted 3-state outputs
* AY3600 - Keyboard Controller
* CA339 - Quad Voltage Comparators
* CA339 - Quad Voltage Comparators
* CD4050B - CMOS Hex Non-Inverting Buffer and Converter
* CIC2414 - CMOS RAM suspects
* DS1210 - NVRAM controller, inhibits access and supply battery power on power down
@ -267,7 +267,7 @@ public:
{ }
private:
required_device<m6800_cpu_device> m_maincpu;
// virtual void machine_reset() override { m_maincpu->reset(); LOG("--->%s()\n", FUNCNAME); };
// virtual void machine_reset() override { m_maincpu->reset(); LOG("--->%s()\n", FUNCNAME); };
required_device<pia6821_device> m_pia1;
required_device<pia6821_device> m_pia2;
//required_device<pia6821_device> m_pia3;

16
src/mame/drivers/tmc600.cpp
View File

@ -88,9 +88,9 @@ Notes:
/*
TODO
TODO
- connect expansion bus
- connect expansion bus
*/
@ -260,7 +260,7 @@ static MACHINE_CONFIG_START( tmc600 )
MCFG_COSMAC_EF2_CALLBACK(READLINE(tmc600_state, ef2_r))
MCFG_COSMAC_EF3_CALLBACK(READLINE(tmc600_state, ef3_r))
MCFG_COSMAC_Q_CALLBACK(WRITELINE(tmc600_state, q_w))
MCFG_COSMAC_SC_CALLBACK(WRITE8(tmc600_state, sc_w))
MCFG_COSMAC_SC_CALLBACK(WRITE8(tmc600_state, sc_w))
// sound and video hardware
MCFG_FRAGMENT_ADD(tmc600_video)
@ -269,7 +269,7 @@ static MACHINE_CONFIG_START( tmc600 )
MCFG_DEVICE_ADD(CDP1852_KB_TAG, CDP1852, XTAL_3_57MHz/8) // clock is CDP1802 TPB
MCFG_CDP1852_MODE_CALLBACK(VCC)
// address bus demux for expansion bus
// address bus demux for expansion bus
MCFG_DEVICE_ADD(CDP1852_BUS_TAG, CDP1852, 0) // clock is expansion bus TPA
MCFG_CDP1852_MODE_CALLBACK(GND)
@ -306,8 +306,8 @@ ROM_START( tmc600s1 )
ROM_SYSTEM_BIOS( 0, "sb040282", "SB040282" )
ROMX_LOAD( "190482", 0x4000, 0x1000, NO_DUMP, ROM_BIOS(1) )
ROM_SYSTEM_BIOS( 1, "sbdos", "SBDOS" )
ROMX_LOAD( "190482_", 0x4000, 0x1000, NO_DUMP, ROM_BIOS(2) )
ROMX_LOAD( "190482_v", 0x5000, 0x1000, NO_DUMP, ROM_BIOS(2) )
ROMX_LOAD( "190482_", 0x4000, 0x1000, NO_DUMP, ROM_BIOS(2) )
ROMX_LOAD( "190482_v", 0x5000, 0x1000, NO_DUMP, ROM_BIOS(2) )
ROM_REGION( 0x1000, "chargen", 0 )
ROM_LOAD( "chargen", 0x0000, 0x1000, CRC(93f92cbf) SHA1(371156fb38fa5319c6fde537ccf14eed94e7adfb) )
@ -323,8 +323,8 @@ ROM_START( tmc600s2 )
ROM_SYSTEM_BIOS( 0, "sb040282", "SB040282" )
ROMX_LOAD( "151182", 0x4000, 0x1000, CRC(c1a8d9d8) SHA1(4552e1f06d0e338ba7b0f1c3a20b8a51c27dafde), ROM_BIOS(1) )
ROM_SYSTEM_BIOS( 1, "sbdos", "SBDOS" )
ROMX_LOAD( "151182_", 0x4000, 0x1000, NO_DUMP, ROM_BIOS(2) )
ROMX_LOAD( "151182_v", 0x5000, 0x1000, NO_DUMP, ROM_BIOS(2) )
ROMX_LOAD( "151182_", 0x4000, 0x1000, NO_DUMP, ROM_BIOS(2) )
ROMX_LOAD( "151182_v", 0x5000, 0x1000, NO_DUMP, ROM_BIOS(2) )
ROM_REGION( 0x1000, "chargen", 0 )
ROM_LOAD( "chargen", 0x0000, 0x1000, CRC(93f92cbf) SHA1(371156fb38fa5319c6fde537ccf14eed94e7adfb) )

4
src/mame/drivers/ts3000.cpp
View File

@ -18,11 +18,11 @@ class ts3000_state : public driver_device
public:
ts3000_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// , m_maincpu(*this, "maincpu")
// , m_maincpu(*this, "maincpu")
{ }
private:
// required_device<cpu_device> m_maincpu;
// required_device<cpu_device> m_maincpu;
};
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, ts3000_state )

4
src/mame/drivers/vectrix.cpp
View File

@ -23,11 +23,11 @@ class vectrix_state : public driver_device
public:
vectrix_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// , m_maincpu(*this, "maincpu")
// , m_maincpu(*this, "maincpu")
{ }
private:
// required_device<cpu_device> m_maincpu;
// required_device<cpu_device> m_maincpu;
};
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, vectrix_state )

4
src/mame/drivers/wyse.cpp
View File

@ -36,11 +36,11 @@ class wyse_state : public driver_device
public:
wyse_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// , m_maincpu(*this, "maincpu")
// , m_maincpu(*this, "maincpu")
{ }
private:
// required_device<cpu_device> m_maincpu;
// required_device<cpu_device> m_maincpu;
};
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, wyse_state )

6
src/mame/drivers/zt8802.cpp
View File

@ -22,15 +22,15 @@ class zt8802_state : public driver_device
public:
zt8802_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// , m_maincpu(*this, "maincpu")
// , m_maincpu(*this, "maincpu")
{ }
private:
// required_device<cpu_device> m_maincpu;
// required_device<cpu_device> m_maincpu;
};
//static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, zt8802_state )
// AM_RANGE(0x80000,0xfffff) AM_ROM AM_REGION("roms", 0)
// AM_RANGE(0x80000,0xfffff) AM_ROM AM_REGION("roms", 0)
//ADDRESS_MAP_END
static INPUT_PORTS_START( zt8802 )

2
src/mame/drivers/zx.cpp
View File

@ -2,7 +2,7 @@
// copyright-holders: Olivier Galibert, Juergen Buchmueller, Krzysztof Strzecha, Robbbert
/***************************************************************************
ZX-80/ZX-81 and derivatives
ZX-80/ZX-81 and derivatives
Original driver by:
Juergen Buchmueller, Dec 1999

6
src/mame/includes/gladiatr.h
View File

@ -175,7 +175,7 @@ public:
DECLARE_WRITE8_MEMBER(ppking_video_registers_w);
DECLARE_WRITE8_MEMBER(ppking_adpcm_w);
DECLARE_WRITE8_MEMBER(cpu2_irq_ack_w);
DECLARE_DRIVER_INIT(ppking);
DECLARE_MACHINE_RESET(ppking);
@ -186,7 +186,7 @@ public:
private:
required_shared_ptr<uint8_t> m_nvram;
required_device<generic_latch_8_device> m_soundlatch2;
struct
{
uint8_t rxd;
@ -195,7 +195,7 @@ private:
uint8_t state;
uint8_t packet_type;
} m_mcu[2];
bool mcu_parity_check();
void mcu_input_check();
};

4
src/mame/includes/metro.h
View File

@ -112,7 +112,7 @@ public:
protected:
virtual void machine_start() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
private:
/* devices */
required_device<cpu_device> m_maincpu;
@ -158,7 +158,7 @@ private:
/* misc */
int m_gakusai_oki_bank_lo;
int m_gakusai_oki_bank_hi;
void update_irq_state();
void metro_common();
void gakusai_oki_bank_set();

2
src/mame/includes/pgm2.h
View File

@ -80,7 +80,7 @@ private:
std::unique_ptr<uint32_t[]> m_spritebufferram; // buffered spriteram
bitmap_ind16 m_sprite_bitmap;
void skip_sprite_chunk(int &palette_offset, uint32_t maskdata, int reverse);
void draw_sprite_pixel(const rectangle &cliprect, int palette_offset, int realx, int realy, int pal);
void draw_sprite_chunk(const rectangle &cliprect, int &palette_offset, int x, int realy, int sizex, int xdraw, int pal, uint32_t maskdata, uint32_t zoomx_bits, int growx, int &realxdraw, int realdraw_inc, int palette_inc);

4
src/mame/includes/ssozumo.h
View File

@ -58,11 +58,11 @@ private:
required_shared_ptr<uint8_t> m_colorram;
required_shared_ptr<uint8_t> m_videoram2;
required_shared_ptr<uint8_t> m_colorram2;
tilemap_t *m_bg_tilemap;
tilemap_t *m_fg_tilemap;
uint8_t m_sound_nmi_mask;
uint8_t m_color_bank;
void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect);
};

14
src/mame/includes/tmc600.h
View File

@ -16,13 +16,13 @@
#include "sound/cdp1869.h"
#include "speaker.h"
#define SCREEN_TAG "screen"
#define CDP1802_TAG "cdp1802"
#define CDP1869_TAG "cdp1869"
#define CDP1852_KB_TAG "cdp1852_kb"
#define CDP1852_BUS_TAG "cdp1852_bus"
#define CDP1852_TMC700_TAG "cdp1852_printer"
#define CENTRONICS_TAG "centronics"
#define SCREEN_TAG "screen"
#define CDP1802_TAG "cdp1802"
#define CDP1869_TAG "cdp1869"
#define CDP1852_KB_TAG "cdp1852_kb"
#define CDP1852_BUS_TAG "cdp1852_bus"
#define CDP1852_TMC700_TAG "cdp1852_printer"
#define CENTRONICS_TAG "centronics"
#define TMC600_PAGE_RAM_SIZE 0x400
#define TMC600_PAGE_RAM_MASK 0x3ff

18
src/mame/machine/kay_kbd.cpp
View File

@ -122,7 +122,7 @@ ROM_START(kaypro_10_keyboard)
ROM_END
INPUT_PORTS_START(kaypro_keyboard_typewriter)
PORT_START("ROW.0")
PORT_START("ROW.0")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0_PAD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) PORT_NAME("Pad 0")
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H')
@ -132,7 +132,7 @@ INPUT_PORTS_START(kaypro_keyboard_typewriter)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD)) PORT_NAME("Pad 9")
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) // 0xf8
PORT_START("ROW.1")
PORT_START("ROW.1")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) // 0xa5
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R')
@ -142,7 +142,7 @@ INPUT_PORTS_START(kaypro_keyboard_typewriter)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) PORT_NAME("Pad 8")
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) // 0xf7
PORT_START("ROW.2")
PORT_START("ROW.2")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) // 0xa4
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T')
@ -152,7 +152,7 @@ INPUT_PORTS_START(kaypro_keyboard_typewriter)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) PORT_NAME("Pad 7")
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) // 0xf6
PORT_START("ROW.3")
PORT_START("ROW.3")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_RALT) PORT_CHAR(10) PORT_NAME("LINE FEED")
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
@ -162,7 +162,7 @@ INPUT_PORTS_START(kaypro_keyboard_typewriter)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) // 0xe0
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) // 0xf5
PORT_START("ROW.4")
PORT_START("ROW.4")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) // 0xa3
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')
@ -172,7 +172,7 @@ INPUT_PORTS_START(kaypro_keyboard_typewriter)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) PORT_NAME("BACK SPACE")
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT))
PORT_START("ROW.5")
PORT_START("ROW.5")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K')
@ -182,7 +182,7 @@ INPUT_PORTS_START(kaypro_keyboard_typewriter)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('`') PORT_CHAR('~')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT))
PORT_START("ROW.6")
PORT_START("ROW.6")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')
@ -192,7 +192,7 @@ INPUT_PORTS_START(kaypro_keyboard_typewriter)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP))
PORT_START("ROW.7")
PORT_START("ROW.7")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) // 0xa2
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
@ -202,7 +202,7 @@ INPUT_PORTS_START(kaypro_keyboard_typewriter)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN))
PORT_START("ROW.8")
PORT_START("ROW.8")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) // 0xa1
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F')

4
src/mame/machine/kay_kbd.h
View File

@ -36,8 +36,8 @@ protected:
DECLARE_READ8_MEMBER(p2_r);
DECLARE_WRITE8_MEMBER(p2_w);
DECLARE_READ_LINE_MEMBER(t1_r);
DECLARE_READ8_MEMBER(bus_r);
DECLARE_WRITE8_MEMBER(bus_w);
DECLARE_READ8_MEMBER(bus_r);
DECLARE_WRITE8_MEMBER(bus_w);
private:
required_device<cpu_device> m_mcu;

2
src/mame/machine/trs80.cpp
View File

@ -207,7 +207,7 @@ READ8_MEMBER( trs80_state::trs80m4_ff_r )
READ8_MEMBER( trs80_state::cp500_a11_flipflop_toggle )
{
/* The A11 flipflop is used for enabling access to
the system monitor code at the EPROM address range 3800-3fff */
the system monitor code at the EPROM address range 3800-3fff */
uint8_t *rom = memregion("maincpu")->base();
uint8_t *bootrom = memregion("bootrom")->base();
int block;

22
src/mame/mame.lst
View File

@ -2283,11 +2283,11 @@ at486 // 19?? IBM AT 486
atvga // 19?? AT VGA
at386sx // 19?? AT VGA 386sx
c386sx16 // 1990 Commodore 386SX-16
pc30iii // Commodore PC 30-III
pc40iii // Commodore PC 40-III
mbc28 // Sanyo MBC-28
comportiii // Compaq Portable III
pcd2 // Siemens PCD-2
pc30iii // Commodore PC 30-III
pc40iii // Commodore PC 40-III
mbc28 // Sanyo MBC-28
comportiii // Compaq Portable III
pcd2 // Siemens PCD-2
ct386sx //
ec1842 //
ec1849 //
@ -2666,7 +2666,7 @@ cshift // (c) 1984
gghost // (c) 1984
gimeabrk // (c) 1985
grudge // prototype - Bally/Midway
grudgep //
grudgep //
hattrick // (c) 1984
teamht //
minigolf // (c) 1985
@ -17166,18 +17166,18 @@ wndrplnt // (c) 1987 Data East Corporation (Japan)
kas89 // 1989, SFC S.R.L.
@source:kaypro.cpp
kaypro1 // Kaypro 1
kaypro10 // Kaypro 10/83
kaypro1 // Kaypro 1
kaypro10 // Kaypro 10/83
kaypro1084 // Kaypro 10/84
kaypro2x // Kaypro 2x
kaypro4x // Kaypro 4x
kaypro284 // Kaypro 2 - 2/84
kaypro284 // Kaypro 2 - 2/84
kaypro484 // Kaypro 4 - 4/84
kayproiip88 // Kaypro II - 4/83 w/plus88 board installed
kaypro484p88 // Kaypro 4/84 - 4/84 w/plus88 board installed
kayproii // Kaypro II - 2/83
kayproiv // Kaypro IV - 4/83
kaypronew2 // Kaypro new 2
kayproiv // Kaypro IV - 4/83
kaypronew2 // Kaypro new 2
omni2 // Omni II
omni4 // Omni 4
robie // Kaypro Robie

2
src/mame/video/fmtowns.cpp
View File

@ -1273,7 +1273,7 @@ void towns_state::towns_crtc_draw_scan_layer_16(bitmap_rgb32 &bitmap,const recta
int linesize;
uint32_t scroll;
palette_device* pal = (layer == 0) ? m_palette16_0 : m_palette16_1;
if(m_video.towns_display_page_sel != 0)
off = 0x20000;

4
src/mame/video/k051960.cpp
View File

@ -38,7 +38,7 @@ memory map:
001 W Devastators sets bit 1, function unknown.
Ultraman sets the register to 0x0f.
None of the other games I tested seem to set this register to other than 0.
Update: Chequered Flag sets bit 0 when background should be dimmed (palette control?)
Update: Chequered Flag sets bit 0 when background should be dimmed (palette control?)
002-003 W selects the portion of the gfx ROMs to be read.
004 W Aliens uses this to select the ROM bank to be read, but Punk Shot
and TMNT don't, they use another bit of the registers above. Many
@ -347,7 +347,7 @@ WRITE8_MEMBER( k051960_device::k051937_w )
}
else
{
// popmessage("%04x: write %02x to 051937 address %x", space.device().safe_pc(), data, offset);
// popmessage("%04x: write %02x to 051937 address %x", space.device().safe_pc(), data, offset);
//logerror("%04x: write %02x to unknown 051937 address %x\n", space.device().safe_pc(), data, offset);
}
}

2
src/mame/video/k051960.h
View File

@ -58,7 +58,7 @@ public:
template <class Object> static devcb_base &set_vreg_contrast_handler(device_t &device, Object &&cb)
{ return downcast<k051960_device &>(device).m_vreg_contrast_handler.set_callback(std::forward<Object>(cb)); }
// static configuration
static void set_k051960_callback(device_t &device, k051960_cb_delegate callback) { downcast<k051960_device &>(device).m_k051960_cb = callback; }
static void set_plane_order(device_t &device, int order);

2
src/mame/video/lasso.cpp
View File

@ -93,7 +93,7 @@ PALETTE_INIT_MEMBER(lasso_state,wwjgtin)
{
uint8_t ctabentry;
int raw_pen = i - 0x40;
if (raw_pen & 0x03)
ctabentry = (((raw_pen & 0xf0) >> 2) + (raw_pen & 0x03)) & 0x3f;
else

2
src/mame/video/mainevt.cpp
View File

@ -65,7 +65,7 @@ K051960_CB_MEMBER(mainevt_state::mainevt_sprite_callback)
K051960_CB_MEMBER(mainevt_state::dv_sprite_callback)
{
enum { sprite_colorbase = 128 / 16 };
// enable shadow if upper bits are 0
*shadow = ((*color & 0xe0) >> 5) == 0;

12
src/mame/video/metro.cpp
View File

@ -2,8 +2,8 @@
// copyright-holders:Luca Elia, David Haywood
/***************************************************************************
(legacy metro.cpp, currently contains Blazing Tornado overrides,
to be moved into its own driver file!)
(legacy metro.cpp, currently contains Blazing Tornado overrides,
to be moved into its own driver file!)
***************************************************************************/
@ -52,14 +52,14 @@ TILEMAP_MAPPER_MEMBER(metro_state::tilemap_scan_gstrik2)
VIDEO_START_MEMBER(metro_state,blzntrnd)
{
m_k053936_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(metro_state::metro_k053936_get_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 256, 512);
m_screen->register_screen_bitmap(m_vdp_bitmap);
}
VIDEO_START_MEMBER(metro_state,gstrik2)
{
m_k053936_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(metro_state::metro_k053936_gstrik2_get_tile_info),this), tilemap_mapper_delegate(FUNC(metro_state::tilemap_scan_gstrik2),this), 16, 16, 128, 256);
m_screen->register_screen_bitmap(m_vdp_bitmap);
}
@ -68,11 +68,11 @@ uint32_t metro_state::screen_update_psac_vdp2_mix(screen_device &screen, bitmap_
/* TODO: bit 5 of reg 7 is off when ROZ is supposed to be disabled
* (Blazing Tornado title screen/character select/ending and Grand Striker 2 title/how to play transition)
*/
bitmap.fill(m_vdp2->get_background_pen(), cliprect);
m_k053936->zoom_draw(screen, bitmap, cliprect, m_k053936_tilemap, 0, 0, 1);
m_vdp2->screen_update(screen, m_vdp_bitmap, cliprect);
copybitmap_trans(bitmap, m_vdp_bitmap, 0, 0, 0, 0, cliprect, m_vdp2->get_background_pen());
return 0;
}

6
src/mame/video/pgm2.cpp
View File

@ -57,7 +57,7 @@ inline void pgm2_state::draw_sprite_chunk(const rectangle &cliprect, int &palett
if (pix)
{
if (xzoombit) draw_sprite_pixel(cliprect, palette_offset, x + realxdraw, realy, pal);
palette_offset += palette_inc;
palette_offset &= m_sprites_colour_mask;
}
@ -150,7 +150,7 @@ void pgm2_state::draw_sprites(screen_device &screen, const rectangle &cliprect,
for (int i = 0; i < endoflist-2; i += 4)
{
//printf("sprite with %08x %08x %08x %08x\n", spriteram[i + 0], spriteram[i + 1], spriteram[i + 2], spriteram[i + 3]);
int x = (spriteram[i + 0] & 0x000007ff) >> 0;
int y = (spriteram[i + 0] & 0x003ff800) >> 11;
int pal = (spriteram[i + 0] & 0x0fc00000) >> 22;
@ -173,7 +173,7 @@ void pgm2_state::draw_sprites(screen_device &screen, const rectangle &cliprect,
// unk0 & 0x40000000 set during gameplay on kov2nl, why? more pri bits?
//popmessage("sprite rendering unused bits set unk0 %08x unk1 %08x\n", unk0, unk1);
}
int mask_offset = (spriteram[i + 2]<<1);
int palette_offset = (spriteram[i + 3]);

2
src/mame/video/tmc600.cpp
View File

@ -76,7 +76,7 @@ WRITE_LINE_MEMBER( tmc600_state::prd_w )
case 8:
m_maincpu->int_w(CLEAR_LINE);
break;
case 16:
m_maincpu->int_w(m_rtc_int);
m_blink = !m_blink;