From fd4f5150247460fbbeaa556515f2229052c23abe Mon Sep 17 00:00:00 2001 From: 987123879113 <63495610+987123879113@users.noreply.github.com> Date: Tue, 18 Apr 2023 23:49:56 +0900 Subject: [PATCH] namco/namcos10.cpp: More dumps/redumps, new decryption devices, and more I/O emulation. (#11114) * Implemented the basics of the MEM(P3) memory/I/O board. * Added controls for more games. * Marked Pacman BALL as a bad dump. * Marked all games as MACHINE_IMPERFECT_SOUND in anticipation of complaints. * cpu/tlcs900/tmp95c061.cpp: Added basic ADC support (based on TMP95C063). * namco/namcos10_exio.cpp: Added System 10 I/O expander board (EXIO) emulation. * namco/ns10crypt.cpp: Moved per-game decryption setup to client configuration. * Added decryption setups for GAHAHA Ippatsudou, Golgo 13: Juusei no Requiem, Sekai Kaseki Hakken, Pacman BALL, Medal no Tatsujin, Medal no Tatsujin 2 and Sugorotic JAPAN. [Samuel Neves, Peter Wilhelmsen] Systems promoted to working ---------------------------- GAHAHA Ippatsudou (World, GID2 Ver.A) [Samuel Neves, Peter Wilhelmsen, Windy Fairy] GAHAHA Ippatsudou 2 (Japan, GIS1 Ver.A) [Samuel Neves, Peter Wilhelmsen, Windy Fairy] Golgo 13: Juusei no Requiem (Japan, GLT1 VER.A) [Samuel Neves, Peter Wilhelmsen, Windy Fairy] Kotoba no Puzzle Mojipittan (Japan, KPM1 Ver.A) [Brizzo, Smitdogg, The Dumping Union, Windy Fairy] New systems marked not working -------------------------------- Sugorotic JAPAN (STJ1 Ver.C) [Brizzo, Smitdogg, The Dumping Union] Tsukkomi Yousei Gips Nice Tsukkomi (NTK1 Ver.A) [Guru] --- src/devices/cpu/tlcs900/tmp95c061.cpp | 41 +- src/devices/cpu/tlcs900/tmp95c061.h | 4 + src/emu/xtal.cpp | 1 + src/mame/mame.lst | 26 +- src/mame/namco/namcos10.cpp | 1956 ++++++++++++++++++------- src/mame/namco/namcos10_exio.cpp | 300 ++++ src/mame/namco/namcos10_exio.h | 132 ++ src/mame/namco/ns10crypt.cpp | 306 +--- src/mame/namco/ns10crypt.h | 119 +- 9 files changed, 1990 insertions(+), 895 deletions(-) create mode 100644 src/mame/namco/namcos10_exio.cpp create mode 100644 src/mame/namco/namcos10_exio.h diff --git a/src/devices/cpu/tlcs900/tmp95c061.cpp b/src/devices/cpu/tlcs900/tmp95c061.cpp index d297ba73fcf..3fd8be4fe32 100644 --- a/src/devices/cpu/tlcs900/tmp95c061.cpp +++ b/src/devices/cpu/tlcs900/tmp95c061.cpp @@ -30,6 +30,7 @@ tmp95c061_device::tmp95c061_device(const machine_config &mconfig, const char *ta m_porta_write(*this), m_portb_read(*this), m_portb_write(*this), + m_an_read(*this), m_port_latch{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, m_port_control{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, m_port_function{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, @@ -206,6 +207,7 @@ void tmp95c061_device::device_start() m_porta_write.resolve_safe(); m_portb_read.resolve_safe(0); m_portb_write.resolve_safe(); + m_an_read.resolve_all_safe(0); } void tmp95c061_device::device_reset() @@ -550,15 +552,29 @@ void tmp95c061_device::tlcs900_handle_ad() if ( m_ad_cycles_left <= 0 ) { /* Store A/D converted value */ - switch( m_ad_mode & 0x03 ) + if ( ( m_ad_mode & 0x10 ) == 0 ) { - case 0x00: /* AN0 */ - m_ad_result[0] = 0x3ff; - break; - case 0x01: /* AN1 */ - case 0x02: /* AN2 */ - case 0x03: /* AN3 */ - break; + /* conversion channel fixed */ + m_ad_result[m_ad_mode & 0x03] = m_an_read[m_ad_mode & 0x03](0) & 0x3ff; + } + else + { + /* conversion channel sweep */ + switch( m_ad_mode & 0x03 ) + { + case 0x03: /* AN3 */ + m_ad_result[3] = m_an_read[3](0) & 0x3ff; + [[fallthrough]]; + case 0x02: /* AN2 */ + m_ad_result[2] = m_an_read[2](0) & 0x3ff; + [[fallthrough]]; + case 0x01: /* AN1 */ + m_ad_result[1] = m_an_read[1](0) & 0x3ff; + [[fallthrough]]; + case 0x00: /* AN0 */ + m_ad_result[0] = m_an_read[0](0) & 0x3ff; + break; + } } /* Clear BUSY flag, set END flag */ @@ -1355,10 +1371,15 @@ void tmp95c061_device::ode_w(uint8_t data) uint8_t tmp95c061_device::adreg_r(offs_t offset) { + // ADMOD EOCF is cleared to 0 when reading any ADREG0..3 + m_ad_mode &= ~0x80; + if (BIT(offset, 0)) return m_ad_result[offset >> 1] >> 2; - else - return m_ad_result[offset >> 1] << 6 | 0x3f; + + // Reading data from the upper 8 bits clears INTE0AD IADC + m_int_reg[TMP95C061_INTE0AD] &= ~0x80; + return m_ad_result[offset >> 1] << 6 | 0x3f; } uint8_t tmp95c061_device::admod_r() diff --git a/src/devices/cpu/tlcs900/tmp95c061.h b/src/devices/cpu/tlcs900/tmp95c061.h index 10d8193f6e6..106ca5c57ce 100644 --- a/src/devices/cpu/tlcs900/tmp95c061.h +++ b/src/devices/cpu/tlcs900/tmp95c061.h @@ -33,6 +33,7 @@ public: auto porta_write() { return m_porta_write.bind(); } auto portb_read() { return m_portb_read.bind(); } auto portb_write() { return m_portb_write.bind(); } + template auto an_read() { return m_an_read[Bit].bind(); } protected: virtual void device_config_complete() override; @@ -183,6 +184,9 @@ private: devcb_read8 m_portb_read; devcb_write8 m_portb_write; + // analogue inputs, sampled at 10 bits + devcb_read16::array<4> m_an_read; + // I/O Port Control uint8_t m_port_latch[0xc]; uint8_t m_port_control[0xc]; diff --git a/src/emu/xtal.cpp b/src/emu/xtal.cpp index 18190ddda56..0dc759b3cc6 100644 --- a/src/emu/xtal.cpp +++ b/src/emu/xtal.cpp @@ -241,6 +241,7 @@ const double XTAL::known_xtals[] = { 14'742'800, /* 14.7428_MHz_XTAL ADM 23 */ 14'745'000, /* 14.745_MHz_XTAL Synertek KTM-3 */ 14'745'600, /* 14.7456_MHz_XTAL Namco System 12 & System Super 22/23 for JVS */ + 14'746'000, /* 14.746_MHz_XTAL Namco System 10 MGEXIO */ 14'784'000, /* 14.784_MHz_XTAL Zenith Z-29 */ 14'916'000, /* 14.916_MHz_XTAL ADDS Viewpoint 122 */ 14'976'000, /* 14.976_MHz_XTAL CIT-101 80-column display clock */ diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 9ba0503c213..779480463d8 100755 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -32409,37 +32409,39 @@ valkyrie // (c) 1989 (Japan) @source:namco/namcos10.cpp ballpom // 2005.02 Ball Pom Line chocovdr // 2002.10 Uchuu Daisakusen : Chocovader Contactee -g13jnc // 2001.?? Golgo 13: Juusei no Chinkonka (Japan, GLT1 VER.A) -gahaha // 2000.?? GAHAHA Ippatsudou (World, GID2 Ver.A) -gahaha2 // 2001.?? GAHAHA Ippatsudou 2 (Japan, GIS1 Ver.A) +g13jnr // 2001.07 Golgo 13: Juusei no Requiem (Japan, GLT1 VER.A) +gahaha // 2000.03 GAHAHA Ippatsudou (World, GID2 Ver.A) +gahaha2 // 2001.09 GAHAHA Ippatsudou 2 (Japan, GIS1 Ver.A) gamshara // 2002.08 Gamshara (10021 Ver.A) gamsharaj // 2002.08 Gamshara (10021 Ver.A) -gegemdb // 2007.?? Gegege no Kitarō Yōkai Yokochō Matsuri De Batoru Ja (GYM1 Ver.A) +gegemdb // 2007.12 Gegege no Kitarō Yōkai Yokochō Matsuri De Batoru Ja (GYM1 Ver.A) gjspace // 2001.12 Gekitoride-Jong Space (10011 Ver.A) gunbalina // 2000.12 Gunbalina (GNN1 Ver.A) -kd2001 // 2001.1? Knock Down 2001 (KD11 Ver.B) -keroro // 2006.?? Keroro Gunso Chikyu Shinryaku Shirei Dearimasu! (KRG1 Ver.A) +kd2001 // 2001.11 Knock Down 2001 (KD11 Ver.B) +keroro // 2006.08 Keroro Gunso Chikyu Shinryaku Shirei Dearimasu! (KRG1 Ver.A) knpuzzle // 2001.12 Kotoba no Puzzle Mojipittan (KPM1 Ver.A) -konotako // 2003.?? Kono e Tako (10021 Ver.A) +konotako // 2003.11 Kono e Tako (10021 Ver.A) +medalnt // 2005.04 Medal No Tatsujin Doki! Ooatari-Darake No Sugoroku Matsuri (MTL1 SPR0B) medalnt2 // 2007.02 Medal no Tatsujin 2 Atsumare! Go! Go! Sugoroku Sentai Don Ranger Five (MTA1 STMPR0A) -mrdrilr2 // 2000.?? Mr Driller 2 (DR22 Ver.A) +mrdrilr2 // 2000.07 Mr Driller 2 (DR22 Ver.A) mrdrilr2j // 2000.07 Mr Driller 2 (DR21 Ver.A) -mrdrilr2u // 2000.?? Mr Driller 2 (DR23 Ver.A) +mrdrilr2u // 2000.07 Mr Driller 2 (DR23 Ver.A) mrdrilrg // 2001.03 Mr. Driller G (DRG1 Ver.A) nflclsfb // 2003.?? NFL Classic Football +nicetsuk // 2002.07 Tsukkomi Yousei Gips Nice Tsukkomi (NTK1 Ver.A) pacmball // 2003.?? Pacman Ball panikuru // 2002.03 Panicuru Panekuru ptblank3 // 2000.12 Point Blank 3 (GNN2 Ver.A) puzzball // 2002.02 Puzz Ball (Japan, PZB1 Ver.A) -sekaikh // 2004.0? Sekai Kaseki Hakken (Japan, SKH1 Ver.B) -sekaikha // 2004.04 Sekai Kaseki Hakken (Japan, SKH1 Ver.A) +sekaikh // 2004.03 Sekai Kaseki Hakken (Japan, SKH1 Ver.B) +sekaikha // 2004.03 Sekai Kaseki Hakken (Japan, SKH1 Ver.A) startrgn // 2002.07 Star Trigon (STT1 Ver.A) +sugorotic // 2002.02 Sugorotic JAPAN (STJ1 Ver.C) taiko2 // 2001.08 Taiko no Tatsujin 2 (Japan, TK21 Ver.C) taiko3 // 2002.03 Taiko no Tatsujin 3 (Japan, TK31 Ver.A) taiko4 // 2002.12 Taiko no Tatsujin 4 (Japan, TK41 Ver.A) taiko5 // 2003.10 Taiko no Tatsujin 5 (Japan, TK51 Ver.A) taiko6 // 2004.07 Taiko no Tatsujin 6 (Japan, TK61 Ver.A) -unks10md // 200?.?? unknown Namco System 10 medal game (MTL1 SPRB0) @source:namco/namcos11.cpp danceyes // 1996.09 Dancing Eyes (World, DC2/VER.B) diff --git a/src/mame/namco/namcos10.cpp b/src/mame/namco/namcos10.cpp index 984cffa5a8a..b971993da47 100644 --- a/src/mame/namco/namcos10.cpp +++ b/src/mame/namco/namcos10.cpp @@ -13,80 +13,90 @@ Guru Readme for Namco System 10 Hardware Note! This document is a Work-In-Progress and will be updated from time to time when more dumps are available. This document covers all the known Namco System 10 games, including.... -*Drum Master (C) Namco, 2001 -*Drum Master 2 (C) Namco, 2001 -*Drum Master 3 (C) Namco, 2002 -*Drum Master 4 (C) Namco, 2003 -*Drum Master 5 (C) Namco, 2003 -*Drum Master 6 (C) Namco, 2004 -*Drum Master 7 (C) Namco, 2005 +*Aim For Cash (AFC2 Ver.A) (C) Namco, 2004 +Ball Pom Line (no sticker, ROM VER. B0 FEB 09 2005 15:29:02) (C) Namco, 2005 +*Dice ROM (C) Namco, 2004 +*Dokidoki! Flower (C) Namco, 2004 +***Drum Master (C) Namco, 2001 +***Drum Master 2 (C) Namco, 2001 +***Drum Master 3 (C) Namco, 2002 +***Drum Master 4 (C) Namco, 2003 +***Drum Master 5 (C) Namco, 2003 +***Drum Master 6 (C) Namco, 2004 GAHAHA Ippatsu-dou (GID2 Ver.A) (C) Namco/Metro, 2000 GAHAHA Ippatsu-dou 2 (GIS1 Ver.A) (C) Namco/Metro, 2001 Gamshara (10021 Ver.A) (C) Mitchell, 2003 -Gegege no Kitarō Yōkai Yokochō Matsuri De Batoru Ja (GYM1 Ver.A) (C) Namco, 2007 +Gegege no Kitaro Yokai Yokocho Matsuri De Batoru Ja (GYM1 Ver.A) (C) Namco, 2007 Gekitoride-Jong Space (10011 Ver.A) (C) Namco/Metro, 2001 -Golgo 13 Juusei no Chinkonka (GLT1 Ver.A) (C) Namco/8ing/Raizing, 2001 +Golgo 13 Juusei no Requiem (GLT1 Ver.A) (C) Namco/8ing/Raizing, 2001 Gunbalina (GNN1 Ver. A) (C) Namco, 2000 -*Hard Puncher Hajime no Ippo 2 Ouja e no Chousen (C) Namco/Taito, 2002 +*Hard Puncher Hajime no Ippo: The Fighting (C) Namco/Taito, 2001 +*Hard Puncher Hajime no Ippo 2: The Fighting Round 2 (VER.2.00J) (C) Namco/Taito, 2002 *Honne Hakkenki (C) Namco, 2001 -Keroro Gunsō Chikyū Shinryaku Shirei Dearimasu! (KRG1 Ver.A) (C) Namco, 2006 -**Knock Down 2001 (C) Namco, 2001 +Keroro Gunso Chikyu Shinryaku Shirei Dearimasu! (KRG1 Ver.A) (C) Namco, 2006 +**Knock Down 2001 / KO2001 (KD11 Ver.B) (C) Namco, 2001 +Kono e Tako (RAN Ver.A, 10021 Ver.A reprogrammed Gamshara PCB) (C) Mitchell 2003 Kotoba no Puzzle Mojipittan (KPM1 Ver.A) (C) Namco, 2001 -*Kurukuru Food (C) Namco, 2002 +Medal no Tatsujin ((MTL1 SPR0B) (C) Namco, 2005 +Medal no Tatsujin 2 (MTA1001 STMPR0A) (C) Namco, 2007 Mr Driller 2 (DR21 Ver.A) (C) Namco, 2000 Mr Driller 2 (DR22 Ver.A) (C) Namco, 2000 +Mr Driller 2 (DR23 Ver.A) (C) Namco, 2000 Mr Driller G (DRG1 Ver.A) (C) Namco, 2001 NFL Classic Football (NCF3 Ver.A) (C) Namco, 2003 Pacman Ball (PMB2 Ver.A) (C) Namco, 2003 Panicuru Panekuru (PPA1 Ver.A) (C) Namco, 2001 -*Photo Battle (C) Namco, 2001 +*Peter The Shepherd (C) Namco, 2003 +*Photo Battle (PBT1 Ver.B) (C) Namco, 2001 Point Blank 3 (GNN2 Ver. A) (C) Namco, 2000 Puzz Ball (PZB1 Ver. A) (C) Namco, 2002 -*Ren-ai Quiz High School Angel (C) Namco, 2002 -Seishun Quiz Colorful High School (CHS1 Ver.A) (C) Namco, 2002 +*Puzz Cube (C) Namco, 2005 +Seishun-Quiz Colorful High School (CHS1 Ver.A) (C) Namco, 2002 Sekai Kaseki Hakken (Japan, SKH1 Ver.A) (C) Namco, 2004 -Shamisen Brothers (C) Kato/Konami, 2003 +*Shamisen Brothers (KT-SB2 Ver.A + CDROM) (C) Kato/Konami, 2003 +*Slot no Oujisama / Slot Prince (SLO1 Ver.A),(SLO1 Ver.B) (C) Namco, 2002 Star Trigon (STT1 Ver.A) (C) Namco, 2002 -*Taiko no Tatsujin (C) Namco, 2001 -Taiko no Tatsujin 2 (TK21 Ver.C) (C) Namco, 2001 -Taiko no Tatsujin 3 (TK31 Ver.A) (C) Namco, 2002 -Taiko no Tatsujin 4 (TK41 Ver.A) (C) Namco, 2003 -Taiko no Tatsujin 5 (TK51 Ver.A) (C) Namco, 2003 -Taiko no Tatsujin 6 (TK61 Ver.A) (C) Namco, 2004 -Tsukkomi Yousei Gips Nice Tsukkomi (NTK1 Ver.A) (C) Namco/Metro, 2002 +Sugorotic Japan (STJ1 Ver.C) (C) Namco, 2002 +*Taiko no Tatsujin (with CDROM?) (C) Namco, 2001 +Taiko no Tatsujin 2 (TK21 Ver.C & CDROM TK21-A) (C) Namco, 2001 +Taiko no Tatsujin 3 (TK31 Ver.A & *CDROM) (C) Namco, 2002 +Taiko no Tatsujin 4 (TK41 Ver.A & CDROM TK-4) (C) Namco, 2003 +Taiko no Tatsujin 5 (TK51 Ver.A & *CDROM) (C) Namco, 2003 +Taiko no Tatsujin 6 (TK61 Ver.A & CDROM TK-6) (C) Namco, 2004 +Tsukkomi Yousei Gips Nice Tsukkomi (NTK1 Ver.A & *CDROM) (C) Namco/Metro, 2002 Uchuu Daisakusen Chocovader Contactee (CVC1 Ver.A) (C) Namco, 2002 -Unknown medal (?) game (MTL1 SPR0B) (C) ?, 200? -Unknown medal (?) game (peeled off sticker) (C) ?, 2005 -* - denotes not dumped yet. -** - denotes incomplete dump. +* - denotes not dumped yet. If a game code is listed a PCB has been seen. +** - denotes incomplete dump due to damaged ROMs. A redump is required. +*** - World region title, probably doesn't exist if game was only released in Japan. -The Namco System 10 system comprises 2 or 3 PCB's.... -MAIN PCB - This is the mother board PCB. It holds the main CPU/GPU & SPU and all sound circuitry, program & video RAM, +The Namco System 10 system is basically a PSOne on an arcade board with added protection. +Namco System 10 has 2 or 3 PCBs.... +MAIN PCB - This is the mother board PCB. It holds the main CPU/GPU & SPU and all sound circuitry, program RAM & video RAM, controller/input logic and video output circuitry. Basically everything except the ROMs. - There are three known revisions of this PCB so far. The differences seem very minor. The 2nd and 3rd revision + There are four known revisions of this PCB so far. The differences seem very minor. The 2nd, 3rd and 4th revisions have an updated CPLD revision. - The 3rd revision has an updated model Sony chip. The only other _noticeable_ difference is some component + The 3rd and 4th revisions have some updated model Sony chips. The only other _noticeable_ difference is some component shuffling in the sound amplification section to accommodate two extra 1000uF capacitors and one 470uF capacitor has been replaced by a 1000uF capacitor. Everything else, including all the PLDs appears to be identical. Note there are no ROMs on the Main PCB and also no custom Namco chips on System10, which seem to have been phased out. Instead, they have been replaced by (custom programmed) CPLDs, probably due to cost-cutting measures within the company, or to reduce the cost of System10 to an entry-level no-frills development platform. -MEM PCB - There are three known revisions of this PCB (so far). They're mostly identical except for the type/number of ROMs - used and the contents of the CPLD. The 2nd revision also has a RAM chip on it. The 3rd revision has some extra - hardware present to decode MP3 data. - Each game has a multi-letter code assigned to it which is printed on a small sticker and placed on the top side - of the MEM PCB. - This code is then proceeded by a number (only '1' & '2' seen so far), then 'Ver.' then A/B/C/D/E (only 'A' seen so far) - which denotes the software revision, and in some cases a sub-revision such as 1 or 2 (usually only listed in the - test mode). +MEM PCB - There are four known types of this PCB (so far). + The first type uses SSOP56 flash and TSOP48 mask ROMs. + The second type uses TSOP48 NAND ROMs and also has a RAM chip on it. + The third type uses TSOP48 NAND ROMs and has some extra hardware to decode MP3 data which comes from the ROMs or an external CDROM. + The fourth type is manufactured by Taito and is completely different but appears to use NAND ROMs. Taito uses their PCB numbering system. + Each game has a multi-letter code assigned to it which is printed on a small sticker and placed on the top side of the MEM PCB. + This code is proceeded by a number (only '1' & '2' seen so far), then 'Ver.' then A/B/C which denotes the software revision, and in + some cases a sub-revision such as 1 or 2 (usually only shown in the test mode). The first 1 denotes a Japanese version. Other numbers denote a World version. For World versions, only the main program changes, the rest of the (graphics) ROMs use the Japanese version ROMs. - If the version sticker has a red dot it means nothing as several identical versions of the same games exist with and - without the red dot. A similar red dot has also been seen on Namco System 246 security carts and means nothing. - Speculation about a red dot on a sticker is pointless and has no impact on the dumps or the emulation. + If the version sticker has a red dot it means nothing as several identical versions of the same games exist with and without the red + dot. A similar red dot has also been seen on Namco System 246 security carts and means nothing. Speculation about a red dot on a sticker + is pointless and has no impact on the dumps or the emulation. Any System 10 MEM PCB can be swapped to run on any System 10 Main PCB regardless of the main board revision. - The high scores are stored on the MEM PCB (probably inside the main program EEPROMs/FlashROMs). + The high scores are stored on the MEM PCB (inside the main program flashROM or block 1 of the first NAND chip). There are no "alt" versions with the same code, this simply means the game was dumped without first resetting the high score records and coinage/play statistics info to factory defaults. Also, on all System 10 games, there is a sticker with a serial number on it and the program ROMs also contain @@ -106,7 +116,10 @@ Revision 2 SYSTEM10 MAIN PCB 8906960104 (8906970104) Revision 3 -SYSTEM10 MAIN PCB 8906962400 (8906972400) +SYSTEM10 MAIN(B) PCB 8906962400 (8906972400) + +Revision 4 +SYSTEM10 MAIN(C) PCB 8906962503 (8906972503) |----------------------------------------------------------| | LA4705 VR1 J201 | | |----------------------| | @@ -141,52 +154,55 @@ SYSTEM10 MAIN PCB 8906962400 (8906972400) |----------------------------------------------------------| Notes: ------ - CXD8606BQ : SONY CXD8606BQ Central Processing Unit / GTE (QFP208) - - replaced by CXD8606CQ on Revision 3 Main PCB - CXD8561CQ : SONY CXD8561CQ Graphics Processor Unit (QFP208) - CXD2938Q : SONY CXD2938Q Sound Processor Unit (QFP208) - CXD1178Q : SONY CXD1178Q 8-bit RGB 3-channel D/A converter (QFP48) - CXA2067AS : SONY CXA2067AS TV/Video circuit RGB Pre-Driver (SDIP30) - CY37128VP160: CYPRESS CY37128VP160 Complex Programmable Logic Device (TQFP160, stamped 'S10MA1') + CXD8606BQ - SONY CXD8606BQ Central Processing Unit / GTE (QFP208) + - replaced by CXD8606CQ on Revision 3 & 4 Main PCB + CXD8561CQ - SONY CXD8561CQ Graphics Processor Unit (QFP208) + CXD2938Q - SONY CXD2938Q Sound Processor Unit (QFP208) + - replaced with CXD2941R on Revision 4 Main PCB + CXD1178Q - SONY CXD1178Q 8-bit RGB 3-channel D/A converter (QFP48) + CXA2067AS - SONY CXA2067AS TV/Video circuit RGB Pre-Driver (SDIP30) + CY37128VP160 - CYPRESS CY37128VP160 Complex Programmable Logic Device (TQFP160, stamped 'S10MA1') - replaced by an updated revision on Revision 2 & 3 Main PCB and stamped 'S10MA1B' - EPM3064 : Altera MAX EPM3064ATC100-10 Complex Programmable Logic Device (TQFP100, stamped 'S10MA2A') - GAL16V8D : GAL16V8D PAL (PLCC20, stamped 'S10MA3A') - IS41LV16100 : ISSI IS41LV16100S-50T 1M x16 EDO DRAM (x2, TSOP50(44) Type II) - IS41LV16256 : ISSI IS41LV16256-50T 256k x16 EDO DRAM (TSOP44(40) Type II) - 54V25632 : OKI 54V25632 256K x32 SGRAM (x2, QFP100) - PQ30RV31 : Sharp PQ30RV31 5 Volt to 3.3 Volt Voltage Regulator - LA4705 : LA4705 15W 2-channel Power Amplifier (SIP18) - MAX734 : MAX734 +12V 120mA Flash Memory Programming Supply Switching Regulator (SOIC8) - PST592 : PST592J System Reset IC with 2.7V detection circuit (MMP-4A) - BA3121 : Rohm BA3121 Dual Channel Ground Isolation Amplifier & Noise Eliminator (SOIC8) - JRC3414 : New Japan Radio Co. Ltd. JRC3414 Single-Supply Dual High Current Operational Amplifier (x2, SOIC8) - DSW1 : 8 position DIP switch - JP4 : 2 position jumper, set to NC, alt. position labelled SYNC (Note: changing the jumper position has no visual effect) - J1 : 40 Pin IDC connector for a flat 40-wire cable, used for games that have a DVDROM Drive - J4 : 10 pin header for extra controls etc \ (note: custom Namco 48 pin edge connector is not on System10 PCBs) - J5 : 4 pin header for stereo sound out / - J10 : 4 pin header for audio input from ROM board type 3. This audio is mixed with the other main board audio. - J201 : 100 pin custom Namco connector for mounting of MEM PCB. This connector is surface-mounted, not a thru-hole type. - J202 : 80 pin custom Namco connector for mounting of another board. This connector is surface-mounted, not a thru-hole type. - There are additional boards that plug in here and provide extra functionality. See below for the details. - J103 : 6-pin JAMMA2 power plug (Note none of the other JAMMA2 standard connectors are present) - VR1 : Volume potentiometer - * : Unpopulated position for IS41LV16100 1M x16 EDO DRAM + EPM3064 - Altera MAX EPM3064ATC100-10 Complex Programmable Logic Device (TQFP100, stamped 'S10MA2A') + GAL16V8D - GAL16V8D PAL (PLCC20, stamped 'S10MA3A') + IS41LV16100 - ISSI IS41LV16100S-50T 1M x16 EDO DRAM (x2, TSOP50(44) Type II) + IS41LV16256 - ISSI IS41LV16256-50T 256k x16 EDO DRAM (TSOP44(40) Type II) + 54V25632 - OKI 54V25632 256K x32 SGRAM (x2, QFP100) + PQ30RV31 - Sharp PQ30RV31 5 Volt to 3.3 Volt Voltage Regulator + LA4705 - LA4705 15W 2-channel Power Amplifier (SIP18) + MAX734 - MAX734 +12V 120mA Flash Memory Programming Supply Switching Regulator (SOIC8) + PST592 - PST592J System Reset IC with 2.7V detection circuit (MMP-4A) + BA3121 - Rohm BA3121 Dual Channel Ground Isolation Amplifier & Noise Eliminator (SOIC8) + JRC3414 - New Japan Radio Co. Ltd. JRC3414 Single-Supply Dual High Current Operational Amplifier (x2, SOIC8) + DSW1 - 8 position DIP switch. #1 is TEST. Most of the others might be unused on most games. + JP4 - 2 position jumper, set to NC, alt. position labelled SYNC (Note: changing the jumper position + switches the game between interlaced and non-interlaced mode) + J1 - 40 Pin IDC connector for a flat 40-wire cable, used for games that have a CDROM/DVDROM drive + J4 - 10 pin header for extra controls etc \ (note: custom Namco 48 pin edge connector is not on System10 PCBs) + J5 - 4 pin header for stereo sound out / + J10 - 4 pin header for audio input from ROM board type 3. This audio is mixed with the other main board audio. + J201 - 100 pin custom Namco connector for mounting of MEM PCB. This connector is surface-mounted, not a thru-hole type. + J202 - 80 pin custom Namco connector for mounting of another board. This connector is surface-mounted, not a thru-hole type. + There are additional boards that plug in here and provide extra functionality. See below for the details. + J103 - 6-pin JAMMA2 power plug (Note none of the other JAMMA2 standard connectors are present) + VR1 - Volume potentiometer + * - Unpopulated position for IS41LV16100 1M x16 EDO DRAM Additional Notes: 1. In test mode (Display Test) the screen can be set to interlace or non-interlace mode. The graphics in interlace mode are visually much smoother with noticeable screen flickering. Non-interlace modes gives a much blockier graphic display (i.e. lower resolution) but without screen flickering. - 2. There is no dedicated highscore/options EEPROM present on the PCB, the game stores it's settings on the - game board (probably in the program EEPROMs/FlashROMs). + 2. There is no dedicated highscore/options EEPROM present on the PCB. The game stores the settings on the + MEM PCB in the program flashROM or block 1 of the first NAND ROM. ROM Daughterboard PCBs ---------------------- This PCB holds all the ROMs. -There are three known types of ROM daughterboards used on S10 games (so far). +There are four known types of ROM daughterboards used on System 10 games (so far). All of the PCBs are the same size (approx 5" x 5") containing one custom connector surface-mounted to the underside of -the PCB, some mask ROMs/flash ROMs, a CPLD (which seems to be the customary 'KEYCUS' chip. On the 2nd type a RAM -chip is also present. The 3rd type has additional hardware to decode MP3 audio and a ROMless Microcontroller. +the PCB, some mask/flash/NAND ROMs, a CPLD (the customary Namco 'KEYCUS' chip but doing de-scrambling/decryption too). On the +2nd type a RAM chip is also present. The 3rd type has additional hardware to decode MP3 audio and a ROM-less Microcontroller. +The 4th type was manufactured by Taito. ******** *Type 1* @@ -215,23 +231,23 @@ System10 MEM(M) PCB 8906961000 (8906970700) | | |-------------------------------------| Notes: - CY37128VP160: CY37128VP160 Cypress Complex Programmable Logic Device (TQFP160) - 1A - 5A : Intel Flash DA28F640J5 64MBit Flash EEPROM (SSOP56) - 1D - 7E : Samsung Electronics K3N9V1000A-YC 128MBit mask ROM (TSOP48) (see note 3) - J1 : 6 pin header for programming the CPLD via JTAG + CY37128VP160 - CY37128VP160 Cypress Complex Programmable Logic Device (TQFP160) + 1A - 5A - Intel Flash DA28F640J5 64Mbit Flash EEPROM (SSOP56) + 1D - 7E - Samsung Electronics K3N9V1000A-YC 128Mbit mask ROM (TSOP48) (see note 3) + J1 - 6 pin header for programming the CPLD via JTAG This PCB is used on: Software MEM PCB -Game Revision Sticker KEYCUS ROMs Populated ------------------------------------------------------------------------------------- -Mr Driller 2 DR21/VER.A3 DR21 Ver.A KC001A DR21VERA.1A, DR21MA1.1D, DR21MA2.2D -Mr Driller 2 DR22/VER.A3 DR22 Ver.A KC001A DR22VERA.1A, DR21MA1.1D, DR21MA2.2D -Mr Driller 2 DR23/VER.A3 DR23 Ver.A KC001A DR23VERA.1A (no label?), DR21MA1.1D, DR21MA2.2D +Game Revision Sticker KEYCUS ROMs Populated I/O Board +------------------------------------------------------------------------------------------------ +Mr Driller 2 DR21/VER.A3 DR21 Ver.A KC001A DR21VERA.1A, DR21MA1.1D, DR21MA2.2D None +Mr Driller 2 DR22/VER.A3 DR22 Ver.A KC001A DR22VERA.1A, DR21MA1.1D, DR21MA2.2D None +Mr Driller 2 DR23/VER.A3 DR23 Ver.A KC001A DR23VERA.1A, DR21MA1.1D, DR21MA2.2D None Note - 1. The ROM PCB has locations for 4x 64MBit program ROMs, but only 1A is populated. - 2. The ROM PCB has locations for 14x 128MBit GFX ROMs (Total capacity = 2048MBits) but only 1D and 2D are populated. + 1. The ROM PCB has locations for 4x 64Mbit program ROMs, but only 1A is populated. + 2. The ROM PCB has locations for 14x 128Mbit GFX ROMs (Total capacity = 2048Mbits) but only 1D and 2D are populated. 3. These ROMs are only 18mm long, dumping them requires a special custom adapter ******** @@ -261,47 +277,55 @@ System10 MEM(N) PCB 8906961402 (8906971402) | | |-------------------------------------| Notes: - CY37256VP208: Cypress CY37256VP208 Complex Programmable Logic Device (TQFP208) - CY7C1019 : Cypress CY7C1019BV33-15VC or Samsung Electronics K6R1008V1C-JC15 128k x8 bit 3.3V High Speed CMOS Static Ram (SOJ32) - 1D - 8E : Samsung Electronics K9F2808U0B-YCBO 128MBit NAND Flash EEPROM (TSOP48) - J1 : 6 pin header for programming the CPLD via JTAG + CY37256VP208 - Cypress CY37256VP208 Complex Programmable Logic Device (TQFP208) + CY7C1019 - Cypress CY7C1019BV33-15VC or Samsung Electronics K6R1008V1C-JC15 128k x8 bit 3.3V High Speed CMOS Static Ram (SOJ32) + 1D - 8E - Samsung Electronics K9F2808U0B-YCBO 64Mbit or K9F5608U0D 128Mbit NAND flash ROM (TSOP48) + J1 - 6 pin header for programming the CPLD via JTAG This PCB is used on: - MEM PCB -Game Sticker KEYCUS ROMs Populated CD Notes + (some names shortened, check GAME line) MEM PCB +Game (at end of driver for full title ) Sticker KEYCUS ROMs Populated CD Notes ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- -Ball Pom Line peeled off KC039A 8E, 8D N/A also has a Namco S10 MGEX10 (8681960201) PCB -Gamshara 10021 Ver.A KC020A 8E, 8D N/A -Gegege no Kitarō Yōkai Yokochō Matsuri De Batoru Ja GYM1 Ver.A KC052A 8E, 8D N/A also has a Namco S10 MGEX10 (8681960200) PCB -Gekitoride-Jong Space 10011 Ver.A KC003A 8E, 8D, 7E, 7D N/A -Gunbalina GNN1 Ver.A KC002A 8E, 8D N/A see note 3 -Keroro Gunsō Chikyū Shinryaku Shirei Dearimasu! KRG1 Ver.A KC047A1 8E, 8D N/A also has a Namco S10 MGEX10 (8681960200) PCB -Knock Down 2001 KD11 Ver.B KC011A 8E, 8D N/A also has a Namco P-DRIVE PCB 1908961101 (1908971101) with an H8/3002 -Kono Tako 10021 Ver.A KC034A 8E, 8D N/A -Kotoba no Puzzle Mojipittan KPM1 Ver.A KC012A 8E, 8D, 7E N/A -Medal no Tatsujin 2 Atsumare! Go! Go! Sugoroku Sentai Don Ranger Five MTA1 STMPR0A KC048A? 8E, 8D N/A also has a Namco System10 EXFINAL PCB 8906962603 (8906962703) -Mr Driller G DRG1 Ver.A KC007A 8E, 8D, 7E N/A -NFL Classic Football NCF3 Ver.A KC027A 8E, 8D, 7E, 7D N/A -Pacman Ball PMB2 Ver.A KC026A 8E, 8D N/A -Panicuru Panekuru PPA1 Ver.A KC017A 8E, 8D, 7E N/A -Point Blank 3 GNN2 Ver.A KC002A 8E, 8D N/A see note 3 -Puzz Ball PZB1 Ver.A KC013A 8E, 8D N/A also has a Namco S10 MGEX10 (8681960201) PCB, unverified title -Sekai Kaseki Hakken SKH1 Ver.A KC035A 8E, 8D N/A also has a Namco S10 MGEX10 (8681960201) PCB, unverified title -Star Trigon STT1 Ver.A KC019A 8E, 8D N/A -Taiko no Tatsujin 2 TK21 Ver.C KC010A 8E, 8D, 7E TK21-A KEYCUS is marked KC007A, KC010A is a sticker -Taiko no Tatsujin 3 TK31 Ver.A KC016A 8E, 8D, 7E not dumped For all TK* games see note 2 -Taiko no Tatsujin 4 TK41 Ver.A KC024A 8E, 8D, 7E TK-4 -Taiko no Tatsujin 5 TK51 Ver.A KC031A 8E, 8D, 7E not dumped -Taiko no Tatsujin 6 TK61 Ver.A KC036A 8E, 8D, 7E TK-6 -Utyuu Daisakusen Chocovader Contactee CVC1 Ver.A KC022A 8E, 8D, 7E, 7D, 6E N/A -unknown medal (?) game MTL1 SPR0B KC043A 8E, 8D N/A also has a Namco System10 EXFINAL PCB 8906962603 (8906962703) +Ball Pom Line missing KC039A 8E, 8D N/A also has a Namco S10 MGEX10 8681960201 PCB +GAHAHA Ippatsudou GID2 Ver.A KC005A 8E, 8D, 7E N/A also has a Namco System10 EXIO 8906960602 (8906970602) PCB. 2 analog joysticks +GAHAHA Ippatsudou 2 GIS1 Ver.A KC008A 8E, 8D, 7E N/A also has a Namco System10 EXIO 8906960602 (8906970602) PCB. 2 analog joysticks +Gamshara 10021 Ver.A KC020A 8E, 8D N/A I/O board = none +Gegege no Kitaro Yokai Yokocho Matsuri De Batoru Ja GYM1 Ver.A KC052A 8E, 8D N/A also has a Namco S10 MGEX10 8681960200 PCB +Gekitoride-Jong Space 10011 Ver.A KC003A 8E, 8D, 7E, 7D N/A I/O board = none +Gunbalina GNN1 Ver.A KC002A 8E, 8D N/A also has a Namco System10 EXIO(G) 8906961602 (8906970602) PCB. TMP95C061 not populated +Keroro Gunso Chikyu Shinryaku Shirei Dearimasu! KRG1 Ver.A KC047A1 8E, 8D N/A also has a Namco S10 MGEX10 8681960200 PCB +Knock Down 2001 KD11 Ver.B KC011A 8E, 8D N/A also has a Namco P-DRIVE PCB 1908961101 (1908971101) with an H8/3002 +Kono e Tako 10021 Ver.A KC034A 8E, 8D N/A RAN Ver.A in test mode, all seem to be re-programmed Gamshara PCB +Kotoba no Puzzle Mojipittan KPM1 Ver.A KC012A 8E, 8D, 7E N/A also has a Namco System10 EXIO 8906960602 (8906970602) PCB +Medal no Tatsujin MTL1 SPR0B KC043A 8E, 8D N/A also has a Namco System10 EXFINAL PCB 8906962603 (8906962703) +Medal no Tatsujin 2 MTA1 STMPR0A KC048A 8E, 8D N/A also has a Namco System10 EXFINAL PCB 8906962603 (8906962703) +Mr Driller G DRG1 Ver.A KC007A 8E, 8D, 7E N/A I/O board = none +NFL Classic Football NCF3 Ver.A KC027A 8E, 8D, 7E, 7D N/A also has a Namco System10 EXIO PCB +Pacman Ball PMB2 Ver.A KC026A 8E, 8D N/A I/O board = ? +Panicuru Panekuru PPA1 Ver.A KC017A 8E, 8D, 7E N/A I/O board = none +Point Blank 3 GNN2 Ver.A KC002A 8E, 8D N/A also has a Namco System10 EXIO(G) 8906961602 (8906970602) PCB. TMP95C061 and RAM not populated +Puzz Ball PZB1 Ver.A KC013A 8E, 8D N/A also has a Namco S10 MGEX10 (8681960201) PCB, unverified title +Sekai Kaseki Hakken SKH1 Ver.A KC035A 8E, 8D N/A also has a Namco S10 MGEX10 (8681960201) PCB, unverified title +Star Trigon STT1 Ver.A KC019A 8E, 8D N/A I/O board = none +Sugorotic Japan STJ1 Ver.C KC014A 8E, 8D N/A also has a Namco S10 MGEX10 (8681960201) PCB +Taiko no Tatsujin 2 TK21 Ver.C KC010A 8E, 8D, 7E TK21-A KEYCUS is marked KC007A, KC010A is a sticker on top. I/O board = ?. For all TK* games see note 2 and 3 +Taiko no Tatsujin 3 TK31 Ver.A KC016A 8E, 8D, 7E not dumped I/O board = ? +Taiko no Tatsujin 4 TK41 Ver.A KC024A 8E, 8D, 7E TK-4 also has a fully populated Namco System10 EXIO 8906961602 (8906970602) PCB +Taiko no Tatsujin 5 TK51 Ver.A KC031A 8E, 8D, 7E not dumped also has a fully populated Namco System10 EXIO 8906961602 (8906970602) PCB +Taiko no Tatsujin 6 TK61 Ver.A KC036A 8E, 8D, 7E TK-6 also has a fully populated Namco System10 EXIO 8906961602 (8906970602) PCB +Utyuu Daisakusen Chocovader Contactee CVC1 Ver.A KC022A 8E, 8D, 7E, 7D, 6E N/A I/O board = none + +Other games verified to use this PCB but NOT DUMPED (move into list above when dumped) +Shamisen Brothers KT-SB2Ver.A KC038A 8E not dumped I/O board = none +Photo Battle PBT1 Ver.B KC006A 1D-8E (16) N/A also has a Namco System10 EXIO(G) 8906961602 (8906970602) PCB. TMP95C061 and RAM not populated +Slot no Oujisama/Slot Prince (Ver.A & Ver.B seen) SLO1 Ver.B KC023A 8E, 8D N/A also has a Namco S10 MGEX10 (8681960201) PCB Notes: - 1. The ROM PCB has locations for 16x 128MBit FlashROMs (Total capacity = 2048MBits) but usually only a few are populated. + 1. The ROM PCB has locations for 16x 128Mbit FlashROMs (Total capacity = 2048Mbits) but usually only a few are populated. 2. All of the Taiko no Tatsujin games require a CDROM disc. The game will not show anything on screen if the CD drive & disc is not present and working. The disc contains binary data. - 3. Some kind of block locking or protection issues in the NAND FlashROM prevents the last NAND block being dumped. + 3. TK21 and TK31 boards did not have an I/O board. It is unknown if an I/O board is required or if it was missing. ******** *Type 3* @@ -310,7 +334,7 @@ System10 MEM(P3) PCB 8906962201 (8906972201) |-------------------------------------| |TMP95C061 J101 L K6R1008 | | PST575D +- -| LLLL |-------| +- +| ZZZZ |-------| +- |VHCT245 | | |-------| +- | LCX245 |CY37256| | |J1+- | 07VZ5M |VP208 | |CY37256| +- @@ -330,52 +354,107 @@ System10 MEM(P3) PCB 8906962201 (8906972201) | 1 3 5 7 9 11 13 15 | |-------------------------------------| Notes: - TMP95C061 : Toshiba TMP95C061 TLCS-900 Series CMOS 16-bit Microcontroller; No internal ROM or RAM (QFP100) - CY37256VP208(1): Cypress CY37256VP208 Complex Programmable Logic Device, marked with code 'KC' and a number. - This is the Namco KEYCUS chip which is unique to each game (TQFP208) - CY37256VP208(2): Cypress CY37256VP208 Complex Programmable Logic Device, marked 'S10MEP2A' (TQFP208) - K6R1008 : Samsung Electronics K6R1008V1C-JC15 128k x8-bit 3.3V High Speed CMOS Static Ram (SOJ32) - HY57V641620 : Hyundai HY57V641620 4 Banks x1M x16-bit Synchronous DRAM (TSOP54 Type II) - 0-15 : Samsung Electronics K9F2808U0A-YCBO 16Mx8-bit (128M-bit) NAND Flash ROM (TSOP48) - Note! These ROMs also hold data for high scores and play time and coin history. - They must be reset to factory defaults before dumping so the dump is clean. - LC82310 : Sanyo LC82310 MP3 decoder IC (QFP64) - 3414 : New Japan Radio Co. Ltd. JRC3414 Single-Supply Dual High Current Operational Amplifier (SOIC8) - 07VZ5M : Sharp 07VZ5M Variable Voltage Regulator - PST575D : Mitsumi PST575D System Reset IC. Available in voltage detection C through L with voltages 4.5V-2.3V - This D version triggers a reset at 4.2V (MMP-4A) - J1 : 6 pin header for programming the CPLDs via JTAG - J2 : 4 pin connector joined to main board for MP3 audio output from ROM board - J3 : 6 pin connector joined to V278 EMI PCB (filter board on outside of metal box) via 16-pin IDC connector - This connector is probably for extra controls - L : LED (SMD 0603) + TMP95C061 - Toshiba TMP95C061 TLCS-900 Series CMOS 16-bit Microcontroller; No internal ROM or RAM (QFP100) + CY37256VP208(1) - Cypress CY37256VP208 Complex Programmable Logic Device, marked with code 'KC' and a number. + This is the Namco KEYCUS chip which is unique to each game (TQFP208) + CY37256VP208(2) - Cypress CY37256VP208 Complex Programmable Logic Device, marked 'S10MEP2A' (TQFP208) + K6R1008 - Samsung Electronics K6R1008V1C-JC15 128k x8-bit 3.3V High Speed CMOS Static Ram (SOJ32) + HY57V641620 - Hyundai HY57V641620 4 Banks x1M x16-bit Synchronous DRAM (TSOP54 Type II) + 0-15 - Samsung Electronics K9F2808U0A-YCBO 16Mx8-bit (128M-bit) NAND Flash ROM (TSOP48) + Note! These ROMs also hold data for high scores, play time and coin history in NAND block 1. + They must be reset to factory defaults before dumping so the dump is clean. + LC82310 - Sanyo LC82310 MP3 decoder IC (QFP64) + 3414 - New Japan Radio Co. Ltd. JRC3414 Single-Supply Dual High Current Operational Amplifier (SOIC8) + 07VZ5M - Sharp 07VZ5M Variable Voltage Regulator + PST575D - Mitsumi PST575D System Reset IC. Available in voltage detection C through L with voltages 4.5V-2.3V + This D version triggers a reset at 4.2V (MMP-4A) + J101 - Multi-pin connector joining to main board + J1 - 6 pin header for programming the CPLDs via JTAG + J2 - 4 pin connector joined to main board for MP3 audio output from ROM board + J3 - 6 pin connector joined to V278 EMI PCB (filter board on outside of metal box) via 16-pin IDC connector + This connector is for extra ANALOG controls. Up to 4 potentiometers can be monitored. + For Golgo 13 Part 3 the gun connects to ROM board connector J3 pins 4 and 5 which connect to TMP95C061 pin 20 (P90 AN0) + and pin 23 (P93 AN3). Pins 2 and 3 of connector J3 connect to TMP95C061 pin 21 (P91 AN1) and pin 22 (P92 AN2) but are not used. + J3 connector pinout is: + 1: Ground + 2: Analog Y2 + 3: Analog X2 + 4: Analog Y1 + 5: Analog X1 + 6: 5V + L - LED (SMD 0603). These LEDs move sideways in one direction from LED2...LED5 all the time. They connect to + CY37256VP208(2) + Z - LED (SMD 0603). These LEDs flash on/off together slowly when music is not playing and move sideways + fast left/right (i.e. Knight Rider/KITT style) when music is playing. They are connected to the TMP95C061 + pins 40 (PB4), 41 (PB5), 42 (PB6), 43 (PB7) - Note - 1. The ROM PCB has locations for 16x Flash ROMs (Total capacity = 2048M-bits) but usually only a few are populated. + Notes: + 1. The ROM PCB has locations for 16x Flash ROMs (Total capacity = 2048Mbits) but usually only a few are populated. + 2. This board outputs audio that is mixed into the normal audio via main board connector J10 and IC BA3121. This PCB is used on: MEM PCB -Game Sticker KEYCUS ROMs Populated ------------------------------------------------------------------------------------------------------ -Golgo 13 Juusei no Chinkonka GLT1 Ver.A KC009A 0, 1, 2, 3, 4, 5 -Seishun Quiz Colorful High School CHS1 Ver.A KC025A 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13 -Tsukkomi Yousei Gips Nice Tsukkomi NTK1 Ver.A KC018A 0, 1, 2, 3, 4, 5, 6, 7 +Game Sticker KEYCUS ROMs Populated CD Notes +--------------------------------------------------------------------------------------------------------------------- +Golgo 13 Juusei no Requiem GLT1 Ver.A KC009A 0, 1, 2, 3, 4, 5 N/A Cabinet-mounted X,Y gun. I/O board = none. Test mode shows ANALOG X & ANALOG Y and is using 2x 5k-ohm pots for the gun on-screen positioning. +Seishun Quiz Colorful High School CHS1 Ver.A KC025A 0 to 13 (14 total) N/A I/O board = none +Tsukkomi Yousei Gips Nice Tsukkomi NTK1 Ver.A KC018A 0, 1, 2, 3, 4, 5, 6, 7 not dumped Game uses several JAMMA PL1 & PL2 buttons for controls. Main board came with EXIO(G) I/O board but the game works without it + so possible the main board was for a light gun game and an operator swapped the ROM board for this game. Meaning this game doesn't + use an I/O board which makes sense as there are no special controls. Game works without CD but music doesn't play. +Type 4 +TAITO CORPORATION +SYSTEM10 MEM/IO PCB +|-------------------------------------| +| | +| |---------| | +| | | | +| |CY37256 | | +| IC6 IC10 |VP208 | | +| | | J1| +| IC5 IC9 |---------| | +| | +| IC4 IC8 | +| | +| CY7C1019 | +| | +| | +| | +| | +| CN2| +| | +| | +| PAL20V8 | +| | +|-------------------------------------| +Notes: + CY37256VP208 - Cypress CY37256VP208 Complex Programmable Logic Device (TQFP208) + CY7C1019 - Cypress CY7C1019BV33-15VC or Samsung Electronics K6R1008V1C-JC15 128k x8 bit 3.3V High Speed CMOS Static Ram (SOJ32) + IC4-IC10 - Samsung Electronics K9F2808U0B-YCBO 64Mbit or Toshiba NAND flash ROM (TSOP48) + PAL20V8 - marked F06-02 + J1 - 10-pin header for programming the CPLD via JTAG + CN2 - 10-pin connector for controls + +This PCB is used on.. +Hajime no Ippo Hard Puncher - CPLD marked F06-01. I/O board = none +Hajime no Ippo Hard Puncher 2 - sticker HAZIMENO IPPO2 K91J0893A, HAZIME'NO IPPO2 VER.2.00J. CPLD marked F06-03. I/O board = none -Expansion Daughterboard PCB ---------------------------- -This PCB provides input/output capabilities for JVS hook-ups and allows extra controls to be connected. -There is actually only one PCB design but there are several variations where some of the connectors and -ICs are not populated if the game does not need that capability. However the PCB contains all the -locations/pads/holes etc to mount those parts. In most cases seen so far this PCB is optional but on some -games (e.g. Point Blank 3) it is required for proper game play. +Expansion Daughterboards +------------------------ + +Type 1: +This PCB provides input/output capabilities for JVS hook-ups and allows extra controls to be connected. There is actually only one PCB design +but there are several variations where some of the connectors and ICs are not populated if the game does not need that capability. In that case +an extra sticker is applied. However the PCB contains all the locations/pads/holes etc to mount those parts. In most cases seen so far this PCB +is optional but on some games (e.g. Point Blank 3, Photo Battle, Aim For Cash etc) it is required for proper game play. System10 EXIO PCB 8906960602 (8906970602) -|--------------------------------------------------------| -| J4 J5 J3 J2 | -| ADM485 MC14052 |-| -| LT1181A | +System10 EXIO(G) PCB 8906960602 (8906970602) sticker: 8906961602 (for lightgun games) + |--------------------------------------------------| + | J4 J5 J3 J2 | + | ADM485 MC14052 |-| +|-----|LT1181A | | VHCT245 | | CY37128VP100 VHCT245 | |J6 VHCT245 VHCT245 J1| @@ -387,36 +466,133 @@ System10 EXIO PCB 8906960602 (8906970602) | LLLL J7 VHCT574 J8| |--------------------------------------------------------| Notes: - TMP95C061 : Toshiba TMP95C061 TLCS-900 Series CMOS 16-bit Microcontroller; No internal ROM or RAM (QFP100) - CY37128VP160 : CY37128VP100 Cypress Complex Programmable Logic Device, marked 'S10XIO1A' or 'S10XIO1B' or 'S10XIO1C' (TQFP100) - VHC* : Common 3.3v logic chips - ADM485 : Analog Devices ADM485 Low Power EIA RS485 transceiver (SOIC8) - 61C256 : ISSI IS61C256AH-15J 32k x8-bit SRAM (SOJ28) - LT1181A : Linear Technology LT1181A or Analog Devices ADM202EARW Low Power 5V RS232 Dual Driver/Receiver (SOIC16W) - MC14052 : OnSemi MC14052 Analog DP4T Multiplexers/Demultiplexer (SOIC16) - L : LED (SMD 0603) - J1 : 48-Way Card Edge Connector - J2 : USB Connector for JVS External I/O board - J3 : Dual RCA Jacks marked 'AUDIO', for audio output - J4/J5 : HD15F DSUB Connector marked 'CRT1/CRT2', for video output - J6 : DB9 DSUB Connector marked 'RS232C'. Possibly for networking several PCBs together - J7 : 6 pin header for programming the CPLDs via JTAG - J8 : 2 pin header for connection of gun. Pin 1:Player 1 Gun Opto. Pin2:Player 2 Gun Opto + TMP95C061 - Toshiba TMP95C061 TLCS-900 Series CMOS 16-bit Microcontroller; No internal ROM or RAM (QFP100) + - not populated on EXIO(G) PCB. + CY37128VP160 - CY37128VP100 Cypress Complex Programmable Logic Device, marked 'S10XIO1A' or 'S10XIO1B' or 'S10XIO1C' (TQFP100) + VHC* - Common 3.3v logic chips + ADM485 - Analog Devices ADM485 Low Power EIA RS485 transceiver (SOIC8) + 61C256 - ISSI IS61C256AH-15J 32k x8-bit SRAM (SOJ28) + - not populated on EXIO(G) PCB. + LT1181A - Linear Technology LT1181A or Analog Devices ADM202EARW Low Power 5V RS232 Dual Driver/Receiver (SOIC16W) + MC14052 - OnSemi MC14052 Analog DP4T Multiplexers/Demultiplexer (SOIC16) + L - LED (SMD 0603) + J1 - 48-Way Card Edge Connector + J2 - USB Connector for JVS External I/O board + J3 - Dual RCA Jacks marked 'AUDIO', for audio output + J4/J5 - HD15F DSUB Connector marked 'CRT1/CRT2', for video output + J6 - DB9 DSUB Connector marked 'RS232C'. Possibly for networking several PCBs together + J7 - 6 pin header for programming the CPLDs via JTAG + J8 - 2 pin header for connection of gun. Pin 1:Player 1 Gun Opto. Pin2:Player 2 Gun Opto -This PCB is required by Point Blank 3 since it controls the gun opto signal. Only the CPLD and J8 and some minor +This PCB is required by Point Blank 3 since it controls the lightgun opto signal. Only the CPLD and J8 and some minor logic and other small support parts are populated. -This PCB has been found almost fully populated (minus J6) on some Taiko no Tatsujin games (TK51/TK61) (and on Knock Down 2001) but not -earlier TK games, so it appears to be optional or is only used by the later TK51 and TK61 games. +This PCB has been found almost fully populated (minus J6) on some Taiko no Tatsujin games (TK41/TK51/TK61) and on Knock Down 2001, but not +earlier TK games. It appears to be optional or is only used by the later TK41, TK51 and TK61 games or the earlier TK Main PCB was missing that board +which is highly likely given that most of these boards were sold and bought as 'junk'. -System10 EXFINAL PCB 8906962603 (8906962703) --------------------- -32kBx8-bit SRAM -Altera MAX EPM3128 CPLD labelled S10XFN1A -R4543 RTC and 3V coin battery -40MHz OSC -TMC 'EC-NET' TM20070A Network Controller -SMSC COM20022I 10Mbps ARCNET Controller +Type 2: +System10 EXFINAL PCB 8906962703 (8906972703) + |----------------------------------------------------| + | LLLLLLLL J3 | + | | +|-----| 40MHz | +|J4 EPM3128 | +| (S10XFN1A) | +|J5 JP1 | +| M62023 | +| COM20022I R4543 | +|J6 CY62256 | +| ADM485 | +|J8 J7 TMC20070A | +| JP2 JP3 BATT | +|----------------------------------------------------------| +Notes: + CY62256 - 32kBx8-bit SRAM + EPM3128 - Altera MAX EPM3128 CPLD labelled S10XFN1A + R4543 - R4543 RTC + BATT - 3V coin battery + L - LED (SMD 0603) + TMC20070A - TMC 'EC-NET' TMC20070A Network Controller + COM20022I - SMSC COM20022I 10Mbps ARCNET Controller + J3 - 6 pin connector for JTAG + J4 - 3.5mm Audio Jack + J5 - HD15 DSUB connector (video out?) + J6 - Optical Network Jacks + J7/J8 - 3 pin connector + JP1 - Jumper marked 30m/10m + JP2/JP3 - Jumper marked Non/Term + +This PCB is essentially a network board. +This PCB was found on Medal no Tatsujin and Medal no Tatsujin 2. +Most likely used on all satellite games. + + +Type 3: +System10 EXUSB PCB 8906962601 (8906972601) + |----------------------------------------------------| + | J7 J6 LLLL J5 | + | | +|-----| TR2 TR4 TR6 TR8 TR10 TR12 TR14 TR16 USBN9604-28M| +| TR1 TR3 TR5 TR7 TR9 TR11 TR13 TR15 L | +| | +| EPM3128 | +| TD62083 (S10EXU1A) | +| TLP283-4 48MHz| +| J1 TLP283-4 | +| | +| TD62083 J4| +| J2 J3 SW1 | +|----------------------------------------------------------| +Notes: + J1 - Multi-pin connector + J2 - Multi-pin connector + J3 - 6-pin JTAG connector + J4 - HD15 DSUB connector + J5 - USB type B connector + J6 - Multi-pin connector + J7 - 6 pin Power Input connector + TR* - D1718 Transistor + L - LED (SMD 0603) + USBN9604 - National/TI USBN9604-28M USB controller + EPM3128 - Altera MAX EPM3128 CPLD labelled S10EXU1A + TLP283-4 - Toshiba TLP283-4 Optocoupler + TD62083 - Toshiba 8-channel Darlington Sink Driver + SW1 - 4-position DIP switch + +Usage of this PCB is unknown but likely it is used on any game that drives motors such as coin pushers etc. + + +Type 4: +S10 MGEXIO PCB 8681960201 (8681970201) + |----------------------------------------------------| + | TR11 TR13 TR15 TR17 TR19 J8 | + | TR12 TR14 TR16 TR18 TR20 | +|-----| | +| L EPM3128 | +| 14.??MHz | +|J3 J4 J5 M48Z35Y| +| H8/3007 | +| | +| | +| MB3771 | +| TR1 TR3 TR5 TR7 TR9 L | +| J2 TR2 TR4 TR6 TR8 TR10 L SW1 J6 | +|----------------------------------------------------------| +Notes: + J2 - 4-pin connector + J3/4/5 - Multi-pin connector + J6 - 4-pin connector + J8 - 6-pin JTAG connector + TR* - D1718 Transistor + L - LED (SMD 0603) + EPM3128 - Altera MAX EPM3128 CPLD labelled PZB1DR0 + SW1 - 2-position DIP switch + M48Z35Y - ST Microelectronics M48Z35Y 32kBx8-bit NVRAM + H8/3007 - Hitachi H8/3007 Microcontroller (2kB internal RAM, no internal ROM) + MB3771 - Fujitsu MB3771 System Reset IC + +Check the MEM(N) PCB above for a list of games that use this PCB. ----------- @@ -457,9 +633,10 @@ block for a specific device using: 0x1f500000 + 2 * (0x3ec * device_id + block_i Known issues: - mrdrilr2, mrdrilr2j: Opening the operator menu sometimes can crash Mr. Driller 2 -- knpuzzle: bad dumps? where are the encrypted program blocks? -- nflclsfb: confirmed working but boots to a black screen. internal error says "namcoS10Sio0Init error :no EXIO!!!", making the check pass lets the game boot like normal (patch the instruction at 8001428c to 10000006) -- ballpom: Needs MGEXIO emulation to boot. Make a cheat to force the byte at memory location 8007af02 to be 0 to make the game boot past the MGEXIO error. +- nflclsfb: Needs additional I/O for trackball +- g13jnr: Needs MP3 decoder emulation +- sugorotic, sekaikh(?): BGMs stop early and/or crash the game. Seems to be expecting an SPU-related IRQ? +- Fix medal games I/O and refactor code to separate MGEXIO states from namcos10_state User data note: @@ -468,6 +645,7 @@ User data note: #include "emu.h" +#include "namcos10_exio.h" #include "ns10crypt.h" #include "cpu/psx/psx.h" @@ -475,6 +653,7 @@ User data note: #include "machine/intelfsh.h" #include "machine/nandflash.h" #include "machine/ram.h" +#include "machine/ticket.h" #include "machine/timer.h" #include "sound/spu.h" #include "video/psx.h" @@ -494,12 +673,14 @@ public: , m_decrypter(*this, "decrypter") , m_io_update_interrupt(*this) , m_io_system(*this, "SYSTEM") + , m_exio(*this, "exio") + , m_exio_analog(*this, "EXIO_ANALOG%u", 1U) + , m_mgexio_hopper(*this, "mgexio_hopper%u", 1U) + , m_mgexio_outputs(*this, "MGEXIO_OUTPUT%u", 0U) + , m_mgexio_sensor(*this, "MGEXIO_SENSOR") { } - void namcos10_base(machine_config &config); - - void namcos10_map_inner(address_map &map); - void namcos10_map(address_map &map); + INPUT_CHANGED_MEMBER(mgexio_coin_start); protected: using unscramble_func = uint16_t (*)(uint16_t); @@ -508,10 +689,25 @@ protected: virtual void machine_reset() override; virtual void device_resolve_objects() override; + void namcos10_base(machine_config &config); + void namcos10_exio(machine_config &config); + void namcos10_mgexio(machine_config &config); + void namcos10_exfinalio(machine_config &config); + + void namcos10_map_inner(address_map &map); + void namcos10_map(address_map &map); + + void namcos10_map_exio_inner(address_map &map); + void namcos10_map_exio(address_map &map); + + void namcos10_map_mgexio_inner(address_map &map); + void namcos10_map_mgexio(address_map &map); + required_device m_maincpu; - optional_device m_decrypter; // not every game has a decrypter implemented yet, so optional for now + optional_device m_decrypter; unscramble_func m_unscrambler; + std::function m_psx_remapper; private: enum : int8_t { @@ -521,11 +717,12 @@ private: I2CP_RECIEVE_ACK_0 }; - uint16_t control_r(offs_t offset); - void control_w(offs_t offset, uint16_t data); + uint16_t io_system_r(); - uint16_t sprot_r(); - void sprot_w(uint16_t data); + uint16_t control_r(offs_t offset); + + uint16_t exio_ident_r(); + void exio_ident_w(uint16_t data); uint16_t i2c_clock_r(); void i2c_clock_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); @@ -542,10 +739,27 @@ private: uint8_t m_i2c_byte; int32_t m_i2c_bit; - int32_t m_sprot_bit; - uint32_t m_sprot_byte; + int32_t m_exio_ident_bit; + uint32_t m_exio_ident_byte; required_ioport m_io_system; + + optional_device m_exio; + + util::notifier_subscription m_notif_psx_space; + bool m_remapping_psx_io; + + // EXIO + optional_ioport_array<8> m_exio_analog; + + // MGEXIO + template void mgexio_output_w(offs_t offset, uint16_t data); + + optional_device_array m_mgexio_hopper; + output_finder<16> m_mgexio_outputs; + optional_ioport m_mgexio_sensor; + + attotime m_mgexio_coin_start_time[2]; }; class namcos10_memm_state : public namcos10_state @@ -556,8 +770,6 @@ public: , m_nand(*this, "nand") { } - void namcos10_memm(machine_config &config); - void ns10_mrdrilr2(machine_config &config); void init_mrdrilr2(); @@ -567,6 +779,8 @@ protected: virtual void machine_reset() override; private: + void namcos10_memm(machine_config &config); + void namcos10_memm_map_inner(address_map &map); void namcos10_memm_map(address_map &map); @@ -592,19 +806,8 @@ public: namcos10_memn_state(const machine_config &mconfig, device_type type, const char *tag) : namcos10_state(mconfig, type, tag) , m_nand(*this, "nand%u", 0U) - , m_exio_mcu(*this, "exio_mcu") { } - void namcos10_memn_base(machine_config &config); - void namcos10_memn(machine_config &config); - - void namcos10_exio(machine_config &config); - void namcos10_mgexio(machine_config &config); - void namcos10_exfinalio(machine_config &config); - - void namcos10_nand_k9f2808u0b(machine_config &config, int nand_count); - void namcos10_nand_k9f5608u0d(machine_config &config, int nand_count); - void ns10_ballpom(machine_config &config); void ns10_chocovdr(machine_config &config); void ns10_gahaha(machine_config &config); @@ -616,6 +819,7 @@ public: void ns10_keroro(machine_config &config); void ns10_knpuzzle(machine_config &config); void ns10_konotako(machine_config &config); + void ns10_medalnt(machine_config &config); void ns10_medalnt2(machine_config &config); void ns10_mrdrilrg(machine_config &config); void ns10_nflclsfb(machine_config &config); @@ -625,12 +829,12 @@ public: void ns10_puzzball(machine_config &config); void ns10_sekaikh(machine_config &config); void ns10_startrgn(machine_config &config); + void ns10_sugorotic(machine_config &config); void ns10_taiko2(machine_config &config); void ns10_taiko3(machine_config &config); void ns10_taiko4(machine_config &config); void ns10_taiko5(machine_config &config); void ns10_taiko6(machine_config &config); - void ns10_unks10md(machine_config &config); void init_ballpom(); void init_chocovdr(); @@ -642,6 +846,7 @@ public: void init_keroro(); void init_knpuzzle(); void init_konotako(); + void init_medalnt(); void init_medalnt2(); void init_mrdrilrg(); void init_nflclsfb(); @@ -650,24 +855,35 @@ public: void init_puzzball(); void init_sekaikh(); void init_startrgn(); + void init_sugorotic(); void init_taiko2(); void init_taiko3(); void init_taiko4(); void init_taiko5(); void init_taiko6(); - void init_unks10md(); protected: virtual void machine_start() override; virtual void machine_reset() override; -private: - void namcos10_memn_map_inner(address_map &map); + void namcos10_memn_base(machine_config &config); + void namcos10_memn(machine_config &config); + void namcos10_memn_map(address_map &map); - void nand_copy(uint8_t *nand_base, uint16_t *dst, uint32_t address, int len); + void namcos10_nand_k9f2808u0b(machine_config &config, int nand_count); + void namcos10_nand_k9f5608u0d(machine_config &config, int nand_count); + void memn_driver_init(); + void pio_dma_read(uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size); + void pio_dma_write(uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size); + +private: + void namcos10_memn_map_inner(address_map &map); + + void nand_copy(uint8_t *nand_base, uint16_t *dst, uint32_t address, int len); + void crypto_switch_w(uint16_t data); uint16_t ctrl_reg_r(offs_t offset); void ctrl_reg_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); @@ -682,7 +898,6 @@ private: void nand_bank_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); optional_device_array m_nand; - optional_device m_exio_mcu; uint32_t m_ctrl_reg; uint32_t m_nand_device_idx; @@ -690,41 +905,122 @@ private: uint32_t m_nand_address; }; -class namcos10_memp3_state : public namcos10_state +class namcos10_memp3_state : public namcos10_memn_state { public: namcos10_memp3_state(const machine_config &mconfig, device_type type, const char *tag) - : namcos10_state(mconfig, type, tag) - , m_nand(*this, "nand%u", 0U) + : namcos10_memn_state(mconfig, type, tag) , m_memp3_mcu(*this, "memp3_mcu") + , m_mcu_ram(*this, "mcu_ram") + , m_p3_analog(*this, "P3_ANALOG%u", 1U) { } - void namcos10_memp3_base(machine_config &config); + void ns10_g13jnr(machine_config &config); + void ns10_nicetsuk(machine_config &config); - void ns10_g13jnc(machine_config &config); + void init_g13jnr(); + void init_nicetsuk(); - void init_g13jnc(); +protected: + virtual void machine_start() override; + virtual void machine_reset() override; private: - void nand_copy(uint8_t *nand_base, uint16_t *dst, uint32_t address, int len); - void memp3_driver_init(); + void namcos10_memp3_base(machine_config &config); - optional_device_array m_nand; - optional_device m_memp3_mcu; + void namcos10_memp3_map_inner(address_map &map); + void namcos10_memp3_map(address_map &map); + void mcu_map(address_map &map); + + void firmware_write_w(uint16_t data); + + void ram_bank_w(uint16_t data); + + uint16_t unk_status1_r(); + uint16_t unk_status2_r(); + + uint16_t ram_r(offs_t offset); + void ram_w(offs_t offset, uint16_t data); + + uint16_t io_analog_r(offs_t offset); + + required_device m_memp3_mcu; + required_shared_ptr m_mcu_ram; + optional_ioport_array<4> m_p3_analog; + + uint16_t m_mcu_ram_bank; }; /////////////////////////////////////////////////////////////////////////////////////////////// +void namcos10_state::machine_start() +{ + if (m_psx_remapper) { + m_notif_psx_space = m_maincpu->space(AS_PROGRAM).add_change_notifier( + [this] (read_or_write mode) + { + if (!m_remapping_psx_io) + { + m_remapping_psx_io = true; + m_psx_remapper(); + m_remapping_psx_io = false; + } + } + ); + } + + save_item(NAME(m_i2c_dev_clock)); + save_item(NAME(m_i2c_dev_data)); + save_item(NAME(m_i2c_host_clock)); + save_item(NAME(m_i2c_host_data)); + save_item(NAME(m_i2c_prev_clock)); + save_item(NAME(m_i2c_prev_data)); + save_item(NAME(m_i2cp_mode)); + save_item(NAME(m_i2c_byte)); + save_item(NAME(m_i2c_bit)); + save_item(NAME(m_exio_ident_bit)); + save_item(NAME(m_exio_ident_byte)); + + save_item(NAME(m_mgexio_coin_start_time)); +} + +void namcos10_state::machine_reset() +{ + m_remapping_psx_io = false; + + m_i2c_dev_clock = m_i2c_dev_data = 1; + m_i2c_host_clock = m_i2c_host_data = 1; + m_i2c_prev_clock = m_i2c_prev_data = 1; + m_i2cp_mode = I2CP_IDLE; + m_i2c_byte = 0x00; + m_i2c_bit = 0; + + m_exio_ident_bit = 0; + m_exio_ident_byte = 0; + + std::fill(std::begin(m_mgexio_outputs), std::end(m_mgexio_outputs), 0); + std::fill(std::begin(m_mgexio_coin_start_time), std::end(m_mgexio_coin_start_time), attotime::never); +} + +void namcos10_state::device_resolve_objects() +{ + m_io_update_interrupt.resolve_safe(); + m_mgexio_outputs.resolve(); +} + +TIMER_DEVICE_CALLBACK_MEMBER(namcos10_state::io_update_interrupt_callback) +{ + m_io_update_interrupt(1); +} + +/////////////////////////////////////////////////////////////////////////////////////////////// + void namcos10_state::namcos10_base(machine_config &config) { /* basic machine hardware */ CXD8606BQ(config, m_maincpu, XTAL(101'491'200)); m_maincpu->set_disable_rom_berr(true); - m_maincpu->subdevice("ram")->set_default_size("16M"); // ->set_default_size("4M"); 2 IS41LV16100s - // The bios first configures the ROM window as 80000-big, then - // switches to 400000. If berr is active, the first configuration - // wipes all handlers after 1fc80000, which kills the system - // afterwards + m_maincpu->subdevice("ram")->set_default_size("4M"); /* video hardware */ CXD8561CQ(config, "gpu", XTAL(53'693'175), 0x200000, subdevice("maincpu")).set_screen("screen"); // 2 54V25632s @@ -738,51 +1034,14 @@ void namcos10_state::namcos10_base(machine_config &config) // CXD2938Q; SPU with CD-ROM controller - also seen in PSone, 101.4912MHz / 2 // TODO: This must be replaced with a proper CXD2938Q device, also handles CD-ROM? spu_device &spu(SPU(config, "spu", XTAL(101'491'200)/2, m_maincpu.target())); - spu.add_route(0, "lspeaker", 1.0); - spu.add_route(1, "rspeaker", 1.0); + spu.add_route(0, "lspeaker", 0.75); + spu.add_route(1, "rspeaker", 0.75); // TODO: Trace main PCB to see where JAMMA I/O goes and/or how int10 can be triggered (SM10MA3?) m_io_update_interrupt.bind().set("maincpu:irq", FUNC(psxirq_device::intin10)); TIMER(config, "io_timer").configure_periodic(FUNC(namcos10_state::io_update_interrupt_callback), attotime::from_hz(100)); } -void namcos10_state::machine_start() -{ - save_item(NAME(m_i2c_dev_clock)); - save_item(NAME(m_i2c_dev_data)); - save_item(NAME(m_i2c_host_clock)); - save_item(NAME(m_i2c_host_data)); - save_item(NAME(m_i2c_prev_clock)); - save_item(NAME(m_i2c_prev_data)); - save_item(NAME(m_i2cp_mode)); - save_item(NAME(m_i2c_byte)); - save_item(NAME(m_i2c_bit)); - save_item(NAME(m_sprot_bit)); - save_item(NAME(m_sprot_byte)); -} - -void namcos10_state::machine_reset() -{ - m_i2c_dev_clock = m_i2c_dev_data = 1; - m_i2c_host_clock = m_i2c_host_data = 1; - m_i2c_prev_clock = m_i2c_prev_data = 1; - m_i2cp_mode = I2CP_IDLE; - m_i2c_byte = 0x00; - m_i2c_bit = 0; - m_sprot_bit = 0; - m_sprot_byte = 0; -} - -void namcos10_state::device_resolve_objects() -{ - m_io_update_interrupt.resolve_safe(); -} - -TIMER_DEVICE_CALLBACK_MEMBER(namcos10_state::io_update_interrupt_callback) -{ - m_io_update_interrupt(1); -} - void namcos10_state::namcos10_map_inner(address_map &map) { // ram? @@ -791,90 +1050,64 @@ void namcos10_state::namcos10_map_inner(address_map &map) map(0xf500000, 0xf5fffff).ram().share("share3"); map(0xfb60000, 0xfb60003).noprw(); // ? - map(0xfba0000, 0xfba001f).rw(FUNC(namcos10_state::control_r), FUNC(namcos10_state::control_w)); - map(0xfba0002, 0xfba0003).rw(FUNC(namcos10_state::sprot_r), FUNC(namcos10_state::sprot_w)); + map(0xfba0000, 0xfba0001).r(FUNC(namcos10_state::io_system_r)); + map(0xfba0002, 0xfba0003).rw(FUNC(namcos10_state::exio_ident_r), FUNC(namcos10_state::exio_ident_w)); map(0xfba0004, 0xfba0007).portr("IN1"); map(0xfba0008, 0xfba0009).rw(FUNC(namcos10_state::i2c_clock_r), FUNC(namcos10_state::i2c_clock_w)); map(0xfba000a, 0xfba000b).rw(FUNC(namcos10_state::i2c_data_r), FUNC(namcos10_state::i2c_data_w)); - - // TODO: Expansion I/O board registers (EXIO, etc) - // nflclsfb: The uploaded EXIO code seems to be be based to 0x3000 and the PC seems to be 0x3067 based on analysis. - // There appears to be directly shared memory between the sub CPU and main CPU. - // For example, 0x1fe0c066 from the main CPU appears to be the same as 0x6033 in the sub CPU's memory space. - // MGEXIO also appears to be have its registers in the 0x1fe00000 range - // map(0xfe06000, 0xfe0ffff).rw(FUNC(namcos10_state::exio_ram_r), FUNC(namcos10_state::exio_ram_w)); // seems to map directly to what the EXIO can read - // these are possibly related to the TMP95C061 ports - // map(0xfe10000, 0xfe10001).noprw(); // write only. 2 is written before uploading program code, 3 is written when program code is finished uploading - // map(0xfe18000, 0xfe18001).noprw(); // read/write. set to 0 before reading/writing, set to 1 when done. Lock? - // map(0xfe20000, 0xfe20001).noprw(); // read/write - // map(0xfe28000, 0xfe28001).noprw(); // read only. CPU boot status flag bit 0? bit 1 unknown - // map(0xfe30000, 0xfe30001).noprw(); // write only - // map(0xfe40000, 0xfe40001).noprw(); // write only - // map(0xfe48000, 0xfe48001).noprw(); // write only - // map(0xfe50000, 0xfe50001).noprw(); // read only - // map(0xfe58000, 0xfe58001).noprw(); // read only - // map(0xfec0000, 0xfec0001).noprw(); // write only - // map(0xfec8000, 0xfec8001).noprw(); // write only + map(0xfba001a, 0xfba001b).r(FUNC(namcos10_state::control_r)); } void namcos10_state::namcos10_map(address_map &map) { - map(0x10000000, 0x1fffffff).m(FUNC(namcos10_memm_state::namcos10_map_inner)); - map(0x90000000, 0x9fffffff).m(FUNC(namcos10_memm_state::namcos10_map_inner)); - map(0xb0000000, 0xbfffffff).m(FUNC(namcos10_memm_state::namcos10_map_inner)); + map(0x10000000, 0x1fffffff).m(FUNC(namcos10_state::namcos10_map_inner)); + map(0x90000000, 0x9fffffff).m(FUNC(namcos10_state::namcos10_map_inner)); + map(0xb0000000, 0xbfffffff).m(FUNC(namcos10_state::namcos10_map_inner)); +} + +uint16_t namcos10_state::io_system_r() +{ + return m_io_system->read(); } uint16_t namcos10_state::control_r(offs_t offset) { - // logerror("%s: control_r %d\n", machine().describe_context(), offset); - if(offset == 0) - return m_io_system->read(); - - if(offset == 13) { - // bit = cleared registers - // 0 = 1fba0012 - // 1 = 1fba0014, 1fe20000 - // 2 = 1fba0016 - // 3 = 1fba0018 (forces I/O update) - return 8; - } - - return 0; + // bit = cleared registers + // 0 = 1fba0012 + // 1 = 1fba0014, 1fe20000 + // 2 = 1fba0016 + // 3 = 1fba0018 (forces I/O update) + return 8; } -void namcos10_state::control_w(offs_t offset, uint16_t data) +void namcos10_state::exio_ident_w(uint16_t data) { - // logerror("%s: control_w %d, %04x\n", machine().describe_context(), offset, data); + logerror("%s: exio_ident_w %04x\n", machine().describe_context(), data); + m_exio_ident_bit = 7; + m_exio_ident_byte = 0; } -void namcos10_state::sprot_w(uint16_t data) +uint16_t namcos10_state::exio_ident_r() { - logerror("%s: sprot_w %04x\n", machine().describe_context(), data); - m_sprot_bit = 7; - m_sprot_byte = 0; -} + // 0x23 = DEV PCB (mentioned in ballpom) + // 0x24 = DEV PCB (mentioned in ballpom) + // 0x30 = EXIO PCB, has CPU and I/O + // 0x31 = EXIO PCB, has CPU and I/O (different pinout from 0x30, but some games like nflclsfb support both layouts) + // 0x32 = EXIO PCB, has no CPU but has I/O + // 0x33 = MGEXIO PCB + // 0x34 = EXUSB? + // 0x35 = EXFINAL PCB + // 0xff = disabled + const uint8_t resp = m_exio ? m_exio->ident_code() : 0xff; -uint16_t namcos10_state::sprot_r() -{ - // Seems to be some kind of system configuration read in as a response to the i2c commands sent? - // If line 3 has 0x30/0x31 then it will try to initialize the sub CPU for EXIO causing games to hang (waiting for 0x1fe18000 to return 0?). - // I/O will also try to poll 0x1fe50000 and 0x1fe58000. - // line 3 must return 0x31 to enable JVS for nflclsfb to run + uint16_t res = m_exio_ident_byte >= 0x20 ? 0x3 : + (((resp >> m_exio_ident_bit) & 1) ? 1 : 0) | + (((resp >> m_exio_ident_bit) & 1) ? 2 : 0); - const static uint8_t prot[0x40] = { - 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, - 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, - 0x50, 0x51, 0x50, 0x51, 0x50, 0x51, 0x50, 0x51, 0x50, 0x51, 0x50, 0x51, 0x50, 0x51, 0x50, 0x51, - 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, - }; - uint16_t res = m_sprot_byte >= 0x20 ? 0x3 : - (((prot[m_sprot_byte ] >> m_sprot_bit) & 1) ? 1 : 0) | - (((prot[m_sprot_byte+0x20] >> m_sprot_bit) & 1) ? 2 : 0); - - m_sprot_bit--; - if(m_sprot_bit == -1) { - m_sprot_bit = 7; - m_sprot_byte++; + m_exio_ident_bit--; + if(m_exio_ident_bit == -1) { + m_exio_ident_bit = 7; + m_exio_ident_byte++; } return res; } @@ -961,6 +1194,175 @@ void namcos10_state::i2c_update() m_i2c_prev_clock = clock; } +/////////////////////////////////////////////////////////////////////////////////////////////// + +void namcos10_state::namcos10_exio(machine_config &config) +{ + namcos10_exio_device &exio(NAMCOS10_EXIO(config, m_exio, 0)); + + exio.analog_callback().set([this] (offs_t offset) { + return m_exio_analog[offset].read_safe(0); + }); + + m_psx_remapper = [this] () { + m_maincpu->space(AS_PROGRAM).install_device(0x00000000, 0xffffffff, *this, &namcos10_state::namcos10_map_exio); + }; +} + +void namcos10_state::namcos10_map_exio_inner(address_map &map) +{ + // TODO: Base registers are probably similar between EXIO and MGEXIO, fill in registers and rename if possible + // TODO: Figure out what the commented out registers are actually used for + map(0x06000, 0x0ffff).rw(m_exio, FUNC(namcos10_exio_device::ram_r), FUNC(namcos10_exio_device::ram_w)); + map(0x10000, 0x10003).w(m_exio, FUNC(namcos10_exio_device::ctrl_w)); + // map(0x18000, 0x18003).noprw(); + map(0x28000, 0x28003).r(m_exio, FUNC(namcos10_exio_device::cpu_status_r)); + // map(0x30000, 0x30003).nopw(); + // map(0x40000, 0x40003).nopw(); + // map(0x48000, 0x48003).nopw(); + map(0x50000, 0x50003).portr("EXIO_IN1"); + map(0x58000, 0x58003).portr("EXIO_IN2"); + // map(0xc0000, 0xc0003).nopw(); + // map(0xc8000, 0xc8003).nopw(); +} + +void namcos10_state::namcos10_map_exio(address_map &map) +{ + map(0x1fe00000, 0x1fffffff).m(FUNC(namcos10_state::namcos10_map_exio_inner)); + map(0x9fe00000, 0x9fffffff).m(FUNC(namcos10_state::namcos10_map_exio_inner)); + map(0xbfe00000, 0xbfffffff).m(FUNC(namcos10_state::namcos10_map_exio_inner)); +} + +/////////////////////////////////////////////////////////////////////////////////////////////// + +void namcos10_state::namcos10_mgexio(machine_config &config) +{ + // Probably stands for Medal Game EXIO. Every game so far is a medal game. + // The inputs are best effort to get the games booting. + // sekaikh sometimes throws a divider sol sensor error on boot. + // I had success faking the pusher motor using a hopper device using 1000ms timer but it's a gross hack. + // You can use the check sensor I/O to get some feedback from the games but it's hard + // to understand what's going on or if things are really working as intended. + + namcos10_mgexio_device &mgexio(NAMCOS10_MGEXIO(config, m_exio, 0)); + + HOPPER(config, m_mgexio_hopper[0], attotime::from_msec(100), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH); + HOPPER(config, m_mgexio_hopper[1], attotime::from_msec(100), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH); + HOPPER(config, m_mgexio_hopper[2], attotime::from_msec(100), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH); + + mgexio.port4_read_callback().set([this] (offs_t offset) { + uint16_t r = 0; + r |= (m_mgexio_outputs[6] & 1); // divider sol (l) sensor + r |= (m_mgexio_outputs[7] & 1) << 1; //divider sol (r) sensor + return r; + }); + + mgexio.port7_read_callback().set([this] (offs_t offset) { + return m_mgexio_sensor->read(); + }); + + mgexio.porta_read_callback().set([this] (offs_t offset) { + uint16_t r = 0b1111; + + // update coin states + auto curtime = machine().time(); + for (int i = 0; i < 2; i++) { + if (m_mgexio_coin_start_time[i] == attotime::never) + continue; + + auto diff = curtime - m_mgexio_coin_start_time[i]; + + if (diff < attotime::from_msec(25)) + r ^= 1 << (2 * i); // L1/R1 + else if (diff < attotime::from_msec(50)) + r ^= 1 << (2 * i + 1); // L2/R2 + else + m_mgexio_coin_start_time[i] = attotime::never; + } + + r |= m_mgexio_hopper[0]->line_r() << 4; // hopper (l) + r |= m_mgexio_hopper[1]->line_r() << 5; // hopper (r) + r |= m_mgexio_hopper[2]->line_r() << 6; // hopper (c) + r |= 1 << 7; // TODO: pusher motor, how does this work? + return r; + }); + + mgexio.port4_write_callback().set([this] (uint16_t data) { + m_mgexio_outputs[8] = BIT(data, 6); // win lamp + }); + + mgexio.portb_write_callback().set([this] (uint16_t data) { + m_mgexio_hopper[0]->motor_w(BIT(data, 0)); + m_mgexio_hopper[1]->motor_w(BIT(data, 1)); + m_mgexio_hopper[2]->motor_w(BIT(data, 4)); + m_mgexio_outputs[2] = BIT(data, 2); // lockout sol (l) + m_mgexio_outputs[3] = BIT(data, 3); // lockout sol (r) + m_mgexio_outputs[5] = BIT(data, 5); // payout sol + m_mgexio_outputs[6] = !BIT(data, 6); // divider sol (l) + m_mgexio_outputs[7] = !BIT(data, 7); // divider sol (r) + }); + + m_psx_remapper = [this] () { + m_maincpu->space(AS_PROGRAM).install_device(0x00000000, 0xffffffff, *this, &namcos10_state::namcos10_map_mgexio); + }; +} + +void namcos10_state::namcos10_map_mgexio_inner(address_map &map) +{ + map(0x00000, 0x0ffff).rw(m_exio, FUNC(namcos10_mgexio_device::ram_r), FUNC(namcos10_mgexio_device::ram_w)); + map(0x10000, 0x10003).rw(m_exio, FUNC(namcos10_mgexio_device::ctrl_r), FUNC(namcos10_mgexio_device::ctrl_w)); + map(0x18000, 0x18003).rw(m_exio, FUNC(namcos10_mgexio_device::bus_req_r), FUNC(namcos10_mgexio_device::bus_req_w)); + /* + 0x20000 (w) - If bit 1 of 1fba001a is set then this gets cleared too + (pacmball) When the CPU is recognized as being on, 1fba001a is set to 0xfffd and 0x1fe20000 is set to 0. + When an error occurs then 0x1fe10000 and 1fe18000 are set to 0, and 0x1fe20000 is set to 2. + */ + map(0x28000, 0x28003).r(m_exio, FUNC(namcos10_mgexio_device::cpu_status_r)); + map(0x40000, 0x40003).w(FUNC(namcos10_state::mgexio_output_w<0>)); + map(0x41000, 0x41003).w(FUNC(namcos10_state::mgexio_output_w<1>)); + map(0x42000, 0x42003).w(FUNC(namcos10_state::mgexio_output_w<2>)); + map(0x43000, 0x43003).w(FUNC(namcos10_state::mgexio_output_w<3>)); + map(0x44000, 0x44003).w(FUNC(namcos10_state::mgexio_output_w<4>)); + map(0x45000, 0x45003).w(FUNC(namcos10_state::mgexio_output_w<5>)); + map(0x46000, 0x46003).w(FUNC(namcos10_state::mgexio_output_w<6>)); + map(0x47000, 0x47003).w(FUNC(namcos10_state::mgexio_output_w<7>)); +} + +void namcos10_state::namcos10_map_mgexio(address_map &map) +{ + map(0x1fe00000, 0x1fffffff).m(FUNC(namcos10_state::namcos10_map_mgexio_inner)); + map(0x9fe00000, 0x9fffffff).m(FUNC(namcos10_state::namcos10_map_mgexio_inner)); + map(0xbfe00000, 0xbfffffff).m(FUNC(namcos10_state::namcos10_map_mgexio_inner)); +} + +template +void namcos10_state::mgexio_output_w(offs_t offset, uint16_t data) +{ + switch (N) { + case 0: m_mgexio_outputs[10] = data != 0; break; // led 2 + case 1: m_mgexio_outputs[9] = data != 0; break; // led 1 + case 2: m_mgexio_outputs[12] = data != 0; break; // led 4 + case 3: m_mgexio_outputs[11] = data != 0; break; // led 3 + case 4: m_mgexio_outputs[14] = data != 0; break; // led 6 + case 5: m_mgexio_outputs[13] = data != 0; break; // led 5 + case 6: m_mgexio_outputs[15] = data != 0; break; // led 7 + default: break; + } +} + +INPUT_CHANGED_MEMBER(namcos10_state::mgexio_coin_start) +{ + if (newval && m_mgexio_coin_start_time[param] == attotime::never) + m_mgexio_coin_start_time[param] = machine().time(); +} + +/////////////////////////////////////////////////////////////////////////////////////////////// + +void namcos10_state::namcos10_exfinalio(machine_config &config) +{ + // TODO: Implement EXFINAL I/O board + // Only seen on Medal no Tatsujin? +} /////////////////////////////////////////////////////////////////////////////////////////////// // MEM(M) @@ -1111,6 +1513,21 @@ void namcos10_memm_state::ns10_mrdrilr2(machine_config &config) /////////////////////////////////////////////////////////////////////////////////////////////// // MEM(N) +void namcos10_memn_state::pio_dma_write(uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size) +{ + // Are DMA writes ever performed? + logerror("%s: pio_dma_write: unhandled DMA write %08x %08x\n", machine().describe_context(), n_address, n_size); +} + +void namcos10_memn_state::pio_dma_read(uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size) +{ + logerror("%s: pio_dma_read: DMA read %08x %08x\n", machine().describe_context(), n_address, n_size * 4); + auto ptr = util::little_endian_cast(&p_n_psxram[n_address / 4]); + for (auto i = 0; i < n_size * 2; i++) { + ptr[i] = nand_data_r(); + } +} + uint16_t namcos10_memn_state::nand_rnb_r() { return m_nand_rnb_state[m_nand_device_idx]; @@ -1119,6 +1536,7 @@ uint16_t namcos10_memn_state::nand_rnb_r() void namcos10_memn_state::crypto_switch_w(uint16_t data) { logerror("%s: crypto_switch_w: %04x\n", machine().describe_context(), data); + if (!m_decrypter.found()) return; @@ -1217,24 +1635,11 @@ void namcos10_memn_state::namcos10_memn_base(machine_config &config) { namcos10_base(config); + m_maincpu->subdevice("dma")->install_read_handler(5, psxdma_device::read_delegate(&namcos10_memn_state::pio_dma_read, this)); + m_maincpu->subdevice("dma")->install_write_handler(5, psxdma_device::write_delegate(&namcos10_memn_state::pio_dma_write, this)); m_maincpu->set_addrmap(AS_PROGRAM, &namcos10_memn_state::namcos10_memn_map); } -void namcos10_memn_state::namcos10_exio(machine_config &config) -{ - TMP95C061(config, m_exio_mcu, XTAL(22'118'400)).set_disable(); // not hooked up -} - -void namcos10_memn_state::namcos10_mgexio(machine_config &config) -{ - TMP95C061(config, m_exio_mcu, XTAL(22'118'400)).set_disable(); // not hooked up -} - -void namcos10_memn_state::namcos10_exfinalio(machine_config &config) -{ - TMP95C061(config, m_exio_mcu, XTAL(22'118'400)).set_disable(); // not hooked up -} - void namcos10_memn_state::machine_start() { namcos10_state::machine_start(); @@ -1366,6 +1771,12 @@ void namcos10_memn_state::init_konotako() memn_driver_init(); } +void namcos10_memn_state::init_medalnt() +{ + m_unscrambler = [] (uint16_t data) { return bitswap<16>(data, 0xd, 0xf, 0xc, 0xe, 0x8, 0x9, 0xa, 0xb, 0x5, 0x4, 0x6, 0x7, 0x2, 0x3, 0x0, 0x1); }; + memn_driver_init(); +} + void namcos10_memn_state::init_medalnt2() { m_unscrambler = [] (uint16_t data) { return bitswap<16>(data, 0xd, 0xf, 0xc, 0xe, 0xa, 0x8, 0xb, 0x9, 0x4, 0x7, 0x6, 0x5, 0x1, 0x3, 0x0, 0x2); }; @@ -1414,6 +1825,12 @@ void namcos10_memn_state::init_startrgn() memn_driver_init(); } +void namcos10_memn_state::init_sugorotic() +{ + m_unscrambler = [] (uint16_t data) { return bitswap<16>(data, 0xd, 0xc, 0xe, 0xf, 0x9, 0xb, 0x8, 0xa, 0x4, 0x5, 0x6, 0x7, 0x0, 0x1, 0x2, 0x3); }; + memn_driver_init(); +} + void namcos10_memn_state::init_taiko2() { m_unscrambler = [] (uint16_t data) { return bitswap<16>(data, 0xc, 0xd, 0xe, 0xf, 0x9, 0x8, 0xb, 0xa, 0x6, 0x4, 0x7, 0x5, 0x2, 0x3, 0x0, 0x1); }; @@ -1444,12 +1861,6 @@ void namcos10_memn_state::init_taiko6() memn_driver_init(); } -void namcos10_memn_state::init_unks10md() -{ - m_unscrambler = [] (uint16_t data) { return bitswap<16>(data, 0xd, 0xf, 0xc, 0xe, 0x8, 0x9, 0xa, 0xb, 0x5, 0x4, 0x6, 0x7, 0x2, 0x3, 0x0, 0x1); }; - memn_driver_init(); -} - void namcos10_memn_state::namcos10_nand_k9f2808u0b(machine_config &config, int nand_count) { for (int i = 0; i < nand_count; i++) { @@ -1469,6 +1880,7 @@ void namcos10_memn_state::namcos10_nand_k9f5608u0d(machine_config &config, int n void namcos10_memn_state::ns10_ballpom(machine_config &config) { namcos10_memn_base(config); + namcos10_mgexio(config); namcos10_nand_k9f2808u0b(config, 2); /* decrypter device (CPLD in hardware?) */ @@ -1480,26 +1892,75 @@ void namcos10_memn_state::ns10_chocovdr(machine_config &config) namcos10_memn_base(config); namcos10_nand_k9f2808u0b(config, 5); - /* decrypter device (CPLD in hardware?) */ - CHOCOVDR_DECRYPTER(config, m_decrypter, 0); + NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, ns10_type2_decrypter_device::ns10_crypto_logic{ + { + 0x00005239351ec1daull, 0x0000000000008090ull, 0x0000000048264808ull, 0x0000000000004820ull, + 0x0000000000000500ull, 0x0000000058ff5a54ull, 0x00000000d8220208ull, 0x00005239351e91d3ull, + 0x000000009a1dfaffull, 0x0000000090040001ull, 0x0000000000000100ull, 0x0000000000001408ull, + 0x0000000032efd3f1ull, 0x00000000000000d0ull, 0x0000000032efd2d7ull, 0x0000000000000840ull, + }, { + 0x00002000410485daull, 0x0000000000008081ull, 0x0000000008044088ull, 0x0000000000004802ull, + 0x0000000000000500ull, 0x00000000430cda54ull, 0x0000000010000028ull, 0x00002000410491dbull, + 0x000000001100fafeull, 0x0000000018040001ull, 0x0000000000000010ull, 0x0000000000000508ull, + 0x000000006800d3f5ull, 0x0000000000000058ull, 0x000000006800d2d5ull, 0x0000000000001840ull, + }, + 0x5b22, + [] (uint64_t previous_cipherwords, uint64_t previous_plainwords, const ns10_type2_decrypter_device::gf2_reducer& reducer) { + uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; + return ((previous_masks >> 9) & (reducer.gf2_reduce(0x0000000010065810ull & previous_cipherwords) ^ reducer.gf2_reduce(0x0000000021005810ull & previous_plainwords)) & 1) << 10; + } + }); } void namcos10_memn_state::ns10_gahaha(machine_config &config) { namcos10_memn_base(config); + namcos10_exio(config); namcos10_nand_k9f2808u0b(config, 3); - /* decrypter device (CPLD in hardware?) */ - // GAHAHA_DECRYPTER(config, m_decrypter, 0); + NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, ns10_type2_decrypter_device::ns10_crypto_logic{ + { + 0x0000000010a08200ull, 0x00000000001b0204ull, 0x00004ba503024016ull, 0x0000000000000004ull, + 0x0000000000000240ull, 0x0000000088080180ull, 0x000011821ce50066ull, 0x000000000a204200ull, + 0x0000000014018800ull, 0x00000000000000a0ull, 0x0000000000000412ull, 0x0000000000004002ull, + 0x000000003100c002ull, 0x0000000000002100ull, 0x00000000084000a4ull, 0x0000000031010180ull, + }, { + 0x0000000000808000ull, 0x0000004400130200ull, 0x0000021804a54036ull, 0x0000000000000014ull, + 0x0000000000000240ull, 0x0000000085000100ull, 0x000008ca15400166ull, 0x000000009822c280ull, + 0x0000000014008008ull, 0x00000000000010a0ull, 0x0000000000000016ull, 0x0000000000004002ull, + 0x000000003120c000ull, 0x0000000000002100ull, 0x0000000018e002a6ull, 0x00000000a19121a0ull, + }, + 0xaea7, + [] (uint64_t previous_cipherwords, uint64_t previous_plainwords, const ns10_type2_decrypter_device::gf2_reducer& reducer) { + return 0; + } + }); } void namcos10_memn_state::ns10_gahaha2(machine_config &config) { namcos10_memn_base(config); + namcos10_exio(config); namcos10_nand_k9f2808u0b(config, 3); - /* decrypter device (CPLD in hardware?) */ - // GAHAHA2_DECRYPTER(config, m_decrypter, 0); + NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, ns10_type2_decrypter_device::ns10_crypto_logic{ + { + 0x00000080064001ull,0x0000000a000104ull,0x00018220912000ull,0x00000001822010ull, + 0x000000000001a0ull,0x000481a4220004ull,0x00a11490041269ull,0x00000000000810ull, + 0x0000000a008200ull,0x000000010b0010ull,0x00000052108820ull,0x00042209a00258ull, + 0x00000001820401ull,0x00000090040040ull,0x00000000001002ull,0x00209008020004ull + }, { + 0x00000000020001ull,0x0000000a000024ull,0x00018000830400ull,0x00000001802002ull, + 0x00000000000130ull,0x00200110060004ull,0x000581080c1260ull,0x00000000000810ull, + 0x0000000a008040ull,0x00000021bf0010ull,0x00000040588820ull,0x00003000220210ull, + 0x00000001800400ull,0x00000090000040ull,0x00000000009002ull,0x000403a5020004ull + }, + 0x925a, + [] (uint64_t previous_cipherwords, uint64_t previous_plainwords, const ns10_type2_decrypter_device::gf2_reducer& reducer) { + u64 previous_masks = previous_cipherwords^previous_plainwords; + return (1 & ((previous_masks >> 26) ^ (previous_masks >> 37)) & (previous_masks >> 46)) * 0x8860; + } + }); } void namcos10_memn_state::ns10_gamshara(machine_config &config) @@ -1507,8 +1968,24 @@ void namcos10_memn_state::ns10_gamshara(machine_config &config) namcos10_memn_base(config); namcos10_nand_k9f2808u0b(config, 2); - /* decrypter device (CPLD in hardware?) */ - GAMSHARA_DECRYPTER(config, m_decrypter, 0); + NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, ns10_type2_decrypter_device::ns10_crypto_logic{ + { + 0x0000000000000028ull, 0x0000cae83f389fd9ull, 0x0000000000001000ull, 0x0000000042823402ull, + 0x0000cae8736a0592ull, 0x0000cae8736a8596ull, 0x000000008b4095b9ull, 0x0000000000002100ull, + 0x0000000004018228ull, 0x0000000000000042ull, 0x0000000000000818ull, 0x0000000000004010ull, + 0x000000008b4099f1ull, 0x00000000044bce08ull, 0x00000000000000c1ull, 0x0000000042823002ull, + }, { + 0x0000000000000028ull, 0x00000904c2048dd9ull, 0x0000000000008000ull, 0x0000000054021002ull, + 0x00000904e0078592ull, 0x00000904e00785b2ull, 0x00000000440097f9ull, 0x0000000000002104ull, + 0x0000000029018308ull, 0x0000000000000042ull, 0x0000000000000850ull, 0x0000000000004012ull, + 0x000000004400d1f1ull, 0x000000006001ce08ull, 0x00000000000000c8ull, 0x0000000054023002ull, + }, + 0x25ab, + [] (uint64_t previous_cipherwords, uint64_t previous_plainwords, const ns10_type2_decrypter_device::gf2_reducer& reducer) { + uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; + return ((previous_masks >> 7) & (previous_masks >> 13) & 1) << 2; + } + }); } void namcos10_memn_state::ns10_gegemdb(machine_config &config) @@ -1526,8 +2003,23 @@ void namcos10_memn_state::ns10_gjspace(machine_config &config) namcos10_memn_base(config); namcos10_nand_k9f2808u0b(config, 4); - /* decrypter device (CPLD in hardware?) */ - GJSPACE_DECRYPTER(config, m_decrypter, 0); + NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, ns10_type2_decrypter_device::ns10_crypto_logic{ + { + 0x0000000000000240ull, 0x0000d617eb0f1ab1ull, 0x00000000451111c0ull, 0x00000000013b1f44ull, + 0x0000aab0b356abceull, 0x00007ca76b89602aull, 0x0000000000001800ull, 0x00000000031d1303ull, + 0x0000000000000801ull, 0x0000000030111160ull, 0x0000000001ab3978ull, 0x00000000c131b160ull, + 0x0000000000001110ull, 0x0000000000008002ull, 0x00000000e1113540ull, 0x0000d617fdce8bfcull, + }, { + 0x0000000000008240ull, 0x000000002f301ab1ull, 0x00000000050011c0ull, 0x00000000412817c4ull, + 0x00000004c338abc6ull, 0x000000046108602aull, 0x0000000000005800ull, 0x00000000c3081347ull, + 0x0000000000000801ull, 0x0000000061001160ull, 0x0000000061183978ull, 0x00000000e520b142ull, + 0x0000000000001101ull, 0x000000000000a002ull, 0x0000000029001740ull, 0x00000000a4309bfcull, + }, + 0x2e7f, + [] (uint64_t previous_cipherwords, uint64_t previous_plainwords, const ns10_type2_decrypter_device::gf2_reducer& reducer) { + return 0; + } + }); } void namcos10_memn_state::ns10_kd2001(machine_config &config) @@ -1537,8 +2029,7 @@ void namcos10_memn_state::ns10_kd2001(machine_config &config) // TODO: Also has a "pdrive" ROM? What's that for? - /* decrypter device (CPLD in hardware?) */ - // KD2001_DECRYPTER(config, m_decrypter, 0); + // NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, logic); } void namcos10_memn_state::ns10_keroro(machine_config &config) @@ -1547,8 +2038,7 @@ void namcos10_memn_state::ns10_keroro(machine_config &config) namcos10_exio(config); namcos10_nand_k9f5608u0d(config, 2); - /* decrypter device (CPLD in hardware?) */ - // KERORO_DECRYPTER(config, m_decrypter, 0); + // NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, logic); } void namcos10_memn_state::ns10_knpuzzle(machine_config &config) @@ -1556,8 +2046,24 @@ void namcos10_memn_state::ns10_knpuzzle(machine_config &config) namcos10_memn_base(config); namcos10_nand_k9f2808u0b(config, 3); - /* decrypter device (CPLD in hardware?) */ - KNPUZZLE_DECRYPTER(config, m_decrypter, 0); + NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, ns10_type2_decrypter_device::ns10_crypto_logic{ + { + 0x00000000c0a4208cull, 0x00000000204100a8ull, 0x000000000c0306a0ull, 0x000000000819e944ull, + 0x0000000000001400ull, 0x0000000000000061ull, 0x000000000141401cull, 0x0000000000000020ull, + 0x0000000001418010ull, 0x00008d6a1eb690cfull, 0x00008d6a4d3b90ceull, 0x0000000000004201ull, + 0x00000000012c00a2ull, 0x000000000c0304a4ull, 0x0000000000000500ull, 0x0000000000000980ull, + }, { + 0x000000002a22608cull, 0x00000000002300a8ull, 0x0000000000390ea0ull, 0x000000000100a9c4ull, + 0x0000000000001400ull, 0x0000000000000041ull, 0x0000000003014014ull, 0x0000000000000022ull, + 0x0000000003010110ull, 0x00000800031a80cfull, 0x00000800003398deull, 0x0000000000004200ull, + 0x00000000012a04a2ull, 0x00000000003984a4ull, 0x0000000000000700ull, 0x0000000000000882ull, + }, + 0x01e2, + [] (uint64_t previous_cipherwords, uint64_t previous_plainwords, const ns10_type2_decrypter_device::gf2_reducer& reducer) { + uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; + return ((previous_masks >> 0x13) & (reducer.gf2_reduce(0x0000000014001290ull & previous_cipherwords) ^ reducer.gf2_reduce(0x0000000000021290ull & previous_plainwords)) & 1) << 1; + } + }); } void namcos10_memn_state::ns10_konotako(machine_config &config) @@ -1565,17 +2071,76 @@ void namcos10_memn_state::ns10_konotako(machine_config &config) namcos10_memn_base(config); namcos10_nand_k9f2808u0b(config, 2); - /* decrypter device (CPLD in hardware?) */ - KONOTAKO_DECRYPTER(config, m_decrypter, 0); + NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, ns10_type2_decrypter_device::ns10_crypto_logic{ + { + 0x000000000000004cull, 0x00000000d39e3d3dull, 0x0000000000001110ull, 0x0000000000002200ull, + 0x000000003680c008ull, 0x0000000000000281ull, 0x0000000000005002ull, 0x00002a7371895a47ull, + 0x0000000000000003ull, 0x00002a7371897a4eull, 0x00002a73aea17a41ull, 0x00002a73fd895a4full, + 0x000000005328200aull, 0x0000000000000010ull, 0x0000000000000040ull, 0x0000000000000200ull, + }, { + 0x000000000000008cull, 0x0000000053003d25ull, 0x0000000000001120ull, 0x0000000000002200ull, + 0x0000000037004008ull, 0x0000000000000282ull, 0x0000000000006002ull, 0x0000060035005a47ull, + 0x0000000000000003ull, 0x0000060035001a4eull, 0x0000060025007a41ull, 0x00000600b5005a2full, + 0x000000009000200bull, 0x0000000000000310ull, 0x0000000000001840ull, 0x0000000000000400ull, + }, + 0x0748, + [] (uint64_t previous_cipherwords, uint64_t previous_plainwords, const ns10_type2_decrypter_device::gf2_reducer& reducer) { + uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; + return ((previous_masks >> 7) & (previous_masks >> 15) & 1) << 15; + } + }); +} + +void namcos10_memn_state::ns10_medalnt(machine_config &config) +{ + namcos10_memn_base(config); + namcos10_exfinalio(config); + namcos10_nand_k9f2808u0b(config, 2); + + NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, ns10_type2_decrypter_device::ns10_crypto_logic{ + { + 0x00000080601000ull,0x00000000006020ull,0x00000000004840ull,0x00000000000201ull, + 0x00000000020004ull,0x00000000000081ull,0x00000000009001ull,0x00000001041810ull, + 0x000000ca001806ull,0x00000080600500ull,0x00000000002022ull,0x0000002204001cull, + 0x0000000c508044ull,0x00000000000808ull,0x000000ca001094ull,0x00000000000184ull + }, { + 0x00000081201000ull,0x00000000006080ull,0x00000000000840ull,0x00000000000201ull, + 0x00000000080005ull,0x00000000000081ull,0x00000000009004ull,0x000000042c4810ull, + 0x0000000a003006ull,0x00000081201100ull,0x00000000008022ull,0x00000028050034ull, + 0x0000004c000044ull,0x0000000000080aull,0x0000000a001214ull,0x00000000000190ull + }, + 0x5d04, + [] (uint64_t previous_cipherwords, uint64_t previous_plainwords, const ns10_type2_decrypter_device::gf2_reducer& reducer) { + uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; + return (1 & (previous_masks>>26) & (reducer.gf2_reduce(previous_cipherwords & 0x10100080) ^ reducer.gf2_reduce(previous_plainwords & 0x40100080))) << 4; + } + }); } void namcos10_memn_state::ns10_medalnt2(machine_config &config) { namcos10_memn_base(config); + namcos10_exfinalio(config); namcos10_nand_k9f5608u0d(config, 2); - /* decrypter device (CPLD in hardware?) */ - // MEDALNT2_DECRYPTER(config, m_decrypter, 0); + NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, ns10_type2_decrypter_device::ns10_crypto_logic{ + { + 0x00000000000202ull,0x00242000120110ull,0x00000001624608ull,0x00000000001820ull, + 0x0000000000c040ull,0x00000000000184ull,0x00000007900002ull,0x00000000005008ull, + 0x00000000008401ull,0x00000000008800ull,0x00000000000250ull,0x00000000002000ull, + 0x00000000000024ull,0x00000000006080ull,0x00000000000042ull,0x00000007900006ull + }, { + 0x00000000000203ull,0x00442000140120ull,0x00000002024008ull,0x00000000001840ull, + 0x00000000004040ull,0x00000000000188ull,0x00000000200002ull,0x00000000006008ull, + 0x00000000008801ull,0x00000000009000ull,0x00000000000290ull,0x00000000002003ull, + 0x00000000000024ull,0x0000000000a080ull,0x00000000000042ull,0x0000000020001eull + }, + 0x4c57, + [] (uint64_t previous_cipherwords, uint64_t previous_plainwords, const ns10_type2_decrypter_device::gf2_reducer& reducer) { + uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; + return (((previous_masks>>15) & (reducer.gf2_reduce(previous_cipherwords & 0x24200000) ^ reducer.gf2_reduce(previous_plainwords & 0x44200000))) & 1) << 9; + } + }); } void namcos10_memn_state::ns10_mrdrilrg(machine_config &config) @@ -1583,8 +2148,7 @@ void namcos10_memn_state::ns10_mrdrilrg(machine_config &config) namcos10_memn_base(config); namcos10_nand_k9f2808u0b(config, 3); - /* decrypter device (CPLD in hardware?) */ - // MRDRILRG_DECRYPTER(config, m_decrypter, 0); + // NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, logic); } void namcos10_memn_state::ns10_nflclsfb(machine_config &config) @@ -1593,17 +2157,50 @@ void namcos10_memn_state::ns10_nflclsfb(machine_config &config) namcos10_exio(config); namcos10_nand_k9f2808u0b(config, 4); - /* decrypter device (CPLD in hardware?) */ - NFLCLSFB_DECRYPTER(config, m_decrypter, 0); + NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, ns10_type2_decrypter_device::ns10_crypto_logic{ + { + 0x000034886e281880ull, 0x0000000012c5e7baull, 0x0000000000000200ull, 0x000000002900002aull, + 0x00000000000004c0ull, 0x0000000012c5e6baull, 0x00000000e0df8bbbull, 0x000000002011532aull, + 0x0000000000009040ull, 0x0000000000006004ull, 0x000000000000a001ull, 0x000034886e2818e1ull, + 0x0000000000004404ull, 0x0000000000004200ull, 0x0000000000009100ull, 0x0000000020115712ull, + }, { + 0x00000e00060819c0ull, 0x000000000e08e7baull, 0x0000000000000800ull, 0x000000000100002aull, + 0x00000000000010c0ull, 0x000000000e08cebaull, 0x0000000088018bbbull, 0x000000008c005302ull, + 0x000000000000c040ull, 0x0000000000006010ull, 0x0000000000000001ull, 0x00000e00060818e3ull, + 0x0000000000000404ull, 0x0000000000004201ull, 0x0000000000001100ull, 0x000000008c0057b2ull, + }, + 0xbe32, + [] (uint64_t previous_cipherwords, uint64_t previous_plainwords, const ns10_type2_decrypter_device::gf2_reducer& reducer) { + uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; + return ((previous_masks >> 1) & (reducer.gf2_reduce(0x0000000040de8fb3ull & previous_cipherwords) ^ reducer.gf2_reduce(0x0000000088008fb3ull & previous_plainwords)) & 1) << 2; + } + }); } void namcos10_memn_state::ns10_pacmball(machine_config &config) { namcos10_memn_base(config); + namcos10_mgexio(config); namcos10_nand_k9f2808u0b(config, 2); - /* decrypter device (CPLD in hardware?) */ - // PACMBALL_DECRYPTER(config, m_decrypter, 0); + NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, ns10_type2_decrypter_device::ns10_crypto_logic{ + { + 0x00000000008028ull, 0x00000000000400ull, 0x000000a9100004ull, 0x00000028004200ull, + 0x00000000001002ull, 0x00000000001041ull, 0x00001a70008022ull, 0x00000081100022ull, + 0x00000000000890ull, 0x00000000003040ull, 0x00e00000108411ull, 0x000000000000a4ull, + 0x00000000000980ull, 0x00000000004208ull, 0x00000000000300ull, 0x00e00000108001ull + }, { + 0x00000000008030ull, 0x00000000000800ull, 0x00000029100008ull, 0x00000028008200ull, + 0x00000000001002ull, 0x00000000002041ull, 0x00002e20038024ull, 0x00000001100042ull, + 0x00000000001090ull, 0x00000000003080ull, 0x00800000228421ull, 0x00000000000124ull, + 0x00000000000a80ull, 0x00000000004408ull, 0x00000000000300ull, 0x00800000228002ull, + }, + 0x247c, + [] (uint64_t previous_cipherwords, uint64_t previous_plainwords, const ns10_type2_decrypter_device::gf2_reducer& reducer) { + uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; + return ((previous_masks >> 2) & (previous_masks >> 6) & 1) << 1; + } + }); } void namcos10_memn_state::ns10_panikuru(machine_config &config) @@ -1611,8 +2208,7 @@ void namcos10_memn_state::ns10_panikuru(machine_config &config) namcos10_memn_base(config); namcos10_nand_k9f2808u0b(config, 3); - /* decrypter device (CPLD in hardware?) */ - // PANIKURU_DECRYPTER(config, m_decrypter, 0); + // NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, logic); } void namcos10_memn_state::ns10_ptblank3(machine_config &config) @@ -1620,8 +2216,7 @@ void namcos10_memn_state::ns10_ptblank3(machine_config &config) namcos10_memn_base(config); namcos10_nand_k9f2808u0b(config, 2); - /* decrypter device (CPLD in hardware?) */ - // PTBLANK3_DECRYPTER(config, m_decrypter, 0); + // NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, logic); } void namcos10_memn_state::ns10_puzzball(machine_config &config) @@ -1629,8 +2224,7 @@ void namcos10_memn_state::ns10_puzzball(machine_config &config) namcos10_memn_base(config); namcos10_nand_k9f2808u0b(config, 2); - /* decrypter device (CPLD in hardware?) */ - // PUZZBALL_DECRYPTER(config, m_decrypter, 0); + // NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, logic); } void namcos10_memn_state::ns10_sekaikh(machine_config &config) @@ -1639,8 +2233,25 @@ void namcos10_memn_state::ns10_sekaikh(machine_config &config) namcos10_mgexio(config); namcos10_nand_k9f2808u0b(config, 2); - /* decrypter device (CPLD in hardware?) */ - // SEKAIKH_DECRYPTER(config, m_decrypter, 0); + NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, ns10_type2_decrypter_device::ns10_crypto_logic{ + { + 0x00000000000510ull, 0x00000000004000ull, 0x00000000000406ull, 0x00000000000400ull, + 0x000000c0410890ull, 0x00000041610800ull, 0x00000000002008ull, 0x0000002051a000ull, + 0x00000008800020ull, 0x00000008800014ull, 0x00000000000800ull, 0x00000000004001ull, + 0x00000041610884ull, 0x00000042308018ull, 0x00000000000888ull, 0x00000070014820ull + }, + { + 0x00000000000100ull, 0x00000000005040ull, 0x00000000000402ull, 0x00000000000608ull, + 0x00000084020892ull, 0x00000001418a00ull, 0x00000000000008ull, 0x00000000d0a400ull, + 0x00000000801020ull, 0x00000000800004ull, 0x00000000000020ull, 0x00000000000001ull, + 0x00000001410806ull, 0x000000042c8019ull, 0x00000000000880ull, 0x000000b0010920ull, + }, + 0x3aa8, + [] (uint64_t previous_cipherwords, uint64_t previous_plainwords, const ns10_type2_decrypter_device::gf2_reducer& reducer) { + uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; + return ((previous_masks >> 0) & (previous_masks >> 3) & 1) << 10; + } + }); } void namcos10_memn_state::ns10_startrgn(machine_config &config) @@ -1648,38 +2259,77 @@ void namcos10_memn_state::ns10_startrgn(machine_config &config) namcos10_memn_base(config); namcos10_nand_k9f2808u0b(config, 2); - /* decrypter device (CPLD in hardware?) */ - STARTRGN_DECRYPTER(config, m_decrypter, 0); + NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, ns10_type2_decrypter_device::ns10_crypto_logic{ + { + 0x00003e4bfe92c6a9ull, 0x000000000000010cull, 0x00003e4b7bd6c4aaull, 0x0000b1a904b8fab8ull, + 0x0000000000000080ull, 0x0000000000008c00ull, 0x0000b1a9b2f0b4cdull, 0x000000006c100828ull, + 0x000000006c100838ull, 0x0000b1a9d3913fcdull, 0x000000006161aa00ull, 0x0000000000006040ull, + 0x0000000000000420ull, 0x0000000000001801ull, 0x00003e4b7bd6deabull, 0x0000000000000105ull, + }, { + 0x000012021f00c6a8ull, 0x0000000000000008ull, 0x000012020b1046aaull, 0x000012001502fea8ull, + 0x0000000000002000ull, 0x0000000000008800ull, 0x000012001e02b4cdull, 0x000000002c0008aaull, + 0x000000002c00083aull, 0x000012003f027ecdull, 0x0000000021008a00ull, 0x0000000000002040ull, + 0x0000000000000428ull, 0x0000000000001001ull, 0x000012020b10ceabull, 0x0000000000000144ull, + }, + 0x8c46, + [] (uint64_t previous_cipherwords, uint64_t previous_plainwords, const ns10_type2_decrypter_device::gf2_reducer& reducer) { + uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; + return ((previous_masks >> 12) & (previous_masks >> 14) & 1) << 4; + } + }); +} + +void namcos10_memn_state::ns10_sugorotic(machine_config &config) +{ + namcos10_memn_base(config); + namcos10_mgexio(config); + namcos10_nand_k9f2808u0b(config, 2); + + NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, ns10_type2_decrypter_device::ns10_crypto_logic{ + { + 0x00061402200010ull,0x00000000b2a150ull,0x00000080280021ull,0x00000000000880ull, + 0x00061410010004ull,0x00000000000800ull,0x00000000000141ull,0x00000041002000ull, + 0x00000000000084ull,0x00000000020401ull,0x00000041120100ull,0x00000000020480ull, + 0x00000000b21110ull,0x00000000128800ull,0x00000000003000ull,0x00061410014020ull + }, { + 0x00223011000034ull,0x00000040228150ull,0x00000000280101ull,0x00000000000880ull, + 0x00223010010004ull,0x00000000000848ull,0x00000000000301ull,0x00000041002001ull, + 0x00000000000084ull,0x00000000100408ull,0x00000041160800ull,0x00000000100000ull, + 0x00000040228110ull,0x0000000016c000ull,0x00000000003002ull,0x00223010010020ull + }, + 0x9006, + [] (uint64_t previous_cipherwords, uint64_t previous_plainwords, const ns10_type2_decrypter_device::gf2_reducer& reducer) { + uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; + return (1 & (previous_masks >> 25) & (previous_masks >> 22)) * 0xa00; + } + }); } void namcos10_memn_state::ns10_taiko2(machine_config &config) { namcos10_memn_base(config); - namcos10_exfinalio(config); + namcos10_exio(config); namcos10_nand_k9f2808u0b(config, 3); - /* decrypter device (CPLD in hardware?) */ - // TAIKO2_DECRYPTER(config, m_decrypter, 0); + // NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, logic); } void namcos10_memn_state::ns10_taiko3(machine_config &config) { namcos10_memn_base(config); - namcos10_exfinalio(config); + namcos10_exio(config); namcos10_nand_k9f2808u0b(config, 3); - /* decrypter device (CPLD in hardware?) */ - // TAIKO3_DECRYPTER(config, m_decrypter, 0); + // NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, logic); } void namcos10_memn_state::ns10_taiko4(machine_config &config) { namcos10_memn_base(config); - namcos10_exfinalio(config); + namcos10_exio(config); namcos10_nand_k9f2808u0b(config, 3); - /* decrypter device (CPLD in hardware?) */ - // TAIKO4_DECRYPTER(config, m_decrypter, 0); + // NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, logic); } void namcos10_memn_state::ns10_taiko5(machine_config &config) @@ -1688,80 +2338,160 @@ void namcos10_memn_state::ns10_taiko5(machine_config &config) namcos10_exfinalio(config); namcos10_nand_k9f2808u0b(config, 3); - /* decrypter device (CPLD in hardware?) */ - // TAIKO5_DECRYPTER(config, m_decrypter, 0); + // NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, logic); } void namcos10_memn_state::ns10_taiko6(machine_config &config) { namcos10_memn_base(config); - namcos10_exfinalio(config); + namcos10_exio(config); namcos10_nand_k9f2808u0b(config, 3); - /* decrypter device (CPLD in hardware?) */ - // TAIKO6_DECRYPTER(config, m_decrypter, 0); -} - -void namcos10_memn_state::ns10_unks10md(machine_config &config) -{ - namcos10_memn_base(config); - namcos10_nand_k9f2808u0b(config, 2); - - /* decrypter device (CPLD in hardware?) */ - // UNKS10MD_DECRYPTER(config, m_decrypter, 0); + // NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, logic); } /////////////////////////////////////////////////////////////////////////////////////////////// // MEM(P3) -void namcos10_memp3_state::nand_copy(uint8_t *nand_base, uint16_t *dst, uint32_t start_page, int len) +void namcos10_memp3_state::firmware_write_w(uint16_t data) { - for (int page = start_page; page < start_page + len; page++) - { - int address = page * 0x210; - - for (int i = 0; i < 0x200; i += 2) { - uint16_t data = nand_base[address + i + 1] | (nand_base[address + i] << 8); - *dst = m_unscrambler(data ^ 0xaaaa); - dst++; - } + if (data == 1) { + m_memp3_mcu->reset(); } } -void namcos10_memp3_state::memp3_driver_init() +void namcos10_memp3_state::ram_bank_w(uint16_t data) { - uint8_t *bios = (uint8_t *)memregion("maincpu:rom")->base(); - uint8_t *nand_base = (uint8_t *)memregion("nand0")->base(); + m_mcu_ram_bank = data; +} - nand_copy(nand_base, (uint16_t *)bios, 0x40, 0xe0); - nand_copy(nand_base, (uint16_t *)(bios + 0x0020000), 0x120, 0x1f00); +uint16_t namcos10_memp3_state::unk_status1_r() +{ + // Can't upload CPU program unless this is 1 + return 1; +} + +uint16_t namcos10_memp3_state::ram_r(offs_t offset) +{ + return m_mcu_ram[m_mcu_ram_bank * 0x10000 + offset]; +} + +void namcos10_memp3_state::ram_w(offs_t offset, uint16_t data) +{ + m_mcu_ram[m_mcu_ram_bank * 0x10000 + offset] = data; +} + +uint16_t namcos10_memp3_state::unk_status2_r() +{ + // Some kind of status flag. + // Game code loops until this is non-zero before writing to data to f30000c/320000. + // Possibly related to MP3 decoder? + return 1; +} + +uint16_t namcos10_memp3_state::io_analog_r(offs_t offset) +{ + return m_p3_analog[offset].read_safe(0); +} + +void namcos10_memp3_state::namcos10_memp3_map_inner(address_map &map) +{ + map(0xf300000, 0xf300001).w(FUNC(namcos10_memp3_state::firmware_write_w)); + // 1f300004 unk + map(0xf300006, 0xf300007).r(FUNC(namcos10_memp3_state::unk_status2_r)); + map(0xf30000c, 0xf30000d).w(FUNC(namcos10_memp3_state::ram_bank_w)); + map(0xf30000e, 0xf30000f).r(FUNC(namcos10_memp3_state::unk_status1_r)); + map(0xf320000, 0xf33ffff).rw(FUNC(namcos10_memp3_state::ram_r), FUNC(namcos10_memp3_state::ram_w)); + map(0xf33fff0, 0xf33fff7).r(FUNC(namcos10_memp3_state::io_analog_r)); +} + +void namcos10_memp3_state::namcos10_memp3_map(address_map &map) +{ + namcos10_memn_map(map); + + map(0x10000000, 0x1fffffff).m(FUNC(namcos10_memp3_state::namcos10_memp3_map_inner)); + map(0x90000000, 0x9fffffff).m(FUNC(namcos10_memp3_state::namcos10_memp3_map_inner)); + map(0xb0000000, 0xbfffffff).m(FUNC(namcos10_memp3_state::namcos10_memp3_map_inner)); +} + +void namcos10_memp3_state::mcu_map(address_map &map) +{ + map(0x000000, 0x7fffff).ram().mirror(0x800000).share(m_mcu_ram); } void namcos10_memp3_state::namcos10_memp3_base(machine_config &config) { namcos10_base(config); - TMP95C061(config, m_memp3_mcu, XTAL(16'934'400)).set_disable(); // not hooked up + m_maincpu->subdevice("dma")->install_read_handler(5, psxdma_device::read_delegate(&namcos10_memp3_state::pio_dma_read, this)); + m_maincpu->subdevice("dma")->install_write_handler(5, psxdma_device::write_delegate(&namcos10_memp3_state::pio_dma_read, this)); + m_maincpu->set_addrmap(AS_PROGRAM, &namcos10_memp3_state::namcos10_memp3_map); + + TMP95C061(config, m_memp3_mcu, XTAL(16'934'400)); + m_memp3_mcu->set_addrmap(AS_PROGRAM, &namcos10_memp3_state::mcu_map); + // LC82310 16.9344MHz } -void namcos10_memp3_state::init_g13jnc() +void namcos10_memp3_state::machine_start() { - m_unscrambler = [] (uint16_t data) { return bitswap<16>(data, 0xe, 0xd, 0xc, 0xf, 0x9, 0xb, 0x8, 0xa, 0x6, 0x7, 0x4, 0x5, 0x1, 0x3, 0x0, 0x2); }; - memp3_driver_init(); + namcos10_memn_state::machine_start(); + + save_item(NAME(m_mcu_ram_bank)); } -void namcos10_memp3_state::ns10_g13jnc(machine_config &config) +void namcos10_memp3_state::machine_reset() +{ + namcos10_memn_state::machine_reset(); + + m_mcu_ram_bank = 0; + + m_memp3_mcu->suspend(SUSPEND_REASON_HALT, 1); +} + +void namcos10_memp3_state::init_g13jnr() +{ + m_unscrambler = [] (uint16_t data) { return bitswap<16>(data, 0xe, 0xd, 0xc, 0xf, 0x9, 0xb, 0x8, 0xa, 0x6, 0x7, 0x4, 0x5, 0x1, 0x3, 0x0, 0x2); }; + memn_driver_init(); +} + +void namcos10_memp3_state::init_nicetsuk() +{ + m_unscrambler = [] (uint16_t data) { return bitswap<16>(data, 0xc, 0xf, 0xe, 0xd, 0xa, 0x8, 0xb, 0x9, 0x5, 0x4, 0x6, 0x7, 0x2, 0x3, 0x0, 0x1); }; + memn_driver_init(); +} + +void namcos10_memp3_state::ns10_g13jnr(machine_config &config) { namcos10_memp3_base(config); + namcos10_nand_k9f2808u0b(config, 6); - /* decrypter device (CPLD in hardware?) */ - // G13JNC_DECRYPTER(config, m_decrypter, 0); + NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, ns10_type2_decrypter_device::ns10_crypto_logic{ + { + 0x005600001c0582ull, 0x00000000004024ull, 0x00010212403000ull, 0x00000000008404ull, + 0x00005121060021ull, 0x00010212402001ull, 0x00000001024000ull, 0x00000000000840ull, + 0x000981c2100148ull, 0x00000020108400ull, 0x00000008110134ull, 0x00000000000003ull, + 0x004c9801080102ull, 0x00000040860083ull, 0x00000000000001ull, 0x00000000000288ull, + }, { + 0x00441800340584ull, 0x00000000004028ull, 0x00010212800000ull, 0x00000000000404ull, + 0x00485022000041ull, 0x00010212804001ull, 0x00000001028000ull, 0x00000000000841ull, + 0x000e0104080150ull, 0x00000023208400ull, 0x00000040110104ull, 0x00000000000003ull, + 0x00470001100102ull, 0x000000408c0083ull, 0x00000000000002ull, 0x00000000000308ull + }, + 0x9546, + [] (uint64_t previous_cipherwords, uint64_t previous_plainwords, const ns10_type2_decrypter_device::gf2_reducer& reducer) { + uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; + return (1 & (previous_masks >> 6) & (previous_masks >> 10)) << 14; + } + }); +} - for (int i = 0; i < 6; i++) { - SAMSUNG_K9F2808U0B(config, m_nand[i], 0); - // m_nand[i]->rnb_wr_callback().set([this, i] (int state) { m_nand_rnb_state[i] = state != 1; }); - } +void namcos10_memp3_state::ns10_nicetsuk(machine_config &config) +{ + namcos10_memp3_base(config); + namcos10_nand_k9f2808u0b(config, 8); + + // NS10_TYPE2_DECRYPTER(config, m_decrypter, 0, logic); } /////////////////////////////////////////////////////////////////////////////////////////////// @@ -1808,9 +2538,15 @@ static INPUT_PORTS_START( namcos10 ) PORT_BIT( 0x10000000, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_BIT( 0x20000000, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_SERVICE2 ) // Test SW + PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_TOGGLE // Test SW, almost all games expect this to be a slide type and the medal games explicitly say "slide on and off test to restart" PORT_BIT( 0x80000000, IP_ACTIVE_LOW, IPT_SERVICE1 ) + PORT_START("EXIO_IN1") + PORT_BIT( 0xffffffff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("EXIO_IN2") + PORT_BIT( 0xffffffff, IP_ACTIVE_LOW, IPT_UNUSED ) + INPUT_PORTS_END static INPUT_PORTS_START( mrdrilr2 ) @@ -1867,20 +2603,159 @@ static INPUT_PORTS_START( nflclsfb ) PORT_INCLUDE(namcos10) // TODO: Trackball (EXIO) - // TODO: IN1 controls, can't find all inputs - // 0x00000080 right side decide - // 0x00000008 select up - // 0x00000004 select down - // 0x00000002 left side choose l - // 0x00000001 left side choose r - // 0x00000010 enter - // 0x00000020 start 1p - // 0x00000040 start 2p - // 0x00008000 left side decide - // 0x00000200 left side choose r - // 0x00000100 right side choose r - // 0x00002000 start 3p - // 0x00004000 start 4p + + PORT_MODIFY("IN1") + PORT_BIT( 0x0fff1c00, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Right Side Choose L") + PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Left Side Choose L") + PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Select Down") + PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Select Up") + PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("Enter") + PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_START1 ) PORT_PLAYER(1) PORT_NAME("1P Start") + PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_START1 ) PORT_PLAYER(2) PORT_NAME("2P Start") + PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_NAME("Left Side Decide") + PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Right Side Choose R") + PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Left Side Choose R") + PORT_BIT( 0x00002000, IP_ACTIVE_LOW, IPT_START1 ) PORT_PLAYER(3) PORT_NAME("3P Start") + PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_START1 ) PORT_PLAYER(4) PORT_NAME("4P Start") + PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_NAME("Right Side Decide") + + PORT_MODIFY("SYSTEM") + PORT_DIPNAME( 0x01, 0x01, DEF_STR( Service_Mode ) ) PORT_DIPLOCATION("SW1:8") + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_MODIFY("EXIO_IN1") + PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("1P PASS 1") + PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME("2P PASS 1") + PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3) PORT_NAME("3P PASS 1") + PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(4) PORT_NAME("4P PASS 1") + + PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("1P PASS 2") + PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_NAME("2P PASS 2") + PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3) PORT_NAME("3P PASS 2") + PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(4) PORT_NAME("4P PASS 2") + + PORT_MODIFY("EXIO_IN2") + PORT_BIT( 0xffffffff, IP_ACTIVE_LOW, IPT_UNUSED ) + +INPUT_PORTS_END + +static INPUT_PORTS_START( gahaha ) + PORT_INCLUDE(namcos10) + + PORT_MODIFY("IN1") + PORT_BIT( 0x0fff7c60, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) + PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) + PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) + PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) + PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_NAME("Select Down") + PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_NAME("Select Up") + PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Enter") + + PORT_MODIFY("SYSTEM") + PORT_DIPNAME( 0x01, 0x01, DEF_STR( Service_Mode ) ) PORT_DIPLOCATION("SW1:8") + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("EXIO_ANALOG1") + PORT_BIT( 0x3ff, 0x000, IPT_AD_STICK_X ) PORT_NAME("P1 Left X") PORT_PLAYER(1) PORT_MINMAX(0x000,0x3ff) PORT_SENSITIVITY(100) PORT_KEYDELTA(50) PORT_CENTERDELTA(20) + + PORT_START("EXIO_ANALOG2") + PORT_BIT( 0x3ff, 0x000, IPT_AD_STICK_Y ) PORT_NAME("P1 Left Y") PORT_PLAYER(1) PORT_MINMAX(0x000,0x3ff) PORT_SENSITIVITY(100) PORT_KEYDELTA(50) PORT_CENTERDELTA(20) PORT_REVERSE + + PORT_START("EXIO_ANALOG3") + PORT_BIT( 0x3ff, 0x000, IPT_AD_STICK_X ) PORT_NAME("P1 Right X") PORT_PLAYER(1) PORT_MINMAX(0x000,0x3ff) PORT_SENSITIVITY(100) PORT_KEYDELTA(50) PORT_CENTERDELTA(20) PORT_REVERSE + + PORT_START("EXIO_ANALOG4") + PORT_BIT( 0x3ff, 0x000, IPT_AD_STICK_Y ) PORT_NAME("P1 Right Y") PORT_PLAYER(1) PORT_MINMAX(0x000,0x3ff) PORT_SENSITIVITY(100) PORT_KEYDELTA(50) PORT_CENTERDELTA(20) + + PORT_START("EXIO_ANALOG5") + PORT_BIT( 0x3ff, 0x000, IPT_AD_STICK_X ) PORT_NAME("P2 Left X") PORT_PLAYER(2) PORT_MINMAX(0x000,0x3ff) PORT_SENSITIVITY(100) PORT_KEYDELTA(50) PORT_CENTERDELTA(20) + + PORT_START("EXIO_ANALOG6") + PORT_BIT( 0x3ff, 0x000, IPT_AD_STICK_Y ) PORT_NAME("P2 Left Y") PORT_PLAYER(2) PORT_MINMAX(0x000,0x3ff) PORT_SENSITIVITY(100) PORT_KEYDELTA(50) PORT_CENTERDELTA(20) PORT_REVERSE + + PORT_START("EXIO_ANALOG7") + PORT_BIT( 0x3ff, 0x000, IPT_AD_STICK_X ) PORT_NAME("P2 Right X") PORT_PLAYER(2) PORT_MINMAX(0x000,0x3ff) PORT_SENSITIVITY(100) PORT_KEYDELTA(50) PORT_CENTERDELTA(20) PORT_REVERSE + + PORT_START("EXIO_ANALOG8") + PORT_BIT( 0x3ff, 0x000, IPT_AD_STICK_Y ) PORT_NAME("P2 Right Y") PORT_PLAYER(2) PORT_MINMAX(0x000,0x3ff) PORT_SENSITIVITY(100) PORT_KEYDELTA(50) PORT_CENTERDELTA(20) + +INPUT_PORTS_END + +static INPUT_PORTS_START( gjspace ) + PORT_INCLUDE(namcos10) + + PORT_MODIFY("IN1") + PORT_BIT( 0x0fff0000, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_MODIFY("SYSTEM") + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Service_Mode ) ) PORT_DIPLOCATION("SW1:1") + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + +INPUT_PORTS_END + +static INPUT_PORTS_START( g13jnr ) + PORT_INCLUDE(namcos10) + + PORT_MODIFY("IN1") + PORT_BIT( 0x071f0043, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_NAME("Down Select") + PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_NAME("Up Select") + PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Enter") + PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Trigger") + + // If the player is 10cm or closer then this will be on. + // For playability, make it so that the player has to explicity toggle the scope + // to be off to simulate stepping away from the scope instead of always having to + // hold the scope sensor button + PORT_BIT( 0x08000000, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Scope Sensor") PORT_TOGGLE + + PORT_MODIFY("SYSTEM") + // No idea what DIPSW 1 (0x80) is doing but it causes the game to freeze + PORT_DIPNAME( 0x01, 0x01, "Show Crosshair" ) PORT_DIPLOCATION("SW1:8") + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("P3_ANALOG1") + PORT_BIT( 0xffff, 0x7fff, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, -1.0, 0.0, 0) PORT_MINMAX(0x0000,0xffff) PORT_SENSITIVITY(100) PORT_KEYDELTA(100) PORT_PLAYER(1) PORT_REVERSE + + PORT_START("P3_ANALOG2") + PORT_BIT( 0xffff, 0x7fff, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_MINMAX(0x0000,0xffff) PORT_SENSITIVITY(100) PORT_KEYDELTA(100) PORT_PLAYER(1) + +INPUT_PORTS_END + +static INPUT_PORTS_START( mgexio_medal ) + PORT_INCLUDE(namcos10) + + PORT_MODIFY("IN1") + PORT_BIT( 0x0fffffe3, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Select Down") + PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Select Up") + PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Enter") + + PORT_MODIFY("SYSTEM") + PORT_DIPNAME( 0x01, 0x01, DEF_STR( Service_Mode ) ) PORT_DIPLOCATION("SW1:8") + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("MGEXIO_SENSOR") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Check Sensor(2)") + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Check Sensor(1)") + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Check Sensor(4)") + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Check Sensor(3)") + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Check Sensor(6)") + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Check Sensor(5)") + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("Check Sensor(7)") + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_TILT ) + + PORT_START("MGEXIO_COIN") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_NAME("Coin Sensor(L)") PORT_CHANGED_MEMBER(DEVICE_SELF, namcos10_state, mgexio_coin_start, 0) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_NAME("Coin Sensor(R)") PORT_CHANGED_MEMBER(DEVICE_SELF, namcos10_state, mgexio_coin_start, 1) INPUT_PORTS_END @@ -2078,13 +2953,13 @@ ROM_START( knpuzzle ) ROM_FILL( 0x0000000, 0x400000, 0x55 ) ROM_REGION32_LE( 0x1080000, "nand0", 0 ) - ROM_LOAD( "kpm1a_0.bin", 0x0000000, 0x1080000, BAD_DUMP CRC(b2947eb8) SHA1(fa941bf3598bb25d2c8f0a93154e32bf78a6507c) ) + ROM_LOAD( "kpm1vera_0.8e", 0x0000000, 0x1080000, CRC(4b4255da) SHA1(c8ec575e53596a167a07db97076fd69e6646d0f5) ) ROM_REGION32_LE( 0x1080000, "nand1", 0 ) - ROM_LOAD( "kpm1a_1.bin", 0x0000000, 0x1080000, BAD_DUMP CRC(f3aa855a) SHA1(87b94e22db4bc4169324bbff93c4ea19c1d99b40) ) + ROM_LOAD( "kpm1vera_1.8d", 0x0000000, 0x1080000, CRC(644595a6) SHA1(4b60008ca5cac894a815fe6aaa980296a83f673f) ) ROM_REGION32_LE( 0x1080000, "nand2", 0 ) - ROM_LOAD( "kpm1a_2.bin", 0x0000000, 0x1080000, BAD_DUMP CRC(b297cc8d) SHA1(c3494e7a8a0b4e0c8c40b99121373effbfe848eb) ) + ROM_LOAD( "kpm1vera_2.7e", 0x0000000, 0x1080000, CRC(6bf164e5) SHA1(b4a2e6eb18c09220b0c8ec80159d13d0e439a559) ) ROM_END ROM_START( konotako ) @@ -2098,6 +2973,17 @@ ROM_START( konotako ) ROM_LOAD( "1.8d", 0x0000000, 0x1080000, CRC(bdbed53c) SHA1(5773069c43642e6f334cee185a6fb6908eedcf4a) ) ROM_END +ROM_START( medalnt ) + ROM_REGION32_LE( 0x400000, "maincpu:rom", 0 ) + ROM_FILL( 0x0000000, 0x400000, 0x55 ) + + ROM_REGION32_LE( 0x1080000, "nand0", 0 ) + ROM_LOAD( "k9f2808u0c.8e", 0x0000000, 0x1080000, CRC(b8ce45c6) SHA1(cfc85e796e32f5f3cc16e12ce902f0ae088eea31) ) + + ROM_REGION32_LE( 0x1080000, "nand1", 0 ) + ROM_LOAD( "k9f2808u0c.8d", 0x0000000, 0x1080000, CRC(49a2a732) SHA1(1a473177827a6d0e58c289d9af064665b941519b) ) +ROM_END + ROM_START( medalnt2 ) ROM_REGION32_LE( 0x400000, "maincpu:rom", 0 ) ROM_FILL( 0x0000000, 0x400000, 0x55 ) @@ -2145,10 +3031,10 @@ ROM_START( pacmball ) ROM_FILL( 0x0000000, 0x400000, 0x55 ) ROM_REGION32_LE( 0x1080000, "nand0", 0 ) - ROM_LOAD( "k9f2808u0c.8e", 0x0000000, 0x1080000, CRC(7b6f814d) SHA1(728167866d9350150b5fd9ebcf8fe7280efedb91) ) + ROM_LOAD( "k9f2808u0c.8e", 0x0000000, 0x1080000, BAD_DUMP CRC(7b6f814d) SHA1(728167866d9350150b5fd9ebcf8fe7280efedb91) ) ROM_REGION32_LE( 0x1080000, "nand1", 0 ) - ROM_LOAD( "k9f2808u0c.8d", 0x0000000, 0x1080000, CRC(f79d7199) SHA1(4ef9b758ee778e12f7fef717e063597299fb8219) ) + ROM_LOAD( "k9f2808u0c.8d", 0x0000000, 0x1080000, BAD_DUMP CRC(f79d7199) SHA1(4ef9b758ee778e12f7fef717e063597299fb8219) ) ROM_END ROM_START( panikuru ) @@ -2187,17 +3073,6 @@ ROM_START( puzzball ) ROM_LOAD( "k9f2808u0c.8d", 0x0000000, 0x1080000, CRC(0002794e) SHA1(44b6bcea835d3dbb6b2e85ba3ea4404e1400c4f5) ) ROM_END -ROM_START( startrgn ) - ROM_REGION32_LE( 0x400000, "maincpu:rom", 0 ) - ROM_FILL( 0x0000000, 0x400000, 0x55 ) - - ROM_REGION32_LE( 0x1080000, "nand0", 0 ) - ROM_LOAD( "stt1a_0.bin", 0x0000000, 0x1080000, CRC(1e090644) SHA1(a7a293e2bd9eea2eb64a492a47272d9d9ee2c724) ) - - ROM_REGION32_LE( 0x1080000, "nand1", 0 ) - ROM_LOAD( "stt1a_1.bin", 0x0000000, 0x1080000, CRC(aa527694) SHA1(a25dcbeca58a1443070848b3487a24d51d41a34b) ) -ROM_END - ROM_START( sekaikh ) ROM_REGION32_LE( 0x400000, "maincpu:rom", 0 ) ROM_FILL( 0x0000000, 0x400000, 0x55 ) @@ -2208,7 +3083,7 @@ ROM_START( sekaikh ) ROM_REGION32_LE( 0x1080000, "nand1", 0 ) ROM_LOAD( "1.8d", 0x0000000, 0x1080000, CRC(65c4a8b4) SHA1(c7fefc32604bb47519a05cdb6c8b0f50034e0efd) ) - ROM_REGION( 0x8000, "mgexio", 0 ) + ROM_REGION16_BE( 0x8000, "exio:nvram", 0 ) ROM_LOAD( "m48z35y.ic11", 0x0000, 0x8000, CRC(e0e52ffc) SHA1(557490e2f286773a945851f44ed0214de731cd75) ) ROM_END @@ -2222,10 +3097,32 @@ ROM_START( sekaikha ) ROM_REGION32_LE( 0x1080000, "nand1", 0 ) ROM_LOAD( "1.8d", 0x0000000, 0x1080000, BAD_DUMP CRC(7cb38ece) SHA1(e21fbc9ff09ca51e1857e32318b95107ae4b3f0b) ) - ROM_REGION( 0x8000, "mgexio", 0 ) + ROM_REGION16_BE( 0x8000, "exio:nvram", 0 ) ROM_LOAD( "m48z35y.ic11", 0x0000, 0x8000, CRC(e0e52ffc) SHA1(557490e2f286773a945851f44ed0214de731cd75) ) ROM_END +ROM_START( startrgn ) + ROM_REGION32_LE( 0x400000, "maincpu:rom", 0 ) + ROM_FILL( 0x0000000, 0x400000, 0x55 ) + + ROM_REGION32_LE( 0x1080000, "nand0", 0 ) + ROM_LOAD( "stt1a_0.bin", 0x0000000, 0x1080000, CRC(1e090644) SHA1(a7a293e2bd9eea2eb64a492a47272d9d9ee2c724) ) + + ROM_REGION32_LE( 0x1080000, "nand1", 0 ) + ROM_LOAD( "stt1a_1.bin", 0x0000000, 0x1080000, CRC(aa527694) SHA1(a25dcbeca58a1443070848b3487a24d51d41a34b) ) +ROM_END + +ROM_START( sugorotic ) + ROM_REGION32_LE( 0x400000, "maincpu:rom", 0 ) + ROM_FILL( 0x0000000, 0x400000, 0x55 ) + + ROM_REGION32_LE( 0x1080000, "nand0", 0 ) + ROM_LOAD( "stj1verc_0.8e", 0x0000000, 0x1080000, CRC(a994fc8f) SHA1(58ea3f7576e07ade0be71058705baf7ec348e55b) ) + + ROM_REGION32_LE( 0x1080000, "nand1", 0 ) + ROM_LOAD( "stj1verc_1.8d", 0x0000000, 0x1080000, CRC(a7a20960) SHA1(72bc89637f966fe23a84c34346be3cdc20d712e5) ) +ROM_END + ROM_START( taiko2 ) ROM_REGION32_LE( 0x400000, "maincpu:rom", 0 ) ROM_FILL( 0x0000000, 0x400000, 0x55 ) @@ -2313,7 +3210,7 @@ ROM_END // MEM(P3) -ROM_START( g13jnc ) +ROM_START( g13jnr ) ROM_REGION32_LE( 0x400000, "maincpu:rom", 0 ) ROM_FILL( 0x0000000, 0x400000, 0x55 ) @@ -2336,60 +3233,79 @@ ROM_START( g13jnc ) ROM_LOAD( "glt1vera_5.1f", 0x0000000, 0x1080000, CRC(0cb2df20) SHA1(b0e10b6d00f3cc20103177faca0c14d98b10994d) ) ROM_END - -// Unknown -ROM_START( unks10md ) +ROM_START( nicetsuk ) ROM_REGION32_LE( 0x400000, "maincpu:rom", 0 ) ROM_FILL( 0x0000000, 0x400000, 0x55 ) ROM_REGION32_LE( 0x1080000, "nand0", 0 ) - ROM_LOAD( "k9f2808u0c.8e", 0x0000000, 0x1080000, CRC(b8ce45c6) SHA1(cfc85e796e32f5f3cc16e12ce902f0ae088eea31) ) + ROM_LOAD( "ntk1vera_0.2j", 0x0000000, 0x1080000, CRC(6461fcce) SHA1(adb78328cad182fb7638717c07e28901a86f02a1) ) ROM_REGION32_LE( 0x1080000, "nand1", 0 ) - ROM_LOAD( "k9f2808u0c.8d", 0x0000000, 0x1080000, CRC(49a2a732) SHA1(1a473177827a6d0e58c289d9af064665b941519b) ) + ROM_LOAD( "ntk1vera_1.1j", 0x0000000, 0x1080000, CRC(5d5a4ca2) SHA1(b14ab6ca26236f819bd7d8bd5bbd828e36a528da) ) + + ROM_REGION32_LE( 0x1080000, "nand2", 0 ) + ROM_LOAD( "ntk1vera_2.2h", 0x0000000, 0x1080000, CRC(df2ba95f) SHA1(8c98812bbaf4246055bdc5a171fc9f5f5c47a38b) ) + + ROM_REGION32_LE( 0x1080000, "nand3", 0 ) + ROM_LOAD( "ntk1vera_3.1h", 0x0000000, 0x1080000, CRC(ee0c6a94) SHA1(7ee3f5e96635885a7f6abbd8e869205aa16f5f94) ) + + ROM_REGION32_LE( 0x1080000, "nand4", 0 ) + ROM_LOAD( "ntk1vera_4.2f", 0x0000000, 0x1080000, CRC(cf9ad49e) SHA1(4aa5593bc8154bb31c5e8113e97e6384b37eec7b) ) + + ROM_REGION32_LE( 0x1080000, "nand5", 0 ) + ROM_LOAD( "ntk1vera_5.1f", 0x0000000, 0x1080000, CRC(cf73d26b) SHA1(fe760793f21d2f9a833371dc9e76e4841d52a22f) ) + + ROM_REGION32_LE( 0x1080000, "nand6", 0 ) + ROM_LOAD( "ntk1vera_6.2e", 0x0000000, 0x1080000, CRC(ee63d5ee) SHA1(e76d00891bb868c34a2327ccb5f968586c467b04) ) + + ROM_REGION32_LE( 0x1080000, "nand7", 0 ) + ROM_LOAD( "ntk1vera_7.1e", 0x0000000, 0x1080000, CRC(5c8981e4) SHA1(5315b8a5426199c3bb08d427491d644b435bddc1) ) + + DISK_REGION("cd") + DISK_IMAGE_READONLY( "ntk1-cd", 0, NO_DUMP ) ROM_END } // Anonymous namespace // MEM(M) -GAME( 2000, mrdrilr2, 0, ns10_mrdrilr2, mrdrilr2, namcos10_memm_state, init_mrdrilr2, ROT0, "Namco", "Mr. Driller 2 (World, DR22 Ver.A)", 0 ) -GAME( 2000, mrdrilr2j, mrdrilr2, ns10_mrdrilr2, mrdrilr2, namcos10_memm_state, init_mrdrilr2, ROT0, "Namco", "Mr. Driller 2 (Japan, DR21 Ver.A)", 0 ) -GAME( 2000, mrdrilr2u, mrdrilr2, ns10_mrdrilr2, mrdrilr2, namcos10_memm_state, init_mrdrilr2, ROT0, "Namco", "Mr. Driller 2 (US, DR23 Ver.A)", 0 ) +GAME( 2000, mrdrilr2, 0, ns10_mrdrilr2, mrdrilr2, namcos10_memm_state, init_mrdrilr2, ROT0, "Namco", "Mr. Driller 2 (World, DR22 Ver.A)", MACHINE_IMPERFECT_SOUND ) +GAME( 2000, mrdrilr2j, mrdrilr2, ns10_mrdrilr2, mrdrilr2, namcos10_memm_state, init_mrdrilr2, ROT0, "Namco", "Mr. Driller 2 (Japan, DR21 Ver.A)", MACHINE_IMPERFECT_SOUND ) +GAME( 2000, mrdrilr2u, mrdrilr2, ns10_mrdrilr2, mrdrilr2, namcos10_memm_state, init_mrdrilr2, ROT0, "Namco", "Mr. Driller 2 (US, DR23 Ver.A)", MACHINE_IMPERFECT_SOUND ) // MEM(N) -GAME( 2000, gahaha, 0, ns10_gahaha, namcos10, namcos10_memn_state, init_gahaha, ROT0, "Namco", "GAHAHA Ippatsudou (World, GID2 Ver.A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2000, ptblank3, 0, ns10_ptblank3, namcos10, namcos10_memn_state, init_gunbalina, ROT0, "Namco", "Point Blank 3 (World, GNN2 Ver.A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) // needs to hookup gun IO -GAME( 2000, gunbalina, ptblank3, ns10_ptblank3, namcos10, namcos10_memn_state, init_gunbalina, ROT0, "Namco", "Gunbalina (Japan, GNN1 Ver.A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2001, gahaha2, 0, ns10_gahaha2, namcos10, namcos10_memn_state, init_gahaha2, ROT0, "Namco", "GAHAHA Ippatsudou 2 (Japan, GIS1 Ver.A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2001, gjspace, 0, ns10_gjspace, namcos10, namcos10_memn_state, init_gjspace, ROT0, "Namco / Metro", "Gekitoride-Jong Space (10011 Ver.A)", 0 ) -GAME( 2001, kd2001, 0, ns10_kd2001, namcos10, namcos10_memn_state, empty_init, ROT0, "Namco", "Knock Down 2001 (Japan, KD11 Ver. B)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2001, knpuzzle, 0, ns10_knpuzzle, namcos10, namcos10_memn_state, init_knpuzzle, ROT0, "Namco", "Kotoba no Puzzle Mojipittan (Japan, KPM1 Ver.A)", MACHINE_NOT_WORKING ) -GAME( 2001, mrdrilrg, 0, ns10_mrdrilrg, mrdrilr2, namcos10_memn_state, init_mrdrilrg, ROT0, "Namco", "Mr. Driller G (Japan, DRG1 Ver.A, set 1)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2002, chocovdr, 0, ns10_chocovdr, namcos10, namcos10_memn_state, init_chocovdr, ROT0, "Namco", "Uchuu Daisakusen: Chocovader Contactee (Japan, CVC1 Ver.A)", 0 ) -GAME( 2002, gamshara, 0, ns10_gamshara, gamshara, namcos10_memn_state, init_gamshara, ROT0, "Mitchell", "Gamshara (World, 20020912A / 10021 Ver.A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) // Ver. 20020912A ETC -GAME( 2002, gamsharaj, gamshara, ns10_gamshara, gamshara, namcos10_memn_state, init_gamshara, ROT0, "Mitchell", "Gamshara (Japan, 20020716A / 10021 Ver.A)", 0 ) -GAME( 2002, panikuru, 0, ns10_panikuru, namcos10, namcos10_memn_state, init_panikuru, ROT0, "Namco", "Panicuru Panekuru (Japan, PPA1 Ver.A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2002, puzzball, 0, ns10_puzzball, namcos10, namcos10_memn_state, init_puzzball, ROT0, "Namco", "Puzz Ball (Japan, PZB1 Ver.A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) // title guessed based on known game list and PCB sticker -GAME( 2002, startrgn, 0, ns10_startrgn, startrgn, namcos10_memn_state, init_startrgn, ROT0, "Namco", "Star Trigon (Japan, STT1 Ver.A)", 0 ) -GAME( 2003, konotako, 0, ns10_konotako, konotako, namcos10_memn_state, init_konotako, ROT0, "Mitchell", "Kono e Tako (10021 Ver.A)", 0 ) -GAME( 2003, nflclsfb, 0, ns10_nflclsfb, nflclsfb, namcos10_memn_state, init_nflclsfb, ROT0, "Namco", "NFL Classic Football (US, NCF3 Ver.A.)", MACHINE_NOT_WORKING ) -GAME( 2003, pacmball, 0, ns10_pacmball, namcos10, namcos10_memn_state, init_pacmball, ROT0, "Namco", "Pacman BALL (PMB2 Ver.A.)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2004, sekaikh, 0, ns10_sekaikh, namcos10, namcos10_memn_state, init_sekaikh, ROT0, "Namco", "Sekai Kaseki Hakken (Japan, SKH1 Ver.B)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2004, sekaikha, sekaikh, ns10_sekaikh, namcos10, namcos10_memn_state, init_sekaikh, ROT0, "Namco", "Sekai Kaseki Hakken (Japan, SKH1 Ver.A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2005, ballpom, 0, ns10_ballpom, namcos10, namcos10_memn_state, init_ballpom, ROT0, "Namco", "Ball Pom Line", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_CONTROLS ) // ROM VER. B0 FEB 09 2005 15:29:02 in test mode, boots but requires MGEXIO to proceed -GAME( 2006, keroro, 0, ns10_keroro, namcos10, namcos10_memn_state, init_keroro, ROT0, "Namco", "Keroro Gunso Chikyu Shinryaku Shirei Dearimasu! (KRG1 Ver.A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) // ケロロ軍曹　地球侵略指令…であります！ -GAME( 2007, gegemdb, 0, ns10_gegemdb, namcos10, namcos10_memn_state, empty_init, ROT0, "Namco", "Gegege no Kitaro Yokai Yokocho Matsuri De Batoru Ja (GYM1 Ver.A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) // ゲゲゲの鬼太郎　妖怪横丁まつりでバトルじゃ -GAME( 2007, medalnt2, 0, ns10_medalnt2, namcos10, namcos10_memn_state, init_medalnt2, ROT0, "Namco", "Medal no Tatsujin 2 Atsumare! Go! Go! Sugoroku Sentai Don Ranger Five (MTA1 STMPR0A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) // メダルの達人2 あつまれ!ゴー!ゴー!双六戦隊ドンレンジャーファイブ MTA100-1-ST-MPR0-A00 2007/01/30 19:51:54 +GAME( 2000, gahaha, 0, ns10_gahaha, gahaha, namcos10_memn_state, init_gahaha, ROT0, "Namco", "GAHAHA Ippatsudou (World, GID2 Ver.A)", MACHINE_IMPERFECT_SOUND ) +GAME( 2000, ptblank3, 0, ns10_ptblank3, namcos10, namcos10_memn_state, init_gunbalina, ROT0, "Namco", "Point Blank 3 (World, GNN2 Ver.A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION ) // needs to hookup gun IO +GAME( 2000, gunbalina, ptblank3, ns10_ptblank3, namcos10, namcos10_memn_state, init_gunbalina, ROT0, "Namco", "Gunbalina (Japan, GNN1 Ver.A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION ) +GAME( 2001, gahaha2, 0, ns10_gahaha2, gahaha, namcos10_memn_state, init_gahaha2, ROT0, "Namco", "GAHAHA Ippatsudou 2 (Japan, GIS1 Ver.A)", MACHINE_IMPERFECT_SOUND ) +GAME( 2001, gjspace, 0, ns10_gjspace, gjspace, namcos10_memn_state, init_gjspace, ROT0, "Namco / Metro", "Gekitoride-Jong Space (10011 Ver.A)", MACHINE_IMPERFECT_SOUND ) +GAME( 2001, kd2001, 0, ns10_kd2001, namcos10, namcos10_memn_state, empty_init, ROT0, "Namco", "Knock Down 2001 (Japan, KD11 Ver. B)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION ) +GAME( 2001, knpuzzle, 0, ns10_knpuzzle, namcos10, namcos10_memn_state, init_knpuzzle, ROT0, "Namco", "Kotoba no Puzzle Mojipittan (Japan, KPM1 Ver.A)", MACHINE_IMPERFECT_SOUND ) // sound glitches on the difficulty select screen for a moment +GAME( 2001, mrdrilrg, 0, ns10_mrdrilrg, mrdrilr2, namcos10_memn_state, init_mrdrilrg, ROT0, "Namco", "Mr. Driller G (Japan, DRG1 Ver.A, set 1)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION ) +GAME( 2002, chocovdr, 0, ns10_chocovdr, namcos10, namcos10_memn_state, init_chocovdr, ROT0, "Namco", "Uchuu Daisakusen: Chocovader Contactee (Japan, CVC1 Ver.A)", MACHINE_IMPERFECT_SOUND ) +GAME( 2002, gamshara, 0, ns10_gamshara, gamshara, namcos10_memn_state, init_gamshara, ROT0, "Mitchell", "Gamshara (World, 20020912A / 10021 Ver.A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION ) // Ver. 20020912A ETC +GAME( 2002, gamsharaj, gamshara, ns10_gamshara, gamshara, namcos10_memn_state, init_gamshara, ROT0, "Mitchell", "Gamshara (Japan, 20020716A / 10021 Ver.A)", MACHINE_IMPERFECT_SOUND ) +GAME( 2002, panikuru, 0, ns10_panikuru, namcos10, namcos10_memn_state, init_panikuru, ROT0, "Namco", "Panicuru Panekuru (Japan, PPA1 Ver.A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION ) +GAME( 2002, puzzball, 0, ns10_puzzball, namcos10, namcos10_memn_state, init_puzzball, ROT0, "Namco", "Puzz Ball (Japan, PZB1 Ver.A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION ) // title guessed based on known game list and PCB sticker +GAME( 2002, startrgn, 0, ns10_startrgn, startrgn, namcos10_memn_state, init_startrgn, ROT0, "Namco", "Star Trigon (Japan, STT1 Ver.A)", MACHINE_IMPERFECT_SOUND ) +GAME( 2002, sugorotic, 0, ns10_sugorotic, mgexio_medal, namcos10_memn_state, init_sugorotic, ROT0, "Namco", "Sugorotic JAPAN (STJ1 Ver.C)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) // uses MGEXIO +GAME( 2003, konotako, 0, ns10_konotako, konotako, namcos10_memn_state, init_konotako, ROT0, "Mitchell", "Kono e Tako (10021 Ver.A)", MACHINE_IMPERFECT_SOUND ) +GAME( 2003, nflclsfb, 0, ns10_nflclsfb, nflclsfb, namcos10_memn_state, init_nflclsfb, ROT0, "Namco", "NFL Classic Football (US, NCF3 Ver.A.)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_CONTROLS | MACHINE_IMPERFECT_SOUND ) +GAME( 2003, pacmball, 0, ns10_pacmball, mgexio_medal, namcos10_memn_state, init_pacmball, ROT0, "Namco", "Pacman BALL (PMB2 Ver.A.)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) +GAME( 2004, sekaikh, 0, ns10_sekaikh, mgexio_medal, namcos10_memn_state, init_sekaikh, ROT0, "Namco", "Sekai Kaseki Hakken (Japan, SKH1 Ver.B)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_CONTROLS | MACHINE_IMPERFECT_SOUND ) +GAME( 2004, sekaikha, sekaikh, ns10_sekaikh, mgexio_medal, namcos10_memn_state, init_sekaikh, ROT0, "Namco", "Sekai Kaseki Hakken (Japan, SKH1 Ver.A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_CONTROLS | MACHINE_IMPERFECT_SOUND ) +GAME( 2005, ballpom, 0, ns10_ballpom, mgexio_medal, namcos10_memn_state, init_ballpom, ROT0, "Namco", "Ball Pom Line", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_CONTROLS | MACHINE_IMPERFECT_SOUND ) // ROM VER. B0 FEB 09 2005 15:29:02 in test mode, boots but requires MGEXIO to proceed +GAME( 2005, medalnt, 0, ns10_medalnt, namcos10, namcos10_memn_state, init_medalnt, ROT0, "Namco", "Medal No Tatsujin Doki! Ooatari-Darake No Sugoroku Matsuri (MTL1 SPR0B)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) +GAME( 2006, keroro, 0, ns10_keroro, namcos10, namcos10_memn_state, init_keroro, ROT0, "Namco", "Keroro Gunso Chikyu Shinryaku Shirei Dearimasu! (KRG1 Ver.A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION ) // ケロロ軍曹　地球侵略指令…であります！ +GAME( 2007, gegemdb, 0, ns10_gegemdb, namcos10, namcos10_memn_state, empty_init, ROT0, "Namco", "Gegege no Kitaro Yokai Yokocho Matsuri De Batoru Ja (GYM1 Ver.A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION ) // ゲゲゲの鬼太郎　妖怪横丁まつりでバトルじゃ +GAME( 2007, medalnt2, 0, ns10_medalnt2, namcos10, namcos10_memn_state, init_medalnt2, ROT0, "Namco", "Medal no Tatsujin 2 Atsumare! Go! Go! Sugoroku Sentai Don Ranger Five (MTA1 STMPR0A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) // メダルの達人2 あつまれ!ゴー!ゴー!双六戦隊ドンレンジャーファイブ MTA100-1-ST-MPR0-A00 2007/01/30 19:51:54 -GAME( 2001, taiko2, 0, ns10_taiko2, namcos10, namcos10_memn_state, init_taiko2, ROT0, "Namco", "Taiko no Tatsujin 2 (Japan, TK21 Ver.C)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2002, taiko3, 0, ns10_taiko3, namcos10, namcos10_memn_state, init_taiko3, ROT0, "Namco", "Taiko no Tatsujin 3 (Japan, TK31 Ver.A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2002, taiko4, 0, ns10_taiko4, namcos10, namcos10_memn_state, init_taiko4, ROT0, "Namco", "Taiko no Tatsujin 4 (Japan, TK41 Ver.A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2003, taiko5, 0, ns10_taiko5, namcos10, namcos10_memn_state, init_taiko5, ROT0, "Namco", "Taiko no Tatsujin 5 (Japan, TK51 Ver.A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2004, taiko6, 0, ns10_taiko6, namcos10, namcos10_memn_state, init_taiko6, ROT0, "Namco", "Taiko no Tatsujin 6 (Japan, TK61 Ver.A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) +GAME( 2001, taiko2, 0, ns10_taiko2, namcos10, namcos10_memn_state, init_taiko2, ROT0, "Namco", "Taiko no Tatsujin 2 (Japan, TK21 Ver.C)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION ) +GAME( 2002, taiko3, 0, ns10_taiko3, namcos10, namcos10_memn_state, init_taiko3, ROT0, "Namco", "Taiko no Tatsujin 3 (Japan, TK31 Ver.A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION ) +GAME( 2002, taiko4, 0, ns10_taiko4, namcos10, namcos10_memn_state, init_taiko4, ROT0, "Namco", "Taiko no Tatsujin 4 (Japan, TK41 Ver.A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION ) +GAME( 2003, taiko5, 0, ns10_taiko5, namcos10, namcos10_memn_state, init_taiko5, ROT0, "Namco", "Taiko no Tatsujin 5 (Japan, TK51 Ver.A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION ) +GAME( 2004, taiko6, 0, ns10_taiko6, namcos10, namcos10_memn_state, init_taiko6, ROT0, "Namco", "Taiko no Tatsujin 6 (Japan, TK61 Ver.A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION ) // MEM(P3) -GAME( 2001, g13jnc, 0, ns10_g13jnc, namcos10, namcos10_memp3_state, init_g13jnc, ROT0, "Eighting / Raizing / Namco", "Golgo 13: Juusei no Chinkonka (Japan, GLT1 VER.A)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) - -// Unknown -GAME( 200?, unks10md, 0, ns10_unks10md, namcos10, namcos10_memn_state, init_unks10md, ROT0, "Namco", "unknown Namco System 10 medal game (MTL1 SPR0B)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) +GAME( 2001, g13jnr, 0, ns10_g13jnr, g13jnr, namcos10_memp3_state, init_g13jnr, ROT0, "Eighting / Raizing / Namco", "Golgo 13: Juusei no Requiem (Japan, GLT1 VER.A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) +GAME( 2002, nicetsuk, 0, ns10_nicetsuk, namcos10, namcos10_memp3_state, init_nicetsuk, ROT0, "Namco / Metro", "Tsukkomi Yousei Gips Nice Tsukkomi (NTK1 Ver.A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION ) diff --git a/src/mame/namco/namcos10_exio.cpp b/src/mame/namco/namcos10_exio.cpp new file mode 100644 index 00000000000..01fc3e37668 --- /dev/null +++ b/src/mame/namco/namcos10_exio.cpp @@ -0,0 +1,300 @@ +// license:BSD-3-Clause +// copyright-holders:windyfairy +#include "emu.h" +#include "namcos10_exio.h" + +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(NAMCOS10_EXIO, namcos10_exio_device, "namcos10_exio", "Namco System 10 EXIO") +DEFINE_DEVICE_TYPE(NAMCOS10_EXIO_BASE, namcos10_exio_base_device, "namcos10_exio_g", "Namco System 10 EXIO(G)") +DEFINE_DEVICE_TYPE(NAMCOS10_MGEXIO, namcos10_mgexio_device, "namcos10_mgexio", "Namco System 10 MGEXIO") + +// EXIO(G) has the bare minimum: CPLD, audio output jacks, gun I/O, and a card edge connector for additional I/O +namcos10_exio_base_device::namcos10_exio_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t ident_code) : + device_t(mconfig, type, tag, owner, clock), m_ident_code(ident_code) +{ +} + +namcos10_exio_base_device::namcos10_exio_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + namcos10_exio_base_device(mconfig, NAMCOS10_EXIO_BASE, tag, owner, clock, 0x32) +{ +} + +void namcos10_exio_base_device::device_start() +{ +} + +//////////////////////////////////// + +namcos10_exio_device::namcos10_exio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + namcos10_exio_base_device(mconfig, NAMCOS10_EXIO, tag, owner, clock, 0x30), + m_maincpu(*this, "exio_mcu"), + m_ram(*this, "exio_ram"), + m_analog_cb(*this) +{ +} + +void namcos10_exio_device::device_start() +{ + namcos10_exio_base_device::device_start(); + + m_analog_cb.resolve_safe(0); + + save_item(NAME(m_is_active)); + save_item(NAME(m_analog_idx)); +} + +void namcos10_exio_device::device_reset_after_children() +{ + namcos10_exio_base_device::device_reset_after_children(); + + m_maincpu->suspend(SUSPEND_REASON_HALT, 1); + m_is_active = false; + m_analog_idx = 0; +} + +void namcos10_exio_device::map(address_map &map) +{ + map(0x000100, 0x002fff).ram(); // TODO: Stack and such is stored here, how large should this really be? + map(0x003000, 0x007fff).ram().mirror(0xff8000).share(m_ram); +} + +void namcos10_exio_device::device_add_mconfig(machine_config &config) +{ + // TODO: tmp95c061 doesn't have a serial implementation yet so JVS communication won't work for now + TMP95C061(config, m_maincpu, XTAL(22'118'400)); + m_maincpu->set_addrmap(AS_PROGRAM, &namcos10_exio_device::map); + + m_maincpu->port1_read().set(FUNC(namcos10_exio_device::port_read<1>)); + m_maincpu->port5_read().set(FUNC(namcos10_exio_device::port_read<5>)); + m_maincpu->port7_read().set(FUNC(namcos10_exio_device::port_read<7>)); + m_maincpu->port8_read().set(FUNC(namcos10_exio_device::port_read<8>)); + m_maincpu->port9_read().set(FUNC(namcos10_exio_device::port_read<9>)); + m_maincpu->porta_read().set(FUNC(namcos10_exio_device::port_read<10>)); + m_maincpu->portb_read().set(FUNC(namcos10_exio_device::port_read<11>)); + m_maincpu->port1_write().set(FUNC(namcos10_exio_device::port_write<1>)); + m_maincpu->port2_write().set(FUNC(namcos10_exio_device::port_write<2>)); + m_maincpu->port5_write().set(FUNC(namcos10_exio_device::port_write<5>)); + m_maincpu->port6_write().set(FUNC(namcos10_exio_device::port_write<6>)); + m_maincpu->port8_write().set(FUNC(namcos10_exio_device::port_write<8>)); + m_maincpu->porta_write().set(FUNC(namcos10_exio_device::port_write<10>)); + m_maincpu->portb_write().set(FUNC(namcos10_exio_device::port_write<11>)); + + m_maincpu->port7_write().set([this] (uint8_t data) { + // The common EXIO program uploaded seems to write what analog value it wants to read here. + // Going to the CPLD? + m_analog_idx = data; + }); + m_maincpu->an_read<0>().set([this] () { + return m_analog_cb((m_analog_idx & 3) * 2); + }); + m_maincpu->an_read<1>().set([this] () { + return m_analog_cb((m_analog_idx & 3) * 2 + 1); + }); +} + +uint16_t namcos10_exio_device::cpu_status_r() +{ + uint16_t r = m_is_active ? 1 : 0; + return (r << 8) | r; +} + +void namcos10_exio_device::ctrl_w(uint16_t data) +{ + logerror("%s: exio_ctrl_w %04x\n", machine().describe_context(), data); + + if (data == 3) { + m_maincpu->reset(); + } +} + +void namcos10_exio_device::ram_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + if (BIT(offset, 0)) + m_ram[offset / 2] = ((data & 0xff) << 8) | (m_ram[offset / 2] & 0xff); + else + m_ram[offset / 2] = (m_ram[offset / 2] & 0xff00) | (data & 0xff); +} + +uint16_t namcos10_exio_device::ram_r(offs_t offset) +{ + if (BIT(offset, 0)) + return BIT(m_ram[offset / 2], 8, 8); + + return BIT(m_ram[offset / 2], 0, 8); +} + +template +void namcos10_exio_device::port_write(offs_t offset, uint8_t data) +{ + // logerror("%s: exio_port%d_write %02x\n", machine().describe_context(), Port, data); + + if (Port == 8) { + // HACK: Simple check to just know when the CPU is alive + m_is_active |= data != 0; + } +} + +template +uint8_t namcos10_exio_device::port_read(offs_t offset) +{ + // logerror("%s: exio_port%d_read\n", machine().describe_context(), Port); + return 0; +} + +//////////////////////////////////// + +namcos10_mgexio_device::namcos10_mgexio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + namcos10_exio_base_device(mconfig, NAMCOS10_MGEXIO, tag, owner, clock, 0x33), + m_maincpu(*this, "exio_mcu"), + m_ram(*this, "exio_ram"), + m_nvram(*this, "nvram"), + m_port_read(*this), + m_port_write(*this) +{ +} + +void namcos10_mgexio_device::device_start() +{ + save_item(NAME(m_is_active)); + save_item(NAME(m_bus_req)); + save_item(NAME(m_ctrl)); + + m_port_read.resolve_all_safe(0); + m_port_write.resolve_all_safe(); + + m_cpu_reset_timer = timer_alloc(FUNC(namcos10_mgexio_device::cpu_reset_timeout), this); + + m_nvram->set_base(m_ram, 0x8000); +} + +void namcos10_mgexio_device::device_reset_after_children() +{ + namcos10_exio_base_device::device_reset_after_children(); + + m_maincpu->suspend(SUSPEND_REASON_HALT, 1); + m_is_active = false; + m_bus_req = 0; + m_ctrl = 0; +} + +TIMER_CALLBACK_MEMBER(namcos10_mgexio_device::cpu_reset_timeout) +{ + m_maincpu->reset(); + m_is_active = true; +} + +void namcos10_mgexio_device::map(address_map &map) +{ + map(0x00000, 0x7ffff).ram().share(m_ram); +} + +template +uint16_t namcos10_mgexio_device::port_r() +{ + return m_port_read[Port](0); +} + +template +void namcos10_mgexio_device::port_w(uint16_t data) +{ + m_port_write[Port](data); +} + +void namcos10_mgexio_device::io_map(address_map &map) +{ + map(h8_device::PORT_4, h8_device::PORT_4).rw(FUNC(namcos10_mgexio_device::port_r<0>), FUNC(namcos10_mgexio_device::port_w<0>)); + map(h8_device::PORT_6, h8_device::PORT_6).rw(FUNC(namcos10_mgexio_device::port_r<1>), FUNC(namcos10_mgexio_device::port_w<1>)); + map(h8_device::PORT_7, h8_device::PORT_7).rw(FUNC(namcos10_mgexio_device::port_r<2>), FUNC(namcos10_mgexio_device::port_w<2>)); + map(h8_device::PORT_8, h8_device::PORT_8).rw(FUNC(namcos10_mgexio_device::port_r<3>), FUNC(namcos10_mgexio_device::port_w<3>)); + map(h8_device::PORT_9, h8_device::PORT_9).rw(FUNC(namcos10_mgexio_device::port_r<4>), FUNC(namcos10_mgexio_device::port_w<4>)); + map(h8_device::PORT_A, h8_device::PORT_A).rw(FUNC(namcos10_mgexio_device::port_r<5>), FUNC(namcos10_mgexio_device::port_w<5>)); + map(h8_device::PORT_B, h8_device::PORT_B).rw(FUNC(namcos10_mgexio_device::port_r<6>), FUNC(namcos10_mgexio_device::port_w<6>)); +} + +void namcos10_mgexio_device::device_add_mconfig(machine_config &config) +{ + H83007(config, m_maincpu, 14.746_MHz_XTAL); + m_maincpu->set_mode_a20(); + m_maincpu->set_addrmap(AS_PROGRAM, &namcos10_mgexio_device::map); + m_maincpu->set_addrmap(AS_IO, &namcos10_mgexio_device::io_map); + + NVRAM(config, m_nvram, nvram_device::DEFAULT_ALL_0); +} + +uint16_t namcos10_mgexio_device::cpu_status_r() +{ + // pacmball's code call bit 1 the "sub_cpu_enable_flag" + return m_is_active ? 2 : 0; +} + +uint16_t namcos10_mgexio_device::ctrl_r() +{ + // bit 0 being 1 makes some games check for sensor responses on the H8's ports (sekaikh, ballpom) + // pacmball doesn't seem to care about bit 0 + // Possibly those games only want to check I/O when the CPU is known to be active? + return m_ctrl; +} + +void namcos10_mgexio_device::ctrl_w(uint16_t data) +{ + logerror("%s: exio_ctrl_w %04x %04x\n", machine().describe_context(), data, m_ctrl ^ data); + + // sekaikh and ballpom only write 3 here and that's all + // pacmball will write 3 at the start when the CPU is to be started + // and then flip bit 1 at the end of the main loop so it might be I/O related + if ((data & 1) && !(m_ctrl & 1)) { + // Timed such that there's enough delay before starting but also + // so it doesn't wait too long into the timeout before starting. + // So far only pacmball relies on timings to be correct to boot. + // + // TODO: Should this really be restarted every time or just the first time? + // Even pacmball only wants to see the timings correct the first time + // so it might actually just use standby mode after the initial boot. + m_cpu_reset_timer->adjust(attotime::from_msec(40)); + } else if (!(data & 1) && (m_ctrl & 1)) { + // Stop the CPU when bit 0 is flipped from 1 to 0 + // This happens when a sub CPU-related error occurs + m_maincpu->suspend(SUSPEND_REASON_HALT, 1); + } + + m_ctrl = data; +} + +uint16_t namcos10_mgexio_device::bus_req_r() +{ + // Should have bit 1 set when the CPU is requested + return m_bus_req == 1 ? 2 : 0; +} + +void namcos10_mgexio_device::bus_req_w(uint16_t data) +{ + // Usage before using RAM: + // Write 0 to bus_req_w + // Check if unk_r has bit 0 set + // If set, loop until bus_req_r bit 1 is 0 + // If bus_req_r bit 1 does not return 0 within 500 polls, "BREQ time out" and "BUS-ACK" is raised + // (do RAM things) + // Write 1 to bus_req_w + // + // bus_req_r bit 1 must be 1 for the CPU check + + // logerror("%s: bus_req_w %04x\n", machine().describe_context(), data); + m_bus_req = data; +} + +void namcos10_mgexio_device::ram_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + if (BIT(offset, 0) == 1) + m_ram[offset / 2] = (m_ram[offset / 2] & 0xff00) | data; + else + m_ram[offset / 2] = (data << 8) | (m_ram[offset / 2] & 0xff); +} + +uint16_t namcos10_mgexio_device::ram_r(offs_t offset) +{ + if (BIT(offset, 0) == 1) + return m_ram[offset / 2] & 0xff; + else + return (m_ram[offset / 2] >> 8) & 0xff; +} diff --git a/src/mame/namco/namcos10_exio.h b/src/mame/namco/namcos10_exio.h new file mode 100644 index 00000000000..d9be5ec3037 --- /dev/null +++ b/src/mame/namco/namcos10_exio.h @@ -0,0 +1,132 @@ +// license:BSD-3-Clause +// copyright-holders:windyfairy +#ifndef MAME_NAMCO_NAMCOS10_EXIO_H +#define MAME_NAMCO_NAMCOS10_EXIO_H + +#pragma once + +#include "cpu/h8/h83006.h" +#include "cpu/tlcs900/tmp95c061.h" +#include "machine/nvram.h" + +class namcos10_exio_base_device : public device_t +{ +public: + namcos10_exio_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + uint8_t ident_code() { return m_ident_code; } + + virtual void ctrl_w(uint16_t data) {} + + virtual uint16_t cpu_status_r() { return 0; } + + virtual uint16_t ram_r(offs_t offset) { return 0xff; } + virtual void ram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) {} + +protected: + namcos10_exio_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t ident_code); + + virtual void device_start() override; + + const uint8_t m_ident_code; +}; + +class namcos10_exio_device : public namcos10_exio_base_device +{ +public: + namcos10_exio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + auto analog_callback() { return m_analog_cb.bind(); } + + virtual void ctrl_w(uint16_t data) override; + + virtual uint16_t cpu_status_r() override; + + virtual uint16_t ram_r(offs_t offset) override; + virtual void ram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; + +protected: + virtual void device_start() override; + virtual void device_reset_after_children() override; + virtual void device_add_mconfig(machine_config &config) override; + +private: + void map(address_map &map); + + template uint8_t port_read(offs_t offset); + template void port_write(offs_t offset, uint8_t data); + + required_device m_maincpu; + required_shared_ptr m_ram; + + devcb_read16 m_analog_cb; + + bool m_is_active; + uint32_t m_analog_idx; +}; + +class namcos10_mgexio_device : public namcos10_exio_base_device +{ +public: + namcos10_mgexio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + auto port4_read_callback() { return m_port_read[0].bind(); } + auto port6_read_callback() { return m_port_read[1].bind(); } + auto port7_read_callback() { return m_port_read[2].bind(); } + auto port8_read_callback() { return m_port_read[3].bind(); } + auto port9_read_callback() { return m_port_read[4].bind(); } + auto porta_read_callback() { return m_port_read[5].bind(); } + auto portb_read_callback() { return m_port_read[6].bind(); } + + auto port4_write_callback() { return m_port_write[0].bind(); } + auto port6_write_callback() { return m_port_write[1].bind(); } + auto port7_write_callback() { return m_port_write[2].bind(); } + auto port8_write_callback() { return m_port_write[3].bind(); } + auto port9_write_callback() { return m_port_write[4].bind(); } + auto porta_write_callback() { return m_port_write[5].bind(); } + auto portb_write_callback() { return m_port_write[6].bind(); } + + virtual uint16_t ctrl_r(); + virtual void ctrl_w(uint16_t data) override; + + virtual uint16_t bus_req_r(); + virtual void bus_req_w(uint16_t data); + + virtual uint16_t cpu_status_r() override; + + virtual uint16_t ram_r(offs_t offset) override; + virtual void ram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; + +protected: + virtual void device_start() override; + virtual void device_reset_after_children() override; + virtual void device_add_mconfig(machine_config &config) override; + +private: + void map(address_map &map); + void io_map(address_map &map); + + template uint16_t port_r(); + template void port_w(uint16_t data); + + TIMER_CALLBACK_MEMBER(cpu_reset_timeout); + + required_device m_maincpu; + required_shared_ptr m_ram; + required_device m_nvram; + + devcb_read16::array<7> m_port_read; + devcb_write16::array<7> m_port_write; + + emu_timer *m_cpu_reset_timer; + + bool m_is_active; + uint16_t m_bus_req; + uint16_t m_ctrl; +}; + +DECLARE_DEVICE_TYPE(NAMCOS10_EXIO, namcos10_exio_device) +DECLARE_DEVICE_TYPE(NAMCOS10_EXIO_BASE, namcos10_exio_base_device) +DECLARE_DEVICE_TYPE(NAMCOS10_MGEXIO, namcos10_mgexio_device) + +#endif // MAME_NAMCO_NAMCOS10_EXIO_H diff --git a/src/mame/namco/ns10crypt.cpp b/src/mame/namco/ns10crypt.cpp index b542476eaf2..d41f73aa9f8 100644 --- a/src/mame/namco/ns10crypt.cpp +++ b/src/mame/namco/ns10crypt.cpp @@ -118,14 +118,9 @@ really exist. #include "emu.h" #include "ns10crypt.h" -DEFINE_DEVICE_TYPE(CHOCOVDR_DECRYPTER, chocovdr_decrypter_device, "chocovdr_decrypter", "Chocovader Contactee decrypter") -DEFINE_DEVICE_TYPE(GAMSHARA_DECRYPTER, gamshara_decrypter_device, "gamshara_decrypter", "Gamshara decrypter") -DEFINE_DEVICE_TYPE(GJSPACE_DECRYPTER, gjspace_decrypter_device, "gjspace_decrypter", "Gekitorider-Jong Space decrypter") -DEFINE_DEVICE_TYPE(KNPUZZLE_DECRYPTER, knpuzzle_decrypter_device, "knpuzzle_decrypter", "Kotoba no Puzzle Mojipittan decrypter") -DEFINE_DEVICE_TYPE(KONOTAKO_DECRYPTER, konotako_decrypter_device, "konotako_decrypter", "Kono Tako decrypter") DEFINE_DEVICE_TYPE(MRDRILR2_DECRYPTER, mrdrilr2_decrypter_device, "mrdrilr2_decrypter", "Mr Driller 2 decrypter") -DEFINE_DEVICE_TYPE(NFLCLSFB_DECRYPTER, nflclsfb_decrypter_device, "nflclsfg_decrypter", "NFL Classic Football decrypter") -DEFINE_DEVICE_TYPE(STARTRGN_DECRYPTER, startrgn_decrypter_device, "startrgn_decrypter", "Star Trigon decrypter") + +DEFINE_DEVICE_TYPE(NS10_TYPE2_DECRYPTER, ns10_type2_decrypter_device, "ns10_type2_decrypter", "Namco System 10 Type 2 decrypter") // base class @@ -146,7 +141,7 @@ void ns10_decrypter_device::deactivate() m_active = false; } -bool ns10_decrypter_device::is_active()const +bool ns10_decrypter_device::is_active() const { return m_active; } @@ -155,13 +150,12 @@ ns10_decrypter_device::~ns10_decrypter_device() { } - // type-1 decrypter -constexpr int UNKNOWN {16}; -constexpr int U {UNKNOWN}; +constexpr int UNKNOWN{16}; +constexpr int U{UNKNOWN}; // this could perfectly be part of the per-game logic but, with only one known type-1 game, we cannot say anything definitive -const int ns10_type1_decrypter_device::initSbox[16] {U,U,U,0,4,9,U,U,U,8,U,1,U,9,U,5}; +const int ns10_type1_decrypter_device::initSbox[16]{U, U, U, 0, 4, 9, U, U, U, 8, U, 1, U, 9, U, 5}; ns10_type1_decrypter_device::ns10_type1_decrypter_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : ns10_decrypter_device(mconfig, type, tag, owner, clock) @@ -170,27 +164,24 @@ ns10_type1_decrypter_device::ns10_type1_decrypter_device(const machine_config &m uint16_t ns10_type1_decrypter_device::decrypt(uint16_t cipherword) { - uint16_t plainword = m_mask ^ bitswap(cipherword,9,13,15,7,14,8,6,10,11,12,3,5,0,1,4,2); + uint16_t plainword = m_mask ^ bitswap(cipherword, 9, 13, 15, 7, 14, 8, 6, 10, 11, 12, 3, 5, 0, 1, 4, 2); uint16_t nbs = - ((BIT(m_counter, 4) ) << 15) ^ - ((BIT(cipherword, 2) ^ BIT(cipherword, 5) ) << 14) ^ - ((BIT(cipherword, 0) ) << 13) ^ + ((BIT(m_counter, 4)) << 15) ^ + ((BIT(cipherword, 2) ^ BIT(cipherword, 5)) << 14) ^ + ((BIT(cipherword, 0)) << 13) ^ (((BIT(cipherword, 4) | BIT(cipherword, 5))) << 12) ^ // this is the only nonlinear term not involving the counter - ((BIT(m_counter, 0) ) << 11) ^ - ((BIT(cipherword, 6) ) << 10) ^ - (((BIT(cipherword, 4) & BIT(m_counter, 1)) ) << 8) ^ - ((BIT(m_counter, 3) ) << 6) ^ - (((BIT(cipherword, 3) | BIT(m_counter, 7)) ) << 5) ^ - ((BIT(cipherword, 2) ^ BIT(m_counter, 3) ) << 4) ^ - ((BIT(m_counter, 2) ) << 3) ^ - (((BIT(cipherword, 7) & BIT(m_counter, 7)) ) << 2) ^ - ((BIT(m_counter, 5) ) << 1) ^ - (((BIT(cipherword, 7) | BIT(m_counter, 1)) ) << 0); - m_mask = nbs - ^ bitswap(cipherword, 6,11, 3, 1,13, 5,15,10, 2, 9, 8, 4, 0,12, 7,14) - ^ bitswap(plainword , 9, 7, 5, 2,14, 4,13, 8, 0,15,10, 1, 3, 6,12,11) - ^ 0xecbe; + ((BIT(m_counter, 0)) << 11) ^ + ((BIT(cipherword, 6)) << 10) ^ + (((BIT(cipherword, 4) & BIT(m_counter, 1))) << 8) ^ + ((BIT(m_counter, 3)) << 6) ^ + (((BIT(cipherword, 3) | BIT(m_counter, 7))) << 5) ^ + ((BIT(cipherword, 2) ^ BIT(m_counter, 3)) << 4) ^ + ((BIT(m_counter, 2)) << 3) ^ + (((BIT(cipherword, 7) & BIT(m_counter, 7))) << 2) ^ + ((BIT(m_counter, 5)) << 1) ^ + (((BIT(cipherword, 7) | BIT(m_counter, 1))) << 0); + m_mask = nbs ^ bitswap(cipherword, 6, 11, 3, 1, 13, 5, 15, 10, 2, 9, 8, 4, 0, 12, 7, 14) ^ bitswap(plainword, 9, 7, 5, 2, 14, 4, 13, 8, 0, 15, 10, 1, 3, 6, 12, 11) ^ 0xecbe; ++m_counter; return plainword; @@ -207,26 +198,35 @@ void ns10_type1_decrypter_device::device_start() m_active = false; } +mrdrilr2_decrypter_device::mrdrilr2_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : ns10_type1_decrypter_device(mconfig, MRDRILR2_DECRYPTER, tag, owner, clock) +{ +} // type-2 decrypter // this could perfectly be part of the per-game logic; by now, only gamshara seems to use it, so we keep it global -const int ns10_type2_decrypter_device::initSbox[16] {0,12,13,6,2,4,9,8,11,1,7,15,10,5,14,3}; +const int ns10_type2_decrypter_device::initSbox[16]{0, 12, 13, 6, 2, 4, 9, 8, 11, 1, 7, 15, 10, 5, 14, 3}; -ns10_type2_decrypter_device::ns10_type2_decrypter_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const ns10_type2_decrypter_device::ns10_crypto_logic &logic) - : ns10_decrypter_device(mconfig, type, tag, owner, clock) - , m_logic(logic) +ns10_type2_decrypter_device::ns10_type2_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : ns10_decrypter_device(mconfig, NS10_TYPE2_DECRYPTER, tag, owner, clock) { } +ns10_type2_decrypter_device::ns10_type2_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const ns10_type2_decrypter_device::ns10_crypto_logic logic) + : ns10_decrypter_device(mconfig, NS10_TYPE2_DECRYPTER, tag, owner, clock), m_logic(logic) +{ + m_logic_initialized = true; +} + uint16_t ns10_type2_decrypter_device::decrypt(uint16_t cipherword) { uint16_t plainword = cipherword ^ m_mask; m_previous_cipherwords <<= 16; - m_previous_cipherwords ^= cipherword; - m_previous_plainwords <<= 16; - m_previous_plainwords ^= plainword; + m_previous_cipherwords ^= cipherword; + m_previous_plainwords <<= 16; + m_previous_plainwords ^= plainword; m_mask = 0; for (int j = 15; j >= 0; --j) @@ -245,18 +245,20 @@ void ns10_type2_decrypter_device::init(int iv) { // by now, only gamshara requires non-trivial initialization code; data // should be moved to the per-game logic in case any other game do it differently - m_previous_cipherwords = bitswap(initSbox[iv],3,16,16,2,1,16,16,0,16,16,16,16,16,16,16,16); - m_previous_plainwords = 0; - m_mask = 0; + m_previous_cipherwords = bitswap(initSbox[iv], 3, 16, 16, 2, 1, 16, 16, 0, 16, 16, 16, 16, 16, 16, 16, 16); + m_previous_plainwords = 0; + m_mask = 0; } void ns10_type2_decrypter_device::device_start() { + // If the logic isn't initialized then this will just fail + assert(m_logic_initialized == true); + m_active = false; m_reducer = std::make_unique(); } - ns10_type2_decrypter_device::gf2_reducer::gf2_reducer() { int reduction; @@ -274,222 +276,10 @@ ns10_type2_decrypter_device::gf2_reducer::gf2_reducer() } } -int ns10_type2_decrypter_device::gf2_reducer::gf2_reduce(uint64_t num)const -{ - return - m_gf2Reduction[num & 0xffff] ^ - m_gf2Reduction[(num >> 16) & 0xffff] ^ - m_gf2Reduction[(num >> 32) & 0xffff] ^ - m_gf2Reduction[num >> 48]; -} - - -// game-specific logic - -// static uint16_t mrdrilrg_nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer& reducer) -// { - // uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; - // return (reducer.gf2_reduce(0x00000a00a305c826ull & previous_masks) & reducer.gf2_reduce(0x0000011800020000ull & previous_masks)) * 0x0011; -// } - -// static uint16_t panikuru_nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer& reducer) -// { - // return ((reducer.gf2_reduce(0x0000000088300281ull & previous_cipherwords) ^ reducer.gf2_reduce(0x0000000004600281ull & previous_plainwords)) - // & (reducer.gf2_reduce(0x0000a13140090000ull & previous_cipherwords) ^ reducer.gf2_reduce(0x0000806240090000ull & previous_plainwords))) << 2; -// } - -uint16_t chocovdr_decrypter_device::nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer& reducer) -{ - uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; - return ((previous_masks >> 9) & (reducer.gf2_reduce(0x0000000010065810ull & previous_cipherwords) ^ reducer.gf2_reduce(0x0000000021005810ull & previous_plainwords)) & 1) << 10; -} - -const ns10_type2_decrypter_device::ns10_crypto_logic chocovdr_decrypter_device::crypto_logic = { - { - 0x00005239351ec1daull, 0x0000000000008090ull, 0x0000000048264808ull, 0x0000000000004820ull, - 0x0000000000000500ull, 0x0000000058ff5a54ull, 0x00000000d8220208ull, 0x00005239351e91d3ull, - 0x000000009a1dfaffull, 0x0000000090040001ull, 0x0000000000000100ull, 0x0000000000001408ull, - 0x0000000032efd3f1ull, 0x00000000000000d0ull, 0x0000000032efd2d7ull, 0x0000000000000840ull, - }, { - 0x00002000410485daull, 0x0000000000008081ull, 0x0000000008044088ull, 0x0000000000004802ull, - 0x0000000000000500ull, 0x00000000430cda54ull, 0x0000000010000028ull, 0x00002000410491dbull, - 0x000000001100fafeull, 0x0000000018040001ull, 0x0000000000000010ull, 0x0000000000000508ull, - 0x000000006800d3f5ull, 0x0000000000000058ull, 0x000000006800d2d5ull, 0x0000000000001840ull, - }, - 0x5b22, - &nonlinear_calc -}; - -uint16_t gamshara_decrypter_device::nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer&) -{ - uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; - return ((previous_masks >> 7) & (previous_masks >> 13) & 1) << 2; -} - -const ns10_type2_decrypter_device::ns10_crypto_logic gamshara_decrypter_device::crypto_logic = { - { - 0x0000000000000028ull, 0x0000cae83f389fd9ull, 0x0000000000001000ull, 0x0000000042823402ull, - 0x0000cae8736a0592ull, 0x0000cae8736a8596ull, 0x000000008b4095b9ull, 0x0000000000002100ull, - 0x0000000004018228ull, 0x0000000000000042ull, 0x0000000000000818ull, 0x0000000000004010ull, - 0x000000008b4099f1ull, 0x00000000044bce08ull, 0x00000000000000c1ull, 0x0000000042823002ull, - }, { - 0x0000000000000028ull, 0x00000904c2048dd9ull, 0x0000000000008000ull, 0x0000000054021002ull, - 0x00000904e0078592ull, 0x00000904e00785b2ull, 0x00000000440097f9ull, 0x0000000000002104ull, - 0x0000000029018308ull, 0x0000000000000042ull, 0x0000000000000850ull, 0x0000000000004012ull, - 0x000000004400d1f1ull, 0x000000006001ce08ull, 0x00000000000000c8ull, 0x0000000054023002ull, - }, - 0x25ab, - &nonlinear_calc -}; - -uint16_t gjspace_decrypter_device::nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer&) -{ - return 0; -} - -const ns10_type2_decrypter_device::ns10_crypto_logic gjspace_decrypter_device::crypto_logic = { - { - 0x0000000000000240ull, 0x0000d617eb0f1ab1ull, 0x00000000451111c0ull, 0x00000000013b1f44ull, - 0x0000aab0b356abceull, 0x00007ca76b89602aull, 0x0000000000001800ull, 0x00000000031d1303ull, - 0x0000000000000801ull, 0x0000000030111160ull, 0x0000000001ab3978ull, 0x00000000c131b160ull, - 0x0000000000001110ull, 0x0000000000008002ull, 0x00000000e1113540ull, 0x0000d617fdce8bfcull, - }, { - 0x0000000000008240ull, 0x000000002f301ab1ull, 0x00000000050011c0ull, 0x00000000412817c4ull, - 0x00000004c338abc6ull, 0x000000046108602aull, 0x0000000000005800ull, 0x00000000c3081347ull, - 0x0000000000000801ull, 0x0000000061001160ull, 0x0000000061183978ull, 0x00000000e520b142ull, - 0x0000000000001101ull, 0x000000000000a002ull, 0x0000000029001740ull, 0x00000000a4309bfcull, - }, - 0x2e7f, - &nonlinear_calc -}; - -uint16_t knpuzzle_decrypter_device::nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer& reducer) -{ - uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; - return ((previous_masks >> 0x13) & (reducer.gf2_reduce(0x0000000014001290ull & previous_cipherwords) ^ reducer.gf2_reduce(0x0000000000021290ull & previous_plainwords)) & 1) << 1; -} - -const ns10_type2_decrypter_device::ns10_crypto_logic knpuzzle_decrypter_device::crypto_logic = { - { - 0x00000000c0a4208cull, 0x00000000204100a8ull, 0x000000000c0306a0ull, 0x000000000819e944ull, - 0x0000000000001400ull, 0x0000000000000061ull, 0x000000000141401cull, 0x0000000000000020ull, - 0x0000000001418010ull, 0x00008d6a1eb690cfull, 0x00008d6a4d3b90ceull, 0x0000000000004201ull, - 0x00000000012c00a2ull, 0x000000000c0304a4ull, 0x0000000000000500ull, 0x0000000000000980ull, - }, { - 0x000000002a22608cull, 0x00000000002300a8ull, 0x0000000000390ea0ull, 0x000000000100a9c4ull, - 0x0000000000001400ull, 0x0000000000000041ull, 0x0000000003014014ull, 0x0000000000000022ull, - 0x0000000003010110ull, 0x00000800031a80cfull, 0x00000800003398deull, 0x0000000000004200ull, - 0x00000000012a04a2ull, 0x00000000003984a4ull, 0x0000000000000700ull, 0x0000000000000882ull, - }, - 0x01e2, - &nonlinear_calc -}; - -uint16_t konotako_decrypter_device::nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer&) -{ - uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; - return ((previous_masks >> 7) & (previous_masks >> 15) & 1) << 15; -} - -const ns10_type2_decrypter_device::ns10_crypto_logic konotako_decrypter_device::crypto_logic = { - { - 0x000000000000004cull, 0x00000000d39e3d3dull, 0x0000000000001110ull, 0x0000000000002200ull, - 0x000000003680c008ull, 0x0000000000000281ull, 0x0000000000005002ull, 0x00002a7371895a47ull, - 0x0000000000000003ull, 0x00002a7371897a4eull, 0x00002a73aea17a41ull, 0x00002a73fd895a4full, - 0x000000005328200aull, 0x0000000000000010ull, 0x0000000000000040ull, 0x0000000000000200ull, - }, { - 0x000000000000008cull, 0x0000000053003d25ull, 0x0000000000001120ull, 0x0000000000002200ull, - 0x0000000037004008ull, 0x0000000000000282ull, 0x0000000000006002ull, 0x0000060035005a47ull, - 0x0000000000000003ull, 0x0000060035001a4eull, 0x0000060025007a41ull, 0x00000600b5005a2full, - 0x000000009000200bull, 0x0000000000000310ull, 0x0000000000001840ull, 0x0000000000000400ull, - }, - 0x0748, - &nonlinear_calc -}; - -uint16_t nflclsfb_decrypter_device::nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer& reducer) -{ - uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; - return ((previous_masks >> 1) & (reducer.gf2_reduce(0x0000000040de8fb3ull & previous_cipherwords) ^ reducer.gf2_reduce(0x0000000088008fb3ull & previous_plainwords)) & 1) << 2; -} - -const ns10_type2_decrypter_device::ns10_crypto_logic nflclsfb_decrypter_device::crypto_logic = { - { - 0x000034886e281880ull, 0x0000000012c5e7baull, 0x0000000000000200ull, 0x000000002900002aull, - 0x00000000000004c0ull, 0x0000000012c5e6baull, 0x00000000e0df8bbbull, 0x000000002011532aull, - 0x0000000000009040ull, 0x0000000000006004ull, 0x000000000000a001ull, 0x000034886e2818e1ull, - 0x0000000000004404ull, 0x0000000000004200ull, 0x0000000000009100ull, 0x0000000020115712ull, - }, { - 0x00000e00060819c0ull, 0x000000000e08e7baull, 0x0000000000000800ull, 0x000000000100002aull, - 0x00000000000010c0ull, 0x000000000e08cebaull, 0x0000000088018bbbull, 0x000000008c005302ull, - 0x000000000000c040ull, 0x0000000000006010ull, 0x0000000000000001ull, 0x00000e00060818e3ull, - 0x0000000000000404ull, 0x0000000000004201ull, 0x0000000000001100ull, 0x000000008c0057b2ull, - }, - 0xbe32, - &nonlinear_calc -}; - -uint16_t startrgn_decrypter_device::nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer&) -{ - uint64_t previous_masks = previous_cipherwords ^ previous_plainwords; - return ((previous_masks >> 12) & (previous_masks >> 14) & 1) << 4; -} - -const ns10_type2_decrypter_device::ns10_crypto_logic startrgn_decrypter_device::crypto_logic = { - { - 0x00003e4bfe92c6a9ull, 0x000000000000010cull, 0x00003e4b7bd6c4aaull, 0x0000b1a904b8fab8ull, - 0x0000000000000080ull, 0x0000000000008c00ull, 0x0000b1a9b2f0b4cdull, 0x000000006c100828ull, - 0x000000006c100838ull, 0x0000b1a9d3913fcdull, 0x000000006161aa00ull, 0x0000000000006040ull, - 0x0000000000000420ull, 0x0000000000001801ull, 0x00003e4b7bd6deabull, 0x0000000000000105ull, - }, { - 0x000012021f00c6a8ull, 0x0000000000000008ull, 0x000012020b1046aaull, 0x000012001502fea8ull, - 0x0000000000002000ull, 0x0000000000008800ull, 0x000012001e02b4cdull, 0x000000002c0008aaull, - 0x000000002c00083aull, 0x000012003f027ecdull, 0x0000000021008a00ull, 0x0000000000002040ull, - 0x0000000000000428ull, 0x0000000000001001ull, 0x000012020b10ceabull, 0x0000000000000144ull, - }, - 0x8c46, - &nonlinear_calc -}; - - -// game-specific devices - -mrdrilr2_decrypter_device::mrdrilr2_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : ns10_type1_decrypter_device(mconfig, MRDRILR2_DECRYPTER, tag, owner, clock) -{ -} - -chocovdr_decrypter_device::chocovdr_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : ns10_type2_decrypter_device(mconfig, CHOCOVDR_DECRYPTER, tag, owner, clock, crypto_logic) -{ -} - -gamshara_decrypter_device::gamshara_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : ns10_type2_decrypter_device(mconfig, GAMSHARA_DECRYPTER, tag, owner, clock, crypto_logic) -{ -} - -gjspace_decrypter_device::gjspace_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : ns10_type2_decrypter_device(mconfig, GJSPACE_DECRYPTER, tag, owner, clock, crypto_logic) -{ -} - -knpuzzle_decrypter_device::knpuzzle_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : ns10_type2_decrypter_device(mconfig, KNPUZZLE_DECRYPTER, tag, owner, clock, crypto_logic) -{ -} - -konotako_decrypter_device::konotako_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : ns10_type2_decrypter_device(mconfig, KONOTAKO_DECRYPTER, tag, owner, clock, crypto_logic) -{ -} - -nflclsfb_decrypter_device::nflclsfb_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : ns10_type2_decrypter_device(mconfig, NFLCLSFB_DECRYPTER, tag, owner, clock, crypto_logic) -{ -} - -startrgn_decrypter_device::startrgn_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : ns10_type2_decrypter_device(mconfig, STARTRGN_DECRYPTER, tag, owner, clock, crypto_logic) +int ns10_type2_decrypter_device::gf2_reducer::gf2_reduce(uint64_t num) const { + return m_gf2Reduction[num & 0xffff] ^ + m_gf2Reduction[(num >> 16) & 0xffff] ^ + m_gf2Reduction[(num >> 32) & 0xffff] ^ + m_gf2Reduction[num >> 48]; } diff --git a/src/mame/namco/ns10crypt.h b/src/mame/namco/ns10crypt.h index 72cb57f293b..c2cd3adf10a 100644 --- a/src/mame/namco/ns10crypt.h +++ b/src/mame/namco/ns10crypt.h @@ -11,16 +11,16 @@ class ns10_decrypter_device : public device_t public: void activate(int iv); void deactivate(); - bool is_active()const; + bool is_active() const; - virtual uint16_t decrypt(uint16_t cipherword)=0; + virtual uint16_t decrypt(uint16_t cipherword) = 0; virtual ~ns10_decrypter_device(); protected: ns10_decrypter_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - virtual void init(int iv)=0; - virtual void device_start()override=0; + virtual void init(int iv) = 0; + virtual void device_start() override = 0; bool m_active; }; @@ -30,7 +30,7 @@ class ns10_type1_decrypter_device : public ns10_decrypter_device public: // with just only type-1 game known, we cannot say which parts of the crypto_logic is common, if any, // and which is game-specific. In practice, this class is just an alias for the decrypter device of mrdrilr2 - uint16_t decrypt(uint16_t cipherword)override; + uint16_t decrypt(uint16_t cipherword) override; protected: ns10_type1_decrypter_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -40,22 +40,19 @@ private: uint8_t m_counter = 0; static const int initSbox[16]; - void init(int iv)override; - void device_start()override; + void init(int iv) override; + void device_start() override; }; - class ns10_type2_decrypter_device : public ns10_decrypter_device { public: - uint16_t decrypt(uint16_t cipherword)override; - -protected: - class gf2_reducer // helper class + class gf2_reducer // helper class { public: gf2_reducer(); - int gf2_reduce(uint64_t num)const; + int gf2_reduce(uint64_t num) const; + private: int m_gf2Reduction[0x10000]{}; }; @@ -67,104 +64,36 @@ protected: uint64_t eMask[16]{}; uint64_t dMask[16]{}; uint16_t xMask = 0; - uint16_t(*nonlinear_calculation)(uint64_t, uint64_t, const gf2_reducer&); // preliminary encoding; need research + std::function nonlinear_calculation; // preliminary encoding; need research }; - ns10_type2_decrypter_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const ns10_crypto_logic &logic); + ns10_type2_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + ns10_type2_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const ns10_crypto_logic logic); + + uint16_t decrypt(uint16_t cipherword) override; private: uint16_t m_mask = 0; uint64_t m_previous_cipherwords = 0; uint64_t m_previous_plainwords = 0; - const ns10_crypto_logic& m_logic; - std::unique_ptrm_reducer; + const ns10_crypto_logic m_logic; static const int initSbox[16]; - void init(int iv)override; - void device_start()override; + void init(int iv) override; + void device_start() override; + + std::unique_ptr m_reducer; + + bool m_logic_initialized; }; - - -// game-specific devices - class mrdrilr2_decrypter_device : public ns10_type1_decrypter_device { public: mrdrilr2_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); }; -class chocovdr_decrypter_device : public ns10_type2_decrypter_device -{ -public: - chocovdr_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); -private: - static uint16_t nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer &reducer); - static const ns10_crypto_logic crypto_logic; -}; - -class gamshara_decrypter_device : public ns10_type2_decrypter_device -{ -public: - gamshara_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); -private: - static uint16_t nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer &reducer); - static const ns10_crypto_logic crypto_logic; -}; - -class gjspace_decrypter_device : public ns10_type2_decrypter_device -{ -public: - gjspace_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); -private: - static uint16_t nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer &reducer); - static const ns10_crypto_logic crypto_logic; -}; - -class knpuzzle_decrypter_device : public ns10_type2_decrypter_device -{ -public: - knpuzzle_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); -private: - static uint16_t nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer &reducer); - static const ns10_crypto_logic crypto_logic; -}; - -class konotako_decrypter_device : public ns10_type2_decrypter_device -{ -public: - konotako_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); -private: - static uint16_t nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer &reducer); - static const ns10_crypto_logic crypto_logic; -}; - -class nflclsfb_decrypter_device : public ns10_type2_decrypter_device -{ -public: - nflclsfb_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); -private: - static uint16_t nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer &reducer); - static const ns10_crypto_logic crypto_logic; -}; - -class startrgn_decrypter_device : public ns10_type2_decrypter_device -{ -public: - startrgn_decrypter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); -private: - static uint16_t nonlinear_calc(uint64_t previous_cipherwords, uint64_t previous_plainwords, const gf2_reducer &reducer); - static const ns10_crypto_logic crypto_logic; -}; - - -DECLARE_DEVICE_TYPE(CHOCOVDR_DECRYPTER, chocovdr_decrypter_device) -DECLARE_DEVICE_TYPE(GAMSHARA_DECRYPTER, gamshara_decrypter_device) -DECLARE_DEVICE_TYPE(GJSPACE_DECRYPTER, gjspace_decrypter_device) -DECLARE_DEVICE_TYPE(KNPUZZLE_DECRYPTER, knpuzzle_decrypter_device) -DECLARE_DEVICE_TYPE(KONOTAKO_DECRYPTER, konotako_decrypter_device) -DECLARE_DEVICE_TYPE(MRDRILR2_DECRYPTER, mrdrilr2_decrypter_device) -DECLARE_DEVICE_TYPE(NFLCLSFB_DECRYPTER, nflclsfb_decrypter_device) -DECLARE_DEVICE_TYPE(STARTRGN_DECRYPTER, startrgn_decrypter_device) +DECLARE_DEVICE_TYPE(MRDRILR2_DECRYPTER, mrdrilr2_decrypter_device) // Type 1 +DECLARE_DEVICE_TYPE(NS10_TYPE2_DECRYPTER, ns10_type2_decrypter_device) #endif // MAME_NAMCO_NS10CRYPT_H