mirror of
https://github.com/holub/mame
synced 2025-06-30 16:00:01 +03:00
i186: interrupt level triggering and simplify timers (nw)
(mess) rmnimbus: start to fix scsi (nw)
This commit is contained in:
parent
5be5b6cc88
commit
fe11dca5f4
@ -5,7 +5,6 @@
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#include "debugger.h"
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#include "debugger.h"
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#include "i86inline.h"
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#include "i86inline.h"
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#define LATCH_INTS 1
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#define LOG_PORTS 0
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#define LOG_PORTS 0
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#define LOG_INTERRUPTS 0
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#define LOG_INTERRUPTS 0
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#define LOG_INTERRUPTS_EXT 0
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#define LOG_INTERRUPTS_EXT 0
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@ -561,20 +560,14 @@ void i80186_cpu_device::device_start()
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save_item(NAME(m_timer[0].maxB));
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save_item(NAME(m_timer[0].maxB));
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save_item(NAME(m_timer[0].active_count));
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save_item(NAME(m_timer[0].active_count));
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save_item(NAME(m_timer[0].count));
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save_item(NAME(m_timer[0].count));
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save_item(NAME(m_timer[0].time_timer_active));
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save_item(NAME(m_timer[0].last_time));
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save_item(NAME(m_timer[1].control));
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save_item(NAME(m_timer[1].control));
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save_item(NAME(m_timer[1].maxA));
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save_item(NAME(m_timer[1].maxA));
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save_item(NAME(m_timer[1].maxB));
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save_item(NAME(m_timer[1].maxB));
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save_item(NAME(m_timer[1].active_count));
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save_item(NAME(m_timer[1].active_count));
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save_item(NAME(m_timer[1].count));
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save_item(NAME(m_timer[1].count));
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save_item(NAME(m_timer[1].time_timer_active));
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save_item(NAME(m_timer[1].last_time));
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save_item(NAME(m_timer[2].control));
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save_item(NAME(m_timer[2].control));
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save_item(NAME(m_timer[2].maxA));
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save_item(NAME(m_timer[2].maxA));
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save_item(NAME(m_timer[2].count));
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save_item(NAME(m_timer[2].count));
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save_item(NAME(m_timer[2].time_timer_active));
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save_item(NAME(m_timer[2].last_time));
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save_item(NAME(m_dma[0].source));
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save_item(NAME(m_dma[0].source));
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save_item(NAME(m_dma[0].dest));
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save_item(NAME(m_dma[0].dest));
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save_item(NAME(m_dma[0].count));
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save_item(NAME(m_dma[0].count));
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@ -593,6 +586,7 @@ void i80186_cpu_device::device_start()
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save_item(NAME(m_intr.timer));
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save_item(NAME(m_intr.timer));
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save_item(NAME(m_intr.dma));
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save_item(NAME(m_intr.dma));
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save_item(NAME(m_intr.ext));
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save_item(NAME(m_intr.ext));
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save_item(NAME(m_intr.ext_state));
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save_item(NAME(m_mem.lower));
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save_item(NAME(m_mem.lower));
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save_item(NAME(m_mem.upper));
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save_item(NAME(m_mem.upper));
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save_item(NAME(m_mem.middle));
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save_item(NAME(m_mem.middle));
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@ -603,9 +597,6 @@ void i80186_cpu_device::device_start()
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m_timer[0].int_timer = timer_alloc(TIMER_INT0);
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m_timer[0].int_timer = timer_alloc(TIMER_INT0);
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m_timer[1].int_timer = timer_alloc(TIMER_INT1);
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m_timer[1].int_timer = timer_alloc(TIMER_INT1);
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m_timer[2].int_timer = timer_alloc(TIMER_INT2);
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m_timer[2].int_timer = timer_alloc(TIMER_INT2);
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m_timer[0].time_timer = timer_alloc(TIMER_TIME0);
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m_timer[1].time_timer = timer_alloc(TIMER_TIME1);
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m_timer[2].time_timer = timer_alloc(TIMER_TIME2);
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m_out_tmrout0_func.resolve_safe();
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m_out_tmrout0_func.resolve_safe();
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m_out_tmrout1_func.resolve_safe();
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m_out_tmrout1_func.resolve_safe();
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@ -632,13 +623,13 @@ void i80186_cpu_device::device_reset()
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m_intr.request = 0x0000;
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m_intr.request = 0x0000;
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m_intr.status = 0x0000;
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m_intr.status = 0x0000;
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m_intr.poll_status = 0x0000;
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m_intr.poll_status = 0x0000;
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m_intr.ext_state = 0x00;
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m_reloc = 0x20ff;
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m_reloc = 0x20ff;
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m_dma[0].drq_state = false;
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m_dma[0].drq_state = false;
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m_dma[1].drq_state = false;
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m_dma[1].drq_state = false;
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for(int i = 0; i < ARRAY_LENGTH(m_timer); ++i)
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for(int i = 0; i < ARRAY_LENGTH(m_timer); ++i)
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{
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{
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m_timer[i].control = 0;
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m_timer[i].control = 0;
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m_timer[i].time_timer_active = 0;
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m_timer[i].maxA = 0;
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m_timer[i].maxA = 0;
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m_timer[i].maxB = 0;
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m_timer[i].maxB = 0;
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m_timer[i].count = 0;
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m_timer[i].count = 0;
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@ -714,11 +705,17 @@ IRQ_CALLBACK_MEMBER(i80186_cpu_device::int_callback)
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oldreq=m_intr.request;
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oldreq=m_intr.request;
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/* clear the request and set the in-service bit */
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/* clear the request and set the in-service bit */
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#if LATCH_INTS
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if(m_intr.ack_mask & 0xf0)
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{
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int i;
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for(i = 0; i < 4; i++)
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if((m_intr.ack_mask >> (i + 4)) & 1)
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break;
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if(!(m_intr.ext[i] & EXTINT_CTRL_LTM))
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m_intr.request &= ~m_intr.ack_mask;
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}
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else
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m_intr.request &= ~m_intr.ack_mask;
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m_intr.request &= ~m_intr.ack_mask;
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#else
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m_intr.request &= ~(m_intr.ack_mask & 0x0f);
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#endif
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if((LOG_INTERRUPTS) && (m_intr.request!=oldreq))
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if((LOG_INTERRUPTS) && (m_intr.request!=oldreq))
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logerror("intr.request changed from %02X to %02X\n",oldreq,m_intr.request);
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logerror("intr.request changed from %02X to %02X\n",oldreq,m_intr.request);
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@ -927,18 +924,24 @@ void i80186_cpu_device::handle_eoi(int data)
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}
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}
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/* Trigger an external interrupt, optionally supplying the vector to take */
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/* Trigger an external interrupt, optionally supplying the vector to take */
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void i80186_cpu_device::external_int(UINT16 intno, int state, UINT8 vector)
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void i80186_cpu_device::external_int(UINT16 intno, int state)
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{
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{
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if (LOG_INTERRUPTS_EXT) logerror("generating external int %02X, vector %02X\n",intno,vector);
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if(!(m_intr.ext_state & (1 << intno)) == !state)
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return;
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if (LOG_INTERRUPTS_EXT) logerror("generating external int %02X\n",intno);
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if(!state)
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if(!state)
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{
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{
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m_intr.request &= ~(0x010 << intno);
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m_intr.request &= ~(0x010 << intno);
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m_intr.ack_mask &= ~(0x0010 << intno);
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m_intr.ack_mask &= ~(0x0010 << intno);
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m_intr.ext_state &= ~(1 << intno);
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}
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}
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else // Turn on the requested request bit and handle interrupt
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else // Turn on the requested request bit and handle interrupt
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{
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m_intr.request |= (0x010 << intno);
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m_intr.request |= (0x010 << intno);
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m_intr.ext_state |= (1 << intno);
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}
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update_interrupt_state();
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update_interrupt_state();
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}
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}
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@ -1014,6 +1017,7 @@ void i80186_cpu_device::device_timer(emu_timer &timer, device_timer_id id, int p
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count = t->maxA;
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count = t->maxA;
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count = count ? count : 0x10000;
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count = count ? count : 0x10000;
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if(!(t->control & 4))
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t->int_timer->adjust((attotime::from_hz(clock()/8) * count), which);
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t->int_timer->adjust((attotime::from_hz(clock()/8) * count), which);
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t->count = 0;
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t->count = 0;
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if (LOG_TIMER) logerror(" Repriming interrupt\n");
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if (LOG_TIMER) logerror(" Repriming interrupt\n");
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@ -1022,9 +1026,6 @@ void i80186_cpu_device::device_timer(emu_timer &timer, device_timer_id id, int p
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t->int_timer->adjust(attotime::never, which);
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t->int_timer->adjust(attotime::never, which);
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break;
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break;
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}
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}
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case TIMER_TIME0:
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case TIMER_TIME1:
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case TIMER_TIME2:
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default:
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default:
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break;
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break;
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}
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}
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@ -1036,14 +1037,8 @@ void i80186_cpu_device::internal_timer_sync(int which)
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struct timer_state *t = &m_timer[which];
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struct timer_state *t = &m_timer[which];
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/* if we have a timing timer running, adjust the count */
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/* if we have a timing timer running, adjust the count */
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if (t->time_timer_active && !(t->control & 0x0c))
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if ((t->control & 0x8000) && !(t->control & 0x0c))
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{
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t->count = (((which != 2) && t->active_count) ? t->maxB : t->maxA) - t->int_timer->remaining().as_ticks(clock() / 8);
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attotime current_time = t->time_timer->elapsed();
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int net_clocks = ((current_time - t->last_time) * (clock()/8)).seconds;
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t->last_time = current_time;
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t->count = t->count + net_clocks;
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}
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}
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}
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void i80186_cpu_device::inc_timer(int which)
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void i80186_cpu_device::inc_timer(int which)
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@ -1139,19 +1134,12 @@ void i80186_cpu_device::internal_timer_update(int which,int new_count,int new_ma
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{
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{
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/* compute the final count */
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/* compute the final count */
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internal_timer_sync(which);
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internal_timer_sync(which);
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/* nuke the timer and force the interrupt timer to be recomputed */
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t->time_timer->adjust(attotime::never, which);
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t->time_timer_active = 0;
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update_int_timer = 1;
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update_int_timer = 1;
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}
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}
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/* if we're going on, start the timers running except with external clock or prescale */
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/* if we're going on, start the timers running except with external clock or prescale */
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else if ((diff & 0x8000) && (new_control & 0x8000) && !(new_control & 0xc))
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else if ((diff & 0x8000) && (new_control & 0x8000) && !(new_control & 0xc))
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{
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{
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/* start the timing */
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t->time_timer->adjust(attotime::never, which);
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t->time_timer_active = 1;
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update_int_timer = 1;
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update_int_timer = 1;
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}
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}
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@ -1528,36 +1516,43 @@ WRITE16_MEMBER(i80186_cpu_device::internal_port_w)
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case 0x19:
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case 0x19:
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if (LOG_PORTS) logerror("%05X:80186 timer interrupt contol = %04X\n", pc(), data);
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if (LOG_PORTS) logerror("%05X:80186 timer interrupt contol = %04X\n", pc(), data);
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m_intr.timer = data & 0x000f;
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m_intr.timer = data & 0x000f;
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update_interrupt_state();
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break;
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break;
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case 0x1a:
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case 0x1a:
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if (LOG_PORTS) logerror("%05X:80186 DMA 0 interrupt control = %04X\n", pc(), data);
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if (LOG_PORTS) logerror("%05X:80186 DMA 0 interrupt control = %04X\n", pc(), data);
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m_intr.dma[0] = data & 0x000f;
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m_intr.dma[0] = data & 0x000f;
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update_interrupt_state();
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break;
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break;
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case 0x1b:
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case 0x1b:
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if (LOG_PORTS) logerror("%05X:80186 DMA 1 interrupt control = %04X\n", pc(), data);
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if (LOG_PORTS) logerror("%05X:80186 DMA 1 interrupt control = %04X\n", pc(), data);
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m_intr.dma[1] = data & 0x000f;
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m_intr.dma[1] = data & 0x000f;
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update_interrupt_state();
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break;
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break;
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case 0x1c:
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case 0x1c:
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if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X\n", pc(), data);
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if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X\n", pc(), data);
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m_intr.ext[0] = data & 0x007f;
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m_intr.ext[0] = data & 0x007f;
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update_interrupt_state();
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break;
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break;
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case 0x1d:
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case 0x1d:
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if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X\n", pc(), data);
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if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X\n", pc(), data);
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m_intr.ext[1] = data & 0x007f;
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m_intr.ext[1] = data & 0x007f;
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update_interrupt_state();
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break;
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break;
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case 0x1e:
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case 0x1e:
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if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X\n", pc(), data);
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if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X\n", pc(), data);
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m_intr.ext[2] = data & 0x001f;
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m_intr.ext[2] = data & 0x001f;
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update_interrupt_state();
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break;
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break;
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case 0x1f:
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case 0x1f:
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if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X\n", pc(), data);
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if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X\n", pc(), data);
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m_intr.ext[3] = data & 0x001f;
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m_intr.ext[3] = data & 0x001f;
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update_interrupt_state();
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break;
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break;
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case 0x28:
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case 0x28:
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@ -24,10 +24,10 @@ public:
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DECLARE_WRITE_LINE_MEMBER(drq1_w) { if(state) drq_callback(1); m_dma[1].drq_state = state; }
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DECLARE_WRITE_LINE_MEMBER(drq1_w) { if(state) drq_callback(1); m_dma[1].drq_state = state; }
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DECLARE_WRITE_LINE_MEMBER(tmrin0_w) { if(state && (m_timer[0].control & 0x8004) == 0x8004) { inc_timer(0); } }
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DECLARE_WRITE_LINE_MEMBER(tmrin0_w) { if(state && (m_timer[0].control & 0x8004) == 0x8004) { inc_timer(0); } }
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DECLARE_WRITE_LINE_MEMBER(tmrin1_w) { if(state && (m_timer[1].control & 0x8004) == 0x8004) { inc_timer(1); } }
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DECLARE_WRITE_LINE_MEMBER(tmrin1_w) { if(state && (m_timer[1].control & 0x8004) == 0x8004) { inc_timer(1); } }
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DECLARE_WRITE_LINE_MEMBER(int0_w) { external_int(0, state, 0); }
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DECLARE_WRITE_LINE_MEMBER(int0_w) { external_int(0, state); }
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DECLARE_WRITE_LINE_MEMBER(int1_w) { external_int(1, state, 0); }
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DECLARE_WRITE_LINE_MEMBER(int1_w) { external_int(1, state); }
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DECLARE_WRITE_LINE_MEMBER(int2_w) { external_int(2, state, 0); }
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DECLARE_WRITE_LINE_MEMBER(int2_w) { external_int(2, state); }
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DECLARE_WRITE_LINE_MEMBER(int3_w) { external_int(3, state, 0); }
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DECLARE_WRITE_LINE_MEMBER(int3_w) { external_int(3, state); }
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// device_memory_interface overrides
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// device_memory_interface overrides
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
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@ -55,7 +55,7 @@ protected:
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private:
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private:
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void update_interrupt_state();
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void update_interrupt_state();
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void handle_eoi(int data);
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void handle_eoi(int data);
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void external_int(UINT16 intno, int state, UINT8 vector);
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void external_int(UINT16 intno, int state);
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void internal_timer_sync(int which);
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void internal_timer_sync(int which);
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void internal_timer_update(int which,int new_count,int new_maxA,int new_maxB,int new_control);
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void internal_timer_update(int which,int new_count,int new_maxA,int new_maxB,int new_control);
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void update_dma_control(int which, int new_control);
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void update_dma_control(int which, int new_control);
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@ -81,9 +81,6 @@ private:
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bool active_count;
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bool active_count;
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UINT16 count;
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UINT16 count;
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emu_timer *int_timer;
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emu_timer *int_timer;
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emu_timer *time_timer;
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UINT8 time_timer_active;
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attotime last_time;
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};
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};
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struct dma_state
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struct dma_state
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@ -108,6 +105,7 @@ private:
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UINT16 timer;
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UINT16 timer;
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UINT16 dma[2];
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UINT16 dma[2];
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UINT16 ext[4];
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UINT16 ext[4];
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UINT8 ext_state;
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};
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};
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static const device_timer_id TIMER_INT0 = 0;
|
static const device_timer_id TIMER_INT0 = 0;
|
||||||
|
@ -176,7 +176,7 @@ static MACHINE_CONFIG_START( nimbus, rmnimbus_state )
|
|||||||
MCFG_VIA6522_WRITEPA_HANDLER(DEVWRITE8("cent_data_out", output_latch_device, write))
|
MCFG_VIA6522_WRITEPA_HANDLER(DEVWRITE8("cent_data_out", output_latch_device, write))
|
||||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(rmnimbus_state,nimbus_via_write_portb))
|
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(rmnimbus_state,nimbus_via_write_portb))
|
||||||
MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(CENTRONICS_TAG, centronics_device, write_strobe))
|
MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(CENTRONICS_TAG, centronics_device, write_strobe))
|
||||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(rmnimbus_state,nimbus_via_irq_w))
|
MCFG_VIA6522_IRQ_HANDLER(DEVWRITELINE(MAINCPU_TAG, i80186_cpu_device, int3_w))
|
||||||
|
|
||||||
MCFG_CENTRONICS_ADD(CENTRONICS_TAG, centronics_printers, "printer")
|
MCFG_CENTRONICS_ADD(CENTRONICS_TAG, centronics_printers, "printer")
|
||||||
MCFG_CENTRONICS_ACK_HANDLER(DEVWRITELINE(VIA_TAG, via6522_device, write_ca1)) MCFG_DEVCB_INVERT
|
MCFG_CENTRONICS_ACK_HANDLER(DEVWRITELINE(VIA_TAG, via6522_device, write_ca1)) MCFG_DEVCB_INVERT
|
||||||
|
@ -90,7 +90,6 @@ public:
|
|||||||
UINT8 m_iou_reg092;
|
UINT8 m_iou_reg092;
|
||||||
UINT8 m_last_playmode;
|
UINT8 m_last_playmode;
|
||||||
UINT8 m_ay8910_a;
|
UINT8 m_ay8910_a;
|
||||||
UINT8 m_sio_int_state;
|
|
||||||
UINT16 m_x, m_y, m_yline;
|
UINT16 m_x, m_y, m_yline;
|
||||||
UINT8 m_colours, m_mode, m_op;
|
UINT8 m_colours, m_mode, m_op;
|
||||||
UINT32 m_debug_video;
|
UINT32 m_debug_video;
|
||||||
@ -126,7 +125,6 @@ public:
|
|||||||
DECLARE_WRITE_LINE_MEMBER(nimbus_fdc_intrq_w);
|
DECLARE_WRITE_LINE_MEMBER(nimbus_fdc_intrq_w);
|
||||||
DECLARE_WRITE_LINE_MEMBER(nimbus_fdc_drq_w);
|
DECLARE_WRITE_LINE_MEMBER(nimbus_fdc_drq_w);
|
||||||
DECLARE_WRITE8_MEMBER(nimbus_via_write_portb);
|
DECLARE_WRITE8_MEMBER(nimbus_via_write_portb);
|
||||||
DECLARE_WRITE_LINE_MEMBER(nimbus_via_irq_w);
|
|
||||||
DECLARE_WRITE_LINE_MEMBER(write_scsi_bsy);
|
DECLARE_WRITE_LINE_MEMBER(write_scsi_bsy);
|
||||||
DECLARE_WRITE_LINE_MEMBER(write_scsi_cd);
|
DECLARE_WRITE_LINE_MEMBER(write_scsi_cd);
|
||||||
DECLARE_WRITE_LINE_MEMBER(write_scsi_io);
|
DECLARE_WRITE_LINE_MEMBER(write_scsi_io);
|
||||||
@ -144,9 +142,8 @@ public:
|
|||||||
void move_pixel_line(UINT16 x, UINT16 y, UINT8 width);
|
void move_pixel_line(UINT16 x, UINT16 y, UINT8 width);
|
||||||
void write_pixel_data(UINT16 x, UINT16 y, UINT16 data);
|
void write_pixel_data(UINT16 x, UINT16 y, UINT16 data);
|
||||||
void change_palette(UINT8 bank, UINT16 colours);
|
void change_palette(UINT8 bank, UINT16 colours);
|
||||||
void external_int(UINT16 intno, UINT8 vector);
|
void external_int(UINT8 vector, bool state);
|
||||||
DECLARE_READ8_MEMBER(cascade_callback);
|
DECLARE_READ8_MEMBER(cascade_callback);
|
||||||
void *get_dssi_ptr(address_space &space, UINT16 ds, UINT16 si);
|
|
||||||
void nimbus_bank_memory();
|
void nimbus_bank_memory();
|
||||||
void memory_reset();
|
void memory_reset();
|
||||||
void fdc_reset();
|
void fdc_reset();
|
||||||
@ -160,6 +157,7 @@ public:
|
|||||||
void iou_reset();
|
void iou_reset();
|
||||||
void rmni_sound_reset();
|
void rmni_sound_reset();
|
||||||
void mouse_js_reset();
|
void mouse_js_reset();
|
||||||
|
void check_scsi_irq();
|
||||||
|
|
||||||
int m_scsi_iena;
|
int m_scsi_iena;
|
||||||
int m_scsi_msg;
|
int m_scsi_msg;
|
||||||
@ -182,7 +180,6 @@ public:
|
|||||||
UINT8 reg418;
|
UINT8 reg418;
|
||||||
|
|
||||||
UINT8 drq_ff;
|
UINT8 drq_ff;
|
||||||
UINT8 int_ff;
|
|
||||||
} m_nimbus_drives;
|
} m_nimbus_drives;
|
||||||
|
|
||||||
/* 8031 Peripheral controler */
|
/* 8031 Peripheral controler */
|
||||||
|
@ -108,8 +108,6 @@ enum
|
|||||||
|
|
||||||
#define MOUSE_INT_ENABLED(state) (((state)->m_iou_reg092 & MOUSE_INT_ENABLE) ? 1 : 0)
|
#define MOUSE_INT_ENABLED(state) (((state)->m_iou_reg092 & MOUSE_INT_ENABLE) ? 1 : 0)
|
||||||
|
|
||||||
#define VIA_INT 0x03
|
|
||||||
|
|
||||||
#define LINEAR_ADDR(seg,ofs) ((seg<<4)+ofs)
|
#define LINEAR_ADDR(seg,ofs) ((seg<<4)+ofs)
|
||||||
|
|
||||||
#define OUTPUT_SEGOFS(mess,seg,ofs) logerror("%s=%04X:%04X [%08X]\n",mess,seg,ofs,((seg<<4)+ofs))
|
#define OUTPUT_SEGOFS(mess,seg,ofs) logerror("%s=%04X:%04X [%08X]\n",mess,seg,ofs,((seg<<4)+ofs))
|
||||||
@ -168,7 +166,6 @@ struct t_nimbus_brush
|
|||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
static void execute_debug_irq(running_machine &machine, int ref, int params, const char *param[]);
|
|
||||||
static void nimbus_debug(running_machine &machine, int ref, int params, const char *param[]);
|
static void nimbus_debug(running_machine &machine, int ref, int params, const char *param[]);
|
||||||
|
|
||||||
static int instruction_hook(device_t &device, offs_t curpc);
|
static int instruction_hook(device_t &device, offs_t curpc);
|
||||||
@ -181,30 +178,20 @@ static void decode_dssi_f_set_new_clt(device_t *device,UINT16 ds, UINT16 si, UI
|
|||||||
static void decode_dssi_f_plonk_char(device_t *device,UINT16 ds, UINT16 si, UINT8 raw_flag);
|
static void decode_dssi_f_plonk_char(device_t *device,UINT16 ds, UINT16 si, UINT8 raw_flag);
|
||||||
static void decode_dssi_f_rw_sectors(device_t *device,UINT16 ds, UINT16 si, UINT8 raw_flag);
|
static void decode_dssi_f_rw_sectors(device_t *device,UINT16 ds, UINT16 si, UINT8 raw_flag);
|
||||||
|
|
||||||
void rmnimbus_state::external_int(UINT16 intno, UINT8 vector)
|
void rmnimbus_state::external_int(UINT8 vector, bool state)
|
||||||
{
|
{
|
||||||
m_vector = vector;
|
|
||||||
switch(intno)
|
if(!state && (vector != m_vector))
|
||||||
{
|
|
||||||
case 0:
|
|
||||||
m_maincpu->int0_w(1);
|
|
||||||
break;
|
|
||||||
case 1:
|
|
||||||
m_maincpu->int1_w(1);
|
|
||||||
break;
|
|
||||||
case 2:
|
|
||||||
m_maincpu->int2_w(1);
|
|
||||||
break;
|
|
||||||
case 3:
|
|
||||||
m_maincpu->int3_w(1);
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
return;
|
return;
|
||||||
}
|
|
||||||
|
m_vector = vector;
|
||||||
|
|
||||||
|
m_maincpu->int0_w(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
READ8_MEMBER(rmnimbus_state::cascade_callback)
|
READ8_MEMBER(rmnimbus_state::cascade_callback)
|
||||||
{
|
{
|
||||||
|
m_maincpu->int0_w(0);
|
||||||
return m_vector;
|
return m_vector;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -237,7 +224,6 @@ void rmnimbus_state::machine_start()
|
|||||||
/* setup debug commands */
|
/* setup debug commands */
|
||||||
if (machine().debug_flags & DEBUG_FLAG_ENABLED)
|
if (machine().debug_flags & DEBUG_FLAG_ENABLED)
|
||||||
{
|
{
|
||||||
debug_console_register_command(machine(), "nimbus_irq", CMDFLAG_NONE, 0, 0, 2, execute_debug_irq);
|
|
||||||
debug_console_register_command(machine(), "nimbus_debug", CMDFLAG_NONE, 0, 0, 1, nimbus_debug);
|
debug_console_register_command(machine(), "nimbus_debug", CMDFLAG_NONE, 0, 0, 1, nimbus_debug);
|
||||||
|
|
||||||
/* set up the instruction hook */
|
/* set up the instruction hook */
|
||||||
@ -248,26 +234,6 @@ void rmnimbus_state::machine_start()
|
|||||||
m_fdc->dden_w(0);
|
m_fdc->dden_w(0);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void execute_debug_irq(running_machine &machine, int ref, int params, const char *param[])
|
|
||||||
{
|
|
||||||
rmnimbus_state *state = machine.driver_data<rmnimbus_state>();
|
|
||||||
int IntNo;
|
|
||||||
int Vector;
|
|
||||||
|
|
||||||
if(params>1)
|
|
||||||
{
|
|
||||||
sscanf(param[0],"%X",&IntNo);
|
|
||||||
sscanf(param[1],"%X",&Vector);
|
|
||||||
|
|
||||||
debug_console_printf(machine,"triggering IRQ%d, Vector=%02X\n",IntNo,Vector);
|
|
||||||
state->external_int(IntNo,Vector);
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
debug_console_printf(machine,"Error, you must supply an intno and vector to trigger\n");
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
static void nimbus_debug(running_machine &machine, int ref, int params, const char *param[])
|
static void nimbus_debug(running_machine &machine, int ref, int params, const char *param[])
|
||||||
{
|
{
|
||||||
rmnimbus_state *state = machine.driver_data<rmnimbus_state>();
|
rmnimbus_state *state = machine.driver_data<rmnimbus_state>();
|
||||||
@ -655,7 +621,7 @@ static void decode_subbios(device_t *device,offs_t pc, UINT8 raw_flag)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void *rmnimbus_state::get_dssi_ptr(address_space &space, UINT16 ds, UINT16 si)
|
static inline void *get_dssi_ptr(address_space &space, UINT16 ds, UINT16 si)
|
||||||
{
|
{
|
||||||
int addr;
|
int addr;
|
||||||
|
|
||||||
@ -675,7 +641,7 @@ static void decode_dssi_generic(device_t *device,UINT16 ds, UINT16 si, UINT8 ra
|
|||||||
if(raw_flag)
|
if(raw_flag)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
params=(UINT16 *)state->get_dssi_ptr(space,ds,si);
|
params=(UINT16 *)get_dssi_ptr(space,ds,si);
|
||||||
|
|
||||||
for(count=0; count<10; count++)
|
for(count=0; count<10; count++)
|
||||||
logerror("%04X ",params[count]);
|
logerror("%04X ",params[count]);
|
||||||
@ -694,7 +660,7 @@ static void decode_dssi_f_fill_area(device_t *device,UINT16 ds, UINT16 si, UINT
|
|||||||
t_nimbus_brush *brush;
|
t_nimbus_brush *brush;
|
||||||
int cocount;
|
int cocount;
|
||||||
|
|
||||||
area_params = (t_area_params *)state->get_dssi_ptr(space,ds,si);
|
area_params = (t_area_params *)get_dssi_ptr(space,ds,si);
|
||||||
|
|
||||||
if (!raw_flag)
|
if (!raw_flag)
|
||||||
OUTPUT_SEGOFS("SegBrush:OfsBrush",area_params->seg_brush,area_params->ofs_brush);
|
OUTPUT_SEGOFS("SegBrush:OfsBrush",area_params->seg_brush,area_params->ofs_brush);
|
||||||
@ -750,7 +716,7 @@ static void decode_dssi_f_plot_character_string(device_t *device,UINT16 ds, UIN
|
|||||||
if(raw_flag)
|
if(raw_flag)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
plot_string_params=(t_plot_string_params *)state->get_dssi_ptr(space,ds,si);
|
plot_string_params=(t_plot_string_params *)get_dssi_ptr(space,ds,si);
|
||||||
|
|
||||||
OUTPUT_SEGOFS("SegFont:OfsFont",plot_string_params->seg_font,plot_string_params->ofs_font);
|
OUTPUT_SEGOFS("SegFont:OfsFont",plot_string_params->seg_font,plot_string_params->ofs_font);
|
||||||
OUTPUT_SEGOFS("SegData:OfsData",plot_string_params->seg_data,plot_string_params->ofs_data);
|
OUTPUT_SEGOFS("SegData:OfsData",plot_string_params->seg_data,plot_string_params->ofs_data);
|
||||||
@ -774,7 +740,7 @@ static void decode_dssi_f_set_new_clt(device_t *device,UINT16 ds, UINT16 si, UI
|
|||||||
address_space &space = state->m_maincpu->space(AS_PROGRAM);
|
address_space &space = state->m_maincpu->space(AS_PROGRAM);
|
||||||
UINT16 *new_colours;
|
UINT16 *new_colours;
|
||||||
int colour;
|
int colour;
|
||||||
new_colours=(UINT16 *)state->get_dssi_ptr(space,ds,si);
|
new_colours=(UINT16 *)get_dssi_ptr(space,ds,si);
|
||||||
|
|
||||||
if(raw_flag)
|
if(raw_flag)
|
||||||
return;
|
return;
|
||||||
@ -791,7 +757,7 @@ static void decode_dssi_f_plonk_char(device_t *device,UINT16 ds, UINT16 si, UIN
|
|||||||
rmnimbus_state *state = device->machine().driver_data<rmnimbus_state>();
|
rmnimbus_state *state = device->machine().driver_data<rmnimbus_state>();
|
||||||
address_space &space = state->m_maincpu->space(AS_PROGRAM);
|
address_space &space = state->m_maincpu->space(AS_PROGRAM);
|
||||||
UINT16 *params;
|
UINT16 *params;
|
||||||
params=(UINT16 *)state->get_dssi_ptr(space,ds,si);
|
params=(UINT16 *)get_dssi_ptr(space,ds,si);
|
||||||
|
|
||||||
if(raw_flag)
|
if(raw_flag)
|
||||||
return;
|
return;
|
||||||
@ -811,7 +777,7 @@ static void decode_dssi_f_rw_sectors(device_t *device,UINT16 ds, UINT16 si, UIN
|
|||||||
if(raw_flag)
|
if(raw_flag)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
params=(UINT16 *)state->get_dssi_ptr(space,ds,si);
|
params=(UINT16 *)get_dssi_ptr(space,ds,si);
|
||||||
|
|
||||||
for(param_no=0;param_no<16;param_no++)
|
for(param_no=0;param_no<16;param_no++)
|
||||||
logerror("%04X ",params[param_no]);
|
logerror("%04X ",params[param_no]);
|
||||||
@ -1035,14 +1001,7 @@ WRITE_LINE_MEMBER(rmnimbus_state::sio_interrupt)
|
|||||||
if(LOG_SIO)
|
if(LOG_SIO)
|
||||||
logerror("SIO Interrupt state=%02X\n",state);
|
logerror("SIO Interrupt state=%02X\n",state);
|
||||||
|
|
||||||
// Don't re-trigger if already active !
|
external_int(m_z80sio->m1_r(), state);
|
||||||
if(state!=m_sio_int_state)
|
|
||||||
{
|
|
||||||
m_sio_int_state=state;
|
|
||||||
|
|
||||||
if(state)
|
|
||||||
external_int(0, m_z80sio->m1_r());
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Floppy disk */
|
/* Floppy disk */
|
||||||
@ -1051,7 +1010,6 @@ void rmnimbus_state::fdc_reset()
|
|||||||
{
|
{
|
||||||
m_nimbus_drives.reg400=0;
|
m_nimbus_drives.reg400=0;
|
||||||
m_scsi_ctrl_out->write(0);
|
m_scsi_ctrl_out->write(0);
|
||||||
m_nimbus_drives.int_ff=0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(rmnimbus_state::nimbus_fdc_intrq_w)
|
WRITE_LINE_MEMBER(rmnimbus_state::nimbus_fdc_intrq_w)
|
||||||
@ -1061,10 +1019,7 @@ WRITE_LINE_MEMBER(rmnimbus_state::nimbus_fdc_intrq_w)
|
|||||||
|
|
||||||
if(m_iou_reg092 & DISK_INT_ENABLE)
|
if(m_iou_reg092 & DISK_INT_ENABLE)
|
||||||
{
|
{
|
||||||
m_nimbus_drives.int_ff=state;
|
external_int(EXTERNAL_INT_DISK,state);
|
||||||
|
|
||||||
if(state)
|
|
||||||
external_int(0,EXTERNAL_INT_DISK);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1119,10 +1074,10 @@ READ8_MEMBER(rmnimbus_state::scsi_r)
|
|||||||
switch(offset*2)
|
switch(offset*2)
|
||||||
{
|
{
|
||||||
case 0x00 :
|
case 0x00 :
|
||||||
result |= !m_scsi_req << 7;
|
result |= m_scsi_req << 7;
|
||||||
result |= !m_scsi_cd << 6;
|
result |= m_scsi_cd << 6;
|
||||||
result |= !m_scsi_io << 5;
|
result |= m_scsi_io << 5;
|
||||||
result |= !m_scsi_bsy << 4;
|
result |= m_scsi_bsy << 4;
|
||||||
result |= m_scsi_msg << 3;
|
result |= m_scsi_msg << 3;
|
||||||
if(floppy)
|
if(floppy)
|
||||||
{
|
{
|
||||||
@ -1196,11 +1151,11 @@ WRITE8_MEMBER(rmnimbus_state::scsi_w)
|
|||||||
|
|
||||||
switch(offset*2)
|
switch(offset*2)
|
||||||
{
|
{
|
||||||
case 0x10 :
|
case 0x00 :
|
||||||
m_scsi_ctrl_out->write(data);
|
m_scsi_ctrl_out->write(data);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x18 :
|
case 0x08 :
|
||||||
m_scsi_data_out->write(data);
|
m_scsi_data_out->write(data);
|
||||||
hdc_post_rw();
|
hdc_post_rw();
|
||||||
break;
|
break;
|
||||||
@ -1210,21 +1165,28 @@ WRITE8_MEMBER(rmnimbus_state::scsi_w)
|
|||||||
void rmnimbus_state::hdc_reset()
|
void rmnimbus_state::hdc_reset()
|
||||||
{
|
{
|
||||||
m_nimbus_drives.drq_ff=0;
|
m_nimbus_drives.drq_ff=0;
|
||||||
|
m_scsi_iena = 0;
|
||||||
|
m_scsi_msg = 0;
|
||||||
|
m_scsi_bsy = 0;
|
||||||
|
m_scsi_io = 0;
|
||||||
|
m_scsi_cd = 0;
|
||||||
|
m_scsi_req = 0;
|
||||||
|
}
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||||||
|
|
||||||
|
void rmnimbus_state::check_scsi_irq()
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||||||
|
{
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||||||
|
nimbus_fdc_intrq_w(m_scsi_io && m_scsi_cd && m_scsi_req && m_scsi_iena);
|
||||||
}
|
}
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||||||
|
|
||||||
WRITE_LINE_MEMBER(rmnimbus_state::write_scsi_iena)
|
WRITE_LINE_MEMBER(rmnimbus_state::write_scsi_iena)
|
||||||
{
|
{
|
||||||
int last = m_scsi_iena;
|
|
||||||
m_scsi_iena = state;
|
m_scsi_iena = state;
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||||||
|
check_scsi_irq();
|
||||||
// If we enable the HDC interupt, and an interrupt is pending, go deal with it.
|
|
||||||
if (m_scsi_iena && !last && !m_scsi_io && !m_scsi_cd && !m_scsi_req)
|
|
||||||
nimbus_fdc_intrq_w(1);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void rmnimbus_state::hdc_post_rw()
|
void rmnimbus_state::hdc_post_rw()
|
||||||
{
|
{
|
||||||
if(!m_scsi_req)
|
if(m_scsi_req)
|
||||||
m_scsibus->write_ack(1);
|
m_scsibus->write_ack(1);
|
||||||
|
|
||||||
m_nimbus_drives.drq_ff=0;
|
m_nimbus_drives.drq_ff=0;
|
||||||
@ -1246,6 +1208,7 @@ WRITE_LINE_MEMBER( rmnimbus_state::write_scsi_bsy )
|
|||||||
WRITE_LINE_MEMBER( rmnimbus_state::write_scsi_cd )
|
WRITE_LINE_MEMBER( rmnimbus_state::write_scsi_cd )
|
||||||
{
|
{
|
||||||
m_scsi_cd = state;
|
m_scsi_cd = state;
|
||||||
|
check_scsi_irq();
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( rmnimbus_state::write_scsi_io )
|
WRITE_LINE_MEMBER( rmnimbus_state::write_scsi_io )
|
||||||
@ -1256,6 +1219,7 @@ WRITE_LINE_MEMBER( rmnimbus_state::write_scsi_io )
|
|||||||
{
|
{
|
||||||
m_scsi_data_out->write(0);
|
m_scsi_data_out->write(0);
|
||||||
}
|
}
|
||||||
|
check_scsi_irq();
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER( rmnimbus_state::write_scsi_msg )
|
WRITE_LINE_MEMBER( rmnimbus_state::write_scsi_msg )
|
||||||
@ -1280,6 +1244,7 @@ WRITE_LINE_MEMBER( rmnimbus_state::write_scsi_req )
|
|||||||
{
|
{
|
||||||
m_scsibus->write_ack(0);
|
m_scsibus->write_ack(0);
|
||||||
}
|
}
|
||||||
|
check_scsi_irq();
|
||||||
}
|
}
|
||||||
|
|
||||||
/* 8031/8051 Peripheral controler 80186 side */
|
/* 8031/8051 Peripheral controler 80186 side */
|
||||||
@ -1369,7 +1334,7 @@ READ8_MEMBER(rmnimbus_state::nimbus_pc8031_iou_r)
|
|||||||
}
|
}
|
||||||
|
|
||||||
if(((offset==2) || (offset==3)) && (m_iou_reg092 & PC8031_INT_ENABLE))
|
if(((offset==2) || (offset==3)) && (m_iou_reg092 & PC8031_INT_ENABLE))
|
||||||
external_int(0,EXTERNAL_INT_PC8031_8C);
|
external_int(EXTERNAL_INT_PC8031_8C, true);
|
||||||
|
|
||||||
if(LOG_PC8031)
|
if(LOG_PC8031)
|
||||||
logerror("8031: PCIOR %04X read of %04X returns %02X\n",pc,offset,result);
|
logerror("8031: PCIOR %04X read of %04X returns %02X\n",pc,offset,result);
|
||||||
@ -1403,7 +1368,7 @@ WRITE8_MEMBER(rmnimbus_state::nimbus_pc8031_iou_w)
|
|||||||
m_ipc_interface.status_out &= ~IPC_OUT_ADDR;
|
m_ipc_interface.status_out &= ~IPC_OUT_ADDR;
|
||||||
m_ipc_interface.status_in |= IPC_IN_READ_PEND;
|
m_ipc_interface.status_in |= IPC_IN_READ_PEND;
|
||||||
if(m_iou_reg092 & PC8031_INT_ENABLE)
|
if(m_iou_reg092 & PC8031_INT_ENABLE)
|
||||||
external_int(0,EXTERNAL_INT_PC8031_8F);
|
external_int(EXTERNAL_INT_PC8031_8F, true);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x03 : m_ipc_interface.ipc_out=data;
|
case 0x03 : m_ipc_interface.ipc_out=data;
|
||||||
@ -1411,7 +1376,7 @@ WRITE8_MEMBER(rmnimbus_state::nimbus_pc8031_iou_w)
|
|||||||
m_ipc_interface.status_out |= IPC_OUT_ADDR;
|
m_ipc_interface.status_out |= IPC_OUT_ADDR;
|
||||||
m_ipc_interface.status_in |= IPC_IN_READ_PEND;
|
m_ipc_interface.status_in |= IPC_IN_READ_PEND;
|
||||||
if(m_iou_reg092 & PC8031_INT_ENABLE)
|
if(m_iou_reg092 & PC8031_INT_ENABLE)
|
||||||
external_int(0,EXTERNAL_INT_PC8031_8E);
|
external_int(EXTERNAL_INT_PC8031_8E, true);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -1545,7 +1510,7 @@ WRITE8_MEMBER(rmnimbus_state::nimbus_sound_ay8910_portb_w)
|
|||||||
WRITE_LINE_MEMBER(rmnimbus_state::nimbus_msm5205_vck)
|
WRITE_LINE_MEMBER(rmnimbus_state::nimbus_msm5205_vck)
|
||||||
{
|
{
|
||||||
if(m_iou_reg092 & MSM5205_INT_ENABLE)
|
if(m_iou_reg092 & MSM5205_INT_ENABLE)
|
||||||
external_int(0,EXTERNAL_INT_MSM5205);
|
external_int(EXTERNAL_INT_MSM5205,state);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const int MOUSE_XYA[3][4] = { { 0, 0, 0, 0 }, { 1, 1, 0, 0 }, { 0, 1, 1, 0 } };
|
static const int MOUSE_XYA[3][4] = { { 0, 0, 0, 0 }, { 1, 1, 0, 0 }, { 0, 1, 1, 0 } };
|
||||||
@ -1663,7 +1628,7 @@ void rmnimbus_state::device_timer(emu_timer &timer, device_timer_id id, int para
|
|||||||
{
|
{
|
||||||
xint=mxa ? EXTERNAL_INT_MOUSE_XR : EXTERNAL_INT_MOUSE_XL;
|
xint=mxa ? EXTERNAL_INT_MOUSE_XR : EXTERNAL_INT_MOUSE_XL;
|
||||||
|
|
||||||
external_int(0,xint);
|
external_int(xint, true);
|
||||||
|
|
||||||
// logerror("Xint:%02X, mxb=%02X\n",xint,mxb);
|
// logerror("Xint:%02X, mxb=%02X\n",xint,mxb);
|
||||||
}
|
}
|
||||||
@ -1673,7 +1638,7 @@ void rmnimbus_state::device_timer(emu_timer &timer, device_timer_id id, int para
|
|||||||
{
|
{
|
||||||
yint=myb ? EXTERNAL_INT_MOUSE_YU : EXTERNAL_INT_MOUSE_YD;
|
yint=myb ? EXTERNAL_INT_MOUSE_YU : EXTERNAL_INT_MOUSE_YD;
|
||||||
|
|
||||||
external_int(0,yint);
|
external_int(yint, true);
|
||||||
// logerror("Yint:%02X, myb=%02X\n",yint,myb);
|
// logerror("Yint:%02X, myb=%02X\n",yint,myb);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -1751,9 +1716,3 @@ collector output only. It usially acts as the printer strobe line.
|
|||||||
WRITE8_MEMBER(rmnimbus_state::nimbus_via_write_portb)
|
WRITE8_MEMBER(rmnimbus_state::nimbus_via_write_portb)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(rmnimbus_state::nimbus_via_irq_w)
|
|
||||||
{
|
|
||||||
if(state)
|
|
||||||
external_int(VIA_INT,0x00);
|
|
||||||
}
|
|
||||||
|
Loading…
Reference in New Issue
Block a user