mirror of
https://github.com/holub/mame
synced 2025-04-23 08:49:55 +03:00
Merge branch 'master' of https://github.com/mamedev/mame
This commit is contained in:
dankan1890
commit
fe941f17a6
@ -1136,6 +1136,7 @@ end
|
||||
--@src/devices/cpu/m6502/r65c02.h,CPUS["M6502"] = true
|
||||
--@src/devices/cpu/m6502/m65sc02.h,CPUS["M6502"] = true
|
||||
--@src/devices/cpu/m6502/m6504.h,CPUS["M6502"] = true
|
||||
--@src/devices/cpu/m6502/m6507.h,CPUS["M6502"] = true
|
||||
--@src/devices/cpu/m6502/m6509.h,CPUS["M6502"] = true
|
||||
--@src/devices/cpu/m6502/m6510.h,CPUS["M6502"] = true
|
||||
--@src/devices/cpu/m6502/m6510t.h,CPUS["M6502"] = true
|
||||
@ -1164,6 +1165,8 @@ if (CPUS["M6502"]~=null) then
|
||||
MAME_DIR .. "src/devices/cpu/m6502/m65sc02.h",
|
||||
MAME_DIR .. "src/devices/cpu/m6502/m6504.c",
|
||||
MAME_DIR .. "src/devices/cpu/m6502/m6504.h",
|
||||
MAME_DIR .. "src/devices/cpu/m6502/m6507.c",
|
||||
MAME_DIR .. "src/devices/cpu/m6502/m6507.h",
|
||||
MAME_DIR .. "src/devices/cpu/m6502/m6509.c",
|
||||
MAME_DIR .. "src/devices/cpu/m6502/m6509.h",
|
||||
MAME_DIR .. "src/devices/cpu/m6502/m6510.c",
|
||||
|
||||
@ -396,7 +396,8 @@ e01_device::e01_device(const machine_config &mconfig, const char *tag, device_t
|
||||
m_fdc_irq(CLEAR_LINE),
|
||||
m_fdc_drq(CLEAR_LINE),
|
||||
m_adlc_irq(CLEAR_LINE),
|
||||
m_clk_en(0)
|
||||
m_clk_en(0),
|
||||
m_variant(TYPE_E01)
|
||||
{
|
||||
}
|
||||
|
||||
@ -425,7 +426,8 @@ e01_device::e01_device(const machine_config &mconfig, device_type type, const ch
|
||||
m_fdc_irq(CLEAR_LINE),
|
||||
m_fdc_drq(CLEAR_LINE),
|
||||
m_adlc_irq(CLEAR_LINE),
|
||||
m_clk_en(0)
|
||||
m_clk_en(0),
|
||||
m_variant(TYPE_E01)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
61
src/devices/cpu/m6502/m6507.c
Normal file
61
src/devices/cpu/m6502/m6507.c
Normal file
@ -0,0 +1,61 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Olivier Galibert
|
||||
/***************************************************************************
|
||||
|
||||
m6507.c
|
||||
|
||||
Mostek 6502, NMOS variant with reduced address bus
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "m6507.h"
|
||||
|
||||
const device_type M6507 = &device_creator<m6507_device>;
|
||||
|
||||
m6507_device::m6507_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
|
||||
m6502_device(mconfig, M6507, "M6507", tag, owner, clock, "m6507", __FILE__)
|
||||
{
|
||||
program_config.m_addrbus_width = 13;
|
||||
sprogram_config.m_addrbus_width = 13;
|
||||
}
|
||||
|
||||
void m6507_device::device_start()
|
||||
{
|
||||
if(direct_disabled)
|
||||
mintf = new mi_6507_nd;
|
||||
else
|
||||
mintf = new mi_6507_normal;
|
||||
|
||||
init();
|
||||
}
|
||||
|
||||
UINT8 m6507_device::mi_6507_normal::read(UINT16 adr)
|
||||
{
|
||||
return program->read_byte(adr & 0x1fff);
|
||||
}
|
||||
|
||||
UINT8 m6507_device::mi_6507_normal::read_sync(UINT16 adr)
|
||||
{
|
||||
return sdirect->read_byte(adr & 0x1fff);
|
||||
}
|
||||
|
||||
UINT8 m6507_device::mi_6507_normal::read_arg(UINT16 adr)
|
||||
{
|
||||
return direct->read_byte(adr & 0x1fff);
|
||||
}
|
||||
|
||||
void m6507_device::mi_6507_normal::write(UINT16 adr, UINT8 val)
|
||||
{
|
||||
program->write_byte(adr & 0x1fff, val);
|
||||
}
|
||||
|
||||
UINT8 m6507_device::mi_6507_nd::read_sync(UINT16 adr)
|
||||
{
|
||||
return sprogram->read_byte(adr & 0x1fff);
|
||||
}
|
||||
|
||||
UINT8 m6507_device::mi_6507_nd::read_arg(UINT16 adr)
|
||||
{
|
||||
return program->read_byte(adr & 0x1fff);
|
||||
}
|
||||
49
src/devices/cpu/m6502/m6507.h
Normal file
49
src/devices/cpu/m6502/m6507.h
Normal file
@ -0,0 +1,49 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Olivier Galibert
|
||||
/***************************************************************************
|
||||
|
||||
m6507.h
|
||||
|
||||
Mostek 6502, NMOS variant with reduced address bus
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#ifndef __M6507_H__
|
||||
#define __M6507_H__
|
||||
|
||||
#include "m6502.h"
|
||||
|
||||
class m6507_device : public m6502_device {
|
||||
public:
|
||||
m6507_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
class mi_6507_normal : public memory_interface {
|
||||
public:
|
||||
virtual ~mi_6507_normal() {}
|
||||
virtual UINT8 read(UINT16 adr);
|
||||
virtual UINT8 read_sync(UINT16 adr);
|
||||
virtual UINT8 read_arg(UINT16 adr);
|
||||
virtual void write(UINT16 adr, UINT8 val);
|
||||
};
|
||||
|
||||
class mi_6507_nd : public mi_6507_normal {
|
||||
public:
|
||||
virtual ~mi_6507_nd() {}
|
||||
virtual UINT8 read_sync(UINT16 adr);
|
||||
virtual UINT8 read_arg(UINT16 adr);
|
||||
};
|
||||
|
||||
virtual void device_start();
|
||||
};
|
||||
|
||||
|
||||
enum {
|
||||
M6507_IRQ_LINE = m6502_device::IRQ_LINE,
|
||||
M6507_NMI_LINE = m6502_device::NMI_LINE,
|
||||
M6507_SET_OVERFLOW = m6502_device::V_LINE
|
||||
};
|
||||
|
||||
extern const device_type M6507;
|
||||
|
||||
#endif
|
||||
@ -11400,6 +11400,7 @@ pepp0045 // (c) 1987 IGT - International Game Technology
|
||||
pepp0045a // (c) 1987 IGT - International Game Technology
|
||||
pepp0045b // (c) 1987 IGT - International Game Technology
|
||||
pepp0045c // (c) 1987 IGT - International Game Technology
|
||||
pepp0045d // (c) 1987 IGT - International Game Technology
|
||||
pepp0046 // (c) 1987 IGT - International Game Technology
|
||||
pepp0046a // (c) 1987 IGT - International Game Technology
|
||||
pepp0046b // (c) 1987 IGT - International Game Technology
|
||||
@ -12078,6 +12079,7 @@ dolphntr // (c) 1996
|
||||
dolphtra // (c) 1996
|
||||
dolphtre // (c) 1996
|
||||
cashcham // (c) 1996
|
||||
enchfore // (c) 1997
|
||||
goldprmd // (c) 1997
|
||||
qotn // (c) 1997
|
||||
qotna // (c) 1997
|
||||
@ -12085,6 +12087,7 @@ dmdtouch // (c) 1997
|
||||
wldcougr // (c) 1997
|
||||
bumblbug // (c) 1997
|
||||
pengpays // (c) 1997
|
||||
chickena // (c) 1998
|
||||
adonis // (c) 1998
|
||||
adonisa // (c) 1998
|
||||
reelrock // (c) 1998
|
||||
|
||||
@ -12,7 +12,7 @@ TODO:
|
||||
|
||||
#include "emu.h"
|
||||
#include "machine/mos6530n.h"
|
||||
#include "cpu/m6502/m6502.h"
|
||||
#include "cpu/m6502/m6507.h"
|
||||
#include "sound/tiaintf.h"
|
||||
#include "video/tia.h"
|
||||
#include "bus/vcs/vcs_slot.h"
|
||||
@ -70,7 +70,7 @@ protected:
|
||||
required_device<tia_video_device> m_tia;
|
||||
|
||||
unsigned long detect_2600controllers();
|
||||
required_device<m6502_device> m_maincpu;
|
||||
required_device<m6507_device> m_maincpu;
|
||||
required_device<screen_device> m_screen;
|
||||
required_ioport m_swb;
|
||||
required_device<mos6532_t> m_riot;
|
||||
@ -85,8 +85,7 @@ protected:
|
||||
static const UINT16 supported_screen_heights[4] = { 262, 312, 328, 342 };
|
||||
|
||||
|
||||
static ADDRESS_MAP_START(a2600_mem, AS_PROGRAM, 8, a2600_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0x1fff)
|
||||
static ADDRESS_MAP_START(a2600_mem, AS_PROGRAM, 8, a2600_state ) // 6507 has 13-bit address space, 0x0000 - 0x1fff
|
||||
AM_RANGE(0x0000, 0x007f) AM_MIRROR(0x0f00) AM_DEVREADWRITE("tia_video", tia_video_device, read, write)
|
||||
AM_RANGE(0x0080, 0x00ff) AM_MIRROR(0x0d00) AM_RAM AM_SHARE("riot_ram")
|
||||
AM_RANGE(0x0280, 0x029f) AM_MIRROR(0x0d00) AM_DEVICE("riot", mos6532_t, io_map)
|
||||
@ -541,7 +540,7 @@ MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( a2600, a2600_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M6502, MASTER_CLOCK_NTSC / 3) /* actually M6507 */
|
||||
MCFG_CPU_ADD("maincpu", M6507, MASTER_CLOCK_NTSC / 3)
|
||||
MCFG_M6502_DISABLE_DIRECT()
|
||||
MCFG_CPU_PROGRAM_MAP(a2600_mem)
|
||||
|
||||
@ -581,7 +580,7 @@ MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( a2600p, a2600_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M6502, MASTER_CLOCK_PAL / 3) /* actually M6507 */
|
||||
MCFG_CPU_ADD("maincpu", M6507, MASTER_CLOCK_PAL / 3)
|
||||
MCFG_CPU_PROGRAM_MAP(a2600_mem)
|
||||
MCFG_M6502_DISABLE_DIRECT()
|
||||
|
||||
|
||||
@ -947,6 +947,25 @@ ROM_START( cashcham )
|
||||
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
|
||||
ROM_END
|
||||
|
||||
// MV4033 - 10 Credit Multiplier / 9 Line Multiline.
|
||||
// Enchanted Forest - Export B - 10/02/97.
|
||||
// Marked as 94.97%
|
||||
// All devices are 27c4002 instead of 27c4096.
|
||||
ROM_START( enchfore )
|
||||
ARISTOCRAT_MK5_BIOS
|
||||
ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF )
|
||||
ROM_LOAD32_WORD( "jhg041503_enchanted_forest.u7", 0x000000, 0x80000, CRC(cae1fb55) SHA1(386913ddf9be406f46aab06cf3e27c3c38a4d52d) ) // 94.97%
|
||||
ROM_LOAD32_WORD( "jhg041503_enchanted_forest.u11", 0x000002, 0x80000, CRC(a71b7b3c) SHA1(26c3438398b6a3cc9946a1cd1c92d317a8e2738e) ) // 94.97%
|
||||
ROM_LOAD32_WORD( "jhg041503_enchanted_forest.u8", 0x100000, 0x80000, CRC(002dec6c) SHA1(fb3f4ce9cd8cd9e0e3133376ed014db83db041c5) ) // base
|
||||
ROM_LOAD32_WORD( "jhg041503_enchanted_forest.u12", 0x100002, 0x80000, CRC(c968471f) SHA1(9d54a5c396e6f83690db2fcb7ddcc8a47a7dd777) ) // base
|
||||
|
||||
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
|
||||
|
||||
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
|
||||
|
||||
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
|
||||
ROM_END
|
||||
|
||||
ROM_START( goldprmd )
|
||||
ARISTOCRAT_MK5_BIOS
|
||||
ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF )
|
||||
@ -987,10 +1006,10 @@ ROM_END
|
||||
ROM_START( bumblbug )
|
||||
ARISTOCRAT_MK5_BIOS
|
||||
ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF )
|
||||
ROM_LOAD32_WORD( "bumble_bugs_export.u7", 0x000000, 0x80000, CRC(ec605a36) SHA1(114e0840cfbd0c64645a5a33065db85462a0ba2d) ) // 92.691%
|
||||
ROM_LOAD32_WORD( "bumble_bugs_export.u11", 0x000002, 0x80000, CRC(17b154bd) SHA1(efdf307670a3d74f7980fec2d2197d837d4c26e2) ) // 92.691%
|
||||
ROM_LOAD32_WORD( "bumble_bugs_export.u8", 0x100000, 0x80000, CRC(e0c01d01) SHA1(9153129fd348a97da7cccf002e5d03e4b4db9264) ) // base
|
||||
ROM_LOAD32_WORD( "bumble_bugs_export.u12", 0x100002, 0x80000, CRC(28700d5d) SHA1(87a583cd487da6cb4c2da5f62297f0e577269fae) ) // base
|
||||
ROM_LOAD32_WORD( "bumble_bugs_export.u7", 0x000000, 0x80000, CRC(ec605a36) SHA1(114e0840cfbd0c64645a5a33065db85462a0ba2d) ) // 92.691%
|
||||
ROM_LOAD32_WORD( "bumble_bugs_export.u11", 0x000002, 0x80000, CRC(17b154bd) SHA1(efdf307670a3d74f7980fec2d2197d837d4c26e2) ) // 92.691%
|
||||
ROM_LOAD32_WORD( "bumble_bugs_export.u8", 0x100000, 0x80000, CRC(e0c01d01) SHA1(9153129fd348a97da7cccf002e5d03e4b4db9264) ) // base
|
||||
ROM_LOAD32_WORD( "bumble_bugs_export.u12", 0x100002, 0x80000, CRC(28700d5d) SHA1(87a583cd487da6cb4c2da5f62297f0e577269fae) ) // base
|
||||
|
||||
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
|
||||
|
||||
@ -1017,6 +1036,28 @@ ROM_START( pengpays )
|
||||
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
|
||||
ROM_END
|
||||
|
||||
// 596 - 10 Credit Multiplier / 9 Line Multiline. (touch)
|
||||
// Chicken - Export C - 23/02/98.
|
||||
// Marked as RHG0730 and 92.588%
|
||||
// All devices are 27c4002 instead of 27c4096.
|
||||
ROM_START( chickena )
|
||||
ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF )
|
||||
ROM_LOAD32_WORD( "rhg0730_chicken.u7", 0x000000, 0x80000, CRC(ca196b37) SHA1(6b204204c1574439ccea1b6145d867a73bad304f) ) // 92.588%
|
||||
ROM_LOAD32_WORD( "rhg0730_chicken.u11", 0x000002, 0x80000, CRC(b0d7be28) SHA1(6998dce808bf7970500b9e1ce6efed3940ee2d63) ) // 92.588%
|
||||
ROM_LOAD32_WORD( "rhg0730_chicken.u8", 0x100000, 0x80000, CRC(80e3e34c) SHA1(3ad73c5fc21c4d9647ea514bf367073bbeb981a9) ) // base
|
||||
ROM_LOAD32_WORD( "rhg0730_chicken.u12", 0x100002, 0x80000, CRC(63d5ec8e) SHA1(dca76342ecee6843e6fc656aafc8ee2e4d19fd65) ) // base
|
||||
ROM_LOAD32_WORD( "rhg0730_chicken.u9", 0x200000, 0x80000, CRC(662ff210) SHA1(bbd2410fa2cd67e327981c3b2e16342fb9393401) ) // base
|
||||
ROM_LOAD32_WORD( "rhg0730_chicken.u13", 0x200002, 0x80000, CRC(c3cef8ae) SHA1(4e65787d61387b511972e514047528495e1de11c) ) // base
|
||||
ROM_LOAD32_WORD( "rhg0730_chicken.u10", 0x300000, 0x80000, CRC(8b3f7d6b) SHA1(7f1a04556c448976145652b05b690142376764d4) ) // base
|
||||
ROM_LOAD32_WORD( "rhg0730_chicken.u14", 0x300002, 0x80000, CRC(240f7759) SHA1(1fa5ba0185b027101dae207ec5d28b07d3d73fc2) ) // base
|
||||
|
||||
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
|
||||
|
||||
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
|
||||
|
||||
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
|
||||
ROM_END
|
||||
|
||||
// MV4098 - 10 Credit Multiplier / 9 Line Multiline.
|
||||
// BOOT SCOOTIN' - Export A - 25/08/99.
|
||||
// All devices are 27c4002 instead of 27c4096.
|
||||
@ -1045,7 +1086,7 @@ ROM_END
|
||||
ROM_START( cuckoo )
|
||||
ARISTOCRAT_MK5_BIOS
|
||||
ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF )
|
||||
ROM_LOAD32_WORD( "mv4104_cuckoo.u7", 0x000000, 0x80000, CRC(0bd17338) SHA1(b8f467bdf8d76533a2b7d44fe93be414f25a3c31) ) //
|
||||
ROM_LOAD32_WORD( "mv4104_cuckoo.u7", 0x000000, 0x80000, CRC(0bd17338) SHA1(b8f467bdf8d76533a2b7d44fe93be414f25a3c31) )
|
||||
ROM_LOAD32_WORD( "mv4104_cuckoo.u11", 0x000002, 0x80000, CRC(4c407deb) SHA1(57589e61a376ddff99cd420eb47bf8c902c6a249) )
|
||||
ROM_LOAD32_WORD( "mv4104_cuckoo.u8", 0x100000, 0x80000, CRC(33f52052) SHA1(89cbfe588d91244adff4c520fa94962d69ff20bf) )
|
||||
ROM_LOAD32_WORD( "mv4104_cuckoo.u12", 0x100002, 0x80000, CRC(00bb7597) SHA1(f4d6b21091e320a82d59477469340633b001ed0d) )
|
||||
@ -1152,6 +1193,7 @@ GAME( 1996, dolphntr, 0, aristmk5, aristmk5, aristmk5_state, aristmk
|
||||
GAME( 1996, dolphtra, dolphntr, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dolphin Treasure (0100424V, NSW/ACT)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 602/1, B - 06/12/96, Rev 1.24.4.0
|
||||
GAME( 1996, dolphtre, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dolphin Treasure (Export)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 602/1, B - 06/12/96
|
||||
GAME( 1996, cashcham, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Chameleon (Export)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 603(a), B - 06/12/96
|
||||
GAME( 1997, enchfore, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Enchanted Forest (MV4033, Export, 94.97%)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // MV4033, B - 10/02/97
|
||||
GAME( 1997, goldprmd, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Golden Pyramids (MV4091, USA)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // MV4091, B - 13/05/97
|
||||
GAME( 1997, qotn, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Queen of the Nile (0200439V, NSW/ACT)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 602/4, B - 13/05/97
|
||||
GAME( 1997, qotna, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Queen of the Nile (MV4091, NSW/ACT)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // MV4091, B - 13/05/97 (US-Export HW?)
|
||||
@ -1159,6 +1201,7 @@ GAME( 1997, wldcougr, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk
|
||||
GAME( 1997, dmdtouch, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Diamond Touch (0400433V, Local)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 604, E - 30/06/97
|
||||
GAME( 1997, bumblbug, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bumble Bugs (Export, 92.691%)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 593, D - 05/07/97
|
||||
GAME( 1997, pengpays, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pays (Export)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 586/7(b) B - 14/07/97
|
||||
GAME( 1998, chickena, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Chicken (RHG0730, Export, 92.588%)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 596, C - 23/02/98
|
||||
GAME( 1998, adonis, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Adonis (0200751V, NSW/ACT)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 602/9, A - 25/05/98, Rev 10
|
||||
GAME( 1998, adonisa, adonis, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Adonis (0100751V, NSW/ACT)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 602/9, A - 25/05/98, Rev 9
|
||||
GAME( 1998, reelrock, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Reelin-n-Rockin (0100779V, Local)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 628, A - 13/07/98
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Wilbert Pol
|
||||
// copyright-holders:Wilbert Pol,Vas Crabb
|
||||
/***************************************************************************
|
||||
|
||||
Osborne-1 driver file
|
||||
@ -40,9 +40,19 @@ used, and the value on the data bus is completley ignored.
|
||||
Selecting between bank 1 and bank 2 is also affected by M1 and IRQACK
|
||||
conditions using a set of three flipflops.
|
||||
|
||||
TODO:
|
||||
- Implement serial port
|
||||
- Verify frequency of the beep/audio alarm.
|
||||
The serial speed configuration implements wiring changes recommended in the
|
||||
Osborne 1 Technical Manual. There's no way for software to read the
|
||||
selected baud rates, so it will always call the low speed "300" and the high
|
||||
speed "1200". You as the user have to keep this in mind using the system.
|
||||
|
||||
Serial communications can be flaky when 600/2400 is selected. This is not a
|
||||
bug in MAME. I've checked and double-checked the schematics to confirm it's
|
||||
an original bug. The division ratio from the master clock to the baud rates
|
||||
in this mode is effectively 16*24*64 or 16*24*16 giving actual data rates of
|
||||
650 baud or 2600 baud, about 8.3% too fast (16*26*64 and 16*26*16 would give
|
||||
the correct rates). MAME's bitbanger seems to be able to accept the ACIA
|
||||
output at this rate, but the ACIA screws up when consuming data from MAME's
|
||||
bitbanger.
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
@ -170,7 +180,7 @@ static INPUT_PORTS_START( osborne1 )
|
||||
PORT_START("CNF")
|
||||
PORT_CONFNAME(0x06, 0x00, "Serial Speed")
|
||||
PORT_CONFSETTING(0x00, "300/1200")
|
||||
PORT_CONFSETTING(0x02, "600/1200")
|
||||
PORT_CONFSETTING(0x02, "600/2400")
|
||||
PORT_CONFSETTING(0x04, "1200/4800")
|
||||
PORT_CONFSETTING(0x06, "2400/9600")
|
||||
PORT_CONFNAME(0x01, 0x00, "Video Output")
|
||||
@ -228,9 +238,9 @@ static MACHINE_CONFIG_START( osborne1, osborne1_state )
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", osborne1)
|
||||
MCFG_PALETTE_ADD_MONOCHROME_GREEN_HIGHLIGHT("palette")
|
||||
|
||||
MCFG_SPEAKER_STANDARD_MONO( "mono" )
|
||||
MCFG_SOUND_ADD( "beeper", BEEP, 0 )
|
||||
MCFG_SOUND_ROUTE( ALL_OUTPUTS, "mono", 1.00 )
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
|
||||
|
||||
MCFG_DEVICE_ADD("pia_0", PIA6821, 0)
|
||||
MCFG_PIA_READPA_HANDLER(DEVREAD8(IEEE488_TAG, ieee488_device, dio_r))
|
||||
@ -241,6 +251,9 @@ static MACHINE_CONFIG_START( osborne1, osborne1_state )
|
||||
MCFG_PIA_CB2_HANDLER(DEVWRITELINE(IEEE488_TAG, ieee488_device, ren_w))
|
||||
MCFG_PIA_IRQA_HANDLER(WRITELINE(osborne1_state, ieee_pia_irq_a_func))
|
||||
|
||||
MCFG_IEEE488_BUS_ADD()
|
||||
MCFG_IEEE488_SRQ_CALLBACK(DEVWRITELINE("pia_0", pia6821_device, ca2_w))
|
||||
|
||||
MCFG_DEVICE_ADD("pia_1", PIA6821, 0)
|
||||
MCFG_PIA_WRITEPA_HANDLER(WRITE8(osborne1_state, video_pia_port_a_w))
|
||||
MCFG_PIA_WRITEPB_HANDLER(WRITE8(osborne1_state, video_pia_port_b_w))
|
||||
@ -263,13 +276,11 @@ static MACHINE_CONFIG_START( osborne1, osborne1_state )
|
||||
MCFG_FLOPPY_DRIVE_ADD("mb8877:0", osborne1_floppies, "525ssdd", floppy_image_device::default_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("mb8877:1", osborne1_floppies, "525ssdd", floppy_image_device::default_floppy_formats)
|
||||
|
||||
MCFG_IEEE488_BUS_ADD()
|
||||
MCFG_IEEE488_SRQ_CALLBACK(DEVWRITELINE("pia_0", pia6821_device, ca2_w))
|
||||
MCFG_SOFTWARE_LIST_ADD("flop_list","osborne1")
|
||||
|
||||
// internal ram
|
||||
MCFG_RAM_ADD(RAM_TAG)
|
||||
MCFG_RAM_DEFAULT_SIZE("68K") // 64bB main RAM and 4kbit video attribute RAM
|
||||
MCFG_RAM_DEFAULT_SIZE("68K") // 64kB main RAM and 4kbit video attribute RAM
|
||||
|
||||
MCFG_SOFTWARE_LIST_ADD("flop_list","osborne1")
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
|
||||
@ -1946,7 +1946,7 @@ PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
|
||||
ROM_LOAD( "pp0045_a45-a74.u68", 0x00000, 0x10000, CRC(9c7cf6d7) SHA1(3da9829678b853d85146b66b40800257a8eaa151) ) /* Game Version: A45, Library Version: A74 */
|
||||
|
||||
ROM_REGION( 0x020000, "gfx1", 0 )
|
||||
ROM_LOAD( "mro-cg1072.u72", 0x00000, 0x8000, CRC(8e5cf3bf) SHA1(a8c2fde9105a37eddc218ae1476cdbfb0271e314) ) /* Custom Annie Oakely's Central City graphics */
|
||||
ROM_LOAD( "mro-cg1072.u72", 0x00000, 0x8000, CRC(8e5cf3bf) SHA1(a8c2fde9105a37eddc218ae1476cdbfb0271e314) ) /* Custom Annie Oakley's Central City graphics */
|
||||
ROM_LOAD( "mgo-cg1072.u73", 0x08000, 0x8000, CRC(a3c85c1b) SHA1(9b810c5779dde21db6da5bac5cf797bad65c2c1b) )
|
||||
ROM_LOAD( "mbo-cg1072.u74", 0x10000, 0x8000, CRC(833371e1) SHA1(5d7a994aee61a751f89171885423276b86e872b6) ) /* These graphics will work for many other standard poker sets */
|
||||
ROM_LOAD( "mxo-cg1072.u75", 0x18000, 0x8000, CRC(0df703b3) SHA1(2042251cc9c11687ff7fd920213a448974ff3050) ) /* However there is no support for Deuces Wild sets */
|
||||
@ -1956,6 +1956,27 @@ PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
|
||||
ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
|
||||
ROM_END
|
||||
|
||||
ROM_START( pepp0045d ) /* Normal board : 10's or Better (PP0045) */
|
||||
/*
|
||||
PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
|
||||
----------------------------------------------------------
|
||||
P8A 1 1 3 4 5 8 25 50 300 800
|
||||
% Range: 84.6-86.6% Optimum: 88.6% Hit Frequency: 49.2%
|
||||
Programs Available: PP0045, X000045P
|
||||
*/
|
||||
ROM_REGION( 0x10000, "maincpu", 0 )
|
||||
ROM_LOAD( "pp0045_a45-a74.u68", 0x00000, 0x10000, CRC(9c7cf6d7) SHA1(3da9829678b853d85146b66b40800257a8eaa151) ) /* Game Version: A45, Library Version: A74 */
|
||||
|
||||
ROM_REGION( 0x020000, "gfx1", 0 )
|
||||
ROM_LOAD( "mro-cg881.u72", 0x00000, 0x8000, CRC(282a029f) SHA1(42b35761839d6379ddfb4eed20f90d9f7b145e64) ) /* Custom Las Vegas Rio graphics */
|
||||
ROM_LOAD( "mgo-cg881.u73", 0x08000, 0x8000, CRC(af433702) SHA1(fbd877c06eaab433332c94f135e13a8c041fa1a2) )
|
||||
ROM_LOAD( "mbo-cg881.u74", 0x10000, 0x8000, CRC(c5b0a0b3) SHA1(a989d21f4b10a09d3cfd0bbb9f53b4ad326561b9) ) /* These graphics will work for many other standard poker sets */
|
||||
ROM_LOAD( "mxo-cg881.u75", 0x18000, 0x8000, CRC(6a78bc1d) SHA1(7861465ab98df5219330d58a3e5a4bd37a393534) ) /* However there is no support for Deuces Wild sets */
|
||||
|
||||
ROM_REGION( 0x100, "proms", 0 )
|
||||
ROM_LOAD( "cap881.u50", 0x0000, 0x0100, CRC(e51990d5) SHA1(41946722b61e955d37808761d451fc894e6adc8a) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( pepp0046 ) /* Normal board : 10's or Better (PP0046) */
|
||||
/*
|
||||
PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
|
||||
@ -10832,6 +10853,7 @@ GAMEL(1987, pepp0045, pepp0002, peplus, peplus_poker, peplus_state, peplus,
|
||||
GAMEL(1987, pepp0045a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Gambler Downtown Reno)", 0, layout_pe_poker )
|
||||
GAMEL(1987, pepp0045b, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Par-A-Dice Riverboat Casino)", MACHINE_WRONG_COLORS, layout_pe_poker ) /* CAP1150 not dumped */
|
||||
GAMEL(1987, pepp0045c, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Annie Oakley's Central City)", MACHINE_WRONG_COLORS, layout_pe_poker ) /* CAP1072 not dumped */
|
||||
GAMEL(1987, pepp0045d, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Las Vegas Rio)", 0, layout_pe_poker )
|
||||
GAMEL(1987, pepp0046, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0046) 10's or Better (set 1)", 0, layout_pe_poker )
|
||||
GAMEL(1987, pepp0046a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0046) 10's or Better (International)",0, layout_pe_poker )
|
||||
GAMEL(1987, pepp0046b, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0046) 10's or Better (set 2)", 0, layout_pe_poker )
|
||||
|
||||
@ -191,7 +191,8 @@ READ8_MEMBER( super6_state::fdc_r )
|
||||
|
||||
*/
|
||||
|
||||
fatalerror("Z80 WAIT not supported by MAME core\n");
|
||||
// don't crash please... but it's true, WAIT does nothing in our Z80
|
||||
//fatalerror("Z80 WAIT not supported by MAME core\n");
|
||||
m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, ASSERT_LINE);
|
||||
|
||||
return !m_fdc->intrq_r() << 7;
|
||||
@ -217,13 +218,16 @@ WRITE8_MEMBER( super6_state::fdc_w )
|
||||
6
|
||||
7
|
||||
|
||||
Codes passed to here during boot are 0x00, 0x08, 0x38
|
||||
*/
|
||||
|
||||
// disk drive select
|
||||
floppy_image_device *m_floppy = NULL;
|
||||
|
||||
if (BIT(data, 0)) m_floppy = m_floppy0->get_device();
|
||||
if (BIT(data, 1)) m_floppy = m_floppy1->get_device();
|
||||
if ((data & 3) == 0)
|
||||
m_floppy = m_floppy0->get_device();
|
||||
if ((data & 3) == 1)
|
||||
m_floppy = m_floppy1->get_device();
|
||||
|
||||
m_fdc->set_floppy(m_floppy);
|
||||
if (m_floppy) m_floppy->mon_w(0);
|
||||
|
||||
@ -172,7 +172,7 @@ WRITE8_MEMBER(uzebox_state::port_d_w)
|
||||
// ---- --xx UART MIDI
|
||||
if ((m_port_d ^ data) & 0x80)
|
||||
{
|
||||
m_speaker->level_w(data & 0x80);
|
||||
m_speaker->level_w((data & 0x80) ? 1 : 0);
|
||||
}
|
||||
m_port_d = data;
|
||||
}
|
||||
|
||||
@ -301,11 +301,11 @@ ADDRESS_MAP_END
|
||||
|
||||
INPUT_PORTS_START( vixen )
|
||||
PORT_START("KEY.0")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ESC) PORT_CHAR(0x1B)
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("ESC") PORT_CODE(KEYCODE_ESC) PORT_CHAR(0x1B)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TAB) PORT_CHAR(0x09)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_RCONTROL)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CAPSLOCK) PORT_TOGGLE
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("CTRL") PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_SHIFT_2)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("LOCK") PORT_CODE(KEYCODE_CAPSLOCK) PORT_TOGGLE
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("SHIFT") PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(0x0D)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(0x27) PORT_CHAR(0x22)
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR(']')
|
||||
@ -321,64 +321,64 @@ INPUT_PORTS_START( vixen )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*')
|
||||
|
||||
PORT_START("KEY.2")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('Q') PORT_CHAR('q')
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('W') PORT_CHAR('w')
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('E') PORT_CHAR('e')
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('R') PORT_CHAR('r')
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('T') PORT_CHAR('t')
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('Y') PORT_CHAR('y')
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('U') PORT_CHAR('u')
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('I') PORT_CHAR('i')
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Q") PORT_CODE(KEYCODE_Q) PORT_CHAR('Q') PORT_CHAR('q') PORT_CHAR(0x11)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("W") PORT_CODE(KEYCODE_W) PORT_CHAR('W') PORT_CHAR('w') PORT_CHAR(0x17)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("E") PORT_CODE(KEYCODE_E) PORT_CHAR('E') PORT_CHAR('e') PORT_CHAR(0x05)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("R") PORT_CODE(KEYCODE_R) PORT_CHAR('R') PORT_CHAR('r') PORT_CHAR(0x12)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("T") PORT_CODE(KEYCODE_T) PORT_CHAR('T') PORT_CHAR('t') PORT_CHAR(0x14)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Y") PORT_CODE(KEYCODE_Y) PORT_CHAR('Y') PORT_CHAR('y') PORT_CHAR(0x19)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("U") PORT_CODE(KEYCODE_U) PORT_CHAR('U') PORT_CHAR('u') PORT_CHAR(0x15)
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("I") PORT_CODE(KEYCODE_I) PORT_CHAR('I') PORT_CHAR('i') PORT_CHAR(0x09)
|
||||
|
||||
PORT_START("KEY.3")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('A') PORT_CHAR('a')
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('S') PORT_CHAR('s')
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('D') PORT_CHAR('d')
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('F') PORT_CHAR('f')
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('G') PORT_CHAR('g')
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('H') PORT_CHAR('h')
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('J') PORT_CHAR('j')
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('K') PORT_CHAR('k')
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('A') PORT_CHAR('a') PORT_CHAR(0x01)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("S") PORT_CODE(KEYCODE_S) PORT_CHAR('S') PORT_CHAR('s') PORT_CHAR(0x13)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('D') PORT_CHAR('d') PORT_CHAR(0x04)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F") PORT_CODE(KEYCODE_F) PORT_CHAR('F') PORT_CHAR('f') PORT_CHAR(0x06)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("G") PORT_CODE(KEYCODE_G) PORT_CHAR('G') PORT_CHAR('g') PORT_CHAR(0x07)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("H") PORT_CODE(KEYCODE_H) PORT_CHAR('H') PORT_CHAR('h') PORT_CHAR(0x08)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("J") PORT_CODE(KEYCODE_J) PORT_CHAR('J') PORT_CHAR('j') PORT_CHAR(0x0a)
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("K") PORT_CODE(KEYCODE_K) PORT_CHAR('K') PORT_CHAR('k') PORT_CHAR(0x0b)
|
||||
|
||||
PORT_START("KEY.4")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('Z') PORT_CHAR('z')
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('X') PORT_CHAR('x')
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('C') PORT_CHAR('c')
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('V') PORT_CHAR('v')
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('B') PORT_CHAR('b')
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('N') PORT_CHAR('n')
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('M') PORT_CHAR('m')
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Z") PORT_CODE(KEYCODE_Z) PORT_CHAR('Z') PORT_CHAR('z') PORT_CHAR(0x1a)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("X") PORT_CODE(KEYCODE_X) PORT_CHAR('X') PORT_CHAR('x') PORT_CHAR(0x18)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('C') PORT_CHAR('c') PORT_CHAR(0x03)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("V") PORT_CODE(KEYCODE_V) PORT_CHAR('V') PORT_CHAR('v') PORT_CHAR(0x16)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('B') PORT_CHAR('b') PORT_CHAR(0x02)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("N") PORT_CODE(KEYCODE_N) PORT_CHAR('N') PORT_CHAR('n') PORT_CHAR(0x0e)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("M") PORT_CODE(KEYCODE_M) PORT_CHAR('M') PORT_CHAR('m') PORT_CHAR(0x0d)
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<')
|
||||
|
||||
PORT_START("KEY.5")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_UP)
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("UP") PORT_CODE(KEYCODE_UP)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LEFT) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')')
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>')
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('P') PORT_CHAR('p')
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('O') PORT_CHAR('o')
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("P") PORT_CODE(KEYCODE_P) PORT_CHAR('P') PORT_CHAR('p') PORT_CHAR(0x10)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("O") PORT_CODE(KEYCODE_O) PORT_CHAR('O') PORT_CHAR('o') PORT_CHAR(0x0f)
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(')
|
||||
|
||||
PORT_START("KEY.6")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_RIGHT)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_DOWN)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_')
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("RIGHT") PORT_CODE(KEYCODE_RIGHT)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("DOWN") PORT_CODE(KEYCODE_DOWN)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("- _") PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') PORT_CHAR(0x1F)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') PORT_CHAR(0x7E)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':')
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|')
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("\\ |") PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|') PORT_CHAR(0x1C)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('L') PORT_CHAR('l')
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+')
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+') PORT_CHAR(0x60)
|
||||
|
||||
PORT_START("KEY.7")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_DEL) PORT_CHAR(127)
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("DEL") PORT_CODE(KEYCODE_DEL) PORT_CHAR(127)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('{') PORT_CHAR('}')
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_END) // FUNC key
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("FUNC") PORT_CODE(KEYCODE_END)
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
@ -519,7 +519,7 @@ WRITE8_MEMBER( vixen_state::i8155_pc_w )
|
||||
2 DDEN/
|
||||
3 ALT CHARSET/
|
||||
4 256 CHARS
|
||||
5 BEEP ENB
|
||||
5 BEEP ENABLE
|
||||
6
|
||||
7
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Wilbert Pol
|
||||
// copyright-holders:Wilbert Pol,Vas Crabb
|
||||
/*****************************************************************************
|
||||
*
|
||||
* includes/osborne1.h
|
||||
@ -11,10 +11,10 @@
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "sound/beep.h"
|
||||
#include "sound/speaker.h"
|
||||
#include "bus/ieee488/ieee488.h"
|
||||
#include "machine/6821pia.h"
|
||||
#include "machine/6850acia.h"
|
||||
#include "bus/ieee488/ieee488.h"
|
||||
#include "machine/ram.h"
|
||||
#include "machine/wd_fdc.h"
|
||||
|
||||
@ -24,23 +24,21 @@ public:
|
||||
enum
|
||||
{
|
||||
TIMER_VIDEO,
|
||||
TIMER_ACIA_RXC_TXC,
|
||||
TIMER_SETUP
|
||||
TIMER_ACIA_RXC_TXC
|
||||
};
|
||||
|
||||
osborne1_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_speaker(*this, "speaker"),
|
||||
m_pia0(*this, "pia_0"),
|
||||
m_pia1(*this, "pia_1"),
|
||||
m_acia(*this, "acia"),
|
||||
m_fdc(*this, "mb8877"),
|
||||
m_beep(*this, "beeper"),
|
||||
m_ram(*this, RAM_TAG),
|
||||
m_ieee(*this, IEEE488_TAG),
|
||||
m_floppy0(*this, "mb8877:0:525ssdd"),
|
||||
m_floppy1(*this, "mb8877:1:525ssdd"),
|
||||
m_video_timer(NULL),
|
||||
m_keyb_row0(*this, "ROW0"),
|
||||
m_keyb_row1(*this, "ROW1"),
|
||||
m_keyb_row2(*this, "ROW2"),
|
||||
@ -55,6 +53,7 @@ public:
|
||||
m_bank_0xxx(*this, "bank_0xxx"),
|
||||
m_bank_1xxx(*this, "bank_1xxx"),
|
||||
m_bank_fxxx(*this, "bank_fxxx"),
|
||||
m_video_timer(NULL),
|
||||
m_acia_rxc_txc_timer(NULL)
|
||||
{ }
|
||||
|
||||
@ -84,33 +83,20 @@ public:
|
||||
virtual void video_start();
|
||||
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
TIMER_CALLBACK_MEMBER(video_callback);
|
||||
TIMER_CALLBACK_MEMBER(setup_callback);
|
||||
|
||||
bitmap_ind16 m_bitmap;
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<speaker_sound_device> m_speaker;
|
||||
required_device<pia6821_device> m_pia0;
|
||||
required_device<pia6821_device> m_pia1;
|
||||
required_device<acia6850_device> m_acia;
|
||||
required_device<mb8877_t> m_fdc;
|
||||
required_device<beep_device> m_beep;
|
||||
required_device<ram_device> m_ram;
|
||||
required_device<ieee488_device> m_ieee;
|
||||
required_device<floppy_image_device> m_floppy0;
|
||||
required_device<floppy_image_device> m_floppy1;
|
||||
|
||||
/* video related */
|
||||
UINT8 m_resolution;
|
||||
UINT8 m_hc_left;
|
||||
UINT8 m_new_start_x;
|
||||
UINT8 m_new_start_y;
|
||||
emu_timer *m_video_timer;
|
||||
UINT8 *m_p_chargen;
|
||||
bool m_beep_state;
|
||||
|
||||
protected:
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
|
||||
TIMER_CALLBACK_MEMBER(video_callback);
|
||||
|
||||
bool set_rom_mode(UINT8 value);
|
||||
bool set_bit_9(UINT8 value);
|
||||
@ -138,21 +124,33 @@ protected:
|
||||
required_memory_bank m_bank_fxxx;
|
||||
|
||||
// configuration (reloaded on reset)
|
||||
UINT8 m_screen_pac;
|
||||
UINT8 m_acia_rxc_txc_div;
|
||||
UINT8 m_acia_rxc_txc_p_low;
|
||||
UINT8 m_acia_rxc_txc_p_high;
|
||||
UINT8 m_screen_pac;
|
||||
UINT8 m_acia_rxc_txc_div;
|
||||
UINT8 m_acia_rxc_txc_p_low;
|
||||
UINT8 m_acia_rxc_txc_p_high;
|
||||
|
||||
// bank switch control bits
|
||||
UINT8 m_ub4a_q;
|
||||
UINT8 m_ub6a_q;
|
||||
UINT8 m_rom_mode;
|
||||
UINT8 m_bit_9;
|
||||
UINT8 m_ub4a_q;
|
||||
UINT8 m_ub6a_q;
|
||||
UINT8 m_rom_mode;
|
||||
UINT8 m_bit_9;
|
||||
|
||||
// onboard video state
|
||||
UINT8 m_scroll_x;
|
||||
UINT8 m_scroll_y;
|
||||
UINT8 m_beep_state;
|
||||
emu_timer *m_video_timer;
|
||||
bitmap_ind16 m_bitmap;
|
||||
UINT8 *m_p_chargen;
|
||||
|
||||
// SCREEN-PAC registers
|
||||
UINT8 m_resolution;
|
||||
UINT8 m_hc_left;
|
||||
|
||||
// serial state
|
||||
int m_acia_irq_state;
|
||||
int m_acia_rxc_txc_state;
|
||||
emu_timer *m_acia_rxc_txc_timer;
|
||||
int m_acia_irq_state;
|
||||
int m_acia_rxc_txc_state;
|
||||
emu_timer *m_acia_rxc_txc_timer;
|
||||
};
|
||||
|
||||
#endif /* OSBORNE1_H_ */
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Wilbert Pol
|
||||
// copyright-holders:Wilbert Pol,Vas Crabb
|
||||
/***************************************************************************
|
||||
|
||||
There are three IRQ sources:
|
||||
@ -35,10 +35,10 @@ READ8_MEMBER( osborne1_state::bank_2xxx_3xxx_r )
|
||||
UINT8 data = 0xFF;
|
||||
switch (offset & 0x0F00)
|
||||
{
|
||||
case 0x100: /* Floppy */
|
||||
case 0x100: // Floppy
|
||||
data = m_fdc->read(space, offset & 0x03);
|
||||
break;
|
||||
case 0x200: /* Keyboard */
|
||||
case 0x200: // Keyboard
|
||||
if (offset & 0x01) data &= m_keyb_row0->read();
|
||||
if (offset & 0x02) data &= m_keyb_row1->read();
|
||||
if (offset & 0x04) data &= m_keyb_row3->read();
|
||||
@ -48,17 +48,17 @@ READ8_MEMBER( osborne1_state::bank_2xxx_3xxx_r )
|
||||
if (offset & 0x40) data &= m_keyb_row6->read();
|
||||
if (offset & 0x80) data &= m_keyb_row7->read();
|
||||
break;
|
||||
case 0x400: /* SCREEN-PAC */
|
||||
case 0x400: // SCREEN-PAC
|
||||
if (m_screen_pac) data &= 0xFB;
|
||||
break;
|
||||
case 0x900: /* IEEE488 PIA */
|
||||
case 0x900: // IEEE488 PIA
|
||||
data = m_pia0->read(space, offset & 0x03);
|
||||
break;
|
||||
case 0xA00: /* Serial */
|
||||
case 0xA00: // Serial
|
||||
if (offset & 0x01) data = m_acia->data_r(space, 0);
|
||||
else data = m_acia->status_r(space, 0);
|
||||
break;
|
||||
case 0xC00: /* Video PIA */
|
||||
case 0xC00: // Video PIA
|
||||
data = m_pia1->read(space, offset & 0x03);
|
||||
break;
|
||||
}
|
||||
@ -86,7 +86,7 @@ WRITE8_MEMBER( osborne1_state::bank_2xxx_3xxx_w )
|
||||
if ((offset & 0xC00) == 0x400) // SCREEN-PAC
|
||||
{
|
||||
m_resolution = data & 0x01;
|
||||
m_hc_left = (data >> 1) & 0x01;
|
||||
m_hc_left = (data & 0x02) ? 0 : 1;
|
||||
}
|
||||
if ((offset & 0xC00) == 0xC00) // Video PIA
|
||||
m_pia1->write(space, offset & 0x03, data);
|
||||
@ -202,20 +202,13 @@ WRITE_LINE_MEMBER( osborne1_state::ieee_pia_irq_a_func )
|
||||
|
||||
WRITE8_MEMBER( osborne1_state::video_pia_port_a_w )
|
||||
{
|
||||
m_scroll_x = data >> 1;
|
||||
|
||||
m_fdc->dden_w(BIT(data, 0));
|
||||
|
||||
data -= 0xea; // remove bias
|
||||
|
||||
m_new_start_x = (data >> 1);
|
||||
if (m_new_start_x)
|
||||
m_new_start_x--;
|
||||
|
||||
//logerror("Video pia port a write: %02X, density set to %s\n", data, data & 1 ? "FM" : "MFM" );
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( osborne1_state::video_pia_port_b_w )
|
||||
{
|
||||
m_new_start_y = data & 0x1F;
|
||||
m_beep_state = BIT(data, 5);
|
||||
|
||||
if (BIT(data, 6))
|
||||
@ -232,8 +225,6 @@ WRITE8_MEMBER( osborne1_state::video_pia_port_b_w )
|
||||
{
|
||||
m_fdc->set_floppy(NULL);
|
||||
}
|
||||
|
||||
//logerror("Video pia port b write: %02X\n", data );
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER( osborne1_state::video_pia_out_cb2_dummy )
|
||||
@ -262,12 +253,11 @@ DRIVER_INIT_MEMBER( osborne1_state, osborne1 )
|
||||
m_bank_fxxx->configure_entries(0, 1, m_ram->pointer() + 0xF000, 0);
|
||||
m_bank_fxxx->configure_entries(1, 1, m_ram->pointer() + 0x10000, 0);
|
||||
|
||||
m_p_chargen = memregion("chargen")->base();
|
||||
m_video_timer = timer_alloc(TIMER_VIDEO);
|
||||
m_video_timer->adjust(machine().first_screen()->time_until_pos(1, 0));
|
||||
|
||||
m_acia_rxc_txc_timer = timer_alloc(TIMER_ACIA_RXC_TXC);
|
||||
|
||||
timer_set(attotime::zero, TIMER_SETUP);
|
||||
}
|
||||
|
||||
void osborne1_state::machine_reset()
|
||||
@ -309,10 +299,11 @@ void osborne1_state::machine_reset()
|
||||
m_acia_rxc_txc_state = 0;
|
||||
update_acia_rxc_txc();
|
||||
|
||||
// Reset video hardware
|
||||
m_resolution = 0;
|
||||
m_hc_left = 0;
|
||||
m_p_chargen = memregion( "chargen" )->base();
|
||||
m_hc_left = 1;
|
||||
|
||||
// The low bits of attribute RAM are not physically present and hence always read high
|
||||
for (unsigned i = 0; i < 0x1000; i++)
|
||||
m_ram->pointer()[0x10000 + i] |= 0x7F;
|
||||
}
|
||||
@ -329,29 +320,67 @@ UINT32 osborne1_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap
|
||||
}
|
||||
|
||||
|
||||
void osborne1_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
|
||||
{
|
||||
switch (id)
|
||||
{
|
||||
case TIMER_VIDEO:
|
||||
video_callback(ptr, param);
|
||||
break;
|
||||
case TIMER_ACIA_RXC_TXC:
|
||||
m_acia_rxc_txc_state = m_acia_rxc_txc_state ? 0 : 1;
|
||||
update_acia_rxc_txc();
|
||||
break;
|
||||
default:
|
||||
assert_always(FALSE, "Unknown id in osborne1_state::device_timer");
|
||||
}
|
||||
}
|
||||
|
||||
TIMER_CALLBACK_MEMBER(osborne1_state::video_callback)
|
||||
{
|
||||
int const y = machine().first_screen()->vpos();
|
||||
UINT8 ra = 0;
|
||||
UINT8 const ra = y % 10;
|
||||
|
||||
// Check for start/end of visible area and clear/set CA1 on video PIA
|
||||
if (y == 0)
|
||||
{
|
||||
m_scroll_y = m_pia1->b_output() & 0x1F;
|
||||
m_pia1->ca1_w(0);
|
||||
}
|
||||
else if (y == 240)
|
||||
{
|
||||
m_pia1->ca1_w(1);
|
||||
}
|
||||
|
||||
if (y < 240)
|
||||
{
|
||||
ra = y % 10;
|
||||
// Draw a line of the display
|
||||
bool const hires = m_screen_pac & m_resolution;
|
||||
UINT16 const row = (m_new_start_y + (y/10)) * 128 & 0xF80;
|
||||
UINT16 const col = (m_new_start_x & (hires ? 0x60 : 0x7F)) - ((hires && m_hc_left) ? 8 : 0);
|
||||
UINT16 *p = &m_bitmap.pix16(y);
|
||||
bool const hires = m_screen_pac & m_resolution;
|
||||
UINT16 const row = ((m_scroll_y + (y / 10)) << 7) & 0xF80;
|
||||
|
||||
for ( UINT16 x = 0; x < (hires ? 104 : 52); x++ )
|
||||
// The derivation of the initial column is not obvious. The 7-bit
|
||||
// column counter is preloaded near the beginning of the horizontal
|
||||
// blank period. The initial column is offset by the number of
|
||||
// character clock periods in the horizontal blank period minus one
|
||||
// because it latches the value before it's displayed. Using the
|
||||
// standard video display, there are 12 character clock periods in
|
||||
// the horizontal blank period, so subtracting 1 gives 0x0B. Using
|
||||
// the SCREEN-PAC's high-resolution mode, the character clock is
|
||||
// twice the frequency giving 24 character clock periods in the
|
||||
// horizontal blanking period, so subtracting 1 gives 0x17. Using
|
||||
// the standard video display, the column counter is preloaded with
|
||||
// the high 7 bits of the value from PIA1 PORTB. The SCREEN-PAC
|
||||
// takes the two high bits of this value, but sets the low five bits
|
||||
// to a fixed value of 1 or 9 depending on the value of the HC-LEFT
|
||||
// signal (set by bit 1 of the value written to 0x2400). Of course
|
||||
// it depends on the value wrapping around to zero when it counts
|
||||
// past 0x7F
|
||||
UINT16 const col = hires ? ((m_scroll_x & 0x60) + (m_hc_left ? 0x09 : 0x01) + 0x17) : (m_scroll_x + 0x0B);
|
||||
|
||||
for (UINT16 x = 0; x < (hires ? 104 : 52); x++)
|
||||
{
|
||||
UINT16 offs = row | ((col + x) & 0x7F);
|
||||
UINT16 const offs = row | ((col + x) & 0x7F);
|
||||
UINT8 const chr = m_ram->pointer()[0xF000 + offs];
|
||||
UINT8 const dim = m_ram->pointer()[0x10000 + offs] & 0x80;
|
||||
|
||||
@ -377,10 +406,8 @@ TIMER_CALLBACK_MEMBER(osborne1_state::video_callback)
|
||||
}
|
||||
}
|
||||
|
||||
if ((ra == 2) || (ra == 6))
|
||||
m_beep->set_state(m_beep_state);
|
||||
else
|
||||
m_beep->set_state(0);
|
||||
// The beeper is gated so it's active four out of every ten scanlines
|
||||
m_speaker->level_w((m_beep_state && (ra & 0x04)) ? 1 : 0);
|
||||
|
||||
// Check reset key if necessary - it affects NMI
|
||||
if (!m_ub6a_q)
|
||||
@ -389,33 +416,6 @@ TIMER_CALLBACK_MEMBER(osborne1_state::video_callback)
|
||||
m_video_timer->adjust(machine().first_screen()->time_until_pos(y + 1, 0));
|
||||
}
|
||||
|
||||
TIMER_CALLBACK_MEMBER(osborne1_state::setup_callback)
|
||||
{
|
||||
m_beep->set_state( 0 );
|
||||
m_beep->set_frequency( 300 /* 60 * 240 / 2 */ );
|
||||
m_pia1->ca1_w(0);
|
||||
}
|
||||
|
||||
|
||||
void osborne1_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
|
||||
{
|
||||
switch (id)
|
||||
{
|
||||
case TIMER_VIDEO:
|
||||
video_callback(ptr, param);
|
||||
break;
|
||||
case TIMER_ACIA_RXC_TXC:
|
||||
m_acia_rxc_txc_state = m_acia_rxc_txc_state ? 0 : 1;
|
||||
update_acia_rxc_txc();
|
||||
break;
|
||||
case TIMER_SETUP:
|
||||
setup_callback(ptr, param);
|
||||
break;
|
||||
default:
|
||||
assert_always(FALSE, "Unknown id in osborne1_state::device_timer");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
bool osborne1_state::set_rom_mode(UINT8 value)
|
||||
{
|
||||
|
||||
Loading…
Reference in New Issue
Block a user