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Cleanups and version bump

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This commit is contained in:
Miodrag Milanovic 2014-04-07 06:04:18 +00:00
parent 30d94e51c5
commit fec65e0b57
1508 changed files with 13960 additions and 14181 deletions
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104
hash/a7800.xml
View File

@ -2264,60 +2264,60 @@ almost nothing like the prototype.
</part>
</software>
<!-- XM board enhanced -->
<!-- XM board enhanced -->
<!-- these should require an XM board? but the emulation seems to be built into the base driver?-->
<!-- these have had the header stripped vs the .a78 files offered
there was also a 'binary' with size 0x24000, CRC fd503bd4 -->
<software name="dkongxm">
<description>Donkey Kong (homebrew, XM enhanced, HSC support) (Demo)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher> <!-- TEP392 -->
<sharedfeat name="compatibility" value="PAL"/>
<part name="cart" interface="a7800_cart">
<feature name="pcb_type" value="TYPE-XM" />
<dataarea name="rom" size="0x24000">
<rom name="dkxm_final_demo_pal_hsc.a78" size="0x24000" crc="6510b674" sha1="65b723b470d287af51e9888813149c43fb11ac26" offset="0" />
</dataarea>
</part>
</software>
<!-- these should require an XM board? but the emulation seems to be built into the base driver?-->
<!-- these have had the header stripped vs the .a78 files offered
there was also a 'binary' with size 0x24000, CRC fd503bd4 -->
<software name="dkongxm">
<description>Donkey Kong (homebrew, XM enhanced, HSC support) (Demo)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher> <!-- TEP392 -->
<sharedfeat name="compatibility" value="PAL"/>
<part name="cart" interface="a7800_cart">
<feature name="pcb_type" value="TYPE-XM" />
<dataarea name="rom" size="0x24000">
<rom name="dkxm_final_demo_pal_hsc.a78" size="0x24000" crc="6510b674" sha1="65b723b470d287af51e9888813149c43fb11ac26" offset="0" />
</dataarea>
</part>
</software>
<software name="dkongxmu" cloneof="dkongxm" >
<description>Donkey Kong (homebrew, XM enhanced, HSC support) (Demo) (NTSC)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher> <!-- TEP392 -->
<sharedfeat name="compatibility" value="NTSC"/>
<part name="cart" interface="a7800_cart">
<feature name="pcb_type" value="TYPE-XM" />
<dataarea name="rom" size="0x24000">
<rom name="dkxm_final_demo_ntsc_hsc.a78" size="0x24000" crc="2c67fea7" sha1="7825c1946e3c7492fa9bbfae33029cd68c0d1135" offset="0" />
</dataarea>
</part>
</software>
<software name="dkongxmu" cloneof="dkongxm" >
<description>Donkey Kong (homebrew, XM enhanced, HSC support) (Demo) (NTSC)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher> <!-- TEP392 -->
<sharedfeat name="compatibility" value="NTSC"/>
<part name="cart" interface="a7800_cart">
<feature name="pcb_type" value="TYPE-XM" />
<dataarea name="rom" size="0x24000">
<rom name="dkxm_final_demo_ntsc_hsc.a78" size="0x24000" crc="2c67fea7" sha1="7825c1946e3c7492fa9bbfae33029cd68c0d1135" offset="0" />
</dataarea>
</part>
</software>
<software name="dkongxmn" cloneof="dkongxm">
<description>Donkey Kong (homebrew, XM enhanced) (Demo)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher> <!-- TEP392 -->
<sharedfeat name="compatibility" value="PAL"/>
<part name="cart" interface="a7800_cart">
<feature name="pcb_type" value="TYPE-XM" />
<dataarea name="rom" size="0x24000">
<rom name="dkxm_final_demo_pal.a78" size="0x24000" crc="d362712e" sha1="118c462d6698bd23c378785f80062fdd7d65ca00" offset="0" />
</dataarea>
</part>
</software>
<software name="dkongxmn" cloneof="dkongxm">
<description>Donkey Kong (homebrew, XM enhanced) (Demo)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher> <!-- TEP392 -->
<sharedfeat name="compatibility" value="PAL"/>
<part name="cart" interface="a7800_cart">
<feature name="pcb_type" value="TYPE-XM" />
<dataarea name="rom" size="0x24000">
<rom name="dkxm_final_demo_pal.a78" size="0x24000" crc="d362712e" sha1="118c462d6698bd23c378785f80062fdd7d65ca00" offset="0" />
</dataarea>
</part>
</software>
<software name="dkongxmnu" cloneof="dkongxm" >
<description>Donkey Kong (homebrew, XM enhanced) (Demo) (NTSC)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher> <!-- TEP392 -->
<sharedfeat name="compatibility" value="NTSC"/>
<part name="cart" interface="a7800_cart">
<feature name="pcb_type" value="TYPE-XM" />
<dataarea name="rom" size="0x24000">
<rom name="dkxm_final_demo_ntsc.a78" size="0x24000" crc="6e170055" sha1="f4da231312da06ff9e8af5681b5013b14886b455" offset="0" />
</dataarea>
</part>
</software>
<software name="dkongxmnu" cloneof="dkongxm" >
<description>Donkey Kong (homebrew, XM enhanced) (Demo) (NTSC)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher> <!-- TEP392 -->
<sharedfeat name="compatibility" value="NTSC"/>
<part name="cart" interface="a7800_cart">
<feature name="pcb_type" value="TYPE-XM" />
<dataarea name="rom" size="0x24000">
<rom name="dkxm_final_demo_ntsc.a78" size="0x24000" crc="6e170055" sha1="f4da231312da06ff9e8af5681b5013b14886b455" offset="0" />
</dataarea>
</part>
</software>
</softwarelist>

6
hash/coco_flop.xml
View File

@ -3,9 +3,9 @@
<softwarelist name="coco_flop" description="Tandy Radio Shack Color Computer disk images">
<!-- coco3 only requires 512Kb, audio is a farty, run best with a a 6309? - coco3h driver) -->
<!-- RUN"DONKEY" -->
<software name="dkong" supported ="partial">
<!-- coco3 only requires 512Kb, audio is a farty, run best with a a 6309? - coco3h driver) -->
<!-- RUN"DONKEY" -->
<software name="dkong" supported ="partial">
<description>Donkey Kong (Sock Master's Donkey Kong Emulator for CoCo 3) (512Kb)</description>
<year>2007</year>
<publisher>Sock Master</publisher>

28
hash/msx1_cart.xml
View File

@ -16845,22 +16845,22 @@ kept for now until finding out what those bytes affect...
<!-- Devices -->
<!-- Devices -->
<!-- mounting this should add the floppy drive, rather than it always being there? -->
<software name="diskbas">
<description>Disk BASIC v1.0 for FS-FD1 (Japan)</description>
<year>1987</year>
<publisher>Matsushita</publisher>
<part name="cart" interface="msx_cart">
<feature name="mapper" value="DISK_ROM" />
<dataarea name="rom" size="0x4000">
<rom name="disk basic v1.0 for fs-fd1 (1987)(matsushita electric industrial)(jp).rom" size="0x4000" crc="4c9b8214" sha1="8e3f6f08309f082a82be8298a66c9b90f2d34ad4" offset="0" />
</dataarea>
</part>
</software>
<!-- mounting this should add the floppy drive, rather than it always being there? -->
<software name="diskbas">
<description>Disk BASIC v1.0 for FS-FD1 (Japan)</description>
<year>1987</year>
<publisher>Matsushita</publisher>
<part name="cart" interface="msx_cart">
<feature name="mapper" value="DISK_ROM" />
<dataarea name="rom" size="0x4000">
<rom name="disk basic v1.0 for fs-fd1 (1987)(matsushita electric industrial)(jp).rom" size="0x4000" crc="4c9b8214" sha1="8e3f6f08309f082a82be8298a66c9b90f2d34ad4" offset="0" />
</dataarea>
</part>
</software>
<!-- SORT -->
<!-- SORT -->

60
hash/msx1_flop.xml
View File

@ -25,38 +25,38 @@
</part>
</software>
<software name="ohmummy">
<description>Oh Mummy!!</description>
<year>1984</year>
<publisher>Longman Software</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="737280">
<rom name="oh mummy!! (1984)(longman software)(gb).dsk" size="737280" crc="9cf775cc" sha1="cd7db0faf25ae33699b1708a19a874e3662e158a" offset="0" />
</dataarea>
</part>
</software>
<software name="ohmummy">
<description>Oh Mummy!!</description>
<year>1984</year>
<publisher>Longman Software</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="737280">
<rom name="oh mummy!! (1984)(longman software)(gb).dsk" size="737280" crc="9cf775cc" sha1="cd7db0faf25ae33699b1708a19a874e3662e158a" offset="0" />
</dataarea>
</part>
</software>
<software name="ohshit">
<description>Oh Shit!</description>
<year>1986</year>
<publisher>Aackosoft</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="737280">
<rom name="oh shit! (1986)(aackosoft)(nl).dsk" size="737280" crc="735ebc21" sha1="7de3f69a8a5136e0dd25214d36b1194a6506b377" offset="0" />
</dataarea>
</part>
</software>
<software name="ohshit">
<description>Oh Shit!</description>
<year>1986</year>
<publisher>Aackosoft</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="737280">
<rom name="oh shit! (1986)(aackosoft)(nl).dsk" size="737280" crc="735ebc21" sha1="7de3f69a8a5136e0dd25214d36b1194a6506b377" offset="0" />
</dataarea>
</part>
</software>
<software name="ohno" cloneof="ohshit">
<description>Oh No!</description>
<year>1986</year>
<publisher>Eaglesoft</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="737280">
<rom name="oh no! (1986)(eaglesoft)(nl)[aka oh shit!].dsk" size="737280" crc="aee65f34" sha1="5c2cd6dd8192a8c29fc0e272181272cb26cc2af6" offset="0" />
</dataarea>
</part>
</software>
<software name="ohno" cloneof="ohshit">
<description>Oh No!</description>
<year>1986</year>
<publisher>Eaglesoft</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="737280">
<rom name="oh no! (1986)(eaglesoft)(nl)[aka oh shit!].dsk" size="737280" crc="aee65f34" sha1="5c2cd6dd8192a8c29fc0e272181272cb26cc2af6" offset="0" />
</dataarea>
</part>
</software>
</softwarelist>

6
hash/psx.xml
View File

@ -2,7 +2,7 @@
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="psx" description="Sony Playstation CD-ROMs">
<!-- todo, reconvert original dumps using current CHDMAN verison - Feb 2014 -->
<!-- todo, reconvert original dumps using current CHDMAN verison - Feb 2014 -->
<!--
***********************
@ -52,8 +52,8 @@ A few comments on these:
<software name="bublbob2" >
<!-- Original images
bb2.bin 62,620,864 1c2c9f63
bb2.cue 69 096e5077
bb2.bin 62,620,864 1c2c9f63
bb2.cue 69 096e5077
-->
<description>Bubble Bobble II (prototype)</description>
<year>1995</year>

8
src/build/png2bdc.c
View File

@ -74,7 +74,7 @@ struct render_font_char
INT32 width; // width from this character to the next
INT32 xoffs, yoffs; // X and Y offset from baseline to top,left of bitmap
INT32 bmwidth, bmheight; // width and height of bitmap
bitmap_argb32 * bitmap; // pointer to the bitmap containing the raw data
bitmap_argb32 * bitmap; // pointer to the bitmap containing the raw data
};
@ -107,7 +107,7 @@ inline int pixel_is_set(bitmap_argb32 &bitmap, int y, int x)
//-------------------------------------------------
// write_data - write data to the given file and
// throw an exception if an error occurs
// throw an exception if an error occurs
//-------------------------------------------------
static void write_data(core_file &file, UINT8 *base, UINT8 *end)
@ -123,7 +123,7 @@ static void write_data(core_file &file, UINT8 *base, UINT8 *end)
//-------------------------------------------------
// render_font_save_cached - write the cached
// data out to the file
// data out to the file
//-------------------------------------------------
static bool render_font_save_cached(render_font &font, const char *filename, UINT32 hash)
@ -248,7 +248,7 @@ static bool render_font_save_cached(render_font &font, const char *filename, UIN
//-------------------------------------------------
// bitmap_to_chars - convert a bitmap to
// characters in the given font
// characters in the given font
//-------------------------------------------------
static bool bitmap_to_chars(bitmap_argb32 &bitmap, render_font &font)

4
src/emu/bus/a2bus/a2cffa.c
View File

@ -184,7 +184,7 @@ void a2bus_cffa2000_device::write_c0nx(address_space &space, UINT8 offset, UINT8
case 0:
m_lastdata &= 0x00ff;
m_lastdata |= data<<8;
// printf("%02x to 0, m_lastdata = %x\n", data, m_lastdata);
// printf("%02x to 0, m_lastdata = %x\n", data, m_lastdata);
m_inwritecycle = true;
break;
@ -199,7 +199,7 @@ void a2bus_cffa2000_device::write_c0nx(address_space &space, UINT8 offset, UINT8
case 8:
m_lastdata &= 0xff00;
m_lastdata |= data;
// printf("%02x to 8, m_lastdata = %x\n", data, m_lastdata);
// printf("%02x to 8, m_lastdata = %x\n", data, m_lastdata);
m_ata->write_cs0(space, offset-8, m_lastdata, 0xffff);
break;

7
src/emu/bus/a2bus/a2corvus.c
View File

@ -10,7 +10,7 @@
C0n0 = drive read/write
C0n1 = read status (busy in bit 7, data direction in bit 6)
Reads and writes to C0n2+ happen; the contents of the reads are thrown away
Reads and writes to C0n2+ happen; the contents of the reads are thrown away
immediately by all the code I've examined, and sending the writes to the
drive's write port makes it not work so they're intended to be ignored too.
@ -24,7 +24,7 @@
2) Boot apple2p with the corvus in slot 2 and a diskii(ng) in slot 6 with the
"Corvus Hard Drive - Diagnostics.dsk" mounted.
3) Press F to format. Accept all the default options from now on;
there is no "format switch" to worry about with the current emulation.
there is no "format switch" to worry about with the current emulation.
4) Quit MESS. Restart with the corvus in slot 6 and a diskii(ng) in slot 7
with the "Corvus Hard Drive - Utilities 1.dsk" mounted.
5) When you get the BASIC prompt, "LOAD BSYSGEN"
@ -53,7 +53,7 @@
const device_type A2BUS_CORVUS = &device_creator<a2bus_corvus_device>;
#define CORVUS_ROM_REGION "corvus_rom"
#define CORVUS_HD_TAG "corvushd"
#define CORVUS_HD_TAG "corvushd"
static MACHINE_CONFIG_FRAGMENT(corvus)
MCFG_DEVICE_ADD(CORVUS_HD_TAG, CORVUS_HDC, 0)
@ -180,4 +180,3 @@ UINT8 a2bus_corvus_device::read_c800(address_space &space, UINT16 offset)
{
return m_rom[offset & 0x7ff];
}

16
src/emu/bus/a2bus/a2pic.c
View File

@ -188,7 +188,7 @@ UINT8 a2bus_pic_device::read_c0nx(address_space &space, UINT8 offset)
case 4:
return m_ack;
case 6: // does reading this really work?
case 6: // does reading this really work?
m_irqenable = true;
break;
@ -211,7 +211,7 @@ void a2bus_pic_device::write_c0nx(address_space &space, UINT8 offset, UINT8 data
{
switch (offset)
{
case 0: // set data out and send a strobe
case 0: // set data out and send a strobe
m_ctx_data_out->write(data);
if (m_autostrobe)
@ -220,7 +220,7 @@ void a2bus_pic_device::write_c0nx(address_space &space, UINT8 offset, UINT8 data
}
break;
case 2: // send a strobe
case 2: // send a strobe
start_strobe();
break;
@ -242,7 +242,7 @@ WRITE_LINE_MEMBER( a2bus_pic_device::ack_w )
{
UINT8 dsw1 = m_dsw1->read();
if (dsw1 & 0x10) // negative polarity
if (dsw1 & 0x10) // negative polarity
{
m_ack = (state == ASSERT_LINE) ? 0x00 : 0x80;
}
@ -251,7 +251,7 @@ WRITE_LINE_MEMBER( a2bus_pic_device::ack_w )
m_ack = (state == ASSERT_LINE) ? 0x80 : 0x00;
}
m_ack |= 0x40; // set ACK flip-flop
m_ack |= 0x40; // set ACK flip-flop
if ((dsw1 & 0x40) && (m_irqenable))
{
@ -262,9 +262,9 @@ WRITE_LINE_MEMBER( a2bus_pic_device::ack_w )
void a2bus_pic_device::start_strobe()
{
int usec = ((m_dsw1->read() & 7) * 2) + 1; // strobe length in microseconds
int usec = ((m_dsw1->read() & 7) * 2) + 1; // strobe length in microseconds
if (m_dsw1->read() & 0x8) // negative polarity
if (m_dsw1->read() & 0x8) // negative polarity
{
m_ctx->write_strobe(CLEAR_LINE);
}
@ -278,7 +278,7 @@ void a2bus_pic_device::start_strobe()
void a2bus_pic_device::clear_strobe()
{
if (m_dsw1->read() & 0x8) // negative polarity
if (m_dsw1->read() & 0x8) // negative polarity
{
m_ctx->write_strobe(ASSERT_LINE);
}

46
src/emu/bus/a2bus/a2ultraterm.c
View File

@ -7,18 +7,18 @@
Notes:
C0nX: C0n0 is 6845 register address,
C0n1 is 6845 register data.
C0n2 is control 1: b7 = 0 to read RAM at cc00, 1 for ROM (writes always to RAM)
b6 = 0 for Apple II video, 1 for 6845
b5 = 0 for 17.430 MHz 6845 clock, 1 for 28.7595 MHz 6845 clock
b4 = 0 for 512 byte RAM block addressing (VideoTerm emulation), 1 for 256-byte RAM page addressing
b3-b0 = page select
C0n3 is control 2: b7 = 0 for attributes software controllable, 1 for DIP switches control attributes
b5 = 0 for normal video if bit 7 set, 1 for inverse if bit 7 set
b4 = 0 for lowlight if bit 7 set, 1 for highlight if bit 7 set
b2 = 0 for high-density character set, 1 for low-density character set
b1 = same as b5
b0 = same as b4
C0n1 is 6845 register data.
C0n2 is control 1: b7 = 0 to read RAM at cc00, 1 for ROM (writes always to RAM)
b6 = 0 for Apple II video, 1 for 6845
b5 = 0 for 17.430 MHz 6845 clock, 1 for 28.7595 MHz 6845 clock
b4 = 0 for 512 byte RAM block addressing (VideoTerm emulation), 1 for 256-byte RAM page addressing
b3-b0 = page select
C0n3 is control 2: b7 = 0 for attributes software controllable, 1 for DIP switches control attributes
b5 = 0 for normal video if bit 7 set, 1 for inverse if bit 7 set
b4 = 0 for lowlight if bit 7 set, 1 for highlight if bit 7 set
b2 = 0 for high-density character set, 1 for low-density character set
b1 = same as b5
b0 = same as b4
C800-CBFF: ROM page 1
CC00-CFEF: VRAM window or ROM page 2
@ -46,20 +46,20 @@ const device_type A2BUS_ULTRATERMENH = &device_creator<a2bus_ultratermenh_device
#define ULTRATERM_MC6845_NAME "mc6845_uterm"
#define CLOCK_LOW 17430000
#define CLOCK_HIGH 28759500
#define CLOCK_HIGH 28759500
#define CT1_MEMSEL (0x80) // 0 for read RAM at cc00, 1 for read ROM
#define CT1_VIDSEL (0x40) // 0 for Apple video passthrough, 1 for 6845 video
#define CT1_CLKSEL (0x20) // 0 for Videoterm clock, 1 for faster clock
#define CT1_VTEMU (0x10) // Videoterm emulation mode if 0
#define CT1_MEMSEL (0x80) // 0 for read RAM at cc00, 1 for read ROM
#define CT1_VIDSEL (0x40) // 0 for Apple video passthrough, 1 for 6845 video
#define CT1_CLKSEL (0x20) // 0 for Videoterm clock, 1 for faster clock
#define CT1_VTEMU (0x10) // Videoterm emulation mode if 0
#define CT1_PAGEMASK (0x0f)
#define CT2_USEDIPS (0x80) // 0 to use the rest of ctrl2's bits, 1 to use DIPs
#define CT2_USEDIPS (0x80) // 0 to use the rest of ctrl2's bits, 1 to use DIPs
#define CT2_INVBIT7H (0x20)
#define CT2_HLBIT7H (0x10)
#define CT2_HLBIT7H (0x10)
#define CT2_HIDENSITY (0x04)
#define CT2_INVBIT7L (0x02)
#define CT2_HLBIT7L (0x01)
#define CT2_HLBIT7L (0x01)
static MC6845_UPDATE_ROW( ultraterm_update_row );
@ -245,7 +245,7 @@ void a2bus_videx160_device::write_c0nx(address_space &space, UINT8 offset, UINT8
case 2:
m_ctrl1 = data;
// printf("%02x to ctrl1\n", data);
// printf("%02x to ctrl1\n", data);
// if disabling Videoterm emulation, change RAM banking
if (data & CT1_VTEMU)
@ -256,7 +256,7 @@ void a2bus_videx160_device::write_c0nx(address_space &space, UINT8 offset, UINT8
case 3:
m_ctrl2 = data;
// printf("%02x to ctrl2\n", data);
// printf("%02x to ctrl2\n", data);
break;
}
@ -298,7 +298,7 @@ UINT8 a2bus_videx160_device::read_c800(address_space &space, UINT16 offset)
}
else
{
if (m_ctrl1 & CT1_MEMSEL) // read ROM?
if (m_ctrl1 & CT1_MEMSEL) // read ROM?
{
return m_rom[offset + 0x800];
}

4
src/emu/bus/adam/exp.h
View File

@ -51,8 +51,8 @@
class device_adam_expansion_slot_card_interface;
class adam_expansion_slot_device : public device_t,
public device_slot_interface,
public device_image_interface
public device_slot_interface,
public device_image_interface
{
public:
// construction/destruction

2
src/emu/bus/adamnet/fdc.h
View File

@ -29,7 +29,7 @@
// ======================> adam_fdc_device
class adam_fdc_device : public device_t,
public device_adamnet_card_interface
public device_adamnet_card_interface
{
public:
// construction/destruction

6
src/emu/bus/adamnet/spi.c
View File

@ -18,9 +18,9 @@
//**************************************************************************
#define M6801_TAG "m6801"
#define MC2661_TAG "mc2661"
#define RS232_TAG "rs232"
#define CENTRONICS_TAG "centronics"
#define MC2661_TAG "mc2661"
#define RS232_TAG "rs232"
#define CENTRONICS_TAG "centronics"

2
src/emu/bus/adamnet/spi.h
View File

@ -30,7 +30,7 @@
// ======================> adam_spi_device
class adam_spi_device : public device_t,
public device_adamnet_card_interface
public device_adamnet_card_interface
{
public:
// construction/destruction

6
src/emu/bus/c64/magic_formel.c
View File

@ -11,9 +11,9 @@
/*
TODO:
TODO:
- pia6821 port A DDR needs to reset to 0xff or this won't boot
- pia6821 port A DDR needs to reset to 0xff or this won't boot
*/
@ -69,7 +69,7 @@ WRITE8_MEMBER( c64_magic_formel_cartridge_device::pia_pb_w )
PB2 RAM A9
PB3 RAM A8
PB4 RAM A12
PB5 U9A clr
PB5 U9A clr
PB6
PB7 ROMH enable

2
src/emu/bus/cbm2/hrg.c
View File

@ -13,7 +13,7 @@
TODO:
http://www.wfking.de/hires.htm
http://www.wfking.de/hires.htm
- version A (EF9365, 512x512 interlaced, 1 page)
- version B (EF9366, 512x256 non-interlaced, 2 pages)

2
src/emu/bus/cbm2/hrg.h
View File

@ -26,7 +26,7 @@
// ======================> cbm2_graphic_cartridge_device
class cbm2_graphic_cartridge_device : public device_t,
public device_cbm2_expansion_card_interface
public device_cbm2_expansion_card_interface
{
public:
// construction/destruction

2
src/emu/bus/cbm2/user.h
View File

@ -104,7 +104,7 @@ protected:
// ======================> cbm2_user_port_device
class cbm2_user_port_device : public device_t,
public device_slot_interface
public device_slot_interface
{
public:
// construction/destruction

8
src/emu/bus/cbmiec/c1541.c
View File

@ -706,7 +706,7 @@ WRITE_LINE_MEMBER( base_c1541_device::byte_w )
//-------------------------------------------------
static SLOT_INTERFACE_START( c1540_floppies )
SLOT_INTERFACE( "525ssqd", ALPS_3255190x )
SLOT_INTERFACE( "525ssqd", ALPS_3255190x )
SLOT_INTERFACE_END
@ -715,8 +715,8 @@ SLOT_INTERFACE_END
//-------------------------------------------------
FLOPPY_FORMATS_MEMBER( base_c1541_device::floppy_formats )
FLOPPY_D64_FORMAT,
FLOPPY_G64_FORMAT
FLOPPY_D64_FORMAT,
FLOPPY_G64_FORMAT
FLOPPY_FORMATS_END
@ -889,7 +889,7 @@ static MACHINE_CONFIG_FRAGMENT( c1541pdc )
MCFG_CENTRONICS_ADD(CENTRONICS_TAG, centronics_printers, "image")
MCFG_CENTRONICS_ACK_HANDLER(DEVWRITELINE(MC6821_TAG, pia6821_device, ca1_w))
MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics")
MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics")
MACHINE_CONFIG_END

4
src/emu/bus/cbmiec/c1541.h
View File

@ -40,8 +40,8 @@
// ======================> base_c1541_device
class base_c1541_device : public device_t,
public device_cbm_iec_interface,
public device_c64_floppy_parallel_interface
public device_cbm_iec_interface,
public device_c64_floppy_parallel_interface
{
public:
// construction/destruction

2
src/emu/bus/cbmiec/c1571.c
View File

@ -13,7 +13,7 @@
TODO:
- WD1770 set_floppy
- WD1770 set_floppy
- 1571CR
- MOS5710
- ICT Mini Chief MC-20

4
src/emu/bus/cbmiec/c1571.h
View File

@ -42,8 +42,8 @@
// ======================> c1571_device
class c1571_device : public device_t,
public device_cbm_iec_interface,
public device_c64_floppy_parallel_interface
public device_cbm_iec_interface,
public device_c64_floppy_parallel_interface
{
public:
// construction/destruction

2
src/emu/bus/coco/coco_fdc.c
View File

@ -80,7 +80,7 @@
#define LOG_FDC 0
#define WD_TAG "wd17xx"
#define WD2797_TAG "wd2797"
#define WD2797_TAG "wd2797"
#define DISTO_TAG "disto"
#define CLOUD9_TAG "cloud9"

4
src/emu/bus/coleco/exp.h
View File

@ -64,8 +64,8 @@
class device_colecovision_cartridge_interface;
class colecovision_cartridge_slot_device : public device_t,
public device_slot_interface,
public device_image_interface
public device_slot_interface,
public device_image_interface
{
public:
// construction/destruction

2
src/emu/bus/coleco/hand.h
View File

@ -26,7 +26,7 @@
// ======================> coleco_hand_controller_t
class coleco_hand_controller_t : public device_t,
public device_colecovision_control_port_interface
public device_colecovision_control_port_interface
{
public:
// construction/destruction

2
src/emu/bus/coleco/sac.h
View File

@ -26,7 +26,7 @@
// ======================> coleco_super_action_controller_t
class coleco_super_action_controller_t : public device_t,
public device_colecovision_control_port_interface
public device_colecovision_control_port_interface
{
public:
// construction/destruction

2
src/emu/bus/coleco/std.h
View File

@ -25,7 +25,7 @@
// ======================> colecovision_standard_cartridge_device
class colecovision_standard_cartridge_device : public device_t,
public device_colecovision_cartridge_interface
public device_colecovision_cartridge_interface
{
public:
// construction/destruction

2
src/emu/bus/comx35/exp.h
View File

@ -74,7 +74,7 @@
class device_comx_expansion_card_interface;
class comx_expansion_slot_device : public device_t,
public device_slot_interface
public device_slot_interface
{
public:
// construction/destruction

2
src/emu/bus/comx35/printer.c
View File

@ -73,7 +73,7 @@ static MACHINE_CONFIG_FRAGMENT( comx_prn )
MCFG_CENTRONICS_BUSY_HANDLER(DEVWRITELINE("cent_status_in", input_buffer_device, write_bit1))
MCFG_CENTRONICS_PERROR_HANDLER(DEVWRITELINE("cent_status_in", input_buffer_device, write_bit2))
MCFG_CENTRONICS_SELECT_HANDLER(DEVWRITELINE("cent_status_in", input_buffer_device, write_bit3))
MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics")
MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics")
MCFG_DEVICE_ADD("cent_status_in", INPUT_BUFFER, 0)
MACHINE_CONFIG_END

5
src/emu/bus/ecbbus/ecbbus.h
View File

@ -69,8 +69,7 @@
//**************************************************************************
#define MCFG_ECBBUS_ADD() \
MCFG_DEVICE_ADD(ECBBUS_TAG, ECBBUS, 0) \
MCFG_DEVICE_ADD(ECBBUS_TAG, ECBBUS, 0)
#define MCFG_ECBBUS_SLOT_ADD(_num, _tag, _slot_intf, _def_slot) \
MCFG_DEVICE_ADD(_tag, ECBBUS_SLOT, 0) \
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
@ -94,7 +93,7 @@
class ecbbus_device;
class ecbbus_slot_device : public device_t,
public device_slot_interface
public device_slot_interface
{
public:
// construction/destruction

6
src/emu/bus/ecbbus/grip.c
View File

@ -305,13 +305,13 @@ static MC6845_INTERFACE( crtc_intf )
static MC6845_INTERFACE( grip5_crtc_intf )
{
false,
0,0,0,0,
0,0,0,0,
8,
NULL,
grip5_update_row,
NULL,
DEVCB_DEVICE_LINE_MEMBER(Z80STI_TAG, z80sti_device, i1_w),
DEVCB_DEVICE_LINE_MEMBER(Z80STI_TAG, z80sti_device, i2_w),
DEVCB_DEVICE_LINE_MEMBER(Z80STI_TAG, z80sti_device, i1_w),
DEVCB_DEVICE_LINE_MEMBER(Z80STI_TAG, z80sti_device, i2_w),
DEVCB_NULL,
DEVCB_NULL,
grip5_update_addr_changed

2
src/emu/bus/econet/econet.c
View File

@ -196,7 +196,7 @@ inline int econet_device::get_signal(int signal)
// econet_device - constructor
//-------------------------------------------------
econet_device::econet_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
econet_device::econet_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, ECONET, "Econet", tag, owner, clock, "econet", __FILE__),
m_write_clk(*this),
m_write_data(*this)

3
src/emu/bus/econet/econet.h
View File

@ -31,8 +31,7 @@
//**************************************************************************
#define MCFG_ECONET_ADD() \
MCFG_DEVICE_ADD(ECONET_TAG, ECONET, 0) \
MCFG_DEVICE_ADD(ECONET_TAG, ECONET, 0)
#define MCFG_ECONET_SLOT_ADD(_tag, _num, _slot_intf, _def_slot) \
MCFG_DEVICE_ADD(_tag, ECONET_SLOT, 0) \

5
src/emu/bus/ep64/exp.h
View File

@ -69,8 +69,7 @@
#define MCFG_EP64_EXPANSION_BUS_SLOT_ADD(_tag, _def_slot) \
MCFG_DEVICE_ADD(_tag, EP64_EXPANSION_BUS_SLOT, 0) \
MCFG_DEVICE_SLOT_INTERFACE(ep64_expansion_bus_cards, _def_slot, false) \
MCFG_DEVICE_SLOT_INTERFACE(ep64_expansion_bus_cards, _def_slot, false)
#define MCFG_EP64_EXPANSION_BUS_SLOT_DAVE(_tag) \
ep64_expansion_bus_slot_device::static_set_dave_tag(*device, "^"_tag);
@ -95,7 +94,7 @@
class device_ep64_expansion_bus_card_interface;
class ep64_expansion_bus_slot_device : public device_t,
public device_slot_interface
public device_slot_interface
{
friend class device_ep64_expansion_bus_card_interface;

2
src/emu/bus/ieee488/c2031.c
View File

@ -286,7 +286,7 @@ WRITE_LINE_MEMBER( c2031_device::byte_w )
//-------------------------------------------------
static SLOT_INTERFACE_START( c2031_floppies )
SLOT_INTERFACE( "525ssqd", FLOPPY_525_SSQD )
SLOT_INTERFACE( "525ssqd", FLOPPY_525_SSQD )
SLOT_INTERFACE_END

2
src/emu/bus/ieee488/c2031.h
View File

@ -29,7 +29,7 @@
// ======================> c2031_device
class c2031_device : public device_t,
public device_ieee488_interface
public device_ieee488_interface
{
public:
// construction/destruction

10
src/emu/bus/ieee488/c2040.c
View File

@ -36,7 +36,7 @@
#define M6504_TAG "uh3"
#define M6522_TAG "um3"
#define M6530_TAG "uk3"
#define FDC_TAG "fdc"
#define FDC_TAG "fdc"
@ -452,7 +452,7 @@ static MOS6530_INTERFACE( miot_intf )
//-------------------------------------------------
static SLOT_INTERFACE_START( c2040_floppies )
SLOT_INTERFACE( "525ssqd", FLOPPY_525_SSQD )
SLOT_INTERFACE( "525ssqd", FLOPPY_525_SSQD )
SLOT_INTERFACE_END
@ -461,9 +461,9 @@ SLOT_INTERFACE_END
//-------------------------------------------------
FLOPPY_FORMATS_MEMBER( c2040_device::floppy_formats )
FLOPPY_D64_FORMAT,
FLOPPY_G64_FORMAT,
FLOPPY_D67_FORMAT
FLOPPY_D64_FORMAT,
FLOPPY_G64_FORMAT,
FLOPPY_D67_FORMAT
FLOPPY_FORMATS_END

2
src/emu/bus/ieee488/c2040.h
View File

@ -38,7 +38,7 @@
// ======================> c2040_device
class c2040_device : public device_t,
public device_ieee488_interface
public device_ieee488_interface
{
public:
// construction/destruction

6
src/emu/bus/ieee488/c2040fdc.c
View File

@ -11,10 +11,10 @@
/*
TODO:
TODO:
- writing starts in the middle of a byte
- 8050 PLL
- writing starts in the middle of a byte
- 8050 PLL
*/

2
src/emu/bus/ieee488/c8050.c
View File

@ -13,7 +13,7 @@
TODO:
- Micropolis 8x50 stepper motor is same as 4040, except it takes 4 pulses to step a track instead of 1
- Micropolis 8x50 stepper motor is same as 4040, except it takes 4 pulses to step a track instead of 1
- BASIC program to set 8250/SFD-1001 to 8050 mode:

6
src/emu/bus/ieee488/hardbox.c
View File

@ -53,7 +53,7 @@
#define Z80_TAG "z80"
#define I8255_0_TAG "ic17"
#define I8255_1_TAG "ic16"
#define CORVUS_HDC_TAG "corvus"
#define CORVUS_HDC_TAG "corvus"
@ -89,8 +89,8 @@ ROM_START( hardbox )
Disassembling the ROMs showed that v2.3 and v2.4 are for Corvus Systems drives but v3.1 is
for Sunol Systems drives. Both types use the Corvus flat cable interface but there may be
some programming differences, e.g. the v3.1 firmware for Sunol does not have the park heads
routine in the Corvus versions. MESS emulates a Corvus drive so we default to the last
known HardBox firmware for Corvus (v2.4). */
routine in the Corvus versions. MESS emulates a Corvus drive so we default to the last
known HardBox firmware for Corvus (v2.4). */
ROM_END

2
src/emu/bus/ieee488/softbox.c
View File

@ -30,7 +30,7 @@
#define I8255_1_TAG "ic16"
#define COM8116_TAG "ic14"
#define RS232_TAG "rs232"
#define CORVUS_HDC_TAG "corvus"
#define CORVUS_HDC_TAG "corvus"

2
src/emu/bus/imi7000/imi5000h.h
View File

@ -32,7 +32,7 @@
// ======================> imi5000h_device
class imi5000h_device : public device_t,
public device_imi7000_interface
public device_imi7000_interface
{
public:
// construction/destruction

5
src/emu/bus/isa/3c505.c
View File

@ -3,7 +3,7 @@
*
* Created on: August 27, 2010
* Author: Hans Ostermeyer
* ISA conversion by R. Belmont
* ISA conversion by R. Belmont
*
* Released for general non-commercial use under the MAME license
* Visit http://mamedev.org for licensing and usage restrictions.
@ -566,7 +566,7 @@ void threecom3c505_device::set_interrupt(enum line_state state)
case 5: m_isa->irq5_w(state); break;
case 6: m_isa->irq6_w(state); break;
case 7: m_isa->irq7_w(state); break;
case 9: m_isa->irq2_w(state); break; // IRQ 9 on ISA16 goes to IRQ 2
case 9: m_isa->irq2_w(state); break; // IRQ 9 on ISA16 goes to IRQ 2
case 10: m_isa->irq10_w(state); break;
case 11: m_isa->irq11_w(state); break;
case 12: m_isa->irq12_w(state); break;
@ -1579,4 +1579,3 @@ READ8_MEMBER(threecom3c505_device::read)
LOG2(("reading 3C505 Register at offset %02x = %02x", offset, data));
return data;
}

1
src/emu/bus/isa/aga.c
View File

@ -765,7 +765,6 @@ void isa8_aga_device::set_palette_luts(void)
WRITE8_MEMBER (isa8_aga_device:: pc_aga_cga_w )
{
if ( m_mode == AGA_COLOR ) {
switch(offset) {
case 0: case 2: case 4: case 6:
m_mc6845->address_w( space, offset, data );

4
src/emu/bus/isa/isa.c
View File

@ -243,7 +243,7 @@ void isa8_device::device_start()
m_iowidth = m_iospace->data_width();
m_prgwidth = m_prgspace->data_width();
}
else // use host CPU's program and I/O spaces directly
else // use host CPU's program and I/O spaces directly
{
m_iospace = &m_maincpu->space(AS_IO);
m_iowidth = m_maincpu->space_config(AS_IO)->m_databus_width;
@ -679,5 +679,3 @@ UINT16 device_isa16_card_interface::dack16_r(int line)
void device_isa16_card_interface::dack16_w(int line,UINT16 data)
{
}

16
src/emu/bus/isa/isa.h
View File

@ -161,10 +161,10 @@ public:
switch (spacenum)
{
case AS_PROGRAM: return &m_program_config;
case AS_IO: return &m_io_config;
case AS_DATA: return &m_program16_config;
case AS_3: return &m_io16_config;
default: fatalerror("isa: invalid memory space!\n");
case AS_IO: return &m_io_config;
case AS_DATA: return &m_program16_config;
case AS_3: return &m_io16_config;
default: fatalerror("isa: invalid memory space!\n");
}
}
@ -336,10 +336,10 @@ public:
switch (spacenum)
{
case AS_PROGRAM: return &m_program16_config;
case AS_IO: return &m_io16_config;
case AS_DATA: return &m_program_config;
case AS_3: return &m_io_config;
default: fatalerror("isa: invalid memory space!\n");
case AS_IO: return &m_io16_config;
case AS_DATA: return &m_program_config;
case AS_3: return &m_io_config;
default: fatalerror("isa: invalid memory space!\n");
}
}

2
src/emu/bus/isa/mufdc.c
View File

@ -1,6 +1,6 @@
/***************************************************************************
Multi Unique FDC
Multi Unique FDC
license: MAME, GPL-2.0+
copyright-holders: Dirk Best

4
src/emu/bus/isa/mufdc.h
View File

@ -1,6 +1,6 @@
/***************************************************************************
Multi Unique FDC
Multi Unique FDC
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
@ -33,7 +33,7 @@
// ======================> mufdc_device
class mufdc_device : public device_t,
public device_isa8_card_interface
public device_isa8_card_interface
{
public:
// construction/destruction

1
src/emu/bus/isa/omti8621.c
View File

@ -1379,4 +1379,3 @@ bool omti_disk_image_device::call_create(int format_type, option_resolution *for
}
return IMAGE_INIT_PASS;
}

2
src/emu/bus/isa/omti8621.h
View File

@ -2,7 +2,7 @@
* omti8621.h - SMS OMTI 8621 disk controller
*
* Created on: August 30, 2010
* Author: Hans Ostermeyer
* Author: Hans Ostermeyer
*
* Converted to ISA device March 3, 2014 by R. Belmont
*

3
src/emu/bus/isa/pds.c
View File

@ -47,12 +47,10 @@ void isa8_pds_device::device_start()
void isa8_pds_device::device_reset()
{
}
void isa8_pds_device::device_stop()
{
}
I8255_INTERFACE(pds_ppi_intf)
@ -73,4 +71,3 @@ machine_config_constructor isa8_pds_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( pds_config );
}

5
src/emu/bus/isa/sc499.c
View File

@ -1,8 +1,8 @@
/*
* sc499.c - ARCHIVE SC-499 cartridge tape controller (for Apollo DN3x00)
* Created on: April 17, 2011
* Author: Hans Ostermeyer
* ISA conversion by R. Belmont
* Author: Hans Ostermeyer
* ISA conversion by R. Belmont
*
* Released for general non-commercial use under the MAME license
* Visit http://mamedev.org for licensing and usage restrictions.
@ -1311,4 +1311,3 @@ void sc499_ctape_image_device::device_config_complete()
{
update_names(SC499_CTAPE, "ctape", "ct");
};

2
src/emu/bus/isa/side116.h
View File

@ -26,7 +26,7 @@
// ======================> side116_device
class side116_device : public device_t,
public device_isa8_card_interface
public device_isa8_card_interface
{
public:
// construction/destruction

2
src/emu/bus/megadrive/md_carts.c
View File

@ -1,6 +1,6 @@
/**********************************************************************
Megadrive carts
Megadrive carts
**********************************************************************/

8
src/emu/bus/nes/act53.c
View File

@ -106,9 +106,9 @@ void nes_action53_device::pcb_reset()
void nes_action53_device::update_prg()
{
UINT8 prg_lo = 0, prg_hi = 0, helper = 0;
UINT8 out = (m_reg[3] & 0x3f) << 1; // Outer PRG reg
UINT8 size = (m_reg[2] & 0x30) >> 4; // Game size
UINT8 mask = (1 << (size + 1)) - 1; // Bits to be taken from PRG reg
UINT8 out = (m_reg[3] & 0x3f) << 1; // Outer PRG reg
UINT8 size = (m_reg[2] & 0x30) >> 4; // Game size
UINT8 mask = (1 << (size + 1)) - 1; // Bits to be taken from PRG reg
if (!BIT(m_reg[2], 3))
{
@ -134,7 +134,7 @@ void nes_action53_device::update_prg()
}
}
// printf("banks : 0x%2X - 0x%2X\n", prg_lo, prg_hi);
// printf("banks : 0x%2X - 0x%2X\n", prg_lo, prg_hi);
prg16_89ab(prg_lo);
prg16_cdef(prg_hi);
}

12
src/emu/bus/nes/aladdin.c
View File

@ -31,7 +31,7 @@
//----------------------------------
//
// Aladdin Cartslot implementation
// Aladdin Cartslot implementation
//
//----------------------------------
@ -155,8 +155,8 @@ void nes_aladdin_slot_device::get_default_card_software(astring &result)
mapper = (rom[6] & 0xf0) >> 4;
mapper |= rom[7] & 0xf0;
// if (mapper == 71)
// slot_string = "algn";
// if (mapper == 71)
// slot_string = "algn";
if (mapper == 232)
slot_string = "algq";
@ -171,7 +171,7 @@ void nes_aladdin_slot_device::get_default_card_software(astring &result)
//----------------------------------
//
// Aladdin Minicart implementation
// Aladdin Minicart implementation
//
//----------------------------------
@ -262,7 +262,7 @@ void nes_algq_rom_device::write_prg(UINT32 offset, UINT8 data)
//-----------------------------------------------
//
// Camerica/Codemasters Aladdin passthru
// Camerica/Codemasters Aladdin passthru
// implementation
//
//-----------------------------------------------
@ -310,7 +310,7 @@ READ8_MEMBER(nes_aladdin_device::read_h)
if (m_subslot->m_cart)
return m_subslot->m_cart->read(space, offset, mem_mask);
else // this is "fake" in the sense that we fill CPU space with 0xff if no Aladdin cart is loaded
else // this is "fake" in the sense that we fill CPU space with 0xff if no Aladdin cart is loaded
return hi_access_rom(offset);
}

6
src/emu/bus/nes/aladdin.h
View File

@ -6,7 +6,7 @@
//----------------------------------
//
// Aladdin Cartslot implementation
// Aladdin Cartslot implementation
//
//----------------------------------
@ -82,7 +82,7 @@ extern const device_type NES_ALADDIN_SLOT;
//----------------------------------
//
// Aladdin Minicart implementation
// Aladdin Minicart implementation
//
//----------------------------------
@ -134,7 +134,7 @@ extern const device_type NES_ALGQ_ROM;
//-----------------------------------------------
//
// Codemasters Aladdin passthru implementation
// Codemasters Aladdin passthru implementation
//
//-----------------------------------------------

8
src/emu/bus/nes/datach.c
View File

@ -35,7 +35,7 @@
//--------------------------------
//
// Datach Cartslot implementation
// Datach Cartslot implementation
//
//--------------------------------
@ -153,7 +153,7 @@ void nes_datach_slot_device::get_default_card_software(astring &result)
//--------------------------------
//
// Datach Minicart implementation
// Datach Minicart implementation
//
// Two kinds of PCB exist
// * ROM only, used by most games
@ -221,7 +221,7 @@ machine_config_constructor nes_datach_24c01_device::device_mconfig_additions() c
//---------------------------------
//
// Datach Base Unit implementation
// Datach Base Unit implementation
//
//---------------------------------
@ -318,7 +318,7 @@ READ8_MEMBER(nes_datach_device::read_h)
if (m_subslot->m_cart)
return m_subslot->m_cart->read(space, offset, mem_mask);
else // this is "fake" in the sense that we fill CPU space with 0xff if no Datach cart is loaded
else // this is "fake" in the sense that we fill CPU space with 0xff if no Datach cart is loaded
return hi_access_rom(offset);
}

6
src/emu/bus/nes/datach.h
View File

@ -7,7 +7,7 @@
//--------------------------------
//
// Datach Cartslot implementation
// Datach Cartslot implementation
//
//--------------------------------
@ -84,7 +84,7 @@ extern const device_type NES_DATACH_SLOT;
//--------------------------------
//
// Datach Minicart implementation
// Datach Minicart implementation
//
//--------------------------------
@ -127,7 +127,7 @@ extern const device_type NES_DATACH_24C01;
//---------------------------------
//
// Datach Base Unit implementation
// Datach Base Unit implementation
//
//---------------------------------

2
src/emu/bus/nes/jy.h
View File

@ -39,7 +39,7 @@ protected:
UINT8 m_mul[2];
UINT8 m_latch;
UINT8 m_reg[4];
UINT8 m_chr_latch[2]; // type C uses a more complex CHR 4K mode, and these vars are only changed for those games
UINT8 m_chr_latch[2]; // type C uses a more complex CHR 4K mode, and these vars are only changed for those games
UINT8 m_mmc_prg_bank[4];
UINT16 m_mmc_nt_bank[4];
UINT16 m_mmc_vrom_bank[8];

9
src/emu/bus/nes/karastudio.c
View File

@ -43,7 +43,7 @@
//-----------------------------------------
//
// Karaoke Studio Cartslot implementation
// Karaoke Studio Cartslot implementation
//
//-----------------------------------------
@ -141,7 +141,7 @@ void nes_kstudio_slot_device::get_default_card_software(astring &result)
//-----------------------------------------------
//
// Karaoke Studio Expansion cart implementation
// Karaoke Studio Expansion cart implementation
//
//-----------------------------------------------
@ -181,7 +181,7 @@ UINT8 *nes_kstudio_rom_device::get_cart_base()
//------------------------------------------
//
// Karaoke Studio Base Cart implementation
// Karaoke Studio Base Cart implementation
//
//------------------------------------------
@ -268,7 +268,7 @@ WRITE8_MEMBER(nes_karaokestudio_device::write_h)
m_exp_active = 0;
prg16_89ab(data & 7);
}
else // expansion cart
else // expansion cart
{
m_exp_active = 1;
m_subslot->write_prg_bank(data & 7);
@ -308,4 +308,3 @@ machine_config_constructor nes_karaokestudio_device::device_mconfig_additions()
{
return MACHINE_CONFIG_NAME( karaoke_studio );
}

6
src/emu/bus/nes/karastudio.h
View File

@ -6,7 +6,7 @@
//-----------------------------------------
//
// Karaoke Studio Cartslot implementation
// Karaoke Studio Cartslot implementation
//
//-----------------------------------------
@ -81,7 +81,7 @@ MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, NULL, false)
//-----------------------------------------------
//
// Karaoke Studio Expansion cart implementation
// Karaoke Studio Expansion cart implementation
//
//-----------------------------------------------
@ -110,7 +110,7 @@ extern const device_type NES_KSEXPANSION_ROM;
//-------------------------------------------
//
// Karaoke Studio Base Cart implementation
// Karaoke Studio Base Cart implementation
//
//-------------------------------------------

10
src/emu/bus/nes/mmc5.c
View File

@ -338,7 +338,7 @@ READ8_MEMBER(nes_exrom_device::nt_r)
{
if ((offset & 0x3ff) >= 0x3c0)
return m_mmc5_attrib[(m_exram[offset & 0x3ff] >> 6) & 0x03];
else // in this case, we write Ex1 CHR bank, but then access NT normally!
else // in this case, we write Ex1 CHR bank, but then access NT normally!
{
m_ex1_chr = 1;
m_ex1_bank = (m_exram[offset & 0x3ff] & 0x3f) | (m_high_chr << 6);
@ -444,7 +444,7 @@ READ8_MEMBER(nes_exrom_device::read_l)
if ((offset >= 0x1c00) && (offset <= 0x1fff))
{
// EXRAM
if (BIT(m_exram_control, 1)) // Modes 2,3 = read
if (BIT(m_exram_control, 1)) // Modes 2,3 = read
return m_exram[offset - 0x1c00];
else
return m_open_bus; // Modes 0,1 = open bus
@ -486,9 +486,9 @@ WRITE8_MEMBER(nes_exrom_device::write_l)
if ((offset >= 0x1c00) && (offset <= 0x1fff))
{
// EXRAM
if (m_exram_control == 0x02) // Mode 2 = write data
if (m_exram_control == 0x02) // Mode 2 = write data
m_exram[offset - 0x1c00] = data;
else if (m_exram_control != 0x03) // Modes 0,1 = write data in frame / write 0 otherwise
else if (m_exram_control != 0x03) // Modes 0,1 = write data in frame / write 0 otherwise
{
if (m_irq_status & 0x40)
m_exram[offset - 0x1c00] = data;
@ -554,7 +554,7 @@ WRITE8_MEMBER(nes_exrom_device::write_l)
case 0x1116:
case 0x1117:
m_prg_regs[offset & 3] = data & 0x7f;
m_prg_ram_mapped[offset & 3] = !BIT(data, 7); // m_prg_ram_mapped[3] is not used, in fact!
m_prg_ram_mapped[offset & 3] = !BIT(data, 7); // m_prg_ram_mapped[3] is not used, in fact!
update_prg();
break;

3
src/emu/bus/nes/nes_carts.c
View File

@ -127,7 +127,7 @@ SLOT_INTERFACE_START(nes_cart)
SLOT_INTERFACE_INTERNAL("bf9093", NES_BF9093)
SLOT_INTERFACE_INTERNAL("bf9096", NES_BF9096)
SLOT_INTERFACE_INTERNAL("goldenfive", NES_GOLDEN5)
SLOT_INTERFACE_INTERNAL("ade", NES_ALADDIN)
SLOT_INTERFACE_INTERNAL("ade", NES_ALADDIN)
SLOT_INTERFACE_INTERNAL("cne_decathl", NES_CNE_DECATHL)
SLOT_INTERFACE_INTERNAL("cne_fsb", NES_CNE_FSB)
SLOT_INTERFACE_INTERNAL("cne_shlz", NES_CNE_SHLZ)
@ -354,4 +354,3 @@ SLOT_INTERFACE_INTERNAL("test", NES_NROM)
//
SLOT_INTERFACE_INTERNAL("unknown", NES_NROM) // a few pirate dumps uses the wrong mapper...
SLOT_INTERFACE_END

14
src/emu/bus/nes/nes_ines.inc
View File

@ -56,8 +56,8 @@ static const nes_mmc mmc_list[] =
{ 24, KONAMI_VRC6 },
{ 25, KONAMI_VRC4 },
{ 26, KONAMI_VRC6 },
{ 27, UNL_WORLDHERO }, // 27 World Hero board - Unsupported
{ 28, BTL_ACTION53 }, // 28 - Multi-discrete PCB designed by Tepples for Action 53
{ 27, UNL_WORLDHERO }, // 27 World Hero board - Unsupported
{ 28, BTL_ACTION53 }, // 28 - Multi-discrete PCB designed by Tepples for Action 53
// 29 Unused
// 30 Unused
// 31 Unused
@ -132,7 +132,7 @@ static const nes_mmc mmc_list[] =
// 100 images hacked to work with nesticle?
// 101 Unused (Urusei Yatsura had been assigned to this mapper, but it's Mapper 87)
// 102 Unused
{ 103, UNL_2708 }, // 103 Bootleg cart 2708 (Doki Doki Panic - FDS Conversion) - Unsupported
{ 103, UNL_2708 }, // 103 Bootleg cart 2708 (Doki Doki Panic - FDS Conversion) - Unsupported
{ 104, CAMERICA_GOLDENFIVE },
{ 105, STD_EVENT },
{ 106, BTL_SMB3 },
@ -191,7 +191,7 @@ static const nes_mmc mmc_list[] =
{ 159, BANDAI_LZ93EX1 }, // with 24c01
{ 160, SACHEN_SA009 },
// 161 Unused
{ 162, WAIXING_FS304}, // not confirmed, but a lot of chinese releases use it like this...
{ 162, WAIXING_FS304}, // not confirmed, but a lot of chinese releases use it like this...
{ 163, NANJING_BOARD},
{ 164, WAIXING_FFV },
{ 165, WAIXING_SH2 },
@ -264,7 +264,7 @@ static const nes_mmc mmc_list[] =
{ 232, CAMERICA_BF9096 },
{ 233, BMC_SUPER22 },
{ 234, AVE_MAXI15 },
{ 235, BMC_GOLD150 }, // 235 Golden Game x-in-1 - Unsupported
{ 235, BMC_GOLD150 }, // 235 Golden Game x-in-1 - Unsupported
// 236 Game 800-in-1 - Unsupported
// 237 Unused
{ 238, UNL_603_5052 },
@ -525,7 +525,7 @@ void nes_cart_slot_device::call_load_ines()
switch (m_pcb_id)
{
case STD_NROM:
if (prg_size == 3 * 0x4000) // NROM368 are padded with 2k empty data at start to accomplish with iNES standard
if (prg_size == 3 * 0x4000) // NROM368 are padded with 2k empty data at start to accomplish with iNES standard
{
m_pcb_id = STD_NROM368;
fseek(0x810, SEEK_SET);
@ -834,7 +834,7 @@ const char * nes_cart_slot_device::get_default_card_ines(UINT8 *ROM, UINT32 len)
}
// use info from nes.hsi if available!
// if (hashfile_extrainfo(*this, mapinfo))
// if (hashfile_extrainfo(*this, mapinfo))
if (0)
{
if (4 == sscanf(mapinfo,"%d %d %d %d", &mapint1, &mapint2, &mapint3, &mapint4))

4
src/emu/bus/nes/nes_slot.h
View File

@ -119,8 +119,8 @@ enum
WAIXING_DQ8, WAIXING_FFV, WAIXING_WXZS2, SUPERGAME_LIONKING, SUPERGAME_BOOGERMAN,
KAY_BOARD, HOSENKAN_BOARD, NITRA_TDA, GOUDER_37017, NANJING_BOARD,
WHIRLWIND_2706,
NOCASH_NOCHR, // homebrew PCB design which uses NTRAM for CHRRAM
BTL_ACTION53, // homebrew PCB for homebrew multicarts
NOCASH_NOCHR, // homebrew PCB design which uses NTRAM for CHRRAM
BTL_ACTION53, // homebrew PCB for homebrew multicarts
/* FFE boards, for mappers 6, 8, 17 */
FFE3_BOARD, FFE4_BOARD, FFE8_BOARD, TEST_BOARD,
/* Unsupported (for place-holder boards, with no working emulation) & no-board (at init) */

4
src/emu/bus/nes/nxrom.c
View File

@ -569,7 +569,7 @@ WRITE8_MEMBER(nes_nochr_device::chr_w)
else if (mirr == PPU_MIRROR_LOW)
m_ciram[(offset & 0x3ff) + 0x400] = data;
else
m_ciram[offset & 0x7ff] = data; // not sure here, since there is no software to test...
m_ciram[offset & 0x7ff] = data; // not sure here, since there is no software to test...
}
READ8_MEMBER(nes_nochr_device::chr_r)
@ -580,5 +580,5 @@ READ8_MEMBER(nes_nochr_device::chr_r)
else if (mirr == PPU_MIRROR_LOW)
return m_ciram[(offset & 0x3ff) + 0x400];
else
return m_ciram[offset & 0x7ff]; // not sure here, since there is no software to test...
return m_ciram[offset & 0x7ff]; // not sure here, since there is no software to test...
}

6
src/emu/bus/nes/sunsoft_dcs.c
View File

@ -27,7 +27,7 @@
//-----------------------------------------------
//
// Nantettate!! Baseball Cartslot implementation
// Nantettate!! Baseball Cartslot implementation
//
//-----------------------------------------------
@ -119,7 +119,7 @@ void nes_ntb_slot_device::get_default_card_software(astring &result)
//-----------------------------------------------
//
// Nantettate!! Baseball Minicart implementation
// Nantettate!! Baseball Minicart implementation
//
//-----------------------------------------------
@ -154,7 +154,7 @@ UINT8 *nes_ntb_rom_device::get_cart_base()
//------------------------------------------------
//
// Nantettate!! Baseball base cart implementation
// Nantettate!! Baseball base cart implementation
// a.k.a. Sunsoft Dual Cassette System
// (variant of Sunsoft-4 PCB)
//

6
src/emu/bus/nes/sunsoft_dcs.h
View File

@ -6,7 +6,7 @@
//-----------------------------------------------
//
// Nantettate!! Baseball Cartslot implementation
// Nantettate!! Baseball Cartslot implementation
//
//-----------------------------------------------
@ -77,7 +77,7 @@ extern const device_type NES_NTB_SLOT;
//-----------------------------------------------
//
// Nantettate!! Baseball Minicart implementation
// Nantettate!! Baseball Minicart implementation
//
//-----------------------------------------------
@ -106,7 +106,7 @@ extern const device_type NES_NTB_ROM;
//------------------------------------------------
//
// Nantettate!! Baseball base cart implementation
// Nantettate!! Baseball base cart implementation
// a.k.a. Sunsoft Dual Cassette System
// (variant of Sunsoft-4 PCB)
//

2
src/emu/bus/plus4/c1551.c
View File

@ -355,7 +355,7 @@ ADDRESS_MAP_END
//-------------------------------------------------
static SLOT_INTERFACE_START( c1551_floppies )
SLOT_INTERFACE( "525ssqd", FLOPPY_525_SSQD )
SLOT_INTERFACE( "525ssqd", FLOPPY_525_SSQD )
SLOT_INTERFACE_END

2
src/emu/bus/plus4/c1551.h
View File

@ -30,7 +30,7 @@
// ======================> c1551_device
class c1551_device : public device_t,
public device_plus4_expansion_card_interface
public device_plus4_expansion_card_interface
{
public:
// construction/destruction

4
src/emu/bus/vidbrain/exp.h
View File

@ -108,8 +108,8 @@ protected:
// ======================> videobrain_expansion_slot_device
class videobrain_expansion_slot_device : public device_t,
public device_slot_interface,
public device_image_interface
public device_slot_interface,
public device_image_interface
{
public:
// construction/destruction

2
src/emu/bus/wangpc/wangpc.h
View File

@ -82,7 +82,7 @@
class wangpcbus_device;
class wangpcbus_slot_device : public device_t,
public device_slot_interface
public device_slot_interface
{
public:
// construction/destruction

2
src/emu/clifront.h
View File

@ -114,7 +114,7 @@ private:
cli_options & m_options;
osd_interface & m_osd;
int m_result;
UINT64 m_start_memory;
UINT64 m_start_memory;
};

814
src/emu/cpu/avr8/avr8.c
View File

File diff suppressed because it is too large Load Diff

294
src/emu/cpu/avr8/avr8.h
View File

@ -90,7 +90,7 @@ public:
// inline configuration helpers
static void static_set_config(device_t &device, const avr8_config &config);
// fuse configs
// fuse configs
void set_low_fuses(UINT8 byte);
void set_high_fuses(UINT8 byte);
void set_extended_fuses(UINT8 byte);
@ -147,15 +147,15 @@ protected:
const address_space_config m_io_config;
UINT8 *m_eeprom;
// bootloader
// bootloader
UINT16 m_boot_size;
UINT8 m_cpu_type;
// Fuses
UINT8 m_lfuses;
UINT8 m_hfuses;
UINT8 m_efuses;
UINT8 m_lock_bits;
// Fuses
UINT8 m_lfuses;
UINT8 m_hfuses;
UINT8 m_efuses;
UINT8 m_lock_bits;
// CPU registers
UINT32 m_pc;
@ -241,8 +241,8 @@ protected:
void changed_tccr3a(UINT8 data);
void changed_tccr3b(UINT8 data);
void changed_tccr3c(UINT8 data);
// void update_ocr3(UINT8 newval, UINT8 reg);
// void timer3_force_output_compare(int reg);
// void update_ocr3(UINT8 newval, UINT8 reg);
// void timer3_force_output_compare(int reg);
// timer 4
void timer4_tick();
@ -256,8 +256,8 @@ protected:
void timer5_tick();
void changed_tccr5a(UINT8 data);
void changed_tccr5b(UINT8 data);
// void update_ocr5(UINT8 newval, UINT8 reg);
// void timer5_force_output_compare(int reg);
// void update_ocr5(UINT8 newval, UINT8 reg);
// void timer5_force_output_compare(int reg);
// address spaces
address_space *m_program;
@ -496,24 +496,24 @@ enum
AVR8_REGIDX_TCNT0,
AVR8_REGIDX_OCR0A,
AVR8_REGIDX_OCR0B,
//0x49: Reserved
//0x49: Reserved
AVR8_REGIDX_GPIOR1 = 0x4A,
AVR8_REGIDX_GPIOR2,
AVR8_REGIDX_SPCR,
AVR8_REGIDX_SPSR,
AVR8_REGIDX_SPDR,
//0x4F: Reserved
//0x4F: Reserved
AVR8_REGIDX_ACSR = 0x50,
AVR8_REGIDX_OCDR,
//0x52: Reserved
//0x52: Reserved
AVR8_REGIDX_SMCR = 0x53,
AVR8_REGIDX_MCUSR,
AVR8_REGIDX_MCUCR,
//0x56: Reserved
//0x56: Reserved
AVR8_REGIDX_SPMCSR = 0x57,
//0x58: Reserved
//0x59: Reserved
//0x5A: Reserved
//0x58: Reserved
//0x59: Reserved
//0x5A: Reserved
AVR8_REGIDX_RAMPZ = 0x5B,
AVR8_REGIDX_EIND,
AVR8_REGIDX_SPL,
@ -522,12 +522,12 @@ enum
//--------------------------
AVR8_REGIDX_WDTCSR = 0x60,
AVR8_REGIDX_CLKPR,
//0x62: Reserved
//0x63: Reserved
//0x62: Reserved
//0x63: Reserved
AVR8_REGIDX_PRR0 = 0x64,
AVR8_REGIDX_PRR1,
AVR8_REGIDX_OSCCAL,
//0x67: Reserved
//0x67: Reserved
AVR8_REGIDX_PCICR = 0x68,
AVR8_REGIDX_EICRA,
AVR8_REGIDX_EICRB,
@ -542,8 +542,8 @@ enum
AVR8_REGIDX_TIMSK5,
AVR8_REGIDX_XMCRA,
AVR8_REGIDX_XMCRB,
//0x76: Reserved
//0x77: Reserved
//0x76: Reserved
//0x77: Reserved
AVR8_REGIDX_ADCL = 0x78,
AVR8_REGIDX_ADCH,
AVR8_REGIDX_ADCSRA,
@ -555,7 +555,7 @@ enum
AVR8_REGIDX_TCCR1A,
AVR8_REGIDX_TCCR1B,
AVR8_REGIDX_TCCR1C,
//0x83: Reserved
//0x83: Reserved
AVR8_REGIDX_TCNT1L = 0x84,
AVR8_REGIDX_TCNT1H,
AVR8_REGIDX_ICR1L,
@ -566,12 +566,12 @@ enum
AVR8_REGIDX_OCR1BH,
AVR8_REGIDX_OCR1CL,
AVR8_REGIDX_OCR1CH,
//0x8E: Reserved
//0x8F: Reserved
//0x8E: Reserved
//0x8F: Reserved
AVR8_REGIDX_TCCR3A = 0x90,
AVR8_REGIDX_TCCR3B,
AVR8_REGIDX_TCCR3C,
//0x93: Reserved
//0x93: Reserved
AVR8_REGIDX_TCNT3L = 0x94,
AVR8_REGIDX_TCNT3H,
AVR8_REGIDX_ICR3L,
@ -582,12 +582,12 @@ enum
AVR8_REGIDX_OCR3BH,
AVR8_REGIDX_OCR3CL,
AVR8_REGIDX_OCR3CH,
//0x9E: Reserved
//0x9F: Reserved
//0x9E: Reserved
//0x9F: Reserved
AVR8_REGIDX_TCCR4A = 0xA0,
AVR8_REGIDX_TCCR4B,
AVR8_REGIDX_TCCR4C,
//0xA3: Reserved
//0xA3: Reserved
AVR8_REGIDX_TCNT4L = 0xA4,
AVR8_REGIDX_TCNT4H,
AVR8_REGIDX_ICR4L,
@ -598,88 +598,88 @@ enum
AVR8_REGIDX_OCR4BH,
AVR8_REGIDX_OCR4CL,
AVR8_REGIDX_OCR4CH,
//0xAE: Reserved
//0xAF: Reserved
//0xAE: Reserved
//0xAF: Reserved
AVR8_REGIDX_TCCR2A = 0xB0,
AVR8_REGIDX_TCCR2B,
AVR8_REGIDX_TCNT2,
AVR8_REGIDX_OCR2A,
AVR8_REGIDX_OCR2B,
//0xB5: Reserved
//0xB5: Reserved
AVR8_REGIDX_ASSR = 0xB6,
//0xB7: Reserved
//0xB7: Reserved
AVR8_REGIDX_TWBR = 0xB8,
AVR8_REGIDX_TWSR,
AVR8_REGIDX_TWAR,
AVR8_REGIDX_TWDR,
AVR8_REGIDX_TWCR,
AVR8_REGIDX_TWAMR,
//0xBE: Reserved
//0xBF: Reserved
//0xBE: Reserved
//0xBF: Reserved
AVR8_REGIDX_UCSR0A = 0xC0,
AVR8_REGIDX_UCSR0B,
AVR8_REGIDX_UCSR0C,
//0xC3: Reserved
//0xC3: Reserved
AVR8_REGIDX_UBRR0L = 0xC4,
AVR8_REGIDX_UBRR0H,
AVR8_REGIDX_UDR0,
//0xC7: Reserved
//0xC7: Reserved
AVR8_REGIDX_UCSR1A = 0xC8,
AVR8_REGIDX_UCSR1B,
AVR8_REGIDX_UCSR1C,
//0xCB: Reserved
//0xCB: Reserved
AVR8_REGIDX_UBRR1L = 0xCC,
AVR8_REGIDX_UBRR1H,
AVR8_REGIDX_UDR1,
//0xCF: Reserved
//0xCF: Reserved
AVR8_REGIDX_UCSR2A = 0xD0,
AVR8_REGIDX_UCSR2B,
AVR8_REGIDX_UCSR2C,
//0xD3: Reserved
//0xD3: Reserved
AVR8_REGIDX_UBRR2L = 0xD4,
AVR8_REGIDX_UBRR2H,
AVR8_REGIDX_UDR2,
//0xD7: Reserved
//0xD8: Reserved
//0xD9: Reserved
//0xDA: Reserved
//0xDB: Reserved
//0xDC: Reserved
//0xDD: Reserved
//0xDE: Reserved
//0xDF: Reserved
//0xE0: Reserved
//0xE1: Reserved
//0xE2: Reserved
//0xE3: Reserved
//0xE4: Reserved
//0xE5: Reserved
//0xE6: Reserved
//0xE7: Reserved
//0xE8: Reserved
//0xE9: Reserved
//0xEA: Reserved
//0xEB: Reserved
//0xEC: Reserved
//0xED: Reserved
//0xEE: Reserved
//0xEF: Reserved
//0xF0: Reserved
//0xF1: Reserved
//0xF2: Reserved
//0xF3: Reserved
//0xF4: Reserved
//0xF5: Reserved
//0xF6: Reserved
//0xF7: Reserved
//0xF8: Reserved
//0xF9: Reserved
//0xFA: Reserved
//0xFB: Reserved
//0xFC: Reserved
//0xFD: Reserved
//0xFE: Reserved
//0xFF: Reserved
//0xD7: Reserved
//0xD8: Reserved
//0xD9: Reserved
//0xDA: Reserved
//0xDB: Reserved
//0xDC: Reserved
//0xDD: Reserved
//0xDE: Reserved
//0xDF: Reserved
//0xE0: Reserved
//0xE1: Reserved
//0xE2: Reserved
//0xE3: Reserved
//0xE4: Reserved
//0xE5: Reserved
//0xE6: Reserved
//0xE7: Reserved
//0xE8: Reserved
//0xE9: Reserved
//0xEA: Reserved
//0xEB: Reserved
//0xEC: Reserved
//0xED: Reserved
//0xEE: Reserved
//0xEF: Reserved
//0xF0: Reserved
//0xF1: Reserved
//0xF2: Reserved
//0xF3: Reserved
//0xF4: Reserved
//0xF5: Reserved
//0xF6: Reserved
//0xF7: Reserved
//0xF8: Reserved
//0xF9: Reserved
//0xFA: Reserved
//0xFB: Reserved
//0xFC: Reserved
//0xFD: Reserved
//0xFE: Reserved
//0xFF: Reserved
AVR8_REGIDX_PINH = 0x100,
AVR8_REGIDX_DDRH,
AVR8_REGIDX_PORTH,
@ -692,30 +692,30 @@ enum
AVR8_REGIDX_PINL,
AVR8_REGIDX_DDRL,
AVR8_REGIDX_PORTL,
//0x10C: Reserved
//0x10D: Reserved
//0x10E: Reserved
//0x10F: Reserved
//0x110: Reserved
//0x111: Reserved
//0x112: Reserved
//0x113: Reserved
//0x114: Reserved
//0x115: Reserved
//0x116: Reserved
//0x117: Reserved
//0x118: Reserved
//0x119: Reserved
//0x11A: Reserved
//0x11B: Reserved
//0x11C: Reserved
//0x11D: Reserved
//0x11E: Reserved
//0x11F: Reserved
//0x10C: Reserved
//0x10D: Reserved
//0x10E: Reserved
//0x10F: Reserved
//0x110: Reserved
//0x111: Reserved
//0x112: Reserved
//0x113: Reserved
//0x114: Reserved
//0x115: Reserved
//0x116: Reserved
//0x117: Reserved
//0x118: Reserved
//0x119: Reserved
//0x11A: Reserved
//0x11B: Reserved
//0x11C: Reserved
//0x11D: Reserved
//0x11E: Reserved
//0x11F: Reserved
AVR8_REGIDX_TCCR5A,
AVR8_REGIDX_TCCR5B,
AVR8_REGIDX_TCCR5C,
//0x123: Reserved
//0x123: Reserved
AVR8_REGIDX_TCNT5L,
AVR8_REGIDX_TCNT5H,
AVR8_REGIDX_ICR5L,
@ -726,34 +726,34 @@ enum
AVR8_REGIDX_OCR5BH,
AVR8_REGIDX_OCR5CL,
AVR8_REGIDX_OCR5CH,
//0x12E: Reserved
//0x12F: Reserved
//0x12E: Reserved
//0x12F: Reserved
AVR8_REGIDX_UCSR3A,
AVR8_REGIDX_UCSR3B,
AVR8_REGIDX_UCSR3C,
//0x133: Reserved
//0x133: Reserved
AVR8_REGIDX_UBRR3L,
AVR8_REGIDX_UBRR3H,
AVR8_REGIDX_UDR3,
//0x137: Reserved
// .
// . up to
// .
//0x1FF: Reserved
//0x137: Reserved
// .
// . up to
// .
//0x1FF: Reserved
};
enum {
AVR8_IO_PORTA = 0,
AVR8_IO_PORTB,
AVR8_IO_PORTC,
AVR8_IO_PORTD,
AVR8_IO_PORTE,
AVR8_IO_PORTF,
AVR8_IO_PORTG,
AVR8_IO_PORTH,
AVR8_IO_PORTJ,
AVR8_IO_PORTK,
AVR8_IO_PORTL
AVR8_IO_PORTA = 0,
AVR8_IO_PORTB,
AVR8_IO_PORTC,
AVR8_IO_PORTD,
AVR8_IO_PORTE,
AVR8_IO_PORTF,
AVR8_IO_PORTG,
AVR8_IO_PORTH,
AVR8_IO_PORTJ,
AVR8_IO_PORTK,
AVR8_IO_PORTL
};
//TODO: AVR8_REG_* and AVR8_IO_PORT* seem to serve the same purpose and thus should be unified. Verify this!
@ -810,46 +810,46 @@ enum
//lock bit masks
enum
{
LB1 = (1 << 0),
LB2 = (1 << 1),
BLB01 = (1 << 2),
BLB02 = (1 << 3),
BLB11 = (1 << 4),
BLB12 = (1 << 5),
LB1 = (1 << 0),
LB2 = (1 << 1),
BLB01 = (1 << 2),
BLB02 = (1 << 3),
BLB11 = (1 << 4),
BLB12 = (1 << 5),
};
//extended fuses bit masks
enum
{
BODLEVEL0 = (1 << 0),
BODLEVEL1 = (1 << 1),
BODLEVEL2 = (1 << 2),
BODLEVEL0 = (1 << 0),
BODLEVEL1 = (1 << 1),
BODLEVEL2 = (1 << 2),
};
//high fuses bit masks
enum
{
BOOTRST = (1 << 0),
BOOTSZ0 = (1 << 1),
BOOTSZ1 = (1 << 2),
EESAVE = (1 << 3),
WDTON = (1 << 4),
SPIEN = (1 << 5),
JTAGEN = (1 << 6),
OCDEN = (1 << 7),
BOOTRST = (1 << 0),
BOOTSZ0 = (1 << 1),
BOOTSZ1 = (1 << 2),
EESAVE = (1 << 3),
WDTON = (1 << 4),
SPIEN = (1 << 5),
JTAGEN = (1 << 6),
OCDEN = (1 << 7),
};
//low fuses bit masks
enum
{
CKSEL0 = (1 << 0),
CKSEL1 = (1 << 1),
CKSEL2 = (1 << 2),
CKSEL3 = (1 << 3),
SUT0 = (1 << 4),
SUT1 = (1 << 5),
CKOUT = (1 << 6),
CKDIV8 = (1 << 7),
CKSEL0 = (1 << 0),
CKSEL1 = (1 << 1),
CKSEL2 = (1 << 2),
CKSEL3 = (1 << 3),
SUT0 = (1 << 4),
SUT1 = (1 << 5),
CKOUT = (1 << 6),
CKDIV8 = (1 << 7),
};
#define AVR8_EEARH_MASK 0x01

186
src/emu/cpu/avr8/avr8dasm.c
View File

@ -30,73 +30,73 @@ CPU_DISASSEMBLE( avr8 )
UINT32 op = oprom[pos++];
op |= oprom[pos++] << 8;
UINT32 addr = 0;
const char* register_names[0x40] = {"PINA", "DDRA", "PORTA", "PINB", "DDRB", "PORTB", "PINC", "DDRC", "PORTC", "PIND", "DDRD", "PORTD", "PINE", "DDRE", "PORTE", "PINF", "DDRF", "PORTF", "PING", "DDRG", "PORTG", "TIFR0", "TIFR1", "TIFR2","TIFR3", "TIFR4", "TIFR5", "PCIFR", "EIFR", "EIMSK", "GPIOR0", "EECR", "EEDR", "EEARL", "EEARH", "GTCCR", "TCCR0A", "TCCR0B", "TCNT0", "OCR0A", "OCR0B", "0x29", "GPIOR1", "GPIOR2", "SPCR", "SPSR", "SPDR", "0x2F", "ACSR", "OCDR", "0x32", "SMCR", "MCUSR", "MCUCR", "0x36", "SPMCSR", "0x38", "0x39", "0x3A", "RAMPZ", "EIND", "SPL", "SPH", "SREG"};
const char* register_names[0x40] = {"PINA", "DDRA", "PORTA", "PINB", "DDRB", "PORTB", "PINC", "DDRC", "PORTC", "PIND", "DDRD", "PORTD", "PINE", "DDRE", "PORTE", "PINF", "DDRF", "PORTF", "PING", "DDRG", "PORTG", "TIFR0", "TIFR1", "TIFR2","TIFR3", "TIFR4", "TIFR5", "PCIFR", "EIFR", "EIMSK", "GPIOR0", "EECR", "EEDR", "EEARL", "EEARH", "GTCCR", "TCCR0A", "TCCR0B", "TCNT0", "OCR0A", "OCR0B", "0x29", "GPIOR1", "GPIOR2", "SPCR", "SPSR", "SPDR", "0x2F", "ACSR", "OCDR", "0x32", "SMCR", "MCUSR", "MCUCR", "0x36", "SPMCSR", "0x38", "0x39", "0x3A", "RAMPZ", "EIND", "SPL", "SPH", "SREG"};
const char* register_bit_names[0x40][8] = {
/* PINA */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRA */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTA */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PINB */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRB */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTB */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PINC */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRC */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTC */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PIND */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRD */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTD */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PINE */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRE */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTE */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PINF */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRF */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTF */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PING */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRG */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTG */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* TIFR0 */ { "TOV0", "OCF0A", "OCF0B", "3", "4", "5", "6", "7"},
/* TIFR1 */ { "TOV1", "OCF1A", "OCF1B", "OCF1C", "4", "ICF1", "6", "7"},
/* TIFR2 */ { "TOV2", "OCF2A", "OCF2B", "3", "4", "5", "6", "7"},
/* TIFR3 */ { "TOV3", "OCF3A", "OCF3B", "OCF3C", "4", "ICF3", "6", "7"},
/* TIFR4 */ { "TOV4", "OCF4A", "OCF4B", "OCF4C", "4", "ICF4", "6", "7"},
/* TIFR5 */ { "TOV5", "OCF5A", "OCF5B", "OCF5C", "4", "ICF5", "6", "7"},
/* PCIFR */ {"PCIF0", "PCIF1", "PCIF2", "3", "4", "5", "6", "7"},
/* EIFR */ {"INTF0", "INTF1", "INTF2", "INTF3", "INTF4", "INTF5", "INTF6", "INTF7"},
/* EIMSK */ { "INT0", "INT1", "INT2", "INT3", "INT4", "INT5", "INT6", "INT7"},
/* GPIOR0 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* EECR */ { "EERE", "EEPE", "EEMPE", "EERIE", "EEPM0", "EEPM1", "6", "7"},
/* EEDR */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* EEARL */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* EEARH */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* GTCCR */ {"PSRSYNC", "PSRASY", "2", "3", "4", "5", "6", "TSM"},
/* TCCR0A */ {"WGM00", "WGM01", "2", "3","COM0B0","COM0B1","COM0A0","COM0A1"},
/* TCCR0B */ { "CS0", "CS1", "CS2", "WGM02", "4", "5", "FOC0B", "FOC0A"},
/* TCNT0 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* OCR0A */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* OCR0B */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* 0x29 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* GPIOR1 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* GPIOR2 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* SPCR */ { "SPR0", "SPR1", "CPHA", "CPOL", "MSTR", "DORD", "SPE", "SPIE"},
/* SPSR */ {"SPI2X", "1", "2", "3", "4", "5", "WCOL", "SPIF"},
/* SPDR */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* 0x2F */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* ACSR */ {"ACIS0", "ACIS1", "ACIC", "ACIE", "ACI", "ACO", "ACBG", "ACD"},
/* OCDR */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* 0x32 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* SMCR */ { "SE", "SM0", "SM1", "SM2", "4", "5", "6", "7"},
/* MCUSR */ { "PORF", "EXTRF", "BORF", "WDRF", "JTRF", "5", "6", "7"},
/* MCUCR */ { "IVCE", "IVSEL", "2", "3", "PUD", "5", "6", "JTD"},
/* 0x36 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* SPMCSR */ {"SPMEN", "PGERS", "PGWRT","BLBSET","RWWSRE", "SIGRD", "RWWSB", "SPMIE"},
/* 0x38 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* 0x39 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* 0x3A */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* RAMPZ */ {"RAMPZ0","RAMPZ1", "2", "3", "4", "5", "6", "7"},
/* EIND */ {"EIND0", "1", "2", "3", "4", "5", "6", "7"},
/* SPL */ { "SP0", "SP1", "SP2", "SP3", "SP4", "SP5", "SP6", "SP7"},
/* SPH */ { "SP8", "SP9", "SP10", "SP11", "SP12", "SP13", "SP14", "SP15"},
/* SREG */ { "C", "Z", "N", "V", "S", "H", "T", "I"}};
const char* register_bit_names[0x40][8] = {
/* PINA */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRA */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTA */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PINB */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRB */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTB */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PINC */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRC */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTC */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PIND */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRD */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTD */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PINE */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRE */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTE */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PINF */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRF */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTF */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PING */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRG */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTG */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* TIFR0 */ { "TOV0", "OCF0A", "OCF0B", "3", "4", "5", "6", "7"},
/* TIFR1 */ { "TOV1", "OCF1A", "OCF1B", "OCF1C", "4", "ICF1", "6", "7"},
/* TIFR2 */ { "TOV2", "OCF2A", "OCF2B", "3", "4", "5", "6", "7"},
/* TIFR3 */ { "TOV3", "OCF3A", "OCF3B", "OCF3C", "4", "ICF3", "6", "7"},
/* TIFR4 */ { "TOV4", "OCF4A", "OCF4B", "OCF4C", "4", "ICF4", "6", "7"},
/* TIFR5 */ { "TOV5", "OCF5A", "OCF5B", "OCF5C", "4", "ICF5", "6", "7"},
/* PCIFR */ {"PCIF0", "PCIF1", "PCIF2", "3", "4", "5", "6", "7"},
/* EIFR */ {"INTF0", "INTF1", "INTF2", "INTF3", "INTF4", "INTF5", "INTF6", "INTF7"},
/* EIMSK */ { "INT0", "INT1", "INT2", "INT3", "INT4", "INT5", "INT6", "INT7"},
/* GPIOR0 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* EECR */ { "EERE", "EEPE", "EEMPE", "EERIE", "EEPM0", "EEPM1", "6", "7"},
/* EEDR */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* EEARL */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* EEARH */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* GTCCR */ {"PSRSYNC", "PSRASY", "2", "3", "4", "5", "6", "TSM"},
/* TCCR0A */ {"WGM00", "WGM01", "2", "3","COM0B0","COM0B1","COM0A0","COM0A1"},
/* TCCR0B */ { "CS0", "CS1", "CS2", "WGM02", "4", "5", "FOC0B", "FOC0A"},
/* TCNT0 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* OCR0A */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* OCR0B */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* 0x29 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* GPIOR1 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* GPIOR2 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* SPCR */ { "SPR0", "SPR1", "CPHA", "CPOL", "MSTR", "DORD", "SPE", "SPIE"},
/* SPSR */ {"SPI2X", "1", "2", "3", "4", "5", "WCOL", "SPIF"},
/* SPDR */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* 0x2F */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* ACSR */ {"ACIS0", "ACIS1", "ACIC", "ACIE", "ACI", "ACO", "ACBG", "ACD"},
/* OCDR */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* 0x32 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* SMCR */ { "SE", "SM0", "SM1", "SM2", "4", "5", "6", "7"},
/* MCUSR */ { "PORF", "EXTRF", "BORF", "WDRF", "JTRF", "5", "6", "7"},
/* MCUCR */ { "IVCE", "IVSEL", "2", "3", "PUD", "5", "6", "JTD"},
/* 0x36 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* SPMCSR */ {"SPMEN", "PGERS", "PGWRT","BLBSET","RWWSRE", "SIGRD", "RWWSB", "SPMIE"},
/* 0x38 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* 0x39 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* 0x3A */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* RAMPZ */ {"RAMPZ0","RAMPZ1", "2", "3", "4", "5", "6", "7"},
/* EIND */ {"EIND0", "1", "2", "3", "4", "5", "6", "7"},
/* SPL */ { "SP0", "SP1", "SP2", "SP3", "SP4", "SP5", "SP6", "SP7"},
/* SPH */ { "SP8", "SP9", "SP10", "SP11", "SP12", "SP13", "SP14", "SP15"},
/* SREG */ { "C", "Z", "N", "V", "S", "H", "T", "I"}};
switch(op & 0xf000)
{
@ -524,28 +524,28 @@ CPU_DISASSEMBLE( avr8 )
output += sprintf( output, "SBIW R%d:R%d, 0x%02x", 24+(RD2(op) << 1)+1, 24+(RD2(op) << 1), KCONST6(op) );
break;
case 0x0800:
if (ACONST5(op) < 0x20)
output += sprintf( output, "CBI %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] );
else
output += sprintf( output, "CBI 0x%02x, %d", ACONST5(op), RR3(op) );
if (ACONST5(op) < 0x20)
output += sprintf( output, "CBI %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] );
else
output += sprintf( output, "CBI 0x%02x, %d", ACONST5(op), RR3(op) );
break;
case 0x0900:
if (ACONST5(op) < 0x20)
output += sprintf( output, "SBIC %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] );
else
output += sprintf( output, "SBIC 0x%02x, %d", ACONST5(op), RR3(op) );
if (ACONST5(op) < 0x20)
output += sprintf( output, "SBIC %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] );
else
output += sprintf( output, "SBIC 0x%02x, %d", ACONST5(op), RR3(op) );
break;
case 0x0a00:
if (ACONST5(op) < 0x20)
output += sprintf( output, "SBI %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] );
else
output += sprintf( output, "SBI 0x%02x, %d", ACONST5(op), RR3(op) );
if (ACONST5(op) < 0x20)
output += sprintf( output, "SBI %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] );
else
output += sprintf( output, "SBI 0x%02x, %d", ACONST5(op), RR3(op) );
break;
case 0x0b00:
if (ACONST5(op) < 0x20)
output += sprintf( output, "SBIS %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] );
else
output += sprintf( output, "SBIS 0x%02x, %d", ACONST5(op), RR3(op) );
if (ACONST5(op) < 0x20)
output += sprintf( output, "SBIS %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] );
else
output += sprintf( output, "SBIS 0x%02x, %d", ACONST5(op), RR3(op) );
break;
case 0x0c00:
case 0x0d00:
@ -558,23 +558,23 @@ CPU_DISASSEMBLE( avr8 )
case 0xb000:
if(op & 0x0800)
{
if (ACONST6(op) < 0x40 ) {
output += sprintf( output, "OUT %s, R%d", register_names[ACONST6(op)], RD5(op) );
} else {
output += sprintf( output, "OUT 0x%02x, R%d", ACONST6(op), RD5(op) );
}
if (ACONST6(op) < 0x40 ) {
output += sprintf( output, "OUT %s, R%d", register_names[ACONST6(op)], RD5(op) );
} else {
output += sprintf( output, "OUT 0x%02x, R%d", ACONST6(op), RD5(op) );
}
}
else
{
if (ACONST6(op) < 0x40 ) {
output += sprintf( output, "IN R%d, %s", RD5(op), register_names[ACONST6(op)] );
} else {
output += sprintf( output, "IN R%d, 0x%02x", RD5(op), ACONST6(op) );
}
if (ACONST6(op) < 0x40 ) {
output += sprintf( output, "IN R%d, %s", RD5(op), register_names[ACONST6(op)] );
} else {
output += sprintf( output, "IN R%d, 0x%02x", RD5(op), ACONST6(op) );
}
}
break;
case 0xc000:
//I'm not sure if this is correct. why pc + ... : pc + 8 + ... ?
//I'm not sure if this is correct. why pc + ... : pc + 8 + ... ?
output += sprintf( output, "RJMP %08x", (((op & 0x0800) ? pc + ((op & 0x0fff) | 0xfffff000) : pc + 8 + (op & 0x0fff)) << 0) );
break;
case 0xd000:

18
src/emu/cpu/cosmac/cosmac.h
View File

@ -374,16 +374,16 @@ protected:
const address_space_config m_io_config;
// device callbacks
devcb2_read_line m_read_wait;
devcb2_read_line m_read_clear;
devcb2_read_line m_read_ef1;
devcb2_read_line m_read_ef2;
devcb2_read_line m_read_ef3;
devcb2_read_line m_read_ef4;
devcb2_read_line m_read_wait;
devcb2_read_line m_read_clear;
devcb2_read_line m_read_ef1;
devcb2_read_line m_read_ef2;
devcb2_read_line m_read_ef3;
devcb2_read_line m_read_ef4;
devcb2_write_line m_write_q;
devcb2_read8 m_read_dma;
devcb2_write8 m_write_dma;
devcb2_write8 m_write_sc;
devcb2_read8 m_read_dma;
devcb2_write8 m_write_dma;
devcb2_write8 m_write_sc;
// control modes
enum cosmac_mode

50
src/emu/cpu/cpu.mak
View File

@ -489,39 +489,39 @@ $(CPUOBJ)/g65816/g65816o4.o: $(CPUSRC)/g65816/g65816o4.c \
ifneq ($(filter H8,$(CPUS)),)
OBJDIRS += $(CPUOBJ)/h8
CPUOBJS += $(CPUOBJ)/h8/h8.o $(CPUOBJ)/h8/h8h.o $(CPUOBJ)/h8/h8s2000.o $(CPUOBJ)/h8/h8s2600.o \
$(CPUOBJ)/h8/h83337.o \
$(CPUOBJ)/h8/h83002.o $(CPUOBJ)/h8/h83006.o $(CPUOBJ)/h8/h83008.o \
$(CPUOBJ)/h8/h83048.o \
$(CPUOBJ)/h8/h8s2245.o $(CPUOBJ)/h8/h8s2320.o $(CPUOBJ)/h8/h8s2357.o \
$(CPUOBJ)/h8/h8s2655.o \
$(CPUOBJ)/h8/h8_adc.o $(CPUOBJ)/h8/h8_port.o $(CPUOBJ)/h8/h8_intc.o \
$(CPUOBJ)/h8/h8_timer8.o $(CPUOBJ)/h8/h8_timer16.o $(CPUOBJ)/h8/h8_sci.o
$(CPUOBJ)/h8/h83337.o \
$(CPUOBJ)/h8/h83002.o $(CPUOBJ)/h8/h83006.o $(CPUOBJ)/h8/h83008.o \
$(CPUOBJ)/h8/h83048.o \
$(CPUOBJ)/h8/h8s2245.o $(CPUOBJ)/h8/h8s2320.o $(CPUOBJ)/h8/h8s2357.o \
$(CPUOBJ)/h8/h8s2655.o \
$(CPUOBJ)/h8/h8_adc.o $(CPUOBJ)/h8/h8_port.o $(CPUOBJ)/h8/h8_intc.o \
$(CPUOBJ)/h8/h8_timer8.o $(CPUOBJ)/h8/h8_timer16.o $(CPUOBJ)/h8/h8_sci.o
DASMOBJS +=
endif
$(CPUOBJ)/h8/h8.o: $(CPUSRC)/h8/h8.c \
$(CPUOBJ)/h8/h8.o: $(CPUSRC)/h8/h8.c \
$(CPUOBJ)/h8/h8.inc \
$(CPUSRC)/h8/h8.h
$(CPUOBJ)/h8/h8h.o: $(CPUSRC)/h8/h8h.c \
$(CPUOBJ)/h8/h8h.o: $(CPUSRC)/h8/h8h.c \
$(CPUOBJ)/h8/h8h.inc \
$(CPUSRC)/h8/h8h.h \
$(CPUSRC)/h8/h8.h
$(CPUOBJ)/h8/h8s2000.o: $(CPUSRC)/h8/h8s2000.c \
$(CPUOBJ)/h8/h8s2000.o: $(CPUSRC)/h8/h8s2000.c \
$(CPUOBJ)/h8/h8s2000.inc \
$(CPUSRC)/h8/h8s2000.h \
$(CPUSRC)/h8/h8h.h \
$(CPUSRC)/h8/h8.h
$(CPUOBJ)/h8/h8s2600.o: $(CPUSRC)/h8/h8s2600.c \
$(CPUOBJ)/h8/h8s2600.o: $(CPUSRC)/h8/h8s2600.c \
$(CPUOBJ)/h8/h8s2600.inc \
$(CPUSRC)/h8/h8s2600.h \
$(CPUSRC)/h8/h8s2000.h \
$(CPUSRC)/h8/h8h.h \
$(CPUSRC)/h8/h8.h
$(CPUOBJ)/h8/h83337.o: $(CPUSRC)/h8/h83337.c \
$(CPUOBJ)/h8/h83337.o: $(CPUSRC)/h8/h83337.c \
$(CPUSRC)/h8/h83337.h \
$(CPUSRC)/h8/h8.h \
$(CPUSRC)/h8/h8_intc.h \
@ -531,7 +531,7 @@ $(CPUOBJ)/h8/h83337.o: $(CPUSRC)/h8/h83337.c \
$(CPUSRC)/h8/h8_timer16.h \
$(CPUSRC)/h8/h8_sci.h
$(CPUOBJ)/h8/h83002.o: $(CPUSRC)/h8/h83002.c \
$(CPUOBJ)/h8/h83002.o: $(CPUSRC)/h8/h83002.c \
$(CPUSRC)/h8/h83002.h \
$(CPUSRC)/h8/h8h.h \
$(CPUSRC)/h8/h8.h \
@ -541,7 +541,7 @@ $(CPUOBJ)/h8/h83002.o: $(CPUSRC)/h8/h83002.c \
$(CPUSRC)/h8/h8_timer16.h \
$(CPUSRC)/h8/h8_sci.h
$(CPUOBJ)/h8/h83006.o: $(CPUSRC)/h8/h83006.c \
$(CPUOBJ)/h8/h83006.o: $(CPUSRC)/h8/h83006.c \
$(CPUSRC)/h8/h83006.h \
$(CPUSRC)/h8/h8h.h \
$(CPUSRC)/h8/h8.h \
@ -552,7 +552,7 @@ $(CPUOBJ)/h8/h83006.o: $(CPUSRC)/h8/h83006.c \
$(CPUSRC)/h8/h8_timer16.h \
$(CPUSRC)/h8/h8_sci.h
$(CPUOBJ)/h8/h83008.o: $(CPUSRC)/h8/h83008.c \
$(CPUOBJ)/h8/h83008.o: $(CPUSRC)/h8/h83008.c \
$(CPUSRC)/h8/h83008.h \
$(CPUSRC)/h8/h8h.h \
$(CPUSRC)/h8/h8.h \
@ -563,7 +563,7 @@ $(CPUOBJ)/h8/h83008.o: $(CPUSRC)/h8/h83008.c \
$(CPUSRC)/h8/h8_timer16.h \
$(CPUSRC)/h8/h8_sci.h
$(CPUOBJ)/h8/h83048.o: $(CPUSRC)/h8/h83048.c \
$(CPUOBJ)/h8/h83048.o: $(CPUSRC)/h8/h83048.c \
$(CPUSRC)/h8/h83048.h \
$(CPUSRC)/h8/h8h.h \
$(CPUSRC)/h8/h8.h \
@ -573,7 +573,7 @@ $(CPUOBJ)/h8/h83048.o: $(CPUSRC)/h8/h83048.c \
$(CPUSRC)/h8/h8_timer16.h \
$(CPUSRC)/h8/h8_sci.h
$(CPUOBJ)/h8/h8s2245.o: $(CPUSRC)/h8/h8s2245.c \
$(CPUOBJ)/h8/h8s2245.o: $(CPUSRC)/h8/h8s2245.c \
$(CPUSRC)/h8/h8s2245.h \
$(CPUSRC)/h8/h8s2000.h \
$(CPUSRC)/h8/h8h.h \
@ -585,7 +585,7 @@ $(CPUOBJ)/h8/h8s2245.o: $(CPUSRC)/h8/h8s2245.c \
$(CPUSRC)/h8/h8_timer16.h \
$(CPUSRC)/h8/h8_sci.h
$(CPUOBJ)/h8/h8s2320.o: $(CPUSRC)/h8/h8s2320.c \
$(CPUOBJ)/h8/h8s2320.o: $(CPUSRC)/h8/h8s2320.c \
$(CPUSRC)/h8/h8s2320.h \
$(CPUSRC)/h8/h8s2000.h \
$(CPUSRC)/h8/h8h.h \
@ -597,7 +597,7 @@ $(CPUOBJ)/h8/h8s2320.o: $(CPUSRC)/h8/h8s2320.c \
$(CPUSRC)/h8/h8_timer16.h \
$(CPUSRC)/h8/h8_sci.h
$(CPUOBJ)/h8/h8s2357.o: $(CPUSRC)/h8/h8s2357.c \
$(CPUOBJ)/h8/h8s2357.o: $(CPUSRC)/h8/h8s2357.c \
$(CPUSRC)/h8/h8s2357.h \
$(CPUSRC)/h8/h8s2000.h \
$(CPUSRC)/h8/h8h.h \
@ -609,7 +609,7 @@ $(CPUOBJ)/h8/h8s2357.o: $(CPUSRC)/h8/h8s2357.c \
$(CPUSRC)/h8/h8_timer16.h \
$(CPUSRC)/h8/h8_sci.h
$(CPUOBJ)/h8/h8s2655.o: $(CPUSRC)/h8/h8s2655.c \
$(CPUOBJ)/h8/h8s2655.o: $(CPUSRC)/h8/h8s2655.c \
$(CPUSRC)/h8/h8s2655.h \
$(CPUSRC)/h8/h8s2600.h \
$(CPUSRC)/h8/h8s2000.h \
@ -622,25 +622,25 @@ $(CPUOBJ)/h8/h8s2655.o: $(CPUSRC)/h8/h8s2655.c \
$(CPUSRC)/h8/h8_timer16.h \
$(CPUSRC)/h8/h8_sci.h
$(CPUOBJ)/h8/h8_intc.o: $(CPUSRC)/h8/h8_intc.c \
$(CPUOBJ)/h8/h8_intc.o: $(CPUSRC)/h8/h8_intc.c \
$(CPUSRC)/h8/h8_intc.h \
$(CPUSRC)/h8/h8.h
$(CPUOBJ)/h8/h8_adc.o: $(CPUSRC)/h8/h8_adc.c \
$(CPUOBJ)/h8/h8_adc.o: $(CPUSRC)/h8/h8_adc.c \
$(CPUSRC)/h8/h8_adc.h \
$(CPUSRC)/h8/h8_intc.h \
$(CPUSRC)/h8/h8.h
$(CPUOBJ)/h8/h8_port.o: $(CPUSRC)/h8/h8_port.c \
$(CPUOBJ)/h8/h8_port.o: $(CPUSRC)/h8/h8_port.c \
$(CPUSRC)/h8/h8_port.h \
$(CPUSRC)/h8/h8.h
$(CPUOBJ)/h8/h8_timer16.o: $(CPUSRC)/h8/h8_timer16.c \
$(CPUOBJ)/h8/h8_timer16.o: $(CPUSRC)/h8/h8_timer16.c \
$(CPUSRC)/h8/h8_timer16.h \
$(CPUSRC)/h8/h8_intc.h \
$(CPUSRC)/h8/h8.h
$(CPUOBJ)/h8/h8_sci.o: $(CPUSRC)/h8/h8_sci.c \
$(CPUOBJ)/h8/h8_sci.o: $(CPUSRC)/h8/h8_sci.c \
$(CPUSRC)/h8/h8_sci.h \
$(CPUSRC)/h8/h8_intc.h \
$(CPUSRC)/h8/h8.h

8
src/emu/cpu/cubeqcpu/cubeqcpu.h
View File

@ -357,10 +357,10 @@ private:
UINT32 m_clkcnt;
/* RAM */
UINT16 m_sram[4096]; /* Shared with rotate CPU */
UINT8 m_ptr_ram[1024]; /* Pointer RAM */
UINT32 m_e_stack[32768]; /* Stack DRAM: 32kx20 */
UINT32 m_o_stack[32768]; /* Stack DRAM: 32kx20 */
UINT16 m_sram[4096]; /* Shared with rotate CPU */
UINT8 m_ptr_ram[1024]; /* Pointer RAM */
UINT32 m_e_stack[32768]; /* Stack DRAM: 32kx20 */
UINT32 m_o_stack[32768]; /* Stack DRAM: 32kx20 */
address_space *m_program;
direct_read_data *m_direct;

46
src/emu/cpu/h8/h8.c
View File

@ -252,26 +252,26 @@ void h8_device::state_string_export(const device_state_entry &entry, astring &st
case STATE_GENFLAGS:
if(has_exr)
string.printf("%c%c %c%c%c%c%c%c%c%c",
(EXR & EXR_T) ? 'T' : '-',
'0' + (EXR & EXR_I),
(CCR & F_I) ? 'I' : '-',
(CCR & F_UI) ? 'u' : '-',
(CCR & F_H) ? 'H' : '-',
(CCR & F_U) ? 'U' : '-',
(CCR & F_N) ? 'N' : '-',
(CCR & F_Z) ? 'Z' : '-',
(CCR & F_V) ? 'V' : '-',
(CCR & F_C) ? 'C' : '-');
(EXR & EXR_T) ? 'T' : '-',
'0' + (EXR & EXR_I),
(CCR & F_I) ? 'I' : '-',
(CCR & F_UI) ? 'u' : '-',
(CCR & F_H) ? 'H' : '-',
(CCR & F_U) ? 'U' : '-',
(CCR & F_N) ? 'N' : '-',
(CCR & F_Z) ? 'Z' : '-',
(CCR & F_V) ? 'V' : '-',
(CCR & F_C) ? 'C' : '-');
else
string.printf("%c%c%c%c%c%c%c%c",
(CCR & F_I) ? 'I' : '-',
(CCR & F_UI) ? 'u' : '-',
(CCR & F_H) ? 'H' : '-',
(CCR & F_U) ? 'U' : '-',
(CCR & F_N) ? 'N' : '-',
(CCR & F_Z) ? 'Z' : '-',
(CCR & F_V) ? 'V' : '-',
(CCR & F_C) ? 'C' : '-');
(CCR & F_I) ? 'I' : '-',
(CCR & F_UI) ? 'u' : '-',
(CCR & F_H) ? 'H' : '-',
(CCR & F_U) ? 'U' : '-',
(CCR & F_N) ? 'N' : '-',
(CCR & F_Z) ? 'Z' : '-',
(CCR & F_V) ? 'V' : '-',
(CCR & F_C) ? 'C' : '-');
break;
case H8_R0:
case H8_R1:
@ -554,7 +554,7 @@ UINT8 h8_device::read8(UINT32 adr)
void h8_device::write8(UINT32 adr, UINT8 data)
{
// logerror("W %06x %02x\n", adr & 0xffffff, data);
// logerror("W %06x %02x\n", adr & 0xffffff, data);
icount--;
program->write_byte(adr, data);
}
@ -567,7 +567,7 @@ UINT16 h8_device::read16(UINT32 adr)
void h8_device::write16(UINT32 adr, UINT16 data)
{
// logerror("W %06x %04x\n", adr & 0xfffffe, data);
// logerror("W %06x %04x\n", adr & 0xfffffe, data);
icount--;
program->write_word(adr & ~1, data);
}
@ -1017,7 +1017,7 @@ UINT8 h8_device::do_shal2_8(UINT8 v)
if(v & 0x40)
CCR |= F_C;
if((v & 0xc0) == 0x40 || (v & 0xc0) == 0x80 ||
(v & 0x60) == 0x20 || (v & 0x60) == 0x40)
(v & 0x60) == 0x20 || (v & 0x60) == 0x40)
CCR |= F_V;
v <<= 2;
if(!v)
@ -1033,7 +1033,7 @@ UINT16 h8_device::do_shal2_16(UINT16 v)
if(v & 0x4000)
CCR |= F_C;
if((v & 0xc000) == 0x4000 || (v & 0xc000) == 0x8000 ||
(v & 0x6000) == 0x2000 || (v & 0x6000) == 0x4000)
(v & 0x6000) == 0x2000 || (v & 0x6000) == 0x4000)
CCR |= F_V;
v <<= 2;
if(!v)
@ -1049,7 +1049,7 @@ UINT32 h8_device::do_shal2_32(UINT32 v)
if(v & 0x40000000)
CCR |= F_C;
if((v & 0xc0000000) == 0x40000000 || (v & 0xc0000000) == 0x80000000 ||
(v & 0x60000000) == 0x20000000 || (v & 0x60000000) == 0x40000000)
(v & 0x60000000) == 0x20000000 || (v & 0x60000000) == 0x40000000)
CCR |= F_V;
v <<= 2;
if(!v)

4
src/emu/cpu/h8/h83337.c
View File

@ -95,9 +95,9 @@ DEVICE_ADDRESS_MAP_START(map, 16, h83337_device)
AM_RANGE(0xff90, 0xff91) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
AM_RANGE(0xff90, 0xff91) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
AM_RANGE(0xff92, 0xff93) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tcnt_r, tcnt_w )
// AM_RANGE(0xff94, 0xff95) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, ocr_r, ocr_w )
// AM_RANGE(0xff94, 0xff95) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, ocr_r, ocr_w )
AM_RANGE(0xff96, 0xff97) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
// AM_RANGE(0xff96, 0xff97) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tocr_r, tocr_w, 0x00ff)
// AM_RANGE(0xff96, 0xff97) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tocr_r, tocr_w, 0x00ff)
AM_RANGE(0xff98, 0xff9f) AM_DEVREAD( "timer16:0", h8_timer16_channel_device, tgr_r )
AM_RANGE(0xffac, 0xffad) AM_DEVREADWRITE8("port1", h8_port_device, pcr_r, pcr_w, 0xff00)

2
src/emu/cpu/h8/h8_adc.h
View File

@ -43,7 +43,7 @@
#include "h8.h"
#include "h8_intc.h"
#define MCFG_H8_ADC_GENERIC_ADD( _tag, _type, intc, vect ) \
#define MCFG_H8_ADC_GENERIC_ADD( _tag, _type, intc, vect ) \
MCFG_DEVICE_ADD( _tag, _type, 0 ) \
downcast<h8_adc_device *>(device)->set_info(intc, vect);

12
src/emu/cpu/h8/h8_intc.c
View File

@ -280,10 +280,10 @@ void h8h_intc_device::update_irq_types()
const int h8h_intc_device::vector_to_slot[64] = {
-1, -1, -1, -1, -1, -1, -1, -1, // NMI at 7
-1, -1, -1, -1, 0, 1, 2, 2, // IRQ 0-3
3, 3, 3, 3, 4, 4, 4, 4, // IRQ 4-5, (reservedx2), WOVI, CMI, (reserved), ADI
5, 5, 5, 5, 6, 6, 6, 6, // IMIA0, IMIB0, OVI0, (reserved), IMIA1, IMIB1, OVI1, (reserved)
7, 7, 7, 7, 8, 8, 8, 8, // IMIA2, IMIB2, OVI2, (reserved), CMIA0, CMIB0, CMIx1, TOVI0/1
9, 9, 9, 9, 10, 10, 10, 10, // CMIA2, CMIB2, CMIx3, TOVI2/3, DEND0A, DEND0B, DEND1A, DEND1B
3, 3, 3, 3, 4, 4, 4, 4, // IRQ 4-5, (reservedx2), WOVI, CMI, (reserved), ADI
5, 5, 5, 5, 6, 6, 6, 6, // IMIA0, IMIB0, OVI0, (reserved), IMIA1, IMIB1, OVI1, (reserved)
7, 7, 7, 7, 8, 8, 8, 8, // IMIA2, IMIB2, OVI2, (reserved), CMIA0, CMIB0, CMIx1, TOVI0/1
9, 9, 9, 9, 10, 10, 10, 10, // CMIA2, CMIB2, CMIx3, TOVI2/3, DEND0A, DEND0B, DEND1A, DEND1B
11, 11, 11, 11, 12, 12, 12, 12, // (reservedx4), ERI0, RXI0, TXI0, TEI0
13, 13, 13, 13, 14, 14, 14, 14 // ERI1, RXI1, TXI1, TEI1, ERI2, RXI2, TXI2, TEI2
};
@ -342,8 +342,8 @@ WRITE8_MEMBER(h8s_intc_device::iprk_w)
const int h8s_intc_device::vector_to_slot[92] = {
-1, -1, -1, -1, -1, -1, -1, -1, // NMI at 7
-1, -1, -1, -1, -1, -1, -1, -1,
0, 1, 2, 2, 3, 3, 4, 4, // IRQ 0-7
5, 6, 7, 8, 9, 9, 9, 9, // SWDTEND, WOVI, CMI, (reserved), ADI
0, 1, 2, 2, 3, 3, 4, 4, // IRQ 0-7
5, 6, 7, 8, 9, 9, 9, 9, // SWDTEND, WOVI, CMI, (reserved), ADI
10, 10, 10, 10, 10, 10, 10, 10, // TGI0A, TGI0B, TGI0C, TGI0D, TGI0V
11, 11, 11, 11, 12, 12, 12, 12, // TGI1A, TGI1B, TGI1V, TGI1U, TGI2A, TGI2B, TGI2V, TGI2U
13, 13, 13, 13, 13, 13, 13, 13, // TGI3A, TGI3B, TGI3C, TGI3D, TGI3V

6
src/emu/cpu/h8/h8_intc.h
View File

@ -42,13 +42,13 @@
#include "h8.h"
#define MCFG_H8_INTC_ADD( _tag ) \
#define MCFG_H8_INTC_ADD( _tag ) \
MCFG_DEVICE_ADD( _tag, H8_INTC, 0 )
#define MCFG_H8H_INTC_ADD( _tag ) \
#define MCFG_H8H_INTC_ADD( _tag ) \
MCFG_DEVICE_ADD( _tag, H8H_INTC, 0 )
#define MCFG_H8S_INTC_ADD( _tag ) \
#define MCFG_H8S_INTC_ADD( _tag ) \
MCFG_DEVICE_ADD( _tag, H8S_INTC, 0 )

8
src/emu/cpu/h8/h8_port.c
View File

@ -18,21 +18,21 @@ void h8_port_device::set_info(int _address, UINT8 _default_ddr, UINT8 _mask)
WRITE8_MEMBER(h8_port_device::ddr_w)
{
// logerror("%s: ddr_w %02x\n", tag(), data);
// logerror("%s: ddr_w %02x\n", tag(), data);
ddr = data;
update_output();
}
WRITE8_MEMBER(h8_port_device::dr_w)
{
// logerror("%s: dr_w %02x\n", tag(), data);
// logerror("%s: dr_w %02x\n", tag(), data);
dr = data;
update_output();
}
READ8_MEMBER(h8_port_device::dr_r)
{
// logerror("%s: dr_r %02x\n", tag(), (dr | mask) & 0xff);
// logerror("%s: dr_r %02x\n", tag(), (dr | mask) & 0xff);
return dr | mask;
}
@ -42,7 +42,7 @@ READ8_MEMBER(h8_port_device::port_r)
if((ddr & ~mask) != UINT8(~mask))
res |= io->read_word(address) & ~ddr;
// logerror("%s: port_r %02x (%02x %02x)\n", tag(), res, ddr & ~mask, UINT8(~mask));
// logerror("%s: port_r %02x (%02x %02x)\n", tag(), res, ddr & ~mask, UINT8(~mask));
return res;
}

2
src/emu/cpu/h8/h8_port.h
View File

@ -42,7 +42,7 @@
#include "h8.h"
#define MCFG_H8_PORT_ADD( _tag, address, ddr, mask ) \
#define MCFG_H8_PORT_ADD( _tag, address, ddr, mask ) \
MCFG_DEVICE_ADD( _tag, H8_PORT, 0 ) \
downcast<h8_port_device *>(device)->set_info(address, ddr, mask);

31
src/emu/cpu/h8/h8_sci.c
View File

@ -32,13 +32,13 @@ WRITE8_MEMBER(h8_sci_device::smr_w)
{
smr = data;
logerror("%s: smr_w %02x %s %c%c%c%s /%d (%06x)\n", tag(), data,
data & SMR_CA ? "sync" : "async",
data & SMR_CHR ? '7' : '8',
data & SMR_PE ? data & SMR_OE ? 'o' : 'e' : 'n',
data & SMR_STOP ? '2' : '1',
data & SMR_MP ? " mp" : "",
1 << 2*(data & SMR_CKS),
cpu->pc());
data & SMR_CA ? "sync" : "async",
data & SMR_CHR ? '7' : '8',
data & SMR_PE ? data & SMR_OE ? 'o' : 'e' : 'n',
data & SMR_STOP ? '2' : '1',
data & SMR_MP ? " mp" : "",
1 << 2*(data & SMR_CKS),
cpu->pc());
clock_update();
}
@ -64,14 +64,14 @@ READ8_MEMBER(h8_sci_device::brr_r)
WRITE8_MEMBER(h8_sci_device::scr_w)
{
logerror("%s: scr_w %02x%s%s%s%s%s%s clk=%d (%06x)\n", tag(), data,
data & SCR_TIE ? " txi" : "",
data & SCR_RIE ? " rxi" : "",
data & SCR_TE ? " tx" : "",
data & SCR_RE ? " rx" : "",
data & SCR_MPIE ? " mpi" : "",
data & SCR_TEIE ? " tei" : "",
data & SCR_CKE,
cpu->pc());
data & SCR_TIE ? " txi" : "",
data & SCR_RIE ? " rxi" : "",
data & SCR_TE ? " tx" : "",
data & SCR_RE ? " rx" : "",
data & SCR_MPIE ? " mpi" : "",
data & SCR_TEIE ? " tei" : "",
data & SCR_CKE,
cpu->pc());
UINT8 delta = scr ^ data;
scr = data;
@ -676,4 +676,3 @@ void h8_sci_device::rx_raised_edge()
}
logerror("%s: -> state=%s, bit=%d\n", tag(), state_names[rx_state], rx_bit);
}

30
src/emu/cpu/h8/h8_timer16.c
View File

@ -94,14 +94,14 @@ WRITE8_MEMBER(h8_timer16_channel_device::tier_w)
tier = data;
tier_update();
logerror("%s: irq %c%c%c%c%c%c trigger=%d\n",
tag(),
ier & IRQ_A ? 'a' : '.',
ier & IRQ_B ? 'b' : '.',
ier & IRQ_C ? 'c' : '.',
ier & IRQ_D ? 'd' : '.',
ier & IRQ_V ? 'v' : '.',
ier & IRQ_U ? 'u' : '.',
ier & IRQ_TRIG ? 1 : 0);
tag(),
ier & IRQ_A ? 'a' : '.',
ier & IRQ_B ? 'b' : '.',
ier & IRQ_C ? 'c' : '.',
ier & IRQ_D ? 'd' : '.',
ier & IRQ_V ? 'v' : '.',
ier & IRQ_U ? 'u' : '.',
ier & IRQ_TRIG ? 1 : 0);
recalc_event();
}
@ -218,11 +218,11 @@ void h8_timer16_channel_device::update_counter(UINT64 cur_time)
tcnt = tt % counter_cycle;
if(0)
logerror("%s: Updating %d (%ld %ld) (%ld %ld) -> %d/%d\n",
tag(),
ott,
long(last_clock_update), long(cur_time),
long(base_time), long(new_time),
tt, tcnt);
tag(),
ott,
long(last_clock_update), long(cur_time),
long(base_time), long(new_time),
tt, tcnt);
for(int i=0; i<tgr_count; i++)
if((ier & (1 << i)) && (tt == tgr[i] || tcnt == tgr[i]) && interrupt[i] != -1) {
@ -284,7 +284,7 @@ void h8_timer16_channel_device::recalc_event(UINT64 cur_time)
if(0)
logerror("%s: tcnt=%d tgr%c=%d cycle=%d -> delay=%d\n",
tag(), tcnt, 'a'+i, tgr[i], counter_cycle, new_delay);
tag(), tcnt, 'a'+i, tgr[i], counter_cycle, new_delay);
if(event_delay > new_delay)
event_delay = new_delay;
}
@ -622,7 +622,7 @@ void h8s_timer16_channel_device::set_chain(const char *_chain_tag)
}
void h8s_timer16_channel_device::set_info(int _tgr_count, UINT8 _tier_mask, const char *intc, int irq_base,
int t0, int t1, int t2, int t3, int t4, int t5, int t6, int t7)
int t0, int t1, int t2, int t3, int t4, int t5, int t6, int t7)
{
tgr_count = _tgr_count;
tbr_count = 0;

14
src/emu/cpu/h8/h8_timer16.h
View File

@ -43,23 +43,23 @@
#include "h8.h"
#include "h8_intc.h"
#define MCFG_H8_TIMER16_ADD( _tag, _count, _tstr ) \
MCFG_DEVICE_ADD( _tag, H8_TIMER16, 0 ) \
#define MCFG_H8_TIMER16_ADD( _tag, _count, _tstr ) \
MCFG_DEVICE_ADD( _tag, H8_TIMER16, 0 ) \
downcast<h8_timer16_device *>(device)->set_info(_count, _tstr);
#define MCFG_H8_TIMER16_CHANNEL_ADD( _tag, tgr_count, tbr_count, intc, irq_base ) \
MCFG_DEVICE_ADD( _tag, H8_TIMER16_CHANNEL, 0 ) \
MCFG_DEVICE_ADD( _tag, H8_TIMER16_CHANNEL, 0 ) \
downcast<h8_timer16_channel_device *>(device)->set_info(tgr_count, tbr_count, intc, irq_base);
#define MCFG_H8H_TIMER16_CHANNEL_ADD( _tag, tgr_count, tbr_count, intc, irq_base ) \
MCFG_DEVICE_ADD( _tag, H8H_TIMER16_CHANNEL, 0 ) \
MCFG_DEVICE_ADD( _tag, H8H_TIMER16_CHANNEL, 0 ) \
downcast<h8h_timer16_channel_device *>(device)->set_info(tgr_count, tbr_count, intc, irq_base);
#define MCFG_H8S_TIMER16_CHANNEL_ADD( _tag, tgr_count, tier_mask, intc, irq_base, t0, t1, t2, t3, t4, t5, t6, t7 ) \
MCFG_DEVICE_ADD( _tag, H8S_TIMER16_CHANNEL, 0 ) \
MCFG_DEVICE_ADD( _tag, H8S_TIMER16_CHANNEL, 0 ) \
downcast<h8s_timer16_channel_device *>(device)->set_info(tgr_count, tier_mask, intc, irq_base, t0, t1, t2, t3, t4, t5, t6, t7);
#define MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN( _tag ) \
#define MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN( _tag ) \
downcast<h8s_timer16_channel_device *>(device)->set_chain(_tag);
class h8_timer16_channel_device : public device_t {
@ -180,7 +180,7 @@ public:
virtual ~h8s_timer16_channel_device();
void set_info(int tgr_count, UINT8 _tier_mask, const char *intc, int irq_base,
int t0, int t1, int t2, int t3, int t4, int t5, int t6, int t7);
int t0, int t1, int t2, int t3, int t4, int t5, int t6, int t7);
void set_chain(const char *chain_tag);
protected:

6
src/emu/cpu/h8/h8_timer8.c
View File

@ -118,9 +118,9 @@ void h8_timer8_channel_device::update_tcr()
}
logerror(", irq=%c%c%c\n",
tcr & TCR_CMIEB ? 'b' : '-',
tcr & TCR_CMIEA ? 'a' : '-',
tcr & TCR_OVIE ? 'o' : '-');
tcr & TCR_CMIEB ? 'b' : '-',
tcr & TCR_CMIEA ? 'a' : '-',
tcr & TCR_OVIE ? 'o' : '-');
}
READ8_MEMBER(h8_timer8_channel_device::tcsr_r)

4
src/emu/cpu/h8/h8_timer8.h
View File

@ -44,11 +44,11 @@
#include "h8_intc.h"
#define MCFG_H8_TIMER8_CHANNEL_ADD( _tag, intc, irq_ca, irq_cb, irq_v, div1, div2, div3, div4, div5, div6 ) \
MCFG_DEVICE_ADD( _tag, H8_TIMER8_CHANNEL, 0 ) \
MCFG_DEVICE_ADD( _tag, H8_TIMER8_CHANNEL, 0 ) \
downcast<h8_timer8_channel_device *>(device)->set_info(intc, irq_ca, irq_cb, irq_v, div1, div2, div3, div4, div5, div6);
#define MCFG_H8H_TIMER8_CHANNEL_ADD( _tag, intc, irq_ca, irq_cb, irq_v, chain, chain_mode, has_adte, has_ice ) \
MCFG_DEVICE_ADD( _tag, H8H_TIMER8_CHANNEL, 0 ) \
MCFG_DEVICE_ADD( _tag, H8H_TIMER8_CHANNEL, 0 ) \
downcast<h8h_timer8_channel_device *>(device)->set_info(intc, irq_ca, irq_cb, irq_v, chain, chain_mode, has_adte, has_ice);
class h8_timer8_channel_device : public device_t {

48
src/emu/cpu/h8/h8s2245.c
View File

@ -101,33 +101,33 @@ static MACHINE_CONFIG_FRAGMENT(h8s2245)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8_TIMER16_ADD("timer16", 3, 0x00)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83)
MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87)
MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91)

96
src/emu/cpu/h8/h8s2320.c
View File

@ -145,61 +145,61 @@ static MACHINE_CONFIG_FRAGMENT(h8s2320)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8_TIMER16_ADD("timer16", 6, 0x00)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:3", 4, 0x60, "intc", 48,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::DIV_4096)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::DIV_4096)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:4", 2, 0x4c, "intc", 56,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::CHAIN)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:5")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:5", 2, 0x4c, "intc", 60,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D)
MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83)
MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87)
MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91)

96
src/emu/cpu/h8/h8s2357.c
View File

@ -123,61 +123,61 @@ static MACHINE_CONFIG_FRAGMENT(h8s2357)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8_TIMER16_ADD("timer16", 6, 0x00)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:3", 4, 0x60, "intc", 48,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::DIV_4096)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::DIV_4096)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:4", 2, 0x4c, "intc", 56,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::CHAIN)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:5")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:5", 2, 0x4c, "intc", 60,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D)
MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83)
MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87)
MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91)

96
src/emu/cpu/h8/h8s2655.c
View File

@ -96,61 +96,61 @@ static MACHINE_CONFIG_FRAGMENT(h8s2655)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8_TIMER16_ADD("timer16", 6, 0x00)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:3", 4, 0x60, "intc", 48,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::DIV_4096)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::DIV_4096)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:4", 2, 0x4c, "intc", 56,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::CHAIN)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:5")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:5", 2, 0x4c, "intc", 60,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D)
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D)
MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83)
MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87)
MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91)

1
src/emu/cpu/i386/i386.c
View File

@ -4326,4 +4326,3 @@ void pentium4_device::device_reset()
CHANGE_PC(m_eip);
}

8
src/emu/cpu/mn10200/mn10200.c
View File

@ -492,7 +492,6 @@ void mn10200_device::execute_run()
{
while (m_cycles > 0)
{
// internal peripheral, external pin, or prev instruction may have changed irq state
while (m_possible_irq)
{
@ -780,7 +779,6 @@ void mn10200_device::execute_run()
switch (op)
{
// jmp (an)
case 0x00: case 0x04: case 0x08: case 0x0c:
m_cycles -= 1;
@ -868,7 +866,6 @@ void mn10200_device::execute_run()
switch (op & 0xc0)
{
// mov (di, an), am
case 0x00:
m_cycles -= 1;
@ -903,7 +900,6 @@ void mn10200_device::execute_run()
switch (op & 0xf0)
{
// add dm, an
case 0x00:
m_a[op&3] = do_add(m_a[op&3], m_d[op>>2&3], 0);
@ -999,7 +995,6 @@ void mn10200_device::execute_run()
switch (op)
{
// and dn, dm
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
@ -1180,7 +1175,6 @@ void mn10200_device::execute_run()
switch (op)
{
// mov dm, (d24, an)
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
@ -1346,7 +1340,6 @@ void mn10200_device::execute_run()
switch (op)
{
// and imm8, dn
case 0x00: case 0x01: case 0x02: case 0x03:
test_nz16(m_d[op&3] &= 0xff0000 | read_arg8(m_pc));
@ -1507,7 +1500,6 @@ void mn10200_device::execute_run()
switch (op)
{
// and imm16, dn
case 0x00: case 0x01: case 0x02: case 0x03:
test_nz16(m_d[op&3] &= 0xff0000 | read_arg16(m_pc));

1
src/emu/cpu/pdp1/pdp1.c
View File

@ -1813,4 +1813,3 @@ void pdp1_device::pulse_start_clear()
if (m_io_sc_callback)
(*m_io_sc_callback)(this);
}

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