From fec6a67d4da27e2e89aa30a6ae1087919af26973 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Mon, 22 Mar 2021 21:43:12 +0100 Subject: [PATCH] via6522: Remove the retrigger stuff, vectrex shows the via is *that* dumb via6522: Fix the timing again mac128: Adjust the via timing too, since the via wants to run at start of access --- src/devices/machine/6522via.cpp | 28 ++++++++-------------------- src/mame/drivers/mac128.cpp | 18 +++++++++++++++--- 2 files changed, 23 insertions(+), 23 deletions(-) diff --git a/src/devices/machine/6522via.cpp b/src/devices/machine/6522via.cpp index ddbd4ecf965..f37666b519a 100644 --- a/src/devices/machine/6522via.cpp +++ b/src/devices/machine/6522via.cpp @@ -776,19 +776,13 @@ u8 via6522_device::read(offs_t offset) LOGSHIFT(" - ACR: %02x ", m_acr); if (SI_O2_CONTROL(m_acr) || SO_O2_CONTROL(m_acr)) { - if (m_shift_timer->expire().is_never()) - { - m_shift_timer->adjust(clocks_to_attotime(7) / 2); // 8 edges to start shifter from a read -- use 7 for a mac128 issue to be fixed later - LOGSHIFT(" - read SR starts O2 timer "); - } + m_shift_timer->adjust(clocks_to_attotime(7) / 2); // 7 edges to cb1 change from start of read + LOGSHIFT(" - read SR starts O2 timer "); } else if (SI_T2_CONTROL(m_acr) || SO_T2_CONTROL(m_acr)) { - if (m_shift_timer->expire().is_never()) - { - m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2) / 2); - LOGSHIFT(" - read SR starts T2 timer "); - } + m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2) / 2); + LOGSHIFT(" - read SR starts T2 timer "); } else if (!SO_T2_RATE(m_acr)) { @@ -978,19 +972,13 @@ void via6522_device::write(offs_t offset, u8 data) LOGSHIFT(" - ACR is: %02x ", m_acr); if (SO_O2_CONTROL(m_acr) || SI_O2_CONTROL(m_acr)) { - if (m_shift_timer->expire().is_never()) - { - m_shift_timer->adjust(clocks_to_attotime(8) / 2); // 8 edges to start shifter from a write - LOGSHIFT(" - write SR starts O2 timer"); - } + m_shift_timer->adjust(clocks_to_attotime(6) / 2); // 6 edges to cb2 change from start of write + LOGSHIFT(" - write SR starts O2 timer"); } else if (SO_T2_RATE(m_acr) || SO_T2_CONTROL(m_acr) || SI_T2_CONTROL(m_acr)) { - if (m_shift_timer->expire().is_never()) - { - m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2) / 2); - LOGSHIFT(" - write starts T2 timer"); - } + m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2) / 2); + LOGSHIFT(" - write starts T2 timer"); } else { diff --git a/src/mame/drivers/mac128.cpp b/src/mame/drivers/mac128.cpp index 6abd0a12e8a..be754fb772f 100644 --- a/src/mame/drivers/mac128.cpp +++ b/src/mame/drivers/mac128.cpp @@ -194,6 +194,7 @@ private: uint16_t ram_600000_r(offs_t offset); void ram_600000_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~ 0); void via_sync(); + void via_sync_end(); uint16_t mac_via_r(offs_t offset); void mac_via_w(offs_t offset, uint16_t data); uint16_t mac_autovector_r(offs_t offset); @@ -692,13 +693,21 @@ void mac128_state::via_sync() // is synced on that clock, so that's at a multiple of 10 in // absolute time - // - 4 cycles later E goes down and that's the end of the access + // - 4 cycles later E goes down and that's the end of the access, + + // We sync on the start of cycle (so that the via timings go ok) + // then on the end on via_sync_end() uint64_t cur_cycle = m_maincpu->total_cycles(); uint64_t vpa_cycle = cur_cycle+2; uint64_t via_start_cycle = (vpa_cycle + 9) / 10; - uint64_t end_cycle = via_start_cycle * 10 + 4; - m_maincpu->adjust_icount(cur_cycle - end_cycle + 4); // 4 cycles already counted by the core + uint64_t m68k_start_cycle = via_start_cycle * 10; + m_maincpu->adjust_icount(cur_cycle - m68k_start_cycle); // 4 cycles already counted by the core +} + +void mac128_state::via_sync_end() +{ + m_maincpu->adjust_icount(-4); } uint16_t mac128_state::mac_via_r(offs_t offset) @@ -712,6 +721,7 @@ uint16_t mac128_state::mac_via_r(offs_t offset) data = m_via->read(offset); + via_sync_end(); return (data & 0xff) | (data << 8); } @@ -723,6 +733,8 @@ void mac128_state::mac_via_w(offs_t offset, uint16_t data) via_sync(); m_via->write(offset, (data >> 8) & 0xff); + + via_sync_end(); } void mac128_state::mac_autovector_w(offs_t offset, uint16_t data)