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upd4992: Simplify handler signatures; don't default clock configuration (nw)

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This commit is contained in:
AJR 2020-03-14 14:27:19 -04:00
parent 63ae9c0f71
commit feeb03c3ce
5 changed files with 14 additions and 14 deletions
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6
src/devices/machine/upd4992.cpp
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@ -33,7 +33,7 @@ DEFINE_DEVICE_TYPE(UPD4992, upd4992_device, "upd4992", "uPD4992 RTC")
// upd4992_device - constructor
//-------------------------------------------------
upd4992_device::upd4992_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
upd4992_device::upd4992_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, UPD4992, tag, owner, clock)
, device_rtc_interface(mconfig, *this)
, m_timer_clock(nullptr)
@ -114,12 +114,12 @@ xxxx ---- Mode register
// READ/WRITE HANDLERS
//**************************************************************************
READ8_MEMBER( upd4992_device::read )
u8 upd4992_device::read(offs_t offset)
{
return m_rtc_regs[offset];
}
WRITE8_MEMBER( upd4992_device::write )
void upd4992_device::write(offs_t offset, u8 data)
{
if(offset == 7)
{

8
src/devices/machine/upd4992.h
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@ -24,11 +24,11 @@ class upd4992_device : public device_t, public device_rtc_interface
{
public:
// construction/destruction
upd4992_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 32'768);
upd4992_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
// I/O operations
DECLARE_WRITE8_MEMBER( write );
DECLARE_READ8_MEMBER( read );
void write(offs_t offset, u8 data);
u8 read(offs_t offset);
protected:
// device-level overrides
@ -47,7 +47,7 @@ private:
};
emu_timer *m_timer_clock;
uint8_t m_rtc_regs[8];
u8 m_rtc_regs[8];
};

8
src/mame/drivers/seta.cpp
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@ -2522,7 +2522,7 @@ READ16_MEMBER(setaroul_state::rtc_r)
++offset;
if (offset / 2 >= 7)
return 0;
return (m_rtc->read(space, offset / 2, mem_mask) >> ((offset & 1) * 4)) & 0xf;
return (m_rtc->read(offset / 2) >> ((offset & 1) * 4)) & 0xf;
}
WRITE16_MEMBER(setaroul_state::rtc_w)
@ -3200,7 +3200,7 @@ READ16_MEMBER(jockeyc_state::rtc_r)
++offset;
if (offset / 2 >= 7)
return 0;
return (m_rtc->read(space, offset / 2, mem_mask) >> ((offset & 1) * 4)) & 0xf;
return (m_rtc->read(offset / 2) >> ((offset & 1) * 4)) & 0xf;
}
WRITE16_MEMBER(jockeyc_state::rtc_w)
@ -8573,7 +8573,7 @@ void setaroul_state::setaroul(machine_config &config)
NVRAM(config, "nvram", nvram_device::DEFAULT_RANDOM);
/* devices */
UPD4992(config, m_rtc); // ! Actually D4911C !
UPD4992(config, m_rtc, 32'768); // ! Actually D4911C !
ACIA6850(config, "acia0", 0);
TICKET_DISPENSER(config, "hopper", attotime::from_msec(150), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW);
@ -9825,7 +9825,7 @@ void jockeyc_state::jockeyc(machine_config &config)
MCFG_MACHINE_START_OVERRIDE(jockeyc_state, jockeyc)
/* devices */
UPD4992(config, m_rtc); // ! Actually D4911C !
UPD4992(config, m_rtc, 32'768); // ! Actually D4911C !
ACIA6850(config, "acia0", 0);
TICKET_DISPENSER(config, "hopper1", attotime::from_msec(150), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW);
TICKET_DISPENSER(config, "hopper2", attotime::from_msec(150), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW);

2
src/mame/drivers/seta2.cpp
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@ -2439,7 +2439,7 @@ void staraudi_state::staraudi(machine_config &config)
m_maincpu->set_addrmap(AS_PROGRAM, &staraudi_state::staraudi_map);
SHARP_LH28F016S_16BIT(config, "flash");
UPD4992(config, m_rtc);
UPD4992(config, m_rtc, 32'768);
// video hardware
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); // not accurate

4
src/mame/drivers/toaplan2.cpp
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@ -3784,7 +3784,7 @@ void toaplan2_state::pwrkick(machine_config &config)
M68000(config, m_maincpu, 16_MHz_XTAL);
m_maincpu->set_addrmap(AS_PROGRAM, &toaplan2_state::pwrkick_68k_mem);
UPD4992(config, m_rtc);
UPD4992(config, m_rtc, 32'768);
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
@ -3819,7 +3819,7 @@ void toaplan2_state::othldrby(machine_config &config)
M68000(config, m_maincpu, 16_MHz_XTAL);
m_maincpu->set_addrmap(AS_PROGRAM, &toaplan2_state::othldrby_68k_mem);
UPD4992(config, m_rtc);
UPD4992(config, m_rtc, 32'768);
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);