mirror of
https://github.com/holub/mame
synced 2025-06-05 04:16:28 +03:00
Converted RP5H01 to be a MAME device.
This commit is contained in:
parent
be7e2a6f37
commit
fef4e83b4d
@ -1,10 +1,19 @@
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/***************************************************************************
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RP5H01
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2009-06 Converted to be a device
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***************************************************************************/
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#include "driver.h"
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#include "machine/rp5h01.h"
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/****************************************************************************/
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/* local copy of the interface pointer */
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static const struct RP5H01_interface *intf;
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/***************************************************************************
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PARAMETERS
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***************************************************************************/
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/* these also work as the address masks */
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enum {
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@ -12,196 +21,201 @@ enum {
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COUNTER_MODE_7_BITS = 0x7f
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};
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typedef struct _RP5H01 {
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/***************************************************************************
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TYPE DEFINITIONS
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***************************************************************************/
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typedef struct _rp5h01_state rp5h01_state;
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struct _rp5h01_state
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{
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int counter;
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int counter_mode; /* test pin */
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int enabled; /* chip enable */
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int old_reset; /* reset pin state (level-triggered) */
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int old_clock; /* clock pin state (level-triggered) */
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UINT8 *data;
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} RP5H01;
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};
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static RP5H01 RP5H01_state[MAX_RP5H01];
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/***************************************************************************
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INLINE FUNCTIONS
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***************************************************************************/
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/****************************************************************************/
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int RP5H01_init( running_machine *machine, const struct RP5H01_interface *interface ) {
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int i;
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/* setup our local copy of the interface */
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intf = interface;
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if ( intf->num > MAX_RP5H01 ) {
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logerror( "Requested number of RP5H01's is bigger than the supported amount\n" );
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return -1;
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}
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/* initialize the state */
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for( i = 0; i < intf->num; i++ ) {
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RP5H01_state[i].counter = 0;
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RP5H01_state[i].counter_mode = COUNTER_MODE_6_BITS;
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RP5H01_state[i].data = &( memory_region( machine, intf->region[i] )[ intf->offset[i] ] );
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RP5H01_state[i].enabled = 0;
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RP5H01_state[i].old_reset = -1;
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RP5H01_state[i].old_clock = -1;
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}
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return 0;
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INLINE rp5h01_state *get_safe_token(const device_config *device)
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{
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assert(device != NULL);
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assert(device->token != NULL);
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assert((device->type == RP5H01));
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return (rp5h01_state *)device->token;
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}
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/****************************************************************************/
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INLINE const rp5h01_interface *get_interface(const device_config *device)
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{
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assert(device != NULL);
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assert((device->type == RP5H01));
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return (const rp5h01_interface *) device->static_config;
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}
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void RP5H01_enable_w( int which, int data ) {
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RP5H01 *chip;
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/***************************************************************************
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IMPLEMENTATION
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***************************************************************************/
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if ( which >= intf->num ) {
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logerror( "RP5H01_enable: trying to access an unmapped chip\n" );
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return;
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}
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/*-------------------------------------------------
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rp5h01_enable_w
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-------------------------------------------------*/
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/* get the chip */
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chip = &RP5H01_state[which];
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WRITE8_DEVICE_HANDLER( rp5h01_enable_w )
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{
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rp5h01_state *rp5h01 = get_safe_token(device);
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/* process the /CE signal and enable/disable the IC */
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chip->enabled = ( data == 0 ) ? 1 : 0;
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rp5h01->enabled = (data == 0) ? 1 : 0;
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}
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void RP5H01_reset_w( int which, int data ) {
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RP5H01 *chip;
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int newstate = ( data == 0 ) ? 0 : 1;
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/*-------------------------------------------------
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rp5h01_reset_w
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-------------------------------------------------*/
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if ( which >= intf->num ) {
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logerror( "RP5H01_enable: trying to access an unmapped chip\n" );
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return;
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}
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/* get the chip */
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chip = &RP5H01_state[which];
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WRITE8_DEVICE_HANDLER( rp5h01_reset_w )
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{
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rp5h01_state *rp5h01 = get_safe_token(device);
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int newstate = (data == 0) ? 0 : 1;
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/* if it's not enabled, ignore */
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if ( !chip->enabled )
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if (!rp5h01->enabled)
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return;
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/* now look for a 0->1 transition */
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if ( chip->old_reset == 0 && newstate == 1 ) {
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if (rp5h01->old_reset == 0 && newstate == 1)
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{
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/* reset the counter */
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chip->counter = 0;
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rp5h01->counter = 0;
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}
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/* update the pin */
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chip->old_reset = newstate;
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rp5h01->old_reset = newstate;
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}
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void RP5H01_clock_w( int which, int data ) {
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RP5H01 *chip;
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int newstate = ( data == 0 ) ? 0 : 1;
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/*-------------------------------------------------
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rp5h01_clock_w
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-------------------------------------------------*/
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if ( which >= intf->num ) {
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logerror( "RP5H01_enable: trying to access an unmapped chip\n" );
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return;
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}
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/* get the chip */
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chip = &RP5H01_state[which];
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WRITE8_DEVICE_HANDLER( rp5h01_clock_w )
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{
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rp5h01_state *rp5h01 = get_safe_token(device);
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int newstate = (data == 0) ? 0 : 1;
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/* if it's not enabled, ignore */
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if ( !chip->enabled )
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if (!rp5h01->enabled)
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return;
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/* now look for a 1->0 transition */
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if ( chip->old_clock == 1 && newstate == 0 ) {
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if (rp5h01->old_clock == 1 && newstate == 0)
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{
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/* increment the counter, and mask it with the mode */
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chip->counter++;
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rp5h01->counter++;
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}
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/* update the pin */
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chip->old_clock = newstate;
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rp5h01->old_clock = newstate;
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}
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void RP5H01_test_w( int which, int data ) {
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RP5H01 *chip;
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/*-------------------------------------------------
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rp5h01_test_w
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-------------------------------------------------*/
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if ( which >= intf->num ) {
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logerror( "RP5H01_enable: trying to access an unmapped chip\n" );
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return;
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}
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/* get the chip */
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chip = &RP5H01_state[which];
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WRITE8_DEVICE_HANDLER( rp5h01_test_w )
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{
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rp5h01_state *rp5h01 = get_safe_token(device);
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/* if it's not enabled, ignore */
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if ( !chip->enabled )
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if (!rp5h01->enabled)
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return;
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/* process the test signal and change the counter mode */
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chip->counter_mode = ( data == 0 ) ? COUNTER_MODE_6_BITS : COUNTER_MODE_7_BITS;
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rp5h01->counter_mode = (data == 0) ? COUNTER_MODE_6_BITS : COUNTER_MODE_7_BITS;
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}
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int RP5H01_counter_r( int which ) {
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RP5H01 *chip;
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/*-------------------------------------------------
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rp5h01_counter_r
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-------------------------------------------------*/
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if ( which >= intf->num ) {
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logerror( "RP5H01_enable: trying to access an unmapped chip\n" );
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return 0;
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}
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/* get the chip */
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chip = &RP5H01_state[which];
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READ8_DEVICE_HANDLER( rp5h01_counter_r )
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{
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rp5h01_state *rp5h01 = get_safe_token(device);
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/* if it's not enabled, ignore */
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if ( !chip->enabled )
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if (!rp5h01->enabled)
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return 0; /* ? (should be high impedance) */
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/* return A5 */
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return ( chip->counter >> 5 ) & 1;
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return (rp5h01->counter >> 5) & 1;
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}
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int RP5H01_data_r( int which ) {
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RP5H01 *chip;
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int byte, bit;
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/*-------------------------------------------------
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rp5h01_data_r
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-------------------------------------------------*/
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if ( which >= intf->num ) {
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logerror( "RP5H01_enable: trying to access an unmapped chip\n" );
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return 0;
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}
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/* get the chip */
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chip = &RP5H01_state[which];
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READ8_DEVICE_HANDLER( rp5h01_data_r )
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{
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rp5h01_state *rp5h01 = get_safe_token(device);
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int byte, bit;
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/* if it's not enabled, ignore */
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if ( !chip->enabled )
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if (!rp5h01->enabled)
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return 0; /* ? (should be high impedance) */
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/* get the byte offset and bit offset */
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byte = ( chip->counter & chip->counter_mode) >> 3;
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bit = 7 - ( chip->counter & 7 );
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byte = (rp5h01->counter & rp5h01->counter_mode) >> 3;
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bit = 7 - (rp5h01->counter & 7);
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/* return the data */
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return ( chip->data[byte] >> bit ) & 1;
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return (rp5h01->data[byte] >> bit) & 1;
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}
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/****************************************************************************/
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/*-------------------------------------------------
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DEVICE_START( rp5h01 )
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-------------------------------------------------*/
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WRITE8_HANDLER( RP5H01_0_enable_w ) {
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RP5H01_enable_w( 0, data );
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static DEVICE_START( rp5h01 )
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{
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rp5h01_state *rp5h01 = get_safe_token(device);
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const rp5h01_interface *intf = get_interface(device);
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rp5h01->data = &(memory_region(device->machine, intf->region)[intf->offset]);
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/* register for state saving */
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state_save_register_global(device->machine, rp5h01->counter);
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state_save_register_global(device->machine, rp5h01->counter_mode);
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state_save_register_global(device->machine, rp5h01->enabled);
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state_save_register_global(device->machine, rp5h01->old_reset);
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state_save_register_global(device->machine, rp5h01->old_clock);
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}
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WRITE8_HANDLER( RP5H01_0_reset_w ) {
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RP5H01_reset_w( 0, data );
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/*-------------------------------------------------
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DEVICE_RESET( rp5h01 )
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-------------------------------------------------*/
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static DEVICE_RESET( rp5h01 )
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{
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rp5h01_state *rp5h01 = get_safe_token(device);
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rp5h01->counter = 0;
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rp5h01->counter_mode = COUNTER_MODE_6_BITS;
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rp5h01->enabled = 0;
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rp5h01->old_reset = -1;
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rp5h01->old_clock = -1;
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}
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WRITE8_HANDLER( RP5H01_0_clock_w ) {
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RP5H01_clock_w( 0, data );
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}
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/*-------------------------------------------------
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device definition
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-------------------------------------------------*/
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WRITE8_HANDLER( RP5H01_0_test_w ) {
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RP5H01_test_w( 0, data );
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}
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static const char *DEVTEMPLATE_SOURCE = __FILE__;
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READ8_HANDLER( RP5H01_0_counter_r ) {
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return RP5H01_counter_r( 0 );
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}
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READ8_HANDLER( RP5H01_0_data_r ) {
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return RP5H01_data_r( 0 );
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}
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#define DEVTEMPLATE_ID(p,s) p##rp5h01##s
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#define DEVTEMPLATE_FEATURES DT_HAS_START | DT_HAS_RESET
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#define DEVTEMPLATE_NAME "RP5H01"
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#define DEVTEMPLATE_FAMILY "RP5H01"
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#define DEVTEMPLATE_CLASS DEVICE_CLASS_PERIPHERAL
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#include "devtempl.h"
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@ -1,29 +1,50 @@
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/***************************************************************************
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RP5H01
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***************************************************************************/
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#ifndef __RP5H01_H__
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#define __RP5H01_H__
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/* max simultaneous chips supported. change if you need more */
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#define MAX_RP5H01 1
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/***************************************************************************
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MACROS / CONSTANTS
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***************************************************************************/
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struct RP5H01_interface {
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int num; /* number of chips */
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const char *region[MAX_RP5H01]; /* memory region where data resides */
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int offset[MAX_RP5H01]; /* memory offset within the above region where data resides */
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#define RP5H01 DEVICE_GET_INFO_NAME(rp5h01)
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#define MDRV_RP5H01_ADD(_tag, _config) \
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MDRV_DEVICE_ADD(_tag, RP5H01, 0) \
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MDRV_DEVICE_CONFIG(_config)
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#define MDRV_RP5H01_REMOVE(_tag) \
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MDRV_DEVICE_REMOVE(_tag)
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/***************************************************************************
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TYPE DEFINITIONS
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***************************************************************************/
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typedef struct _rp5h01_interface rp5h01_interface;
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struct _rp5h01_interface
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{
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const char *region; /* memory region where data resides */
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int offset; /* memory offset within the above region where data resides */
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};
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int RP5H01_init( running_machine *machine, const struct RP5H01_interface *interface );
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void RP5H01_enable_w( int which, int data ); /* /CE */
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void RP5H01_reset_w( int which, int data ); /* RESET */
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void RP5H01_clock_w( int which, int data ); /* DATA CLOCK (active low) */
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void RP5H01_test_w( int which, int data ); /* TEST */
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int RP5H01_counter_r( int which ); /* COUNTER OUT */
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int RP5H01_data_r( int which ); /* DATA */
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/***************************************************************************
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PROTOTYPES
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***************************************************************************/
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/* direct-access stubs */
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WRITE8_HANDLER( RP5H01_0_enable_w );
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WRITE8_HANDLER( RP5H01_0_reset_w );
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WRITE8_HANDLER( RP5H01_0_clock_w );
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WRITE8_HANDLER( RP5H01_0_test_w );
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READ8_HANDLER( RP5H01_0_counter_r );
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READ8_HANDLER( RP5H01_0_data_r );
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/* device interface */
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DEVICE_GET_INFO( rp5h01 );
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WRITE8_DEVICE_HANDLER( rp5h01_enable_w ); /* /CE */
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WRITE8_DEVICE_HANDLER( rp5h01_reset_w ); /* RESET */
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WRITE8_DEVICE_HANDLER( rp5h01_clock_w ); /* DATA CLOCK (active low) */
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WRITE8_DEVICE_HANDLER( rp5h01_test_w ); /* TEST */
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READ8_DEVICE_HANDLER( rp5h01_counter_r ); /* COUNTER OUT */
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READ8_DEVICE_HANDLER( rp5h01_data_r ); /* DATA */
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#endif /* __RP5H01_H__ */
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@ -684,6 +684,13 @@ static const nes_interface nes_config =
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};
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/* RP5H01 interface */
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static const rp5h01_interface rp5h01_intf =
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{
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"user1",
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0
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};
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static MACHINE_DRIVER_START( playch10 )
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// basic machine hardware
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MDRV_CPU_ADD("maincpu", Z80, 8000000/2) // 4 MHz
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@ -727,6 +734,8 @@ static MACHINE_DRIVER_START( playch10 )
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MDRV_SOUND_ADD("dac", DAC, 0)
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MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
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MDRV_RP5H01_ADD("rp5h01", rp5h01_intf)
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MACHINE_DRIVER_END
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static MACHINE_DRIVER_START( playchnv )
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@ -28,8 +28,8 @@ static int MMC2_bank[4], MMC2_bank_latch[2];
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*************************************/
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MACHINE_RESET( pc10 )
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{
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const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
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const device_config *ppu = devtag_get_device(machine, "ppu");
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const device_config *rp5h01 = devtag_get_device(machine, "rp5h01");
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/* initialize latches and flip-flops */
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pc10_nmi_enable = pc10_dog_di = pc10_dispmask = pc10_sdcs = pc10_int_detect = 0;
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@ -46,10 +46,10 @@ MACHINE_RESET( pc10 )
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MMC2_bank_latch[0] = MMC2_bank_latch[1] = 0xfe;
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/* reset the security chip */
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RP5H01_enable_w( 0, 0 );
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RP5H01_0_reset_w( space, 0, 0 );
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RP5H01_0_reset_w( space, 0, 1 );
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RP5H01_enable_w( 0, 1 );
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rp5h01_enable_w(rp5h01, 0, 0);
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rp5h01_reset_w(rp5h01, 0, 0);
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rp5h01_reset_w(rp5h01, 0, 1);
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rp5h01_enable_w(rp5h01, 0, 1);
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ppu2c0x_set_mirroring( ppu, mirroring );
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}
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@ -138,36 +138,38 @@ WRITE8_HANDLER( pc10_CARTSEL_w )
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*************************************/
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READ8_HANDLER( pc10_prot_r )
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{
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const device_config *rp5h01 = devtag_get_device(space->machine, "rp5h01");
|
||||
int data = 0xe7;
|
||||
|
||||
/* we only support a single cart connected at slot 0 */
|
||||
if ( cart_sel == 0 )
|
||||
if (cart_sel == 0)
|
||||
{
|
||||
RP5H01_0_enable_w( space, 0, 0 );
|
||||
data |= ( ( ~RP5H01_counter_r( 0 ) ) << 4 ) & 0x10; /* D4 */
|
||||
data |= ( ( RP5H01_data_r( 0 ) ) << 3 ) & 0x08; /* D3 */
|
||||
RP5H01_0_enable_w( space, 0, 1 );
|
||||
rp5h01_enable_w(rp5h01, 0, 0);
|
||||
data |= ((~rp5h01_counter_r(rp5h01, 0)) << 4) & 0x10; /* D4 */
|
||||
data |= ((rp5h01_data_r(rp5h01, 0)) << 3) & 0x08; /* D3 */
|
||||
rp5h01_enable_w(rp5h01, 0, 1);
|
||||
}
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( pc10_prot_w )
|
||||
{
|
||||
const device_config *rp5h01 = devtag_get_device(space->machine, "rp5h01");
|
||||
/* we only support a single cart connected at slot 0 */
|
||||
if ( cart_sel == 0 )
|
||||
if (cart_sel == 0)
|
||||
{
|
||||
RP5H01_0_enable_w( space, 0, 0 );
|
||||
RP5H01_0_test_w( space, 0, data & 0x10 ); /* D4 */
|
||||
RP5H01_0_clock_w( space, 0, data & 0x08 ); /* D3 */
|
||||
RP5H01_0_reset_w( space, 0, ~data & 0x01 ); /* D0 */
|
||||
RP5H01_0_enable_w( space, 0, 1 );
|
||||
rp5h01_enable_w(rp5h01, 0, 0);
|
||||
rp5h01_test_w(rp5h01, 0, data & 0x10); /* D4 */
|
||||
rp5h01_clock_w(rp5h01, 0, data & 0x08); /* D3 */
|
||||
rp5h01_reset_w(rp5h01, 0, ~data & 0x01); /* D0 */
|
||||
rp5h01_enable_w(rp5h01, 0, 1);
|
||||
|
||||
/* this thing gets dense at some point */
|
||||
/* it wants to jump and execute an opcode at $ffff, wich */
|
||||
/* is the actual protection memory area */
|
||||
/* setting the whole 0x2000 region every time is a waste */
|
||||
/* so we just set $ffff with the current value */
|
||||
memory_region( space->machine, "maincpu" )[0xffff] = pc10_prot_r(space,0);
|
||||
memory_region(space->machine, "maincpu")[0xffff] = pc10_prot_r(space, 0);
|
||||
}
|
||||
}
|
||||
|
||||
@ -255,13 +257,6 @@ READ8_HANDLER( pc10_in1_r )
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* RP5H01 interface */
|
||||
static const struct RP5H01_interface rp5h01_interface =
|
||||
{
|
||||
1,
|
||||
{ "user1" },
|
||||
{ 0 }
|
||||
};
|
||||
|
||||
/*************************************
|
||||
*
|
||||
@ -270,12 +265,6 @@ static const struct RP5H01_interface rp5h01_interface =
|
||||
*************************************/
|
||||
DRIVER_INIT( playch10 )
|
||||
{
|
||||
/* initialize the security chip */
|
||||
if ( RP5H01_init( machine, &rp5h01_interface ) )
|
||||
{
|
||||
fatalerror("rp5h01_interface initualization failed");
|
||||
}
|
||||
|
||||
/* set the controller to default */
|
||||
pc10_gun_controller = 0;
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user