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PC driver cleanup:

Browse Source 
- Much improved CS4031 emulation, added DMA, interrupt controller, timer, RTC directly to the device as sub devices and added the generic functions needed for AT compatibility
- Moved the ct486 driver to its own file, to avoid all the legacy stuff in at.c
- Added support for the IOCHCK signal to the ISA bus, this is used instead of directly issuing an NMI to the main CPU
- Moved ISA device slot definitions to its own file to avoid copy & pasting the same list to different drivers
- Updated MC146818 RTC for devcb2
This commit is contained in:
Dirk Best 2013-06-13 15:43:56 +00:00
parent 5c509024c2
commit ff3a768786
25 changed files with 1231 additions and 495 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
.gitattributes vendored
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@ -6102,6 +6102,7 @@ src/mess/drivers/cp1.c svneol=native#text/plain
src/mess/drivers/craft.c svneol=native#text/plain
src/mess/drivers/crvision.c svneol=native#text/plain
src/mess/drivers/csc.c svneol=native#text/plain
src/mess/drivers/ct486.c svneol=native#text/plain
src/mess/drivers/cvicny.c svneol=native#text/plain
src/mess/drivers/cxhumax.c svneol=native#text/plain
src/mess/drivers/cybiko.c svneol=native#text/plain
@ -7362,6 +7363,8 @@ src/mess/machine/isa_adlib.c svneol=native#text/plain
src/mess/machine/isa_adlib.h svneol=native#text/plain
src/mess/machine/isa_aha1542.c svneol=native#text/plain
src/mess/machine/isa_aha1542.h svneol=native#text/plain
src/mess/machine/isa_cards.c svneol=native#text/plain
src/mess/machine/isa_cards.h svneol=native#text/plain
src/mess/machine/isa_com.c svneol=native#text/plain
src/mess/machine/isa_com.h svneol=native#text/plain
src/mess/machine/isa_fdc.c svneol=native#text/plain

28
src/emu/machine/mc146818.c
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@ -115,6 +115,7 @@ mc146818_device::mc146818_device(const machine_config &mconfig, const char *tag,
: device_t(mconfig, MC146818, "NVRAM", tag, owner, clock),
device_rtc_interface(mconfig, *this),
device_nvram_interface(mconfig, *this),
m_write_irq(*this),
m_type(MC146818_STANDARD),
m_index(0),
m_eindex(0),
@ -154,28 +155,9 @@ void mc146818_device::device_start()
set_base_datetime();
m_out_irq_func.resolve(m_out_irq_cb, *this);
m_write_irq.resolve_safe();
}
//-------------------------------------------------
// device_config_complete - perform any
// operations now that the configuration is
// complete
//-------------------------------------------------
void mc146818_device::device_config_complete()
{
// inherit a copy of the static data
const mc146818_interface *intf = reinterpret_cast<const mc146818_interface *>(static_config());
if (intf != NULL)
*static_cast<mc146818_interface *>(this) = *intf;
// or initialize to defaults if none provided
else
{
memset(&m_out_irq_cb, 0, sizeof(m_out_irq_cb));
}
}
//-------------------------------------------------
// device_timer - handler timer events
@ -187,7 +169,7 @@ void mc146818_device::device_timer(emu_timer &timer, device_timer_id id, int par
if (id == TIMER_PERIODIC) {
m_data[0x0c] |= 0xc0;
if (!m_out_irq_func.isnull()) m_out_irq_func(CLEAR_LINE);
m_write_irq(CLEAR_LINE);
return;
}
@ -292,7 +274,7 @@ void mc146818_device::device_timer(emu_timer &timer, device_timer_id id, int par
}
// IRQ line is active low
if (!m_out_irq_func.isnull()) m_out_irq_func((m_data[0x0c] & 0x80) ? CLEAR_LINE : ASSERT_LINE);
m_write_irq((m_data[0x0c] & 0x80) ? CLEAR_LINE : ASSERT_LINE);
m_updated = true; /* clock has been updated */
m_last_refresh = machine().time();
@ -434,7 +416,7 @@ READ8_MEMBER( mc146818_device::read )
data = m_data[m_index % MC146818_DATA_SIZE] & 0xf0;
// read 0x0c will clear all IRQ flags in register 0x0c
m_data[m_index % MC146818_DATA_SIZE] &= 0x0f;
if (!m_out_irq_func.isnull()) m_out_irq_func(ASSERT_LINE);
m_write_irq(ASSERT_LINE);
break;
case 0xd:
/* battery ok */

26
src/emu/machine/mc146818.h
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@ -19,10 +19,10 @@
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_MC146818_IRQ_ADD(_tag, _type, _intrf) \
#define MCFG_MC146818_IRQ_ADD(_tag, _type, _irq) \
MCFG_DEVICE_ADD(_tag, MC146818, 0) \
mc146818_device::static_set_type(*device, mc146818_device::_type); \
MCFG_DEVICE_CONFIG(_intrf)
downcast<mc146818_device *>(device)->set_irq_callback(DEVCB2_##_irq);
#define MCFG_MC146818_ADD(_tag, _type) \
MCFG_DEVICE_ADD(_tag, MC146818, 0) \
@ -32,19 +32,11 @@
// TYPE DEFINITIONS
//**************************************************************************
// ======================> mc146818_interface
struct mc146818_interface
{
devcb_write_line m_out_irq_cb;
};
// ======================> mc146818_device
class mc146818_device : public device_t,
public device_rtc_interface,
public device_nvram_interface,
public mc146818_interface
public device_nvram_interface
{
public:
// values
@ -62,14 +54,20 @@ public:
// inline configuration helpers
static void static_set_type(device_t &device, mc146818_type type);
// callbacks
template<class _irq> void set_irq_callback(_irq irq) { m_write_irq.set_callback(irq); }
// read/write access
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
DECLARE_WRITE8_MEMBER( address_w ) { write(space, 0, data); }
DECLARE_READ8_MEMBER( data_r ) { return read(space, 1); }
DECLARE_WRITE8_MEMBER( data_w ) { write(space, 1, data); }
protected:
// device-level overrides
virtual void device_start();
virtual void device_config_complete();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
// device_rtc_interface overrides
@ -84,6 +82,8 @@ protected:
int dec_2_local(int a);
void set_base_datetime();
devcb2_write_line m_write_irq;
// internal state
static const int MC146818_DATA_SIZE = 0x80;
@ -105,8 +105,6 @@ protected:
emu_timer *m_clock_timer;
emu_timer *m_periodic_timer;
devcb_resolved_write_line m_out_irq_func;
};

119
src/mess/drivers/at.c
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@ -34,12 +34,6 @@ static ADDRESS_MAP_START( at386_map, AS_PROGRAM, 32, at_state )
AM_RANGE(0xffff0000, 0xffffffff) AM_ROM AM_REGION("maincpu", 0x0f0000)
ADDRESS_MAP_END
// memory is mostly handled by the chipset
static ADDRESS_MAP_START( ct486_map, AS_PROGRAM, 32, at_state )
AM_RANGE(0x00800000, 0x00800bff) AM_RAM AM_SHARE("nvram")
ADDRESS_MAP_END
static ADDRESS_MAP_START( at586_map, AS_PROGRAM, 32, at586_state )
AM_RANGE(0x00000000, 0x0009ffff) AM_RAMBANK("bank10")
AM_RANGE(0x000a0000, 0x000bffff) AM_NOP
@ -150,50 +144,6 @@ static ADDRESS_MAP_START( at386_io, AS_IO, 32, at_state )
AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff)
ADDRESS_MAP_END
READ32_MEMBER( at_state::ct486_chipset_r )
{
if (ACCESSING_BITS_0_7)
return m_pic8259_master->read(space, 0);
if (ACCESSING_BITS_8_15)
return m_pic8259_master->read(space, 1) << 8;
if (ACCESSING_BITS_24_31)
return m_cs4031->data_r(space, 0, 0) << 24;
return 0xffffffff;
}
WRITE32_MEMBER( at_state::ct486_chipset_w )
{
if (ACCESSING_BITS_0_7)
m_pic8259_master->write(space, 0, data);
if (ACCESSING_BITS_8_15)
m_pic8259_master->write(space, 1, data >> 8);
if (ACCESSING_BITS_16_23)
m_cs4031->address_w(space, 0, data >> 16, 0);
if (ACCESSING_BITS_24_31)
m_cs4031->data_w(space, 0, data >> 24, 0);
}
static ADDRESS_MAP_START( ct486_io, AS_IO, 32, at_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", am9517a_device, read, write, 0xffffffff)
AM_RANGE(0x0020, 0x0023) AM_READWRITE(ct486_chipset_r, ct486_chipset_w)
AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8("pit8254", pit8254_device, read, write, 0xffffffff)
AM_RANGE(0x0060, 0x0063) AM_READWRITE8(at_keybc_r, at_keybc_w, 0xffff)
AM_RANGE(0x0064, 0x0067) AM_DEVREADWRITE8("keybc", at_keyboard_controller_device, status_r, command_w, 0xffff)
AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write , 0xffffffff)
AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff)
AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_slave", pic8259_device, read, write, 0xffffffff)
AM_RANGE(0x00c0, 0x00df) AM_READWRITE8(at_dma8237_2_r, at_dma8237_2_w, 0xffffffff)
ADDRESS_MAP_END
static ADDRESS_MAP_START( at586_io, AS_IO, 32, at586_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
@ -300,11 +250,6 @@ WRITE_LINE_MEMBER( at_state::at_mc146818_irq )
m_pic8259_slave->ir0_w((state) ? 0 : 1);
}
const struct mc146818_interface at_mc146818_config =
{
DEVCB_DRIVER_LINE_MEMBER(at_state, at_mc146818_irq)
};
static const isa16bus_interface isabus_intf =
{
// interrupts
@ -332,45 +277,6 @@ static const isa16bus_interface isabus_intf =
DEVCB_DEVICE_LINE_MEMBER("dma8237_2", am9517a_device, dreq3_w),
};
static SLOT_INTERFACE_START(pc_isa16_cards)
// ISA 8 bit
SLOT_INTERFACE("mda", ISA8_MDA)
SLOT_INTERFACE("cga", ISA8_CGA)
SLOT_INTERFACE("wyse700", ISA8_WYSE700)
SLOT_INTERFACE("ega", ISA8_EGA)
SLOT_INTERFACE("vga", ISA8_VGA)
SLOT_INTERFACE("svga_et4k", ISA8_SVGA_ET4K)
SLOT_INTERFACE("svga_dm",ISA8_SVGA_CIRRUS)
SLOT_INTERFACE("com", ISA8_COM)
SLOT_INTERFACE("comat", ISA8_COM_AT)
SLOT_INTERFACE("fdc", ISA8_FDC_AT)
SLOT_INTERFACE("hdc", ISA8_HDC)
SLOT_INTERFACE("adlib", ISA8_ADLIB)
SLOT_INTERFACE("hercules", ISA8_HERCULES)
SLOT_INTERFACE("gblaster", ISA8_GAME_BLASTER)
SLOT_INTERFACE("sblaster1_0", ISA8_SOUND_BLASTER_1_0)
SLOT_INTERFACE("sblaster1_5", ISA8_SOUND_BLASTER_1_5)
SLOT_INTERFACE("stereo_fx", ISA8_STEREO_FX)
SLOT_INTERFACE("ssi2001", ISA8_SSI2001)
SLOT_INTERFACE("ne1000", NE1000)
SLOT_INTERFACE("3c503", EL2_3C503)
SLOT_INTERFACE("mpu401", ISA8_MPU401)
SLOT_INTERFACE("lpt", ISA8_LPT)
SLOT_INTERFACE("ibm_mfc", ISA8_IBM_MFC)
SLOT_INTERFACE("fdcsmc", ISA8_FDC_SMC)
// ISA 16 bit
SLOT_INTERFACE("ide", ISA16_IDE)
SLOT_INTERFACE("ide_cd", ISA16_IDE_CD)
SLOT_INTERFACE("ne2000", NE2000)
SLOT_INTERFACE("aha1542", AHA1542)
SLOT_INTERFACE("gus",ISA16_GUS)
SLOT_INTERFACE("sblaster_16", ISA16_SOUND_BLASTER_16)
SLOT_INTERFACE("svga_s3",ISA16_SVGA_S3)
SLOT_INTERFACE("s3virge",ISA16_S3VIRGE)
SLOT_INTERFACE("s3virgedx",ISA16_S3VIRGEDX)
SLOT_INTERFACE("gfxultra",ISA16_VGA_GFXULTRA)
SLOT_INTERFACE_END
static MACHINE_CONFIG_FRAGMENT( at_motherboard )
MCFG_MACHINE_START_OVERRIDE(at_state, at )
MCFG_MACHINE_RESET_OVERRIDE(at_state, at )
@ -387,7 +293,7 @@ static MACHINE_CONFIG_FRAGMENT( at_motherboard )
MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf)
MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL)
MCFG_MC146818_IRQ_ADD( "rtc", MC146818_STANDARD, at_mc146818_config )
MCFG_MC146818_IRQ_ADD( "rtc", MC146818_STANDARD, WRITELINE(at_state, at_mc146818_irq))
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -591,20 +497,6 @@ static MACHINE_CONFIG_DERIVED( at486, at386 )
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( ct486, at386 )
MCFG_CPU_REPLACE("maincpu", I486, 25000000)
MCFG_CPU_PROGRAM_MAP(ct486_map)
MCFG_CPU_IO_MAP(ct486_io)
MCFG_CS4031_ADD("cs4031", "maincpu", "isa", "bios")
MCFG_DEVICE_REMOVE(RAM_TAG)
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("4M")
MCFG_RAM_EXTRA_OPTIONS("1M,2M,8M,16M,32M,64M")
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( k286i, at_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", I80286, XTAL_12MHz/2 /*6000000*/)
@ -1192,14 +1084,6 @@ ROM_START( at486 )
ROM_END
// Unknown 486 board with Chips & Technologies CS4031 chipset
ROM_START( ct486 )
ROM_REGION(0x40000, "isa", ROMREGION_ERASEFF)
ROM_REGION(0x100000, "bios", 0)
ROM_LOAD("chips_1.ami", 0xf0000, 0x10000, CRC(a14a7511) SHA1(b88d09be66905ed2deddc26a6f8522e7d2d6f9a8))
ROM_END
// FIC 486-PIO-2 (4 ISA, 4 PCI)
// VIA VT82C505 + VT82C496G + VT82C406MV, NS311/312 or NS332 I/O
ROM_START( ficpio2 )
@ -1438,7 +1322,6 @@ COMP ( 1990, at486, ibm5170, 0, at486, atvga, at_state, atvga,
COMP ( 1990, at586, ibm5170, 0, at586, atvga, driver_device, 0, "<generic>", "PC/AT 586 (PIIX4)", GAME_NOT_WORKING )
COMP ( 1990, at586x3, ibm5170, 0, at586x3, atvga, driver_device, 0, "<generic>", "PC/AT 586 (PIIX3)", GAME_NOT_WORKING )
COMP ( 1989, neat, ibm5170, 0, neat, atvga, at_state, atvga, "<generic>", "NEAT (VGA, MF2 Keyboard)", GAME_NOT_WORKING )
COMP ( 1993, ct486, ibm5170, 0, ct486, atvga, at_state, atvga, "<unknown>", "PC/AT 486 with C&T chipset", GAME_NOT_WORKING )
COMP ( 1993, ec1849, ibm5170, 0, ec1849, atcga, at_state, atcga, "<unknown>", "EC-1849", GAME_NOT_WORKING )
COMP ( 1993, megapc, ibm5170, 0, megapc, atvga, at_state, atvga, "Amstrad plc", "MegaPC", GAME_NOT_WORKING )
COMP ( 199?, megapcpl, ibm5170, 0, megapcpl, atvga, at_state, atvga, "Amstrad plc", "MegaPC Plus", GAME_NOT_WORKING )

209
src/mess/drivers/ct486.c Normal file
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@ -0,0 +1,209 @@
/***************************************************************************
PC/AT 486 with Chips & Technologies CS4031 chipset
***************************************************************************/
#include "emu.h"
#include "cpu/i386/i386.h"
#include "machine/ram.h"
#include "machine/cs4031.h"
#include "machine/at_keybc.h"
#include "machine/pc_kbdc.h"
#include "machine/pc_keyboards.h"
#include "machine/isa.h"
#include "machine/isa_cards.h"
#include "sound/speaker.h"
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
class ct486_state : public driver_device
{
public:
ct486_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_cs4031(*this, "cs4031"),
m_isabus(*this, "isabus"),
m_speaker(*this, "speaker")
{ }
required_device<cpu_device> m_maincpu;
required_device<cs4031_device> m_cs4031;
required_device<isa16_device> m_isabus;
required_device<speaker_sound_device> m_speaker;
virtual void machine_start();
IRQ_CALLBACK_MEMBER( irq_callback ) { return m_cs4031->int_ack_r(); }
DECLARE_READ16_MEMBER( cs4031_ior );
DECLARE_WRITE16_MEMBER( cs4031_iow );
DECLARE_WRITE_LINE_MEMBER( cs4031_hold );
DECLARE_WRITE8_MEMBER( cs4031_tc ) { m_isabus->eop_w(offset, data); }
DECLARE_WRITE_LINE_MEMBER( cs4031_spkr ) { m_speaker->level_w(state); }
};
//**************************************************************************
// MACHINE EMULATION
//**************************************************************************
void ct486_state::machine_start()
{
m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(ct486_state::irq_callback), this));
}
READ16_MEMBER( ct486_state::cs4031_ior )
{
if (offset < 4)
return m_isabus->dack_r(offset);
else
return m_isabus->dack16_r(offset);
}
WRITE16_MEMBER( ct486_state::cs4031_iow )
{
if (offset < 4)
m_isabus->dack_w(offset, data);
else
m_isabus->dack16_w(offset, data);
}
WRITE_LINE_MEMBER( ct486_state::cs4031_hold )
{
// halt cpu
m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
// and acknowledge hold
m_cs4031->hlda_w(state);
}
//**************************************************************************
// ADDRESS MAPS
//**************************************************************************
static ADDRESS_MAP_START( ct486_map, AS_PROGRAM, 32, ct486_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( ct486_io, AS_IO, 32, ct486_state )
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_END
//**************************************************************************
// MACHINE DRIVERS
//**************************************************************************
static const at_keyboard_controller_interface keybc_intf =
{
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, kbrst_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, gatea20_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq01_w),
DEVCB_NULL,
DEVCB_DEVICE_LINE_MEMBER("pc_kbdc", pc_kbdc_device, clock_write_from_mb),
DEVCB_DEVICE_LINE_MEMBER("pc_kbdc", pc_kbdc_device, data_write_from_mb)
};
static const pc_kbdc_interface pc_kbdc_intf =
{
DEVCB_DEVICE_LINE_MEMBER("keybc", at_keyboard_controller_device, keyboard_clock_w),
DEVCB_DEVICE_LINE_MEMBER("keybc", at_keyboard_controller_device, keyboard_data_w)
};
static const isa16bus_interface isabus_intf =
{
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq09_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq03_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq04_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq05_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq06_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq07_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq10_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq11_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq12_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq14_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, irq15_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, dreq0_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, dreq1_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, dreq2_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, dreq3_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, dreq5_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, dreq6_w),
DEVCB_DEVICE_LINE_MEMBER("cs4031", cs4031_device, dreq7_w),
};
static DEVICE_INPUT_DEFAULTS_START( ide_2nd )
DEVICE_INPUT_DEFAULTS("DSW", 0x01, 0x01)
DEVICE_INPUT_DEFAULTS_END
static MACHINE_CONFIG_START( ct486, ct486_state )
MCFG_CPU_ADD("maincpu", I486, XTAL_25MHz)
MCFG_CPU_PROGRAM_MAP(ct486_map)
MCFG_CPU_IO_MAP(ct486_io)
MCFG_CS4031_ADD("cs4031", XTAL_25MHz, "maincpu", "isa", "bios", "keybc")
// cpu connections
MCFG_CS4031_HOLD(WRITELINE(ct486_state, cs4031_hold));
MCFG_CS4031_NMI(INPUTLINE("maincpu", INPUT_LINE_NMI));
MCFG_CS4031_INTR(INPUTLINE("maincpu", INPUT_LINE_IRQ0));
MCFG_CS4031_CPURESET(INPUTLINE("maincpu", INPUT_LINE_RESET));
MCFG_CS4031_A20M(INPUTLINE("maincpu", INPUT_LINE_A20));
// isa dma
MCFG_CS4031_IOR(READ16(ct486_state, cs4031_ior))
MCFG_CS4031_IOW(WRITE16(ct486_state, cs4031_iow))
MCFG_CS4031_TC(WRITE8(ct486_state, cs4031_tc))
// speaker
MCFG_CS4031_SPKR(WRITELINE(ct486_state, cs4031_spkr))
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("4M")
MCFG_RAM_EXTRA_OPTIONS("1M,2M,8M,16M,32M,64M")
MCFG_AT_KEYBOARD_CONTROLLER_ADD("keybc", XTAL_12MHz, keybc_intf)
MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf)
MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL)
MCFG_ISA16_BUS_ADD("isabus", ":maincpu", isabus_intf)
MCFG_ISA_BUS_IOCHCK(DEVWRITELINE("cs4031", cs4031_device, iochck_w))
MCFG_ISA16_SLOT_ADD("isabus", "board1", pc_isa16_cards, "fdcsmc", true)
MCFG_ISA16_SLOT_ADD("isabus", "board2", pc_isa16_cards, "comat", true)
MCFG_ISA16_SLOT_ADD("isabus", "board3", pc_isa16_cards, "ide", true)
MCFG_ISA16_SLOT_ADD("isabus", "board4", pc_isa16_cards, "lpt", true)
MCFG_ISA16_SLOT_ADD("isabus", "isa1", pc_isa16_cards, "svga_et4k", false)
MCFG_ISA16_SLOT_ADD("isabus", "isa2", pc_isa16_cards, NULL, false)
MCFG_ISA16_SLOT_ADD("isabus", "isa3", pc_isa16_cards, NULL, false)
MCFG_ISA16_SLOT_ADD("isabus", "isa4", pc_isa16_cards, NULL, false)
MCFG_ISA16_SLOT_ADD("isabus", "isa5", pc_isa16_cards, "ide_cd", false) //2nd-ary IDE
MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("ide_cd", ide_2nd)
// sound hardware
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
// video hardware
MCFG_PALETTE_LENGTH(256) // todo: really needed?
MACHINE_CONFIG_END
//**************************************************************************
// ROM DEFINITIONS
//**************************************************************************
ROM_START( ct486 )
ROM_REGION(0x40000, "isa", ROMREGION_ERASEFF)
ROM_REGION(0x100000, "bios", 0)
ROM_LOAD("chips_1.ami", 0xf0000, 0x10000, CRC(a14a7511) SHA1(b88d09be66905ed2deddc26a6f8522e7d2d6f9a8))
ROM_END
//**************************************************************************
// GAME DRIVERS
//**************************************************************************
COMP( 1993, ct486, 0, 0, ct486, 0, driver_device, 0, "<unknown>", "PC/AT 486 with CS4031 chipset", 0 )

46
src/mess/drivers/genpc.c
View File

@ -13,29 +13,7 @@
#include "cpu/nec/nec.h"
#include "cpu/i86/i86.h"
#include "video/isa_cga.h"
#include "video/isa_ega.h"
#include "video/isa_mda.h"
#include "video/isa_svga_tseng.h"
#include "video/isa_svga_s3.h"
#include "machine/ram.h"
#include "machine/isa.h"
#include "machine/isa_adlib.h"
#include "machine/isa_com.h"
#include "machine/isa_fdc.h"
#include "machine/isa_finalchs.h"
#include "machine/isa_gblaster.h"
#include "machine/isa_hdc.h"
#include "machine/isa_sblaster.h"
#include "machine/isa_mpu401.h"
#include "machine/3c503.h"
#include "machine/ne1000.h"
#include "machine/isa_ibm_mfc.h"
#include "machine/pc_lpt.h"
#include "machine/pc_keyboards.h"
class genpc_state : public driver_device
@ -91,30 +69,6 @@ static DEVICE_INPUT_DEFAULTS_START(vga)
DEVICE_INPUT_DEFAULTS("DSW0",0x30, 0x00)
DEVICE_INPUT_DEFAULTS_END
static SLOT_INTERFACE_START(pc_isa8_cards)
SLOT_INTERFACE("mda", ISA8_MDA)
SLOT_INTERFACE("cga", ISA8_CGA)
SLOT_INTERFACE("ega", ISA8_EGA)
SLOT_INTERFACE("svga_et4k", ISA8_SVGA_ET4K)
SLOT_INTERFACE("com", ISA8_COM)
SLOT_INTERFACE("fdc", ISA8_FDC_SUPERIO)
SLOT_INTERFACE("fdc_xt", ISA8_FDC_XT)
SLOT_INTERFACE("fdc_at", ISA8_FDC_AT)
SLOT_INTERFACE("fdc_smc", ISA8_FDC_SMC)
SLOT_INTERFACE("fdc_ps2", ISA8_FDC_PS2)
SLOT_INTERFACE("finalchs", ISA8_FINALCHS)
SLOT_INTERFACE("hdc", ISA8_HDC)
SLOT_INTERFACE("adlib", ISA8_ADLIB)
SLOT_INTERFACE("hercules", ISA8_HERCULES)
SLOT_INTERFACE("gblaster", ISA8_GAME_BLASTER)
SLOT_INTERFACE("sblaster1_0", ISA8_SOUND_BLASTER_1_0)
SLOT_INTERFACE("sblaster1_5", ISA8_SOUND_BLASTER_1_5)
SLOT_INTERFACE("mpu401", ISA8_MPU401)
SLOT_INTERFACE("ne1000", NE1000)
SLOT_INTERFACE("3c503", EL2_3C503)
SLOT_INTERFACE("lpt", ISA8_LPT)
SLOT_INTERFACE("ibm_mfc", ISA8_IBM_MFC)
SLOT_INTERFACE_END
static MACHINE_CONFIG_START( pcmda, genpc_state )
/* basic machine hardware */

7
src/mess/drivers/hx20.c
View File

@ -752,11 +752,6 @@ WRITE_LINE_MEMBER( hx20_state::rtc_irq_w )
update_interrupt();
}
static const struct mc146818_interface rtc_intf =
{
DEVCB_DRIVER_LINE_MEMBER(hx20_state, rtc_irq_w)
};
//-------------------------------------------------
// rs232_port_interface rs232_intf
@ -867,7 +862,7 @@ static MACHINE_CONFIG_START( hx20, hx20_state )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
// devices
MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, rtc_intf)
MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, WRITELINE(hx20_state, rtc_irq_w))
MCFG_RS232_PORT_ADD(RS232_TAG, rs232_intf, default_rs232_devices, NULL)
MCFG_CASSETTE_ADD(CASSETTE_TAG, default_cassette_interface)
MCFG_EPSON_SIO_ADD("sio", "tf20")

64
src/mess/drivers/ibmpc.c
View File

@ -257,22 +257,7 @@ XT U44 IBM.bin: IBM 5160 PC/XT Bank-selection decoding ROM (256x4 bit). Not mapp
#include "cpu/i86/i86.h"
#include "machine/ram.h"
#include "machine/isa.h"
#include "machine/isa_adlib.h"
#include "machine/isa_com.h"
#include "machine/isa_fdc.h"
#include "machine/isa_finalchs.h"
#include "machine/isa_gblaster.h"
#include "machine/isa_hdc.h"
#include "machine/isa_sblaster.h"
#include "machine/isa_ide8.h"
#include "machine/3c503.h"
#include "video/isa_cga.h"
#include "video/isa_ega.h"
#include "video/isa_mda.h"
#include "video/isa_svga_tseng.h"
#include "machine/ne1000.h"
#include "machine/isa_mpu401.h"
#include "machine/isa_ibm_mfc.h"
#include "machine/isa_cards.h"
#include "machine/pc_lpt.h"
#include "machine/pc_keyboards.h"
#include "includes/genpc.h"
@ -314,27 +299,6 @@ DEVICE_INPUT_DEFAULTS_END
// DEVICE_INPUT_DEFAULTS("DSW0",0x30, 0x00)
//DEVICE_INPUT_DEFAULTS_END
static SLOT_INTERFACE_START(ibm_isa8_cards)
SLOT_INTERFACE("cga", ISA8_CGA)
SLOT_INTERFACE("ega", ISA8_EGA)
SLOT_INTERFACE("mda", ISA8_MDA)
SLOT_INTERFACE("hercules", ISA8_HERCULES)
SLOT_INTERFACE("svga_et4k", ISA8_SVGA_ET4K)
SLOT_INTERFACE("com", ISA8_COM)
SLOT_INTERFACE("fdc", ISA8_FDC_XT)
SLOT_INTERFACE("finalchs", ISA8_FINALCHS)
SLOT_INTERFACE("hdc", ISA8_HDC)
SLOT_INTERFACE("adlib", ISA8_ADLIB)
SLOT_INTERFACE("gblaster", ISA8_GAME_BLASTER)
SLOT_INTERFACE("sblaster1_0", ISA8_SOUND_BLASTER_1_0)
SLOT_INTERFACE("sblaster1_5", ISA8_SOUND_BLASTER_1_5)
SLOT_INTERFACE("ne1000", NE1000)
SLOT_INTERFACE("3c503", EL2_3C503)
SLOT_INTERFACE("mpu401", ISA8_MPU401)
SLOT_INTERFACE("lpt", ISA8_LPT)
SLOT_INTERFACE("ibm_mfc", ISA8_IBM_MFC)
SLOT_INTERFACE("isa_ide8", ISA8_IDE)
SLOT_INTERFACE_END
static MACHINE_CONFIG_START( ibm5150, ibmpc_state )
/* basic machine hardware */
@ -346,11 +310,11 @@ static MACHINE_CONFIG_START( ibm5150, ibmpc_state )
MCFG_IBM5150_MOTHERBOARD_ADD("mb","maincpu")
MCFG_DEVICE_INPUT_DEFAULTS(cga)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", ibm_isa8_cards, "cga", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", ibm_isa8_cards, "com", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", ibm_isa8_cards, "fdc", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", ibm_isa8_cards, "hdc", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", ibm_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "cga", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "com", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, "fdc", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, "hdc", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, NULL, false)
/* keyboard */
MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_KEYTRONIC_PC3270)
@ -381,14 +345,14 @@ static MACHINE_CONFIG_START( ibm5160, ibmpc_state )
MCFG_IBM5160_MOTHERBOARD_ADD("mb","maincpu")
MCFG_DEVICE_INPUT_DEFAULTS(cga)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", ibm_isa8_cards, "cga", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", ibm_isa8_cards, "com", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", ibm_isa8_cards, "fdc", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", ibm_isa8_cards, "hdc", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", ibm_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", ibm_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa7", ibm_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa8", ibm_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "cga", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "com", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, "fdc", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, "hdc", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa7", pc_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa8", pc_isa8_cards, NULL, false)
/* keyboard */
MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_KEYTRONIC_PC3270)

6
src/mess/drivers/micronic.c
View File

@ -358,10 +358,6 @@ WRITE_LINE_MEMBER( micronic_state::mc146818_irq )
m_maincpu->set_input_line(0, !state ? HOLD_LINE : CLEAR_LINE);
}
const struct mc146818_interface micronic_mc146818_config =
{
DEVCB_DRIVER_LINE_MEMBER(micronic_state, mc146818_irq)
};
static MACHINE_CONFIG_START( micronic, micronic_state )
/* basic machine hardware */
@ -393,7 +389,7 @@ static MACHINE_CONFIG_START( micronic, micronic_state )
MCFG_NVRAM_HANDLER(micronic)
MCFG_MC146818_IRQ_ADD( MC146818_TAG, MC146818_IGNORE_CENTURY, micronic_mc146818_config )
MCFG_MC146818_IRQ_ADD( MC146818_TAG, MC146818_IGNORE_CENTURY, WRITELINE(micronic_state, mc146818_irq))
MACHINE_CONFIG_END
/* ROM definition */

31
src/mess/drivers/pc1512.c
View File

@ -961,16 +961,6 @@ static const struct pit8253_interface pit_intf =
};
//-------------------------------------------------
// mc146818_interface rtc_intf
//-------------------------------------------------
static const struct mc146818_interface rtc_intf =
{
DEVCB_DEVICE_LINE_MEMBER(I8259A2_TAG, pic8259_device, ir2_w)
};
//-------------------------------------------------
// upd765_interface fdc_intf
//-------------------------------------------------
@ -1049,11 +1039,6 @@ static const centronics_interface centronics_intf =
// isa8bus_interface isabus_intf
//-------------------------------------------------
static SLOT_INTERFACE_START( pc1512_isa8_cards )
SLOT_INTERFACE("wdxt_gen", WDXT_GEN)
SLOT_INTERFACE("ega", ISA8_EGA)
SLOT_INTERFACE_END
static const isa8bus_interface isabus_intf =
{
// interrupts
@ -1258,7 +1243,7 @@ static MACHINE_CONFIG_START( pc1512, pc1512_state )
MCFG_I8237_ADD(I8237A5_TAG, XTAL_24MHz/6, dmac_intf)
MCFG_PIC8259_ADD(I8259A2_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, rtc_intf)
MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, DEVWRITELINE(I8259A2_TAG, pic8259_device, ir2_w))
MCFG_PC_FDC_XT_ADD(PC_FDC_XT_TAG)
MCFG_INS8250_ADD(INS8250_TAG, uart_intf, XTAL_1_8432MHz)
MCFG_CENTRONICS_PRINTER_ADD(CENTRONICS_TAG, centronics_intf)
@ -1268,9 +1253,9 @@ static MACHINE_CONFIG_START( pc1512, pc1512_state )
// ISA8 bus
MCFG_ISA8_BUS_ADD(ISA_BUS_TAG, ":" I8086_TAG, isabus_intf)
MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa1", pc1512_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa2", pc1512_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa3", pc1512_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa1", pc_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa2", pc_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa3", pc_isa8_cards, NULL, false)
// internal ram
MCFG_RAM_ADD(RAM_TAG)
@ -1304,7 +1289,7 @@ static MACHINE_CONFIG_START( pc1640, pc1640_state )
MCFG_I8237_ADD(I8237A5_TAG, XTAL_24MHz/6, dmac_intf)
MCFG_PIC8259_ADD(I8259A2_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, rtc_intf)
MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, DEVWRITELINE(I8259A2_TAG, pic8259_device, ir2_w))
MCFG_PC_FDC_XT_ADD(PC_FDC_XT_TAG)
MCFG_INS8250_ADD(INS8250_TAG, uart_intf, XTAL_1_8432MHz)
MCFG_CENTRONICS_PRINTER_ADD(CENTRONICS_TAG, centronics_intf)
@ -1314,9 +1299,9 @@ static MACHINE_CONFIG_START( pc1640, pc1640_state )
// ISA8 bus
MCFG_ISA8_BUS_ADD(ISA_BUS_TAG, ":" I8086_TAG, isabus_intf)
MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa1", pc1512_isa8_cards, "wdxt_gen", false)
MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa2", pc1512_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa3", pc1512_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa1", pc_isa8_cards, "wdxt_gen", false)
MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa2", pc_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD(ISA_BUS_TAG, "isa3", pc_isa8_cards, NULL, false)
// internal ram
MCFG_RAM_ADD(RAM_TAG)

7
src/mess/drivers/qx10.c
View File

@ -445,11 +445,6 @@ static I8255_INTERFACE(qx10_i8255_interface)
MC146818
*/
const struct mc146818_interface qx10_mc146818_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_slave", pic8259_device, ir2_w)
};
WRITE8_MEMBER(qx10_state::mc146818_w)
{
m_rtc->write(space, !offset, data);
@ -888,7 +883,7 @@ static MACHINE_CONFIG_START( qx10, qx10_state )
MCFG_I8237_ADD("8237dma_1", MAIN_CLK/4, qx10_dma8237_1_interface)
MCFG_I8237_ADD("8237dma_2", MAIN_CLK/4, qx10_dma8237_2_interface)
MCFG_UPD7220_ADD("upd7220", MAIN_CLK/6, hgdc_intf, upd7220_map) // unk clock
MCFG_MC146818_IRQ_ADD( "rtc", MC146818_STANDARD, qx10_mc146818_config )
MCFG_MC146818_IRQ_ADD( "rtc", MC146818_STANDARD, DEVWRITELINE("pic8259_slave", pic8259_device, ir2_w))
MCFG_UPD765A_ADD("upd765", true, true)
MCFG_FLOPPY_DRIVE_ADD("upd765:0", qx10_floppies, "525dd", floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("upd765:1", qx10_floppies, "525dd", floppy_image_device::default_floppy_formats)

33
src/mess/includes/at.h
View File

@ -20,20 +20,11 @@
#include "machine/i82371ab.h"
#include "machine/i82371sb.h"
#include "machine/i82439tx.h"
#include "machine/cs4031.h"
#include "machine/cs8221.h"
#include "machine/pit8253.h"
#include "video/pc_cga.h"
#include "video/isa_cga.h"
#include "video/isa_ega.h"
#include "video/isa_vga.h"
#include "video/isa_vga_ati.h"
#include "video/isa_svga_cirrus.h"
#include "video/isa_svga_s3.h"
#include "video/isa_svga_tseng.h"
#include "machine/idectrl.h"
#include "machine/isa_aha1542.h"
#include "machine/at_keybc.h"
#include "imagedev/harddriv.h"
@ -46,25 +37,7 @@
#include "machine/ram.h"
#include "machine/nvram.h"
#include "machine/isa.h"
#include "machine/isa_adlib.h"
#include "machine/isa_com.h"
#include "machine/isa_fdc.h"
#include "machine/isa_gblaster.h"
#include "machine/isa_hdc.h"
#include "machine/isa_sblaster.h"
#include "machine/isa_stereo_fx.h"
#include "machine/isa_gus.h"
#include "machine/isa_ssi2001.h"
#include "machine/3c503.h"
#include "machine/ne1000.h"
#include "machine/ne2000.h"
#include "video/isa_mda.h"
#include "machine/isa_mpu401.h"
#include "machine/isa_ibm_mfc.h"
#include "machine/isa_ide.h"
#include "machine/isa_ide_cd.h"
#include "machine/isa_cards.h"
#include "machine/pc_lpt.h"
#include "machine/pc_kbdc.h"
@ -91,7 +64,6 @@ public:
m_dma8237_2(*this, "dma8237_2"),
m_pit8254(*this, "pit8254"),
m_cs8221(*this, "cs8221"),
m_cs4031(*this, "cs4031"),
m_ide(*this, "ide"),
m_keybc(*this, "keybc"),
m_isabus(*this, "isabus"),
@ -108,7 +80,6 @@ public:
optional_device<am9517a_device> m_dma8237_2;
optional_device<pit8254_device> m_pit8254;
optional_device<cs8221_device> m_cs8221;
optional_device<cs4031_device> m_cs4031;
optional_device<ide_controller_device> m_ide;
optional_device<at_keyboard_controller_device> m_keybc;
optional_device<isa16_device> m_isabus;
@ -155,8 +126,6 @@ public:
DECLARE_WRITE8_MEMBER(at_keybc_w);
DECLARE_READ16_MEMBER(neat_chipset_r);
DECLARE_WRITE16_MEMBER(neat_chipset_w);
DECLARE_READ32_MEMBER(ct486_chipset_r);
DECLARE_WRITE32_MEMBER(ct486_chipset_w);
DECLARE_WRITE_LINE_MEMBER(at_mc146818_irq);
DECLARE_WRITE8_MEMBER(write_rtc);
int m_poll_delay;

1
src/mess/includes/genpc.h
View File

@ -11,6 +11,7 @@
#include "machine/i8255.h"
#include "machine/am9517a.h"
#include "machine/isa.h"
#include "machine/isa_cards.h"
#include "machine/pc_kbdc.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"

2
src/mess/includes/pc1512.h
View File

@ -11,7 +11,7 @@
#include "machine/ctronics.h"
#include "machine/ins8250.h"
#include "machine/isa.h"
#include "machine/isa_wdxt_gen.h"
#include "machine/isa_cards.h"
#include "machine/mc146818.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"

20
src/mess/machine/at.c
View File

@ -304,19 +304,15 @@ void at_state::init_at_common()
{
address_space& space = m_maincpu->space(AS_PROGRAM);
// The CS4031 chipset does this itself
if (machine().device("cs4031") == NULL)
{
/* MESS managed RAM */
membank("bank10")->set_base(m_ram->pointer());
/* MESS managed RAM */
membank("bank10")->set_base(m_ram->pointer());
if (m_ram->size() > 0x0a0000)
{
offs_t ram_limit = 0x100000 + m_ram->size() - 0x0a0000;
space.install_read_bank(0x100000, ram_limit - 1, "bank1");
space.install_write_bank(0x100000, ram_limit - 1, "bank1");
membank("bank1")->set_base(m_ram->pointer() + 0xa0000);
}
if (m_ram->size() > 0x0a0000)
{
offs_t ram_limit = 0x100000 + m_ram->size() - 0x0a0000;
space.install_read_bank(0x100000, ram_limit - 1, "bank1");
space.install_write_bank(0x100000, ram_limit - 1, "bank1");
membank("bank1")->set_base(m_ram->pointer() + 0xa0000);
}
m_at_offset1 = 0xff;

654
src/mess/machine/cs4031.c
View File

@ -10,12 +10,20 @@
- ISA-bus controller
- VESA VL-BUS controller
* F84035
* F84035 (82C206 IPC core)
- 2x 8257 DMA controller
- 2x 8259 interrupt controller
- 8254 timer
- MC14818 RTC
TODO:
- The chipset has the ability to intercept the GATEA20 and
RESET commands sent to the 8042 keyboard controller,
this is not emulated yet
- No emulation of memory parity checks
- Move IPC core to its own file so it can be shared with
other chipsets
***************************************************************************/
#include "emu.h"
@ -24,26 +32,21 @@
//**************************************************************************
// GLOBAL VARIABLES
// MACROS/CONSTANTS
//**************************************************************************
#define LOG_REGISTER 1
#define LOG_MEMORY 1
#define LOG_IO 1
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
const device_type CS4031 = &device_creator<cs4031_device>;
enum
{
DMA_WAIT_STATE = 0x01,
PERFORMANCE = 0x08,
F84035_MISC = 0x09,
DMA_CLOCK = 0x0a,
SHADOW_READ = 0x19,
SHADOW_WRITE = 0x1a,
ROMCS = 0x1b
};
static const char *const register_names[] =
const char* cs4031_device::m_register_names[] =
{
/* 00 */ "RESERVED",
/* 01 */ "DMA WAIT STATE CONTROL",
@ -79,6 +82,96 @@ static const char *const register_names[] =
/* 1f */ "RESERVED"
};
//-------------------------------------------------
// machine_config_additions - device-specific
// machine configurations
//-------------------------------------------------
I8237_INTERFACE( dma1_config )
{
DEVCB_DEVICE_LINE_MEMBER("dma2", am9517a_device, dreq0_w),
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_eop_w),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma_read_byte),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma_write_byte),
{
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_ior0_r),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_ior1_r),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_ior2_r),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_ior3_r)
},
{
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_iow0_w),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_iow1_w),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_iow2_w),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_iow3_w)
},
{
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_dack0_w),
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_dack1_w),
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_dack2_w),
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma1_dack3_w)
}
};
I8237_INTERFACE( dma2_config )
{
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_hreq_w),
DEVCB_NULL,
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma_read_word),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma_write_word),
{
DEVCB_NULL,
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_ior1_r),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_ior2_r),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_ior3_r)
},
{
DEVCB_NULL,
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_iow1_w),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_iow2_w),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_iow3_w)
},
{
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_dack0_w),
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_dack1_w),
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_dack2_w),
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, dma2_dack3_w)
}
};
const struct pit8253_interface cs4031_pit_config =
{
{
{
XTAL_14_31818MHz / 12,
DEVCB_LINE_VCC,
DEVCB_DEVICE_LINE_MEMBER("intc1", pic8259_device, ir0_w)
}, {
XTAL_14_31818MHz / 12,
DEVCB_LINE_VCC,
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, ctc_out1_w)
}, {
XTAL_14_31818MHz / 12,
DEVCB_NULL,
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, cs4031_device, ctc_out2_w)
}
}
};
static MACHINE_CONFIG_FRAGMENT( cs4031 )
MCFG_I8237_ADD("dma1", XTAL_14_31818MHz/3 /* todo: set to 0, instead set via config register */, dma1_config)
MCFG_I8237_ADD("dma2", XTAL_14_31818MHz/3 /* todo: set to 0, instead set via config register */, dma2_config)
MCFG_PIC8259_ADD("intc1", WRITELINE(cs4031_device, intc1_int_w), VCC, READ8(cs4031_device, intc1_slave_ack_r))
MCFG_PIC8259_ADD("intc2", DEVWRITELINE("intc1", pic8259_device, ir2_w), GND, NULL)
MCFG_PIT8254_ADD("ctc", cs4031_pit_config)
MCFG_MC146818_IRQ_ADD("rtc", MC146818_STANDARD, WRITELINE(cs4031_device, rtc_irq_w))
MACHINE_CONFIG_END
machine_config_constructor cs4031_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( cs4031 );
}
//**************************************************************************
// LIVE DEVICE
@ -88,10 +181,36 @@ static const char *const register_names[] =
// cs4031_device - constructor
//-------------------------------------------------
cs4031_device::cs4031_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, CS4031, "CS4031", tag, owner, clock),
m_address(0),
m_address_valid(false)
cs4031_device::cs4031_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, CS4031, "CS4031", tag, owner, clock),
m_read_ior(*this),
m_write_iow(*this),
m_write_tc(*this),
m_write_hold(*this),
m_write_nmi(*this),
m_write_intr(*this),
m_write_cpureset(*this),
m_write_a20m(*this),
m_write_spkr(*this),
m_dma1(*this, "dma1"),
m_dma2(*this, "dma2"),
m_intc1(*this, "intc1"),
m_intc2(*this, "intc2"),
m_ctc(*this, "ctc"),
m_rtc(*this, "rtc"),
m_dma_eop(0),
m_dma_high_byte(0xff),
m_dma_channel(-1),
m_portb(0x0f),
m_refresh_toggle(0),
m_iochck(1),
m_nmi_mask(1),
m_cpureset(0),
m_kbrst(1),
m_ext_gatea20(0),
m_fast_gatea20(0),
m_address(0),
m_address_valid(false)
{
}
@ -113,6 +232,12 @@ void cs4031_device::static_set_biostag(device_t &device, const char *tag)
cs4031.m_biostag = tag;
}
void cs4031_device::static_set_keybctag(device_t &device, const char *tag)
{
cs4031_device &cs4031 = downcast<cs4031_device &>(device);
cs4031.m_keybctag = tag;
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
@ -125,10 +250,41 @@ void cs4031_device::device_start()
if (!ram_dev->started())
throw device_missing_dependencies();
// resolve callbacks
m_read_ior.resolve_safe(0);
m_write_iow.resolve_safe();
m_write_tc.resolve_safe();
m_write_hold.resolve_safe();
m_write_nmi.resolve_safe();
m_write_intr.resolve_safe();
m_write_cpureset.resolve_safe();
m_write_a20m.resolve_safe();
m_write_spkr.resolve_safe();
// register for state saving
save_item(NAME(m_dma_eop));
save_item(NAME(m_dma_page));
save_item(NAME(m_dma_high_byte));
save_item(NAME(m_dma_channel));
save_item(NAME(m_portb));
save_item(NAME(m_refresh_toggle));
save_item(NAME(m_iochck));
save_item(NAME(m_nmi_mask));
save_item(NAME(m_cpureset));
save_item(NAME(m_kbrst));
save_item(NAME(m_ext_gatea20));
save_item(NAME(m_fast_gatea20));
save_item(NAME(m_address));
save_item(NAME(m_address_valid));
save_item(NAME(m_registers));
device_t *cpu = machine().device(m_cputag);
m_space = &cpu->memory().space(AS_PROGRAM);
m_space_io = &cpu->memory().space(AS_IO);
m_isa = machine().root_device().memregion(m_isatag)->base();
m_bios = machine().root_device().memregion(m_biostag)->base();
m_keybc = downcast<at_keyboard_controller_device *>(machine().device(m_keybctag));
m_ram = ram_dev->pointer();
UINT32 ram_size = ram_dev->size();
@ -137,12 +293,27 @@ void cs4031_device::device_start()
m_space->install_ram(0x000000, 0x09ffff, m_ram);
// install extended memory
if (ram_size > 0x100000) {
if (ram_size > 0x100000)
m_space->install_ram(0x100000, ram_size - 1, m_ram + 0x100000);
}
// install bios rom at cpu inital pc
m_space->install_rom(0xffff0000, 0xffffffff, m_bios + 0xf0000);
// install i/o accesses
m_space_io->install_readwrite_handler(0x0000, 0x000f, read8_delegate(FUNC(am9517a_device::read), &(*m_dma1)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma1)), 0xffffffff);
m_space_io->install_readwrite_handler(0x0020, 0x0023, read8_delegate(FUNC(pic8259_device::read), &(*m_intc1)), write8_delegate(FUNC(pic8259_device::write), &(*m_intc1)), 0x0000ffff);
m_space_io->install_write_handler(0x0020, 0x0023, write8_delegate(FUNC(cs4031_device::config_address_w), this), 0x00ff0000);
m_space_io->install_readwrite_handler(0x0020, 0x0023, read8_delegate(FUNC(cs4031_device::config_data_r), this), write8_delegate(FUNC(cs4031_device::config_data_w), this), 0xff000000);
m_space_io->install_readwrite_handler(0x0040, 0x0043, read8_delegate(FUNC(pit8254_device::read), &(*m_ctc)), write8_delegate(FUNC(pit8254_device::write), &(*m_ctc)), 0xffffffff);
m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(cs4031_device::keyb_data_r), this), write8_delegate(FUNC(cs4031_device::keyb_data_w), this), 0x000000ff);
m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(cs4031_device::portb_r), this), write8_delegate(FUNC(cs4031_device::portb_w), this), 0x0000ff00);
m_space_io->install_readwrite_handler(0x0064, 0x0067, read8_delegate(FUNC(cs4031_device::keyb_status_r), this), write8_delegate(FUNC(cs4031_device::keyb_command_w), this), 0x000000ff);
m_space_io->install_write_handler(0x0070, 0x0073, write8_delegate(FUNC(cs4031_device::rtc_w), this), 0x000000ff);
m_space_io->install_readwrite_handler(0x0070, 0x0073, read8_delegate(FUNC(mc146818_device::data_r), &(*m_rtc)), write8_delegate(FUNC(mc146818_device::data_w), &(*m_rtc)), 0x0000ff00);
m_space_io->install_readwrite_handler(0x0080, 0x008f, read8_delegate(FUNC(cs4031_device::dma_page_r), this), write8_delegate(FUNC(cs4031_device::dma_page_w), this), 0xffffffff);
m_space_io->install_write_handler(0x0090, 0x0093, write8_delegate(FUNC(cs4031_device::sysctrl_w), this), 0x00ff0000);
m_space_io->install_readwrite_handler(0x00a0, 0x00a3, read8_delegate(FUNC(pic8259_device::read), &(*m_intc2)), write8_delegate(FUNC(pic8259_device::write), &(*m_intc2)), 0x0000ffff);
m_space_io->install_readwrite_handler(0x00c0, 0x00df, read8_delegate(FUNC(cs4031_device::dma2_r),this), write8_delegate(FUNC(cs4031_device::dma2_w),this), 0xffffffff);
}
//-------------------------------------------------
@ -158,11 +329,257 @@ void cs4031_device::device_reset()
// update rom/ram regions below 1mb
update_read_regions();
update_write_regions();
}
//-------------------------------------------------
// device_reset_after_children
//-------------------------------------------------
void cs4031_device::device_reset_after_children()
{
// timer 2 default state
m_ctc->gate2_w(1);
}
//**************************************************************************
// READ/WRITE HANDLERS
// DMA CONTROLLER
//**************************************************************************
offs_t cs4031_device::page_offset()
{
switch (m_dma_channel)
{
case 0: return (offs_t) m_dma_page[0x07] << 16;
case 1: return (offs_t) m_dma_page[0x03] << 16;
case 2: return (offs_t) m_dma_page[0x01] << 16;
case 3: return (offs_t) m_dma_page[0x02] << 16;
case 5: return (offs_t) m_dma_page[0x0b] << 16;
case 6: return (offs_t) m_dma_page[0x09] << 16;
case 7: return (offs_t) m_dma_page[0x0a] << 16;
}
// should never get here
return 0xff0000;
}
READ8_MEMBER( cs4031_device::dma_read_byte )
{
if (m_dma_channel == -1)
return 0xff;
return m_space->read_byte(page_offset() + offset);
}
WRITE8_MEMBER( cs4031_device::dma_write_byte )
{
if (m_dma_channel == -1)
return;
m_space->write_byte(page_offset() + offset, data);
}
READ8_MEMBER( cs4031_device::dma_read_word )
{
if (m_dma_channel == -1)
return 0xff;
UINT16 result = m_space->read_word(page_offset() + (offset << 1));
m_dma_high_byte = result & 0xff00;
return result & 0xff;
}
WRITE8_MEMBER( cs4031_device::dma_write_word )
{
if (m_dma_channel == -1)
return;
m_space->write_word(page_offset() + (offset << 1), m_dma_high_byte | data);
}
WRITE_LINE_MEMBER( cs4031_device::dma2_dack0_w )
{
m_dma1->hack_w(state ? 0 : 1); // inverted?
}
WRITE_LINE_MEMBER( cs4031_device::dma1_eop_w )
{
m_dma_eop = state;
if (m_dma_channel != -1)
m_write_tc(m_dma_channel, state, 0xff);
}
void cs4031_device::set_dma_channel(int channel, bool state)
{
if (!state)
{
m_dma_channel = channel;
if (m_dma_eop)
m_write_tc(channel, 1, 0xff);
}
else
{
if (m_dma_channel == channel)
{
m_dma_channel = -1;
if (m_dma_eop)
m_write_tc(channel, 0, 0xff);
}
}
}
//**************************************************************************
// INTERRUPTS
//**************************************************************************
/*
Check NMI sources and generate NMI if needed
Not emulated here: Parity check NMI
*/
void cs4031_device::nmi()
{
if (m_nmi_mask & BIT(m_portb, 6))
{
m_write_nmi(1);
m_write_nmi(0);
}
}
READ8_MEMBER( cs4031_device::intc1_slave_ack_r )
{
if (offset == 2) // IRQ 2
return m_intc2->inta_r();
return 0x00;
}
WRITE_LINE_MEMBER( cs4031_device::rtc_irq_w )
{
m_intc2->ir0_w(state ? 0 : 1); // inverted?
}
WRITE_LINE_MEMBER( cs4031_device::iochck_w )
{
if (LOG_IO)
logerror("cs4031_device::iochck_w: %u\n", state);
if (BIT(m_portb, 3) == 0)
{
if (m_iochck && state == 0)
{
// set channel check latch
m_portb |= 1 << 6;
nmi();
}
m_iochck = state;
}
}
//**************************************************************************
// TIMER
//**************************************************************************
WRITE_LINE_MEMBER( cs4031_device::ctc_out1_w )
{
m_refresh_toggle ^= state;
m_portb = (m_portb & 0xef) | (m_refresh_toggle << 4);
}
WRITE_LINE_MEMBER( cs4031_device::ctc_out2_w )
{
m_write_spkr(!(state & BIT(m_portb, 1)));
m_portb = (m_portb & 0xdf) | (state << 5);
}
//**************************************************************************
// CHIPSET CONFIGURATION
//**************************************************************************
WRITE8_MEMBER( cs4031_device::config_address_w )
{
m_address = data;
m_address_valid = (m_address < 0x20) ? true : false;
}
READ8_MEMBER( cs4031_device::config_data_r )
{
UINT8 result = 0xff;
if (m_address_valid)
{
if (LOG_REGISTER)
logerror("cs4031_device: read %s = %02x\n", m_register_names[m_address], m_registers[m_address]);
result = m_registers[m_address];
}
// after a read the selected address needs to be reset
m_address_valid = false;
return result;
}
WRITE8_MEMBER( cs4031_device::config_data_w )
{
if (m_address_valid)
{
if (LOG_REGISTER)
logerror("cs4031_device: write %s = %02x\n", m_register_names[m_address], data);
// update register with new data
m_registers[m_address] = data;
// execute command
switch (m_address)
{
case 0x01: break;
case 0x05: break;
case 0x06: break;
case 0x07: break;
case 0x08: break;
case 0x09: break;
case 0x0a: break;
case 0x10: break;
case 0x11: break;
case 0x12: break;
case 0x13: break;
case 0x14: break;
case 0x15: break;
case 0x16: break;
case 0x17: break;
case 0x18: break;
case 0x19:
update_read_regions();
break;
case 0x1a:
update_write_regions();
break;
case 0x1b:
update_read_regions();
update_write_regions();
break;
case 0x1c: break;
}
}
// after a write the selected address needs to be reset
m_address_valid = false;
}
//**************************************************************************
// MEMORY MAPPER
//**************************************************************************
void cs4031_device::update_read_region(int index, const char *region, offs_t start, offs_t end)
@ -257,77 +674,156 @@ void cs4031_device::update_write_regions()
update_write_region(6, "write_f0000", 0xf0000, 0xfffff);
}
WRITE8_MEMBER( cs4031_device::address_w )
//**************************************************************************
// KEYBOARD / 8042
//**************************************************************************
void cs4031_device::a20m()
{
m_address = data;
m_address_valid = (m_address < 0x20) ? true : false;
m_write_a20m(m_fast_gatea20 | m_ext_gatea20);
}
READ8_MEMBER( cs4031_device::data_r )
READ8_MEMBER( cs4031_device::keyb_status_r )
{
UINT8 result = 0xff;
return m_keybc->status_r(space, 0);
}
if (m_address_valid)
WRITE8_MEMBER( cs4031_device::keyb_command_w )
{
if (0)
logerror("cs4031_device::keyb_command_w: %02x\n", data);
m_keybc->command_w(space, 0, data);
}
READ8_MEMBER( cs4031_device::keyb_data_r )
{
if (0)
logerror("cs4031_device::keyb_data_r\n");
return m_keybc->data_r(space, 0);
}
WRITE8_MEMBER( cs4031_device::keyb_data_w )
{
if (0)
logerror("cs4031_device::keyb_data_w: %02x\n", data);
m_keybc->data_w(space, 0, data);
}
WRITE_LINE_MEMBER( cs4031_device::gatea20_w )
{
if (LOG_IO)
logerror("cs4031_device::gatea20_w: %u\n", state);
if (m_ext_gatea20 != state)
{
if (LOG_REGISTER)
logerror("cs4031_device: read %s = %02x\n", register_names[m_address], m_registers[m_address]);
m_ext_gatea20 = state;
a20m();
}
}
result = m_registers[m_address];
WRITE_LINE_MEMBER( cs4031_device::kbrst_w )
{
if (LOG_IO)
logerror("cs4031_device::kbrst_w: %u\n", state);
// active low signal
state = (state == ASSERT_LINE ? 0 : 1);
if (m_kbrst == 1 && state == 0)
{
m_write_cpureset(1);
m_write_cpureset(0);
}
// after a read the selected address needs to be reset
m_address_valid = false;
return result;
m_kbrst = state;
}
WRITE8_MEMBER( cs4031_device::data_w )
/*
Fast CPU reset and Gate A20
0 - Fast CPU reset
1 - Fast Gate A20
*/
WRITE8_MEMBER( cs4031_device::sysctrl_w )
{
if (m_address_valid)
if (LOG_IO)
logerror("cs4031_device::sysctrl_w: %u\n", data);
m_fast_gatea20 = BIT(data, 1);
a20m();
if (m_cpureset == 0 && BIT(data, 0))
{
if (LOG_REGISTER)
logerror("cs4031_device: write %s = %02x\n", register_names[m_address], data);
// update register with new data
m_registers[m_address] = data;
// execute command
switch (m_address)
{
case 0x01: break;
case 0x05: break;
case 0x06: break;
case 0x07: break;
case 0x08: break;
case 0x09: break;
case 0x0a: break;
case 0x10: break;
case 0x11: break;
case 0x12: break;
case 0x13: break;
case 0x14: break;
case 0x15: break;
case 0x16: break;
case 0x17: break;
case 0x18: break;
case 0x19:
update_read_regions();
break;
case 0x1a:
update_write_regions();
break;
case 0x1b:
update_read_regions();
update_write_regions();
break;
case 0x1c: break;
}
// pulse reset line
m_write_cpureset(1);
m_write_cpureset(0);
}
// after a write the selected address needs to be reset
m_address_valid = false;
m_cpureset = BIT(data, 0);
}
//**************************************************************************
// MISCELLANEOUS
//**************************************************************************
/*
"Port B" - AT-compatible port with miscellaneous information
0 - Timer 2 gate (rw)
1 - Speaker data (rw)
2 - Enable parity check (rw) [not emulated]
3 - Enable IOCHECK (rw)
4 - Refresh detect (r)
5 - Timer 2 output (r)
6 - Channel check latch (r)
7 - Parity check latch (r) [not emulated]
*/
READ8_MEMBER( cs4031_device::portb_r )
{
if (0)
logerror("cs4031_device::portb_r: %02x\n", m_portb);
return m_portb;
}
WRITE8_MEMBER( cs4031_device::portb_w )
{
if (0)
logerror("cs4031_device::portb_w: %02x\n", data);
m_portb = (m_portb & 0xf0) | (data & 0x0f);
// bit 5 forced to 1 if timer disabled
if (!BIT(m_portb, 0))
m_portb |= 1 << 5;
m_ctc->gate2_w(BIT(m_portb, 0));
m_write_spkr(!BIT(m_portb, 1));
// clear channel check latch?
if (BIT(m_portb, 3))
m_portb &= 0xbf;
}
/*
NMI mask and RTC address
7 - NMI mask
6:0 - RTC address
*/
WRITE8_MEMBER( cs4031_device::rtc_w )
{
if (0)
logerror("cs4031_device::rtc_w: %02x\n", data);
m_nmi_mask = !BIT(data, 7);
m_rtc->address_w(space, 0, data & 0x7f);
}

207
src/mess/machine/cs4031.h
View File

@ -10,7 +10,7 @@
- ISA-bus controller
- VESA VL-BUS controller
* F84035
* F84035 (82C206 IPC core)
- 2x 8257 DMA controller
- 2x 8259 interrupt controller
- 8254 timer
@ -24,17 +24,50 @@
#define __CS4031_H__
#include "emu.h"
#include "machine/am9517a.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
#include "machine/mc146818.h"
#include "machine/at_keybc.h"
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_CS4031_ADD(_tag, _cputag, _isatag, _biostag) \
MCFG_DEVICE_ADD(_tag, CS4031, 0) \
#define MCFG_CS4031_ADD(_tag, _clock, _cputag, _isatag, _biostag, _keybctag) \
MCFG_DEVICE_ADD(_tag, CS4031, _clock) \
cs4031_device::static_set_cputag(*device, _cputag); \
cs4031_device::static_set_isatag(*device, _isatag); \
cs4031_device::static_set_biostag(*device, _biostag);
cs4031_device::static_set_biostag(*device, _biostag); \
cs4031_device::static_set_keybctag(*device, _keybctag);
#define MCFG_CS4031_IOR(_ior) \
downcast<cs4031_device *>(device)->set_ior_callback(DEVCB2_##_ior);
#define MCFG_CS4031_IOW(_iow) \
downcast<cs4031_device *>(device)->set_iow_callback(DEVCB2_##_iow);
#define MCFG_CS4031_TC(_tc) \
downcast<cs4031_device *>(device)->set_tc_callback(DEVCB2_##_tc);
#define MCFG_CS4031_HOLD(_hold) \
downcast<cs4031_device *>(device)->set_hold_callback(DEVCB2_##_hold);
#define MCFG_CS4031_NMI(_nmi) \
downcast<cs4031_device *>(device)->set_nmi_callback(DEVCB2_##_nmi);
#define MCFG_CS4031_INTR(_intr) \
downcast<cs4031_device *>(device)->set_intr_callback(DEVCB2_##_intr);
#define MCFG_CS4031_CPURESET(_cpureset) \
downcast<cs4031_device *>(device)->set_cpureset_callback(DEVCB2_##_cpureset);
#define MCFG_CS4031_A20M(_a20m) \
downcast<cs4031_device *>(device)->set_a20m_callback(DEVCB2_##_a20m);
#define MCFG_CS4031_SPKR(_spkr) \
downcast<cs4031_device *>(device)->set_spkr_callback(DEVCB2_##_spkr);
//**************************************************************************
@ -49,41 +82,189 @@ public:
// construction/destruction
cs4031_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_WRITE8_MEMBER( address_w );
DECLARE_READ8_MEMBER( data_r );
DECLARE_WRITE8_MEMBER( data_w );
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
// callbacks
template<class _ior> void set_ior_callback(_ior ior) { m_read_ior.set_callback(ior); }
template<class _iow> void set_iow_callback(_iow iow) { m_write_iow.set_callback(iow); }
template<class _tc> void set_tc_callback(_tc tc) { m_write_tc.set_callback(tc); }
template<class _hold> void set_hold_callback(_hold hold) { m_write_hold.set_callback(hold); }
template<class _cpureset> void set_cpureset_callback(_cpureset cpureset) { m_write_cpureset.set_callback(cpureset); }
template<class _nmi> void set_nmi_callback(_nmi nmi) { m_write_nmi.set_callback(nmi); }
template<class _intr> void set_intr_callback(_intr intr) { m_write_intr.set_callback(intr); }
template<class _a20m> void set_a20m_callback(_a20m a20m) { m_write_a20m.set_callback(a20m); }
template<class _spkr> void set_spkr_callback(_spkr spkr) { m_write_spkr.set_callback(spkr); }
// not really public
DECLARE_READ8_MEMBER( dma_read_byte );
DECLARE_WRITE8_MEMBER( dma_write_byte );
DECLARE_READ8_MEMBER( dma_read_word );
DECLARE_WRITE8_MEMBER( dma_write_word );
DECLARE_WRITE_LINE_MEMBER( dma1_eop_w );
DECLARE_READ8_MEMBER( dma1_ior0_r ) { return m_read_ior(0); }
DECLARE_READ8_MEMBER( dma1_ior1_r ) { return m_read_ior(1); }
DECLARE_READ8_MEMBER( dma1_ior2_r ) { return m_read_ior(2); }
DECLARE_READ8_MEMBER( dma1_ior3_r ) { return m_read_ior(3); }
DECLARE_READ8_MEMBER( dma2_ior1_r ) { UINT16 result = m_read_ior(5); m_dma_high_byte = result & 0xff00; return result & 0xff; }
DECLARE_READ8_MEMBER( dma2_ior2_r ) { UINT16 result = m_read_ior(6); m_dma_high_byte = result & 0xff00; return result & 0xff; }
DECLARE_READ8_MEMBER( dma2_ior3_r ) { UINT16 result = m_read_ior(7); m_dma_high_byte = result & 0xff00; return result & 0xff; }
DECLARE_WRITE8_MEMBER( dma1_iow0_w ) { m_write_iow(0, data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma1_iow1_w ) { m_write_iow(1, data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma1_iow2_w ) { m_write_iow(2, data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma1_iow3_w ) { m_write_iow(3, data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma2_iow1_w ) { m_write_iow(5, m_dma_high_byte | data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma2_iow2_w ) { m_write_iow(6, m_dma_high_byte | data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma2_iow3_w ) { m_write_iow(7, m_dma_high_byte | data, 0xffff); }
DECLARE_WRITE_LINE_MEMBER( dma1_dack0_w ) { set_dma_channel(0, state); }
DECLARE_WRITE_LINE_MEMBER( dma1_dack1_w ) { set_dma_channel(1, state); }
DECLARE_WRITE_LINE_MEMBER( dma1_dack2_w ) { set_dma_channel(2, state); }
DECLARE_WRITE_LINE_MEMBER( dma1_dack3_w ) { set_dma_channel(3, state); }
DECLARE_WRITE_LINE_MEMBER( dma2_dack0_w );
DECLARE_WRITE_LINE_MEMBER( dma2_dack1_w ) { set_dma_channel(5, state); }
DECLARE_WRITE_LINE_MEMBER( dma2_dack2_w ) { set_dma_channel(6, state); }
DECLARE_WRITE_LINE_MEMBER( dma2_dack3_w ) { set_dma_channel(7, state); }
DECLARE_WRITE_LINE_MEMBER( dma2_hreq_w ) { m_write_hold(state); }
DECLARE_WRITE_LINE_MEMBER( intc1_int_w ) { m_write_intr(state); }
DECLARE_READ8_MEMBER( intc1_slave_ack_r );
DECLARE_WRITE_LINE_MEMBER( ctc_out1_w );
DECLARE_WRITE_LINE_MEMBER( ctc_out2_w );
DECLARE_WRITE_LINE_MEMBER( rtc_irq_w );
// internal io
DECLARE_WRITE8_MEMBER( config_address_w );
DECLARE_READ8_MEMBER( config_data_r );
DECLARE_WRITE8_MEMBER( config_data_w );
DECLARE_READ8_MEMBER( portb_r );
DECLARE_WRITE8_MEMBER( portb_w );
DECLARE_WRITE8_MEMBER( rtc_w );
DECLARE_WRITE8_MEMBER( sysctrl_w );
DECLARE_READ8_MEMBER( dma_page_r ) { return m_dma_page[offset]; }
DECLARE_WRITE8_MEMBER( dma_page_w ) { m_dma_page[offset] = data; }
DECLARE_READ8_MEMBER( dma2_r ) { return m_dma2->read(space, offset / 2); }
DECLARE_WRITE8_MEMBER( dma2_w ) { m_dma2->write(space, offset / 2, data); }
DECLARE_READ8_MEMBER( keyb_data_r );
DECLARE_WRITE8_MEMBER( keyb_data_w );
DECLARE_READ8_MEMBER( keyb_status_r );
DECLARE_WRITE8_MEMBER( keyb_command_w );
// input lines
DECLARE_WRITE_LINE_MEMBER( irq01_w ) { m_intc1->ir1_w(state); }
DECLARE_WRITE_LINE_MEMBER( irq03_w ) { m_intc1->ir3_w(state); }
DECLARE_WRITE_LINE_MEMBER( irq04_w ) { m_intc1->ir4_w(state); }
DECLARE_WRITE_LINE_MEMBER( irq05_w ) { m_intc1->ir5_w(state); }
DECLARE_WRITE_LINE_MEMBER( irq06_w ) { m_intc1->ir6_w(state); }
DECLARE_WRITE_LINE_MEMBER( irq07_w ) { m_intc1->ir7_w(state); }
DECLARE_WRITE_LINE_MEMBER( irq09_w ) { m_intc2->ir1_w(state); }
DECLARE_WRITE_LINE_MEMBER( irq10_w ) { m_intc2->ir2_w(state); }
DECLARE_WRITE_LINE_MEMBER( irq11_w ) { m_intc2->ir3_w(state); }
DECLARE_WRITE_LINE_MEMBER( irq12_w ) { m_intc2->ir4_w(state); }
DECLARE_WRITE_LINE_MEMBER( irq13_w ) { m_intc2->ir5_w(state); } // also FERR#
DECLARE_WRITE_LINE_MEMBER( irq14_w ) { m_intc2->ir6_w(state); }
DECLARE_WRITE_LINE_MEMBER( irq15_w ) { m_intc2->ir7_w(state); }
DECLARE_WRITE_LINE_MEMBER( dreq0_w ) { m_dma1->dreq0_w(state); }
DECLARE_WRITE_LINE_MEMBER( dreq1_w ) { m_dma1->dreq1_w(state); }
DECLARE_WRITE_LINE_MEMBER( dreq2_w ) { m_dma1->dreq2_w(state); }
DECLARE_WRITE_LINE_MEMBER( dreq3_w ) { m_dma1->dreq3_w(state); }
DECLARE_WRITE_LINE_MEMBER( dreq5_w ) { m_dma2->dreq1_w(state); }
DECLARE_WRITE_LINE_MEMBER( dreq6_w ) { m_dma2->dreq2_w(state); }
DECLARE_WRITE_LINE_MEMBER( dreq7_w ) { m_dma2->dreq3_w(state); }
DECLARE_WRITE_LINE_MEMBER( hlda_w ) { m_dma2->hack_w(state); }
DECLARE_WRITE_LINE_MEMBER( iochck_w );
DECLARE_WRITE_LINE_MEMBER( gatea20_w );
DECLARE_WRITE_LINE_MEMBER( kbrst_w );
UINT8 int_ack_r() { return m_intc1->inta_r(); }
// inline configuration
static void static_set_cputag(device_t &device, const char *tag);
static void static_set_isatag(device_t &device, const char *tag);
static void static_set_biostag(device_t &device, const char *tag);
static void static_set_keybctag(device_t &device, const char *tag);
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
virtual void device_reset_after_children();
private:
devcb2_read16 m_read_ior;
devcb2_write16 m_write_iow;
devcb2_write8 m_write_tc;
devcb2_write_line m_write_hold;
devcb2_write_line m_write_nmi;
devcb2_write_line m_write_intr;
devcb2_write_line m_write_cpureset;
devcb2_write_line m_write_a20m;
devcb2_write_line m_write_spkr;
offs_t page_offset();
void set_dma_channel(int channel, bool state);
void nmi();
void a20m();
void update_read_region(int index, const char *region, offs_t start, offs_t end);
void update_write_region(int index, const char *region, offs_t start, offs_t end);
void update_read_regions();
void update_write_regions();
// internal state
const char *m_cputag;
const char *m_isatag;
const char *m_biostag;
const char *m_keybctag;
address_space *m_space;
address_space *m_space_io;
UINT8 *m_isa;
UINT8 *m_bios;
UINT8 *m_ram;
// address selection
// ipc core devices
required_device<am9517a_device> m_dma1;
required_device<am9517a_device> m_dma2;
required_device<pic8259_device> m_intc1;
required_device<pic8259_device> m_intc2;
required_device<pit8254_device> m_ctc;
required_device<mc146818_device> m_rtc;
int m_dma_eop;
UINT8 m_dma_page[0x10];
UINT8 m_dma_high_byte;
int m_dma_channel;
UINT8 m_portb;
int m_speaker_data;
int m_refresh_toggle;
int m_iochck;
int m_nmi_mask;
// keyboard
at_keyboard_controller_device *m_keybc;
int m_cpureset;
int m_kbrst;
int m_ext_gatea20;
int m_fast_gatea20;
// chipset configuration
static const char* m_register_names[];
enum
{
DMA_WAIT_STATE = 0x01,
PERFORMANCE = 0x08,
F84035_MISC = 0x09,
DMA_CLOCK = 0x0a,
SHADOW_READ = 0x19,
SHADOW_WRITE = 0x1a,
ROMCS = 0x1b,
SOFT_RESET_AND_GATEA20 = 0x1c
};
UINT8 m_address;
bool m_address_valid;
const char *m_cputag;
const char *m_isatag;
const char *m_biostag;
UINT8 m_registers[0x20];
};

7
src/mess/machine/e01.c
View File

@ -140,11 +140,6 @@ WRITE_LINE_MEMBER( e01_device::rtc_irq_w )
update_interrupts();
}
static mc146818_interface rtc_intf =
{
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, e01_device, rtc_irq_w)
};
//-------------------------------------------------
// mc6854_interface adlc_intf
@ -299,7 +294,7 @@ static MACHINE_CONFIG_FRAGMENT( e01 )
MCFG_CPU_ADD(R65C102_TAG, M65C02, XTAL_8MHz/4) // Rockwell R65C102P3
MCFG_CPU_PROGRAM_MAP(e01_mem)
MCFG_MC146818_IRQ_ADD(HD146818_TAG, MC146818_STANDARD, rtc_intf)
MCFG_MC146818_IRQ_ADD(HD146818_TAG, MC146818_STANDARD, WRITELINE(e01_device, rtc_irq_w))
// devices
MCFG_VIA6522_ADD(R6522_TAG, XTAL_8MHz/4, via_intf)

21
src/mess/machine/isa.c
View File

@ -145,7 +145,8 @@ void isa8_device::device_config_complete()
//-------------------------------------------------
isa8_device::isa8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, ISA8, "ISA8", tag, owner, clock)
device_t(mconfig, ISA8, "ISA8", tag, owner, clock),
m_write_iochck(*this)
{
for(int i=0;i<8;i++)
{
@ -156,7 +157,8 @@ isa8_device::isa8_device(const machine_config &mconfig, const char *tag, device_
}
isa8_device::isa8_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, type, name, tag, owner, clock)
device_t(mconfig, type, name, tag, owner, clock),
m_write_iochck(*this)
{
for(int i=0;i<8;i++)
{
@ -179,6 +181,8 @@ void isa8_device::set_dma_channel(UINT8 channel, device_isa8_card_interface *dev
void isa8_device::device_start()
{
// resolve callbacks
m_write_iochck.resolve_safe();
m_out_irq2_func.resolve(m_out_irq2_cb, *this);
m_out_irq3_func.resolve(m_out_irq3_cb, *this);
m_out_irq4_func.resolve(m_out_irq4_cb, *this);
@ -393,11 +397,20 @@ void isa8_device::eop_w(int channel, int state)
void isa8_device::nmi()
{
if (m_nmi_enabled)
if (m_write_iochck.isnull())
{
m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE );
if (m_nmi_enabled)
{
m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE );
}
}
else
{
m_write_iochck(0);
m_write_iochck(1);
}
}
//**************************************************************************
// DEVICE CONFIG ISA8 CARD INTERFACE
//**************************************************************************

8
src/mess/machine/isa.h
View File

@ -88,6 +88,10 @@
MCFG_DEVICE_ADD(_tag, ISA16_SLOT, 0) \
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, _fixed) \
isa16_slot_device::static_set_isa16_slot(*device, owner, _isatag);
#define MCFG_ISA_BUS_IOCHCK(_iochck) \
downcast<isa8_device *>(device)->set_iochck_callback(DEVCB2_##_iochck);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -142,6 +146,7 @@ public:
isa8_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
// inline configuration
static void static_set_cputag(device_t &device, const char *tag);
template<class _iochck> void set_iochck_callback(_iochck iochck) { m_write_iochck.set_callback(iochck); }
void install_device(device_t *dev, offs_t start, offs_t end, offs_t mask, offs_t mirror, read8_device_func rhandler, const char* rhandler_name, write8_device_func whandler, const char *whandler_name);
void install_device(offs_t start, offs_t end, offs_t mask, offs_t mirror, read8_delegate rhandler, write8_delegate whandler);
@ -204,6 +209,9 @@ protected:
bool m_dma_eop[8];
const char *m_cputag;
bool m_nmi_enabled;
private:
devcb2_write_line m_write_iochck;
};

74
src/mess/machine/isa_cards.c Normal file
View File

@ -0,0 +1,74 @@
/**********************************************************************
ISA cards
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
**********************************************************************/
#include "isa_cards.h"
SLOT_INTERFACE_START( pc_isa8_cards )
SLOT_INTERFACE("mda", ISA8_MDA)
SLOT_INTERFACE("cga", ISA8_CGA)
SLOT_INTERFACE("ega", ISA8_EGA)
SLOT_INTERFACE("svga_et4k", ISA8_SVGA_ET4K)
SLOT_INTERFACE("com", ISA8_COM)
SLOT_INTERFACE("fdc", ISA8_FDC_SUPERIO)
SLOT_INTERFACE("fdc_xt", ISA8_FDC_XT)
SLOT_INTERFACE("fdc_at", ISA8_FDC_AT)
SLOT_INTERFACE("fdc_smc", ISA8_FDC_SMC)
SLOT_INTERFACE("fdc_ps2", ISA8_FDC_PS2)
SLOT_INTERFACE("finalchs", ISA8_FINALCHS)
SLOT_INTERFACE("hdc", ISA8_HDC)
SLOT_INTERFACE("adlib", ISA8_ADLIB)
SLOT_INTERFACE("hercules", ISA8_HERCULES)
SLOT_INTERFACE("gblaster", ISA8_GAME_BLASTER)
SLOT_INTERFACE("sblaster1_0", ISA8_SOUND_BLASTER_1_0)
SLOT_INTERFACE("sblaster1_5", ISA8_SOUND_BLASTER_1_5)
SLOT_INTERFACE("mpu401", ISA8_MPU401)
SLOT_INTERFACE("ne1000", NE1000)
SLOT_INTERFACE("3c503", EL2_3C503)
SLOT_INTERFACE("lpt", ISA8_LPT)
SLOT_INTERFACE("ibm_mfc", ISA8_IBM_MFC)
SLOT_INTERFACE_END
SLOT_INTERFACE_START( pc_isa16_cards )
// 8-bit
SLOT_INTERFACE("mda", ISA8_MDA)
SLOT_INTERFACE("cga", ISA8_CGA)
SLOT_INTERFACE("wyse700", ISA8_WYSE700)
SLOT_INTERFACE("ega", ISA8_EGA)
SLOT_INTERFACE("vga", ISA8_VGA)
SLOT_INTERFACE("svga_et4k", ISA8_SVGA_ET4K)
SLOT_INTERFACE("svga_dm",ISA8_SVGA_CIRRUS)
SLOT_INTERFACE("com", ISA8_COM)
SLOT_INTERFACE("comat", ISA8_COM_AT)
SLOT_INTERFACE("fdc", ISA8_FDC_AT)
SLOT_INTERFACE("hdc", ISA8_HDC)
SLOT_INTERFACE("adlib", ISA8_ADLIB)
SLOT_INTERFACE("hercules", ISA8_HERCULES)
SLOT_INTERFACE("gblaster", ISA8_GAME_BLASTER)
SLOT_INTERFACE("sblaster1_0", ISA8_SOUND_BLASTER_1_0)
SLOT_INTERFACE("sblaster1_5", ISA8_SOUND_BLASTER_1_5)
SLOT_INTERFACE("stereo_fx", ISA8_STEREO_FX)
SLOT_INTERFACE("ssi2001", ISA8_SSI2001)
SLOT_INTERFACE("ne1000", NE1000)
SLOT_INTERFACE("3c503", EL2_3C503)
SLOT_INTERFACE("mpu401", ISA8_MPU401)
SLOT_INTERFACE("lpt", ISA8_LPT)
SLOT_INTERFACE("ibm_mfc", ISA8_IBM_MFC)
SLOT_INTERFACE("fdcsmc", ISA8_FDC_SMC)
// 16-bit
SLOT_INTERFACE("ide", ISA16_IDE)
SLOT_INTERFACE("ide_cd", ISA16_IDE_CD)
SLOT_INTERFACE("ne2000", NE2000)
SLOT_INTERFACE("aha1542", AHA1542)
SLOT_INTERFACE("gus",ISA16_GUS)
SLOT_INTERFACE("sblaster_16", ISA16_SOUND_BLASTER_16)
SLOT_INTERFACE("svga_s3", ISA16_SVGA_S3)
SLOT_INTERFACE("s3virge", ISA16_S3VIRGE)
SLOT_INTERFACE("s3virgedx", ISA16_S3VIRGEDX)
SLOT_INTERFACE("gfxultra", ISA16_VGA_GFXULTRA)
SLOT_INTERFACE_END

61
src/mess/machine/isa_cards.h Normal file
View File

@ -0,0 +1,61 @@
/**********************************************************************
ISA cards
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
**********************************************************************/
#pragma once
#ifndef __ISA_CARDS_H__
#define __ISA_CARDS_H__
#include "emu.h"
// video
#include "video/isa_mda.h"
#include "video/isa_cga.h"
#include "video/isa_ega.h"
#include "video/isa_vga.h"
#include "video/isa_vga_ati.h"
#include "video/isa_svga_cirrus.h"
#include "video/isa_svga_s3.h"
#include "video/isa_svga_tseng.h"
// storage
#include "machine/isa_fdc.h"
#include "machine/isa_hdc.h"
#include "machine/isa_wdxt_gen.h"
#include "machine/isa_ide.h"
#include "machine/isa_ide_cd.h"
#include "machine/isa_aha1542.h"
// sound
#include "machine/isa_adlib.h"
#include "machine/isa_gblaster.h"
#include "machine/isa_gus.h"
#include "machine/isa_ibm_mfc.h"
#include "machine/isa_mpu401.h"
#include "machine/isa_sblaster.h"
#include "machine/isa_ssi2001.h"
#include "machine/isa_stereo_fx.h"
// network
#include "machine/3c503.h"
#include "machine/ne1000.h"
#include "machine/ne2000.h"
// communication ports
#include "machine/pc_lpt.h"
#include "machine/isa_com.h"
// other
#include "machine/isa_finalchs.h"
// supported devices
SLOT_INTERFACE_EXTERN( pc_isa8_cards );
SLOT_INTERFACE_EXTERN( pc_isa16_cards );
#endif // __ISA_CARDS_H__

7
src/mess/machine/southbridge.c
View File

@ -52,11 +52,6 @@ I8237_INTERFACE( at_dma8237_2_config )
{ DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, pc_dack4_w), DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, pc_dack5_w), DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, pc_dack6_w), DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, pc_dack7_w) }
};
const struct mc146818_interface at_mc146818_config =
{
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, at_mc146818_irq)
};
static const at_keyboard_controller_interface keyboard_controller_intf =
{
DEVCB_CPU_INPUT_LINE(":maincpu", INPUT_LINE_RESET),
@ -121,7 +116,7 @@ static MACHINE_CONFIG_FRAGMENT( southbridge )
MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf)
MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL)
MCFG_MC146818_IRQ_ADD( "rtc", MC146818_STANDARD, at_mc146818_config )
MCFG_MC146818_IRQ_ADD("rtc", MC146818_STANDARD, WRITELINE(southbridge_device, at_mc146818_irq))
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")

25
src/mess/machine/southbridge.h
View File

@ -9,14 +9,8 @@
#include "machine/mc146818.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
#include "video/isa_cga.h"
#include "video/isa_ega.h"
#include "video/isa_svga_cirrus.h"
#include "video/isa_svga_s3.h"
#include "video/isa_svga_tseng.h"
#include "machine/idectrl.h"
#include "machine/isa_aha1542.h"
#include "machine/at_keybc.h"
#include "imagedev/harddriv.h"
@ -28,28 +22,13 @@
#include "machine/ram.h"
#include "machine/nvram.h"
#include "machine/isa.h"
#include "machine/isa_adlib.h"
#include "machine/isa_com.h"
#include "machine/isa_fdc.h"
#include "machine/isa_gblaster.h"
#include "machine/isa_hdc.h"
#include "machine/isa_sblaster.h"
#include "machine/isa_gus.h"
#include "machine/3c503.h"
#include "machine/ne1000.h"
#include "machine/ne2000.h"
#include "video/isa_mda.h"
#include "machine/isa_mpu401.h"
#include "machine/isa_ibm_mfc.h"
#include "machine/isa_ide.h"
#include "machine/isa_ide_cd.h"
#include "machine/isa_cards.h"
#include "machine/pc_lpt.h"
#include "machine/pc_kbdc.h"
#include "machine/am9517a.h"
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************

60
src/mess/mess.mak
View File

@ -538,6 +538,7 @@ DRVLIBS += \
$(MESSOBJ)/intelgnt.a \
$(MESSOBJ)/interton.a \
$(MESSOBJ)/intv.a \
$(MESSOBJ)/isa.a \
$(MESSOBJ)/kaypro.a \
$(MESSOBJ)/koei.a \
$(MESSOBJ)/kyocera.a \
@ -735,7 +736,6 @@ $(MESSOBJ)/shared.a: \
$(MESS_MACHINE)/i8271.o \
$(MESS_MACHINE)/ieee488.o \
$(MESS_MACHINE)/imi5000h.o \
$(MESS_MACHINE)/isa.o \
$(MESS_MACHINE)/kb3600.o \
$(MESS_MACHINE)/keyboard.o \
$(MESS_MACHINE)/kr2376.o \
@ -771,6 +771,35 @@ $(MESSOBJ)/shared.a: \
$(MESS_MACHINE)/vcsctrl.o \
$(MESS_MACHINE)/z80bin.o \
$(MESSOBJ)/isa.a: \
$(MESS_MACHINE)/isa.o \
$(MESS_MACHINE)/isa_cards.o \
$(MESS_VIDEO)/isa_mda.o \
$(MESS_MACHINE)/isa_wdxt_gen.o \
$(MESS_MACHINE)/isa_adlib.o \
$(MESS_MACHINE)/isa_com.o \
$(MESS_MACHINE)/isa_fdc.o \
$(MESS_MACHINE)/isa_finalchs.o \
$(MESS_MACHINE)/isa_gblaster.o \
$(MESS_MACHINE)/isa_gus.o \
$(MESS_MACHINE)/isa_hdc.o \
$(MESS_MACHINE)/isa_ibm_mfc.o \
$(MESS_MACHINE)/isa_mpu401.o\
$(MESS_MACHINE)/isa_sblaster.o \
$(MESS_MACHINE)/isa_stereo_fx.o \
$(MESS_MACHINE)/isa_ssi2001.o \
$(MESS_MACHINE)/isa_ide.o \
$(MESS_MACHINE)/isa_ide8.o \
$(MESS_MACHINE)/isa_ide_cd.o\
$(MESS_MACHINE)/isa_aha1542.o \
$(MESS_VIDEO)/isa_cga.o \
$(MESS_VIDEO)/isa_svga_cirrus.o \
$(MESS_VIDEO)/isa_ega.o \
$(MESS_VIDEO)/isa_vga.o \
$(MESS_VIDEO)/isa_vga_ati.o \
$(MESS_VIDEO)/isa_svga_tseng.o \
$(MESS_VIDEO)/isa_svga_s3.o \
$(MESS_VIDEO)/s3virge.o \
#-------------------------------------------------
# manufacturer-specific groupings for drivers
@ -835,7 +864,6 @@ $(MESSOBJ)/amstrad.a: \
$(MESS_MACHINE)/pc1512kb.o \
$(MESS_VIDEO)/pc1512.o \
$(MESS_VIDEO)/pc1640.o \
$(MESS_MACHINE)/isa_wdxt_gen.o \
$(MESS_VIDEO)/nc.o \
$(MESS_DRIVERS)/nc.o \
$(MESS_MACHINE)/nc.o \
@ -949,10 +977,11 @@ $(MESSOBJ)/ascii.a: \
$(MESSOBJ)/at.a: \
$(MESS_MACHINE)/at_keybc.o \
$(MESS_MACHINE)/cs4031.o \
$(MESS_MACHINE)/cs8221.o \
$(MESS_MACHINE)/at.o \
$(MESS_DRIVERS)/at.o \
$(MESS_MACHINE)/cs4031.o \
$(MESS_DRIVERS)/ct486.o \
$(MESSOBJ)/atari.a: \
$(MESS_MACHINE)/ataricrt.o \
@ -1776,33 +1805,8 @@ $(MESSOBJ)/pcshare.a: \
$(MESS_MACHINE)/pc_keyboards.o \
$(MESS_MACHINE)/kb_keytro.o \
$(MESS_MACHINE)/kb_msnat.o \
$(MESS_MACHINE)/isa_adlib.o \
$(MESS_MACHINE)/ser_mouse.o \
$(MESS_MACHINE)/isa_com.o \
$(MESS_MACHINE)/isa_fdc.o \
$(MESS_MACHINE)/isa_finalchs.o \
$(MESS_MACHINE)/isa_gblaster.o \
$(MESS_MACHINE)/isa_gus.o \
$(MESS_MACHINE)/isa_hdc.o \
$(MESS_MACHINE)/isa_ibm_mfc.o \
$(MESS_MACHINE)/isa_mpu401.o\
$(MESS_MACHINE)/isa_sblaster.o \
$(MESS_MACHINE)/isa_stereo_fx.o \
$(MESS_MACHINE)/isa_ssi2001.o \
$(MESS_MACHINE)/isa_ide.o \
$(MESS_MACHINE)/isa_ide8.o \
$(MESS_MACHINE)/isa_ide_cd.o\
$(MESS_MACHINE)/isa_aha1542.o \
$(MESS_VIDEO)/isa_cga.o \
$(MESS_VIDEO)/isa_mda.o \
$(MESS_VIDEO)/crtc_ega.o \
$(MESS_VIDEO)/isa_ega.o \
$(MESS_VIDEO)/isa_vga.o \
$(MESS_VIDEO)/isa_vga_ati.o \
$(MESS_VIDEO)/isa_svga_tseng.o \
$(MESS_VIDEO)/isa_svga_s3.o \
$(MESS_VIDEO)/s3virge.o \
$(MESS_VIDEO)/isa_svga_cirrus.o \
$(MESS_MACHINE)/i82371ab.o \
$(MESS_MACHINE)/i82371sb.o \
$(MESS_MACHINE)/i82439tx.o \