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https://github.com/holub/mame
synced 2025-04-26 18:23:08 +03:00
fcisio: layout added and RS232 configured for all 8 serial ports, rs232p1-rs232p8
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@ -11,54 +11,54 @@
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* || ||
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* ||||--||
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* ||||--||
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* || ||__________________________________________________________ ___
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* || |_| |
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* || | | |
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* || | | |
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* || | | |
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* || | | |
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* || | | |
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* || | |VME|
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* || | | |
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* || | |P1 |
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* || | | |
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* || |_| |
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* || |___|
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* || |
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* || |
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* || |
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* || |
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* || |
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* || |
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* || |
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* || |
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* || |___
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* || _| |
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* || | | |
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* || | | |
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* || | | |
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* || | | |
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* || | |VME|
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* || | | |
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* || | |P2 |
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* || | | |
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* || | | |
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* || | | |
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* || |_| |
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* || |___|
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* || ||------------------------------------------------------------+-+
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* ||||--||
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* ||||--|| ISIO-1 Rev U (Newer revs has two EPROMs)
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* || ||__________________________________________________________ ___
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* || +---+---+---+---+---+---+---+---+ +---+ +---+ +---------+|_| |
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* RUN C| |16x | | | | | | | | | | | | || | |
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* || |64 or | | | | | | | | | | | +---------+| | |
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* R/L o-[| |256 Kb | | | | | | | | | | | | || | |
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* || |SRAM | | | | | | | | | | | +=========+| | |
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* LOCAL C| +---+---+---+---+---+---+---+---+ | | | | | || | |
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* HALT C| +---+---+---+---+---+---+---+---+ +---+ +---+ +---------+| |VME|
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* || | | | | | | | | | | | | | | || | |
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* || | | | | | | | | | | | | | +---------+| |P1 |
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* SEL C| | | | | | | | | | | | | | | || | |
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* FAIL C| | | | | | | | | | | | | | +---------+| | |
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* || +---+---+---+---+---+---+---+---+ | | +---+ | || | |
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* || +------+ +----++---+---+---+ +---+ | | +---------+| | |
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* || | |..| || | | | [[ [[[ | | | || | |
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* S1 C| |EPROM |..| || | | | +------+ | +=========+| | |
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* S2 C| | |..| || | | | | | | | ||_| |
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* S3 C| | |..+----++ | | | |BIM | | |---------+ |___|
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* S4 C| | | .|XTL | | | | |68153 +---+ | | |
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* || | |..|16.0 +---+---+---+---+| | | +---------+ |
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* || +------+..|MHz | +---+---+---+| | | | | |
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* ||+----------+-----+---+ | | || | | +---------+ |
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* ||| +-----+ | | | || | | | | |
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* ||| CPU |XTL | | | | || | | +=========+ |
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* ||| 68010 |14.74| | | | |+------+---+ [[[[ |
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* ||| |MHz +---+---+---+---+ ========= |
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* ||+---+======+==---+===========+ ========= |___
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* |+---+| |.. +------++------+ _| |
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* || || PIT 68230 |.. |1488 ||1489 | | | |
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* || || |.. +------++------+ | | |
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* || |+------------------------+.. |1488 ||1489 | | | |
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* || || |.. +------++------+ | | |
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* |+---+| DUSCC 68562 |.. |75188 ||1489 | | |VME|
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* |+---+| |.. +------++------+ | | |
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* || |+------------------------+.. |75188 ||1489 | | |P2 |
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* || || |.. +------++------+ | | |
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* || || DUSCC 68562 |.. |75188 ||1489 | | | |
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* |+---+| |.. +------++------+ | | |
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* |+---++------------------------+.. |75188 ||1489 | | | |
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* || || |.. +------++------+ | | |
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* || || DUSCC 68562 |.. |1488 ||1489 | | | |
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* || || |.. +------++------+ | | |
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* || |+------------------------+.. |1488 ||1489 | | | |
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* |+---+| |.. +------++------+ |_| |
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* || | DUSCC 68562 |.. ========= |___|
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* || || | |.. ========= |
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* ||||--||----+------------------------+------------------------------+
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* ||||--||
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* ||
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*
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@ -124,7 +124,7 @@
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* PIT and DUSCCs are hooked up to the BIM to get further.
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*
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****************************************************************************/
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#define TODO "Driver for 68153 BIM device needed\n"
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#define TODO "VME side hookup of 68153 BIM device needed\n"
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#include "emu.h"
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#include "cpu/m68000/m68000.h"
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@ -135,21 +135,15 @@
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#include "machine/clock.h"
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#include "vme_fcisio.h"
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#define LOG_GENERAL 0x01
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#define LOG_SETUP 0x02
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#define LOG_PRINTF 0x04
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//#define LOG_GENERAL (1U << 0)
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#define LOG_SETUP (1U << 1)
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#define VERBOSE 0 //(LOG_PRINTF | LOG_SETUP | LOG_GENERAL)
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//#define VERBOSE (LOG_GENERAL | LOG_SETUP)
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//#define LOG_OUTPUT_FUNC printf
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#define LOGMASK(mask, ...) do { if (VERBOSE & mask) logerror(__VA_ARGS__); } while (0)
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#define LOGLEVEL(mask, level, ...) do { if ((VERBOSE & mask) >= level) logerror(__VA_ARGS__); } while (0)
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#include "logmacro.h"
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#define LOG(...) LOGMASK(LOG_GENERAL, __VA_ARGS__)
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#define LOGSETUP(...) LOGMASK(LOG_SETUP, __VA_ARGS__)
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#if VERBOSE & LOG_PRINTF
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#define logerror printf
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#endif
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#define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__)
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#ifdef _MSC_VER
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#define FUNCNAME __func__
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@ -187,19 +181,87 @@ static MACHINE_CONFIG_FRAGMENT (fcisio1)
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MCFG_CPU_ADD ("maincpu", M68010, CPU_CLOCK / 2)
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MCFG_CPU_PROGRAM_MAP (fcisio1_mem)
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MCFG_DUSCC68562_ADD("duscc0", DUSCC_CLOCK, 0, 0, 0, 0 )
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MCFG_DUSCC_OUT_TXDA_CB(DEVWRITELINE("rs232trm", rs232_port_device, write_txd))
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MCFG_DUSCC_OUT_DTRA_CB(DEVWRITELINE("rs232trm", rs232_port_device, write_dtr))
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MCFG_DUSCC_OUT_RTSA_CB(DEVWRITELINE("rs232trm", rs232_port_device, write_rts))
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/* DUSCC channels */
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#define RS232P1_TAG "rs232p1"
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#define RS232P2_TAG "rs232p2"
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#define RS232P3_TAG "rs232p3"
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#define RS232P4_TAG "rs232p4"
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#define RS232P5_TAG "rs232p5"
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#define RS232P6_TAG "rs232p6"
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#define RS232P7_TAG "rs232p7"
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#define RS232P8_TAG "rs232p8"
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MCFG_RS232_PORT_ADD ("rs232trm", default_rs232_devices, "terminal")
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MCFG_DUSCC68562_ADD("duscc0", DUSCC_CLOCK, 0, 0, 0, 0 )
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/* Port 1 on DUSCC 0 Port A */
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MCFG_DUSCC_OUT_TXDA_CB(DEVWRITELINE(RS232P1_TAG, rs232_port_device, write_txd))
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MCFG_DUSCC_OUT_DTRA_CB(DEVWRITELINE(RS232P1_TAG, rs232_port_device, write_dtr))
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MCFG_DUSCC_OUT_RTSA_CB(DEVWRITELINE(RS232P1_TAG, rs232_port_device, write_rts))
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/* Port 2 on DUSCC 0 Port B */
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MCFG_DUSCC_OUT_TXDB_CB(DEVWRITELINE(RS232P2_TAG, rs232_port_device, write_txd))
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MCFG_DUSCC_OUT_DTRB_CB(DEVWRITELINE(RS232P2_TAG, rs232_port_device, write_dtr))
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MCFG_DUSCC_OUT_RTSB_CB(DEVWRITELINE(RS232P2_TAG, rs232_port_device, write_rts))
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/* RS232 for DUSCC 0 */
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MCFG_RS232_PORT_ADD (RS232P1_TAG, default_rs232_devices, "terminal")
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MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("duscc0", duscc68562_device, rxa_w))
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MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("duscc0", duscc68562_device, ctsa_w))
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// MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("terminal", fcisio_terminal)
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MCFG_RS232_PORT_ADD (RS232P2_TAG, default_rs232_devices, nullptr)
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MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("duscc0", duscc68562_device, rxb_w))
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MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("duscc0", duscc68562_device, ctsb_w))
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MCFG_DUSCC68562_ADD("duscc1", DUSCC_CLOCK, 0, 0, 0, 0 )
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/* Port 3 on DUSCC 1 Port A */
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MCFG_DUSCC_OUT_TXDA_CB(DEVWRITELINE(RS232P3_TAG, rs232_port_device, write_txd))
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MCFG_DUSCC_OUT_DTRA_CB(DEVWRITELINE(RS232P3_TAG, rs232_port_device, write_dtr))
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MCFG_DUSCC_OUT_RTSA_CB(DEVWRITELINE(RS232P3_TAG, rs232_port_device, write_rts))
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/* Port 4 on DUSCC 1 Port B */
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MCFG_DUSCC_OUT_TXDB_CB(DEVWRITELINE(RS232P4_TAG, rs232_port_device, write_txd))
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MCFG_DUSCC_OUT_DTRB_CB(DEVWRITELINE(RS232P4_TAG, rs232_port_device, write_dtr))
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MCFG_DUSCC_OUT_RTSB_CB(DEVWRITELINE(RS232P4_TAG, rs232_port_device, write_rts))
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/* RS232 for DUSCC 1 */
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MCFG_RS232_PORT_ADD (RS232P3_TAG, default_rs232_devices, nullptr)
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MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("duscc1", duscc68562_device, rxa_w))
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MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("duscc1", duscc68562_device, ctsa_w))
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MCFG_RS232_PORT_ADD (RS232P4_TAG, default_rs232_devices, nullptr)
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MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("duscc1", duscc68562_device, rxb_w))
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MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("duscc1", duscc68562_device, ctsb_w))
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MCFG_DUSCC68562_ADD("duscc2", DUSCC_CLOCK, 0, 0, 0, 0 )
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/* Port 5 on DUSCC 2 Port A */
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MCFG_DUSCC_OUT_TXDA_CB(DEVWRITELINE(RS232P5_TAG, rs232_port_device, write_txd))
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MCFG_DUSCC_OUT_DTRA_CB(DEVWRITELINE(RS232P5_TAG, rs232_port_device, write_dtr))
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MCFG_DUSCC_OUT_RTSA_CB(DEVWRITELINE(RS232P5_TAG, rs232_port_device, write_rts))
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/* Port 6 on DUSCC 2 Port B */
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MCFG_DUSCC_OUT_TXDB_CB(DEVWRITELINE(RS232P6_TAG, rs232_port_device, write_txd))
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MCFG_DUSCC_OUT_DTRB_CB(DEVWRITELINE(RS232P6_TAG, rs232_port_device, write_dtr))
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MCFG_DUSCC_OUT_RTSB_CB(DEVWRITELINE(RS232P6_TAG, rs232_port_device, write_rts))
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/* RS232 for DUSCC 2 */
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MCFG_RS232_PORT_ADD (RS232P5_TAG, default_rs232_devices, nullptr)
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MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("duscc2", duscc68562_device, rxa_w))
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MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("duscc2", duscc68562_device, ctsa_w))
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MCFG_RS232_PORT_ADD (RS232P6_TAG, default_rs232_devices, nullptr)
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MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("duscc2", duscc68562_device, rxb_w))
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MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("duscc2", duscc68562_device, ctsb_w))
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MCFG_DUSCC68562_ADD("duscc3", DUSCC_CLOCK, 0, 0, 0, 0 )
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/* Port 7 on DUSCC 3 Port A */
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MCFG_DUSCC_OUT_TXDA_CB(DEVWRITELINE(RS232P7_TAG, rs232_port_device, write_txd))
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MCFG_DUSCC_OUT_DTRA_CB(DEVWRITELINE(RS232P7_TAG, rs232_port_device, write_dtr))
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MCFG_DUSCC_OUT_RTSA_CB(DEVWRITELINE(RS232P7_TAG, rs232_port_device, write_rts))
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/* Port 8 on DUSCC 3 Port B */
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MCFG_DUSCC_OUT_TXDB_CB(DEVWRITELINE(RS232P8_TAG, rs232_port_device, write_txd))
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MCFG_DUSCC_OUT_DTRB_CB(DEVWRITELINE(RS232P8_TAG, rs232_port_device, write_dtr))
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MCFG_DUSCC_OUT_RTSB_CB(DEVWRITELINE(RS232P8_TAG, rs232_port_device, write_rts))
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/* RS232 for DUSCC 4 */
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MCFG_RS232_PORT_ADD (RS232P7_TAG, default_rs232_devices, nullptr)
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MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("duscc3", duscc68562_device, rxa_w))
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MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("duscc3", duscc68562_device, ctsa_w))
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MCFG_RS232_PORT_ADD (RS232P8_TAG, default_rs232_devices, nullptr)
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MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("duscc3", duscc68562_device, rxb_w))
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MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("duscc3", duscc68562_device, ctsb_w))
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MCFG_DEVICE_ADD ("pit", PIT68230, XTAL_20MHz / 2)
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MCFG_PIT68230_PB_INPUT_CB(READ8(vme_fcisio1_card_device, config_rd))
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