mirror of
https://github.com/holub/mame
synced 2025-07-03 17:08:39 +03:00
upd4701: Simplify handlers (nw)
This commit is contained in:
parent
a27dee790e
commit
ffe4446cb1
@ -33,6 +33,7 @@ upd4701_device::upd4701_device(const machine_config &mconfig, const char *tag, d
|
|||||||
, m_cf(true)
|
, m_cf(true)
|
||||||
, m_cf_cb(*this)
|
, m_cf_cb(*this)
|
||||||
, m_sf_cb(*this)
|
, m_sf_cb(*this)
|
||||||
|
, m_open_bus_cb(*this)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -45,6 +46,7 @@ void upd4701_device::device_start()
|
|||||||
// resolve callbacks
|
// resolve callbacks
|
||||||
m_cf_cb.resolve_safe();
|
m_cf_cb.resolve_safe();
|
||||||
m_sf_cb.resolve_safe();
|
m_sf_cb.resolve_safe();
|
||||||
|
m_open_bus_cb.resolve_safe(0);
|
||||||
|
|
||||||
// register state for saving
|
// register state for saving
|
||||||
save_item(NAME(m_cs));
|
save_item(NAME(m_cs));
|
||||||
@ -148,17 +150,17 @@ WRITE_LINE_MEMBER(upd4701_device::resety_w)
|
|||||||
// reset_x - pulse the X counter reset line
|
// reset_x - pulse the X counter reset line
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
|
|
||||||
READ8_MEMBER(upd4701_device::reset_x_r)
|
u8 upd4701_device::reset_x_r()
|
||||||
{
|
{
|
||||||
if (!machine().side_effects_disabled())
|
if (!machine().side_effects_disabled())
|
||||||
{
|
{
|
||||||
resetx_w(1);
|
resetx_w(1);
|
||||||
resetx_w(0);
|
resetx_w(0);
|
||||||
}
|
}
|
||||||
return space.unmap();
|
return m_open_bus_cb();
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(upd4701_device::reset_x_w)
|
void upd4701_device::reset_x_w(u8 data)
|
||||||
{
|
{
|
||||||
resetx_w(1);
|
resetx_w(1);
|
||||||
resetx_w(0);
|
resetx_w(0);
|
||||||
@ -168,17 +170,17 @@ WRITE8_MEMBER(upd4701_device::reset_x_w)
|
|||||||
// reset_y - pulse the Y counter reset line
|
// reset_y - pulse the Y counter reset line
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
|
|
||||||
READ8_MEMBER(upd4701_device::reset_y_r)
|
u8 upd4701_device::reset_y_r()
|
||||||
{
|
{
|
||||||
if (!machine().side_effects_disabled())
|
if (!machine().side_effects_disabled())
|
||||||
{
|
{
|
||||||
resety_w(1);
|
resety_w(1);
|
||||||
resety_w(0);
|
resety_w(0);
|
||||||
}
|
}
|
||||||
return space.unmap();
|
return m_open_bus_cb();
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(upd4701_device::reset_y_w)
|
void upd4701_device::reset_y_w(u8 data)
|
||||||
{
|
{
|
||||||
resety_w(1);
|
resety_w(1);
|
||||||
resety_w(0);
|
resety_w(0);
|
||||||
@ -188,7 +190,7 @@ WRITE8_MEMBER(upd4701_device::reset_y_w)
|
|||||||
// reset_xy - pulse the counter reset lines
|
// reset_xy - pulse the counter reset lines
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
|
|
||||||
READ8_MEMBER(upd4701_device::reset_xy_r)
|
u8 upd4701_device::reset_xy_r()
|
||||||
{
|
{
|
||||||
if (!machine().side_effects_disabled())
|
if (!machine().side_effects_disabled())
|
||||||
{
|
{
|
||||||
@ -197,10 +199,10 @@ READ8_MEMBER(upd4701_device::reset_xy_r)
|
|||||||
resetx_w(0);
|
resetx_w(0);
|
||||||
resety_w(0);
|
resety_w(0);
|
||||||
}
|
}
|
||||||
return space.unmap();
|
return m_open_bus_cb();
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(upd4701_device::reset_xy_w)
|
void upd4701_device::reset_xy_w(u8 data)
|
||||||
{
|
{
|
||||||
resetx_w(1);
|
resetx_w(1);
|
||||||
resety_w(1);
|
resety_w(1);
|
||||||
@ -313,12 +315,12 @@ WRITE_LINE_MEMBER(upd4701_device::middle_w)
|
|||||||
// d_r - read data lines directly
|
// d_r - read data lines directly
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
|
|
||||||
READ8_MEMBER(upd4701_device::d_r)
|
u8 upd4701_device::d_r()
|
||||||
{
|
{
|
||||||
if (m_cs)
|
if (m_cs)
|
||||||
{
|
{
|
||||||
logerror("Read while CS inactive\n");
|
logerror("Read while CS inactive\n");
|
||||||
return space.unmap();
|
return m_open_bus_cb();
|
||||||
}
|
}
|
||||||
|
|
||||||
u16 data = m_xy ? m_latchy : m_latchx;
|
u16 data = m_xy ? m_latchy : m_latchx;
|
||||||
@ -334,31 +336,31 @@ READ8_MEMBER(upd4701_device::d_r)
|
|||||||
// read_x - read X axis through data/address bus
|
// read_x - read X axis through data/address bus
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
|
|
||||||
READ8_MEMBER(upd4701_device::read_x)
|
u8 upd4701_device::read_x(offs_t offset)
|
||||||
{
|
{
|
||||||
return read_xy(space, (offset & 1) | 0);
|
return read_xy((offset & 1) | 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
// read_y - read Y axis through data/address bus
|
// read_y - read Y axis through data/address bus
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
|
|
||||||
READ8_MEMBER(upd4701_device::read_y)
|
u8 upd4701_device::read_y(offs_t offset)
|
||||||
{
|
{
|
||||||
return read_xy(space, (offset & 1) | 2);
|
return read_xy((offset & 1) | 2);
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
// read_xy - read either axis through bus
|
// read_xy - read either axis through bus
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
|
|
||||||
READ8_MEMBER(upd4701_device::read_xy)
|
u8 upd4701_device::read_xy(offs_t offset)
|
||||||
{
|
{
|
||||||
bool old_cs = m_cs;
|
bool old_cs = m_cs;
|
||||||
cs_w(0);
|
cs_w(0);
|
||||||
xy_w(BIT(offset, 1));
|
xy_w(BIT(offset, 1));
|
||||||
ul_w(BIT(offset, 0));
|
ul_w(BIT(offset, 0));
|
||||||
u8 result = d_r(space, 0);
|
u8 result = d_r();
|
||||||
cs_w(old_cs);
|
cs_w(old_cs);
|
||||||
return result;
|
return result;
|
||||||
}
|
}
|
||||||
|
@ -37,6 +37,7 @@ public:
|
|||||||
template <typename T> void set_porty_tag(T &&tag) { m_porty.set_tag(std::forward<T>(tag)); }
|
template <typename T> void set_porty_tag(T &&tag) { m_porty.set_tag(std::forward<T>(tag)); }
|
||||||
auto cf_cb() { return m_cf_cb.bind(); }
|
auto cf_cb() { return m_cf_cb.bind(); }
|
||||||
auto sf_cb() { return m_sf_cb.bind(); }
|
auto sf_cb() { return m_sf_cb.bind(); }
|
||||||
|
auto open_bus_cb() { return m_open_bus_cb.bind(); }
|
||||||
|
|
||||||
void x_add(s16 data);
|
void x_add(s16 data);
|
||||||
void y_add(s16 data);
|
void y_add(s16 data);
|
||||||
@ -46,17 +47,17 @@ public:
|
|||||||
DECLARE_WRITE_LINE_MEMBER(ul_w);
|
DECLARE_WRITE_LINE_MEMBER(ul_w);
|
||||||
DECLARE_WRITE_LINE_MEMBER(resetx_w);
|
DECLARE_WRITE_LINE_MEMBER(resetx_w);
|
||||||
DECLARE_WRITE_LINE_MEMBER(resety_w);
|
DECLARE_WRITE_LINE_MEMBER(resety_w);
|
||||||
DECLARE_READ8_MEMBER(reset_x_r);
|
u8 reset_x_r();
|
||||||
DECLARE_WRITE8_MEMBER(reset_x_w);
|
void reset_x_w(u8 data);
|
||||||
DECLARE_READ8_MEMBER(reset_y_r);
|
u8 reset_y_r();
|
||||||
DECLARE_WRITE8_MEMBER(reset_y_w);
|
void reset_y_w(u8 data);
|
||||||
DECLARE_READ8_MEMBER(reset_xy_r);
|
u8 reset_xy_r();
|
||||||
DECLARE_WRITE8_MEMBER(reset_xy_w);
|
void reset_xy_w(u8 data);
|
||||||
|
|
||||||
DECLARE_READ8_MEMBER(d_r);
|
u8 d_r();
|
||||||
DECLARE_READ8_MEMBER(read_x);
|
u8 read_x(offs_t offset);
|
||||||
DECLARE_READ8_MEMBER(read_y);
|
u8 read_y(offs_t offset);
|
||||||
DECLARE_READ8_MEMBER(read_xy);
|
u8 read_xy(offs_t offset);
|
||||||
|
|
||||||
DECLARE_WRITE_LINE_MEMBER(left_w);
|
DECLARE_WRITE_LINE_MEMBER(left_w);
|
||||||
DECLARE_WRITE_LINE_MEMBER(right_w);
|
DECLARE_WRITE_LINE_MEMBER(right_w);
|
||||||
@ -99,6 +100,7 @@ private:
|
|||||||
bool m_cf;
|
bool m_cf;
|
||||||
devcb_write_line m_cf_cb;
|
devcb_write_line m_cf_cb;
|
||||||
devcb_write_line m_sf_cb;
|
devcb_write_line m_sf_cb;
|
||||||
|
devcb_read8 m_open_bus_cb;
|
||||||
};
|
};
|
||||||
|
|
||||||
DECLARE_DEVICE_TYPE(UPD4701A, upd4701_device)
|
DECLARE_DEVICE_TYPE(UPD4701A, upd4701_device)
|
||||||
|
@ -931,7 +931,7 @@ READ16_MEMBER( ksys573_state::ge765pwbba_r )
|
|||||||
{
|
{
|
||||||
case 0x4c:
|
case 0x4c:
|
||||||
case 0x4d:
|
case 0x4d:
|
||||||
return m_upd4701->read_y(space, offset & 1);
|
return m_upd4701->read_y(offset & 1);
|
||||||
|
|
||||||
default:
|
default:
|
||||||
verboselog( 0, "ge765pwbba_r: unhandled offset %08x %08x\n", offset, mem_mask );
|
verboselog( 0, "ge765pwbba_r: unhandled offset %08x %08x\n", offset, mem_mask );
|
||||||
|
@ -582,7 +582,7 @@ WRITE8_MEMBER( segas18_state::lghost_gun_recoil_w )
|
|||||||
READ16_MEMBER( segas18_state::wwally_custom_io_r )
|
READ16_MEMBER( segas18_state::wwally_custom_io_r )
|
||||||
{
|
{
|
||||||
if (offset >= 0x3000/2 && offset < 0x3018/2)
|
if (offset >= 0x3000/2 && offset < 0x3018/2)
|
||||||
return m_upd4701[(offset & 0x0018/2) >> 2]->read_xy(space, offset & 0x0006/2);
|
return m_upd4701[(offset & 0x0018/2) >> 2]->read_xy(offset & 0x0006/2);
|
||||||
|
|
||||||
return m_mapper->open_bus_r();
|
return m_mapper->open_bus_r();
|
||||||
}
|
}
|
||||||
@ -591,7 +591,7 @@ READ16_MEMBER( segas18_state::wwally_custom_io_r )
|
|||||||
WRITE16_MEMBER( segas18_state::wwally_custom_io_w )
|
WRITE16_MEMBER( segas18_state::wwally_custom_io_w )
|
||||||
{
|
{
|
||||||
if (offset >= 0x3000/2 && offset < 0x3018/2)
|
if (offset >= 0x3000/2 && offset < 0x3018/2)
|
||||||
m_upd4701[(offset & 0x0018/2) >> 2]->reset_xy_r(space, 0);
|
m_upd4701[(offset & 0x0018/2) >> 2]->reset_xy_r();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -585,8 +585,8 @@ void horshoes_state::horshoes_map(address_map &map)
|
|||||||
map(0x8000, 0x9fff).ram();
|
map(0x8000, 0x9fff).ram();
|
||||||
map(0xa000, 0xa003).r(FUNC(horshoes_state::extport_select_and_ym2203_r)).w(m_ymsnd, FUNC(ym2203_device::write));
|
map(0xa000, 0xa003).r(FUNC(horshoes_state::extport_select_and_ym2203_r)).w(m_ymsnd, FUNC(ym2203_device::write));
|
||||||
map(0xa800, 0xa800).select(0x000c).lr8(NAME(
|
map(0xa800, 0xa800).select(0x000c).lr8(NAME(
|
||||||
[this](address_space &space, offs_t offset, u8 mem_mask) {
|
[this](offs_t offset) {
|
||||||
return m_upd4701->read_xy(space, offset >> 2, mem_mask);
|
return m_upd4701->read_xy(offset >> 2);
|
||||||
}));
|
}));
|
||||||
map(0xa802, 0xa802).r(m_upd4701, FUNC(upd4701_device::reset_x_r));
|
map(0xa802, 0xa802).r(m_upd4701, FUNC(upd4701_device::reset_x_r));
|
||||||
map(0xa803, 0xa803).r(m_upd4701, FUNC(upd4701_device::reset_y_r));
|
map(0xa803, 0xa803).r(m_upd4701, FUNC(upd4701_device::reset_y_r));
|
||||||
|
@ -36,26 +36,26 @@ public:
|
|||||||
void ultrsprt(machine_config &config);
|
void ultrsprt(machine_config &config);
|
||||||
|
|
||||||
private:
|
private:
|
||||||
static const uint32_t VRAM_PAGES = 2;
|
static const u32 VRAM_PAGES = 2;
|
||||||
static const uint32_t VRAM_PAGE_BYTES = 512 * 1024;
|
static const u32 VRAM_PAGE_BYTES = 512 * 1024;
|
||||||
|
|
||||||
required_device<ppc_device> m_maincpu;
|
required_device<ppc_device> m_maincpu;
|
||||||
required_device<cpu_device> m_audiocpu;
|
required_device<cpu_device> m_audiocpu;
|
||||||
required_device<k056800_device> m_k056800;
|
required_device<k056800_device> m_k056800;
|
||||||
required_shared_ptr<uint32_t> m_workram;
|
required_shared_ptr<u32> m_workram;
|
||||||
required_device<palette_device> m_palette;
|
required_device<palette_device> m_palette;
|
||||||
required_device<eeprom_serial_93cxx_device> m_eeprom;
|
required_device<eeprom_serial_93cxx_device> m_eeprom;
|
||||||
required_device_array<upd4701_device, 2> m_upd;
|
required_device_array<upd4701_device, 2> m_upd;
|
||||||
|
|
||||||
required_ioport m_service;
|
required_ioport m_service;
|
||||||
|
|
||||||
DECLARE_READ8_MEMBER(eeprom_r);
|
u8 eeprom_r();
|
||||||
DECLARE_WRITE8_MEMBER(eeprom_w);
|
void eeprom_w(u8 data);
|
||||||
DECLARE_READ16_MEMBER(upd1_r);
|
u16 upd1_r(offs_t offset);
|
||||||
DECLARE_READ16_MEMBER(upd2_r);
|
u16 upd2_r(offs_t offset);
|
||||||
DECLARE_WRITE32_MEMBER(int_ack_w);
|
void int_ack_w(u32 data);
|
||||||
|
|
||||||
uint32_t screen_update_ultrsprt(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
u32 screen_update_ultrsprt(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||||
|
|
||||||
void sound_map(address_map &map);
|
void sound_map(address_map &map);
|
||||||
void ultrsprt_map(address_map &map);
|
void ultrsprt_map(address_map &map);
|
||||||
@ -63,25 +63,25 @@ private:
|
|||||||
virtual void machine_start() override;
|
virtual void machine_start() override;
|
||||||
virtual void machine_reset() override;
|
virtual void machine_reset() override;
|
||||||
|
|
||||||
std::unique_ptr<uint8_t[]> m_vram;
|
std::unique_ptr<u8[]> m_vram;
|
||||||
uint32_t m_cpu_vram_page;
|
u32 m_cpu_vram_page;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
uint32_t ultrsprt_state::screen_update_ultrsprt(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
u32 ultrsprt_state::screen_update_ultrsprt(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||||
{
|
{
|
||||||
uint8_t *vram = m_vram.get() + (m_cpu_vram_page ^ 1) * VRAM_PAGE_BYTES;
|
u8 *vram = m_vram.get() + (m_cpu_vram_page ^ 1) * VRAM_PAGE_BYTES;
|
||||||
|
|
||||||
for (int y = cliprect.min_y; y <= cliprect.max_y; ++y)
|
for (int y = cliprect.min_y; y <= cliprect.max_y; ++y)
|
||||||
{
|
{
|
||||||
int fb_index = y * 1024;
|
int fb_index = y * 1024;
|
||||||
uint16_t *dest = &bitmap.pix16(y, cliprect.min_x);
|
u16 *dest = &bitmap.pix16(y, cliprect.min_x);
|
||||||
|
|
||||||
for (int x = cliprect.min_x; x <= cliprect.max_x; ++x)
|
for (int x = cliprect.min_x; x <= cliprect.max_x; ++x)
|
||||||
{
|
{
|
||||||
uint8_t p1 = vram[BYTE4_XOR_BE(fb_index + x + 512)];
|
u8 p1 = vram[BYTE4_XOR_BE(fb_index + x + 512)];
|
||||||
|
|
||||||
if (p1 == 0)
|
if (p1 == 0)
|
||||||
*dest++ = vram[BYTE4_XOR_BE(fb_index + x)];
|
*dest++ = vram[BYTE4_XOR_BE(fb_index + x)];
|
||||||
@ -96,18 +96,18 @@ uint32_t ultrsprt_state::screen_update_ultrsprt(screen_device &screen, bitmap_in
|
|||||||
|
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
WRITE32_MEMBER(ultrsprt_state::int_ack_w)
|
void ultrsprt_state::int_ack_w(u32 data)
|
||||||
{
|
{
|
||||||
m_maincpu->set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
|
m_maincpu->set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
READ8_MEMBER(ultrsprt_state::eeprom_r)
|
u8 ultrsprt_state::eeprom_r()
|
||||||
{
|
{
|
||||||
return m_service->read();
|
return m_service->read();
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(ultrsprt_state::eeprom_w)
|
void ultrsprt_state::eeprom_w(u8 data)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
.... ...x - EEPROM DI
|
.... ...x - EEPROM DI
|
||||||
@ -123,7 +123,7 @@ WRITE8_MEMBER(ultrsprt_state::eeprom_w)
|
|||||||
m_eeprom->clk_write(!BIT(data, 1));
|
m_eeprom->clk_write(!BIT(data, 1));
|
||||||
m_eeprom->cs_write(BIT(data, 2));
|
m_eeprom->cs_write(BIT(data, 2));
|
||||||
|
|
||||||
uint32_t vram_page = (data & 0x08) >> 3;
|
u32 vram_page = (data & 0x08) >> 3;
|
||||||
if (vram_page != m_cpu_vram_page)
|
if (vram_page != m_cpu_vram_page)
|
||||||
{
|
{
|
||||||
membank("vram")->set_entry(vram_page);
|
membank("vram")->set_entry(vram_page);
|
||||||
@ -139,14 +139,14 @@ WRITE8_MEMBER(ultrsprt_state::eeprom_w)
|
|||||||
m_audiocpu->set_input_line(INPUT_LINE_RESET, BIT(data, 7) ? CLEAR_LINE : ASSERT_LINE);
|
m_audiocpu->set_input_line(INPUT_LINE_RESET, BIT(data, 7) ? CLEAR_LINE : ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
READ16_MEMBER(ultrsprt_state::upd1_r)
|
u16 ultrsprt_state::upd1_r(offs_t offset)
|
||||||
{
|
{
|
||||||
return m_upd[0]->read_xy(space, offset * 2) | (m_upd[0]->read_xy(space, offset * 2 + 1) << 8);
|
return m_upd[0]->read_xy(offset * 2) | (m_upd[0]->read_xy(offset * 2 + 1) << 8);
|
||||||
}
|
}
|
||||||
|
|
||||||
READ16_MEMBER(ultrsprt_state::upd2_r)
|
u16 ultrsprt_state::upd2_r(offs_t offset)
|
||||||
{
|
{
|
||||||
return m_upd[1]->read_xy(space, offset * 2) | (m_upd[1]->read_xy(space, offset * 2 + 1) << 8);
|
return m_upd[1]->read_xy(offset * 2) | (m_upd[1]->read_xy(offset * 2 + 1) << 8);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
@ -218,7 +218,7 @@ void ultrsprt_state::machine_start()
|
|||||||
/* configure fast RAM regions for DRC */
|
/* configure fast RAM regions for DRC */
|
||||||
m_maincpu->ppcdrc_add_fastram(0xff000000, 0xff01ffff, false, m_workram);
|
m_maincpu->ppcdrc_add_fastram(0xff000000, 0xff01ffff, false, m_workram);
|
||||||
|
|
||||||
m_vram = std::make_unique<uint8_t[]>(VRAM_PAGE_BYTES * VRAM_PAGES);
|
m_vram = std::make_unique<u8[]>(VRAM_PAGE_BYTES * VRAM_PAGES);
|
||||||
|
|
||||||
membank("vram")->configure_entries(0, VRAM_PAGES, m_vram.get(), VRAM_PAGE_BYTES);
|
membank("vram")->configure_entries(0, VRAM_PAGES, m_vram.get(), VRAM_PAGE_BYTES);
|
||||||
|
|
||||||
|
@ -88,7 +88,7 @@ protected:
|
|||||||
DECLARE_READ8_MEMBER(mcu_r);
|
DECLARE_READ8_MEMBER(mcu_r);
|
||||||
DECLARE_WRITE8_MEMBER(mcu_w);
|
DECLARE_WRITE8_MEMBER(mcu_w);
|
||||||
|
|
||||||
DECLARE_READ8_MEMBER(analog_r);
|
uint8_t analog_r(offs_t offset);
|
||||||
|
|
||||||
void tnzs_sub_map(address_map &map);
|
void tnzs_sub_map(address_map &map);
|
||||||
|
|
||||||
|
@ -67,10 +67,10 @@ WRITE8_MEMBER(tnzs_mcu_state::mcu_port2_w)
|
|||||||
m_input_select = data & 0xf;
|
m_input_select = data & 0xf;
|
||||||
}
|
}
|
||||||
|
|
||||||
READ8_MEMBER(tnzs_mcu_state::analog_r)
|
uint8_t tnzs_mcu_state::analog_r(offs_t offset)
|
||||||
{
|
{
|
||||||
if (m_upd4701.found())
|
if (m_upd4701.found())
|
||||||
return m_upd4701->read_xy(space, offset);
|
return m_upd4701->read_xy(offset);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user