On real hardware, this transfer is not atomic, but
done bit-by-bit on the last clock cycles of a byte
reception. Do the same, so bugs in programs are not
hidden from developers.
Also fixes another discrepancy with reality: when
the RDR is full and a byte arrives, it is transferred
to the RDR, and the Overrun flag is set. Our
implementation did set the flag but left the old byte
in the RDR.
------------------------------
Jin Huang Guan 3 Dai (V445CN) [little0]
New working clones
------------------
Jungle King (V105US) [Ioannis Bampoulas]
Tarzan (V106FA) [Ioannis Bampoulas]
- sealy/sealy_z80.cpp: dumped EEPROM for djddz [little0]
* Emulated HD61602 device.
* Incorporated it into the 707 driver and layout.
* Corrected tempo potentiometer curve.
* Made dinsync testable.
* Marked systems as supporting save.
* Minor layout cleanup.
nubus/enetnbtp.cpp: Support for the Apple Ethernet NB Twisted Pair card. [R. Belmont, Al Kossow]
apple/macpwrbkmsc.cpp: Support the dock slot on all supported PowerBook Duos. [R. Belmont]
nubus/pwrbkduo/duodock.cpp: Preliminary support for the PowerBook Duo Dock, including video, SCSI bus, floppy, and NuBus slots. [R. Belmont, Al Kossow]
nubus/pwrbkduo/ethernetudock.cpp: Support for the Newer Technology Ethernet MicroDock. [R. Belmont, Doug Brown]
nubus/pwrbkduo/floppydock.cpp: Support for the PowerBook Duo Floppy Dock. [R. Belmont]
------------------------------
Chao Ji Bie Qi (V205CN) [little0]
Chao Ji Gan Deng Yan (V110CN) [little0]
Da Hua Xi You (V201CN) [little0]
Huo Qi Lin (V116CN) [little0]
Majiang Zhi Zun (S100CN) [little0]
Tian Sheng Hao Shou (V101CN) [little0, Mr. Kong]
Xi You Dou Niu (S110CN) [little0]
apple/v8.cpp: Use the Ariel device.
machine/pseudovia.cpp: Improved accuracy, support more interrupt lines, and support the "AIV3" variant used in Duo Docks. [R. Belmont]
I was recently doing some testing on a contra board around the 007121 IC and found the following
- There is no sprite limit, but instead a 264 8x8 sprite block limit
- There is no buffering of sprite data on the attached SRAM
From this the follow changes have been made
- Use the 264 8x8 sprite block limit to determine number of sprites that should be rendered
- Remove sprite ram buffering, and move logic for picking sprite ram bank into k007121.cpp
- Comment updates related to the limit and non-buffering
Additionally the high bit of tiles are stored in one of the control registers, if this bit changes all tiles should be marked as dirty.
These changes fix a number of sprite related issues on games using this chip
mametesters 00185 (combatsc: missing sprites)
mametesters 00401 + issue #7957 (contra: left over sprites)
