mirror of
https://github.com/holub/mame
synced 2025-06-29 15:38:53 +03:00
427 lines
9.2 KiB
C++
427 lines
9.2 KiB
C++
// license:BSD-3-Clause
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// copyright-holders:Aaron Giles
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/*** t11: Portable DEC T-11 emulator ******************************************
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System dependencies: long must be at least 32 bits
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word must be 16 bit unsigned int
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byte must be 8 bit unsigned int
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long must be more than 16 bits
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arrays up to 65536 bytes must be supported
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machine must be twos complement
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*****************************************************************************/
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#include "emu.h"
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#include "debugger.h"
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#include "t11.h"
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/*************************************
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*
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* Macro shortcuts
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*
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*************************************/
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/* registers of various sizes */
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#define REGD(x) m_reg[x].d
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#define REGW(x) m_reg[x].w.l
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#define REGB(x) m_reg[x].b.l
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/* PC, SP, and PSW definitions */
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#define SP REGW(6)
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#define PC REGW(7)
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#define SPD REGD(6)
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#define PCD REGD(7)
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#define PSW m_psw.b.l
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const device_type T11 = &device_creator<t11_device>;
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const device_type K1801VM2 = &device_creator<k1801vm2_device>;
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k1801vm2_device::k1801vm2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: t11_device(mconfig, K1801VM2, "K1801VM2", tag, owner, clock, "k1801vm2", __FILE__)
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{
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}
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t11_device::t11_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
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: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
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, m_program_config("program", ENDIANNESS_LITTLE, 16, 16, 0)
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, c_initial_mode(0)
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{
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m_program_config.m_is_octal = true;
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memset(m_reg, 0x00, sizeof(m_reg));
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memset(&m_psw, 0x00, sizeof(m_psw));
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}
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t11_device::t11_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: cpu_device(mconfig, T11, "T11", tag, owner, clock, "t11", __FILE__)
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, m_program_config("program", ENDIANNESS_LITTLE, 16, 16, 0)
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, c_initial_mode(0)
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{
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m_program_config.m_is_octal = true;
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memset(m_reg, 0x00, sizeof(m_reg));
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memset(&m_psw, 0x00, sizeof(m_psw));
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}
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/*************************************
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*
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* Low-level memory operations
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*
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*************************************/
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int t11_device::ROPCODE()
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{
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PC &= 0xfffe;
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int val = m_direct->read_word(PC);
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PC += 2;
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return val;
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}
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int t11_device::RBYTE(int addr)
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{
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return m_program->read_byte(addr);
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}
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void t11_device::WBYTE(int addr, int data)
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{
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m_program->write_byte(addr, data);
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}
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int t11_device::RWORD(int addr)
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{
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return m_program->read_word(addr & 0xfffe);
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}
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void t11_device::WWORD(int addr, int data)
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{
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m_program->write_word(addr & 0xfffe, data);
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}
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/*************************************
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*
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* Low-level stack operations
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*
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*************************************/
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void t11_device::PUSH(int val)
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{
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SP -= 2;
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WWORD(SPD, val);
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}
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int t11_device::POP()
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{
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int result = RWORD(SPD);
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SP += 2;
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return result;
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}
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/*************************************
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*
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* Flag definitions and operations
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*
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*************************************/
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/* flag definitions */
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#define CFLAG 1
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#define VFLAG 2
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#define ZFLAG 4
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#define NFLAG 8
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/* extracts flags */
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#define GET_C (PSW & CFLAG)
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#define GET_V (PSW & VFLAG)
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#define GET_Z (PSW & ZFLAG)
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#define GET_N (PSW & NFLAG)
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/* clears flags */
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#define CLR_C (PSW &= ~CFLAG)
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#define CLR_V (PSW &= ~VFLAG)
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#define CLR_Z (PSW &= ~ZFLAG)
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#define CLR_N (PSW &= ~NFLAG)
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/* sets flags */
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#define SET_C (PSW |= CFLAG)
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#define SET_V (PSW |= VFLAG)
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#define SET_Z (PSW |= ZFLAG)
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#define SET_N (PSW |= NFLAG)
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/*************************************
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*
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* Interrupt handling
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*
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*************************************/
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struct irq_table_entry
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{
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UINT8 priority;
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UINT8 vector;
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};
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static const struct irq_table_entry irq_table[] =
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{
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{ 0<<5, 0x00 },
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{ 4<<5, 0x38 },
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{ 4<<5, 0x34 },
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{ 4<<5, 0x30 },
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{ 5<<5, 0x5c },
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{ 5<<5, 0x58 },
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{ 5<<5, 0x54 },
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{ 5<<5, 0x50 },
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{ 6<<5, 0x4c },
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{ 6<<5, 0x48 },
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{ 6<<5, 0x44 },
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{ 6<<5, 0x40 },
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{ 7<<5, 0x6c },
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{ 7<<5, 0x68 },
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{ 7<<5, 0x64 },
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{ 7<<5, 0x60 }
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};
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void t11_device::t11_check_irqs()
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{
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const struct irq_table_entry *irq = &irq_table[m_irq_state & 15];
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int priority = PSW & 0xe0;
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/* compare the priority of the interrupt to the PSW */
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if (irq->priority > priority)
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{
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int vector = irq->vector;
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int new_pc, new_psw;
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/* call the callback; if we don't get -1 back, use the return value as our vector */
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int new_vector = standard_irq_callback(m_irq_state & 15);
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if (new_vector != -1)
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vector = new_vector;
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/* fetch the new PC and PSW from that vector */
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assert((vector & 3) == 0);
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new_pc = RWORD(vector);
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new_psw = RWORD(vector + 2);
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/* push the old state, set the new one */
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PUSH(PSW);
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PUSH(PC);
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PCD = new_pc;
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PSW = new_psw;
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t11_check_irqs();
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/* count cycles and clear the WAIT flag */
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m_icount -= 114;
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m_wait_state = 0;
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}
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}
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/*************************************
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*
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* Core opcodes
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*
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*************************************/
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/* includes the static function prototypes and the master opcode table */
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#include "t11table.hxx"
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/* includes the actual opcode implementations */
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#include "t11ops.hxx"
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/*************************************
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*
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* Low-level initialization/cleanup
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*
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*************************************/
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void t11_device::device_start()
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{
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static const UINT16 initial_pc[] =
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{
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0xc000, 0x8000, 0x4000, 0x2000,
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0x1000, 0x0000, 0xf600, 0xf400
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};
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m_initial_pc = initial_pc[c_initial_mode >> 13];
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m_program = &space(AS_PROGRAM);
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m_direct = &m_program->direct();
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save_item(NAME(m_ppc.w.l));
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save_item(NAME(m_reg[0].w.l));
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save_item(NAME(m_reg[1].w.l));
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save_item(NAME(m_reg[2].w.l));
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save_item(NAME(m_reg[3].w.l));
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save_item(NAME(m_reg[4].w.l));
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save_item(NAME(m_reg[5].w.l));
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save_item(NAME(m_reg[6].w.l));
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save_item(NAME(m_reg[7].w.l));
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save_item(NAME(m_psw.w.l));
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save_item(NAME(m_initial_pc));
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save_item(NAME(m_wait_state));
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save_item(NAME(m_irq_state));
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// Register debugger state
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state_add( T11_PC, "PC", m_reg[7].w.l).formatstr("%04X");
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state_add( T11_SP, "SP", m_reg[6].w.l).formatstr("%04X");
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state_add( T11_PSW, "PSW", m_psw.b.l).formatstr("%02X");
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state_add( T11_R0, "R0", m_reg[0].w.l).formatstr("%04X");
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state_add( T11_R1, "R1", m_reg[1].w.l).formatstr("%04X");
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state_add( T11_R2, "R2", m_reg[2].w.l).formatstr("%04X");
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state_add( T11_R3, "R3", m_reg[3].w.l).formatstr("%04X");
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state_add( T11_R4, "R4", m_reg[4].w.l).formatstr("%04X");
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state_add( T11_R5, "R5", m_reg[5].w.l).formatstr("%04X");
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state_add(STATE_GENPC, "curpc", m_reg[7].w.l).noshow();
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state_add(STATE_GENFLAGS, "GENFLAGS", m_psw.b.l).formatstr("%8s").noshow();
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state_add(STATE_GENPCBASE, "GENPCBASE", m_ppc.w.l).noshow();
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m_icountptr = &m_icount;
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}
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void t11_device::state_string_export(const device_state_entry &entry, std::string &str) const
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{
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switch (entry.index())
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{
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case STATE_GENFLAGS:
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str = string_format("%c%c%c%c%c%c%c%c",
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m_psw.b.l & 0x80 ? '?':'.',
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m_psw.b.l & 0x40 ? 'I':'.',
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m_psw.b.l & 0x20 ? 'I':'.',
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m_psw.b.l & 0x10 ? 'T':'.',
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m_psw.b.l & 0x08 ? 'N':'.',
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m_psw.b.l & 0x04 ? 'Z':'.',
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m_psw.b.l & 0x02 ? 'V':'.',
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m_psw.b.l & 0x01 ? 'C':'.'
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);
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break;
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}
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}
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void k1801vm2_device::state_string_export(const device_state_entry &entry, std::string &str) const
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{
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switch (entry.index())
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{
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case STATE_GENFLAGS:
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str = string_format("%c%c%c%c%c%c%c%c%c",
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m_psw.b.l & 0x100 ? 'H':'.',
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m_psw.b.l & 0x80 ? 'P':'.',
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m_psw.b.l & 0x40 ? '?':'.',
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m_psw.b.l & 0x20 ? '?':'.',
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m_psw.b.l & 0x10 ? 'T':'.',
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m_psw.b.l & 0x08 ? 'N':'.',
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m_psw.b.l & 0x04 ? 'Z':'.',
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m_psw.b.l & 0x02 ? 'V':'.',
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m_psw.b.l & 0x01 ? 'C':'.'
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);
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break;
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}
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}
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/*************************************
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*
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* CPU reset
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*
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*************************************/
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void t11_device::device_reset()
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{
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/* initial SP is 376 octal, or 0xfe */
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SP = 0x00fe;
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/* initial PC comes from the setup word */
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PC = m_initial_pc;
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/* PSW starts off at highest priority */
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PSW = 0xe0;
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/* initialize the IRQ state */
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m_irq_state = 0;
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/* reset the remaining state */
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REGD(0) = 0;
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REGD(1) = 0;
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REGD(2) = 0;
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REGD(3) = 0;
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REGD(4) = 0;
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REGD(5) = 0;
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m_ppc.d = 0;
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m_wait_state = 0;
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}
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void k1801vm2_device::device_reset()
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{
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t11_device::device_reset();
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PC = RWORD(c_initial_mode);
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PSW = RWORD(c_initial_mode+2);
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}
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/*************************************
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*
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* Interrupt handling
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*
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*************************************/
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void t11_device::execute_set_input(int irqline, int state)
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{
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/* set the appropriate bit */
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if (state == CLEAR_LINE)
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m_irq_state &= ~(1 << irqline);
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else
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m_irq_state |= 1 << irqline;
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}
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/*************************************
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*
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* Core execution
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*
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*************************************/
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void t11_device::execute_run()
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{
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t11_check_irqs();
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if (m_wait_state)
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{
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m_icount = 0;
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return;
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}
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do
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{
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UINT16 op;
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m_ppc = m_reg[7]; /* copy PC to previous PC */
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debugger_instruction_hook(this, PCD);
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op = ROPCODE();
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(this->*s_opcode_table[op >> 3])(op);
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} while (m_icount > 0);
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}
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offs_t t11_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
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{
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extern CPU_DISASSEMBLE( t11 );
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return CPU_DISASSEMBLE_NAME(t11)(this, buffer, pc, oprom, opram, options);
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}
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