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https://github.com/holub/mame
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601 lines
20 KiB
C++
601 lines
20 KiB
C++
// license:GPL-2.0+
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// copyright-holders:Couriersud
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/*
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* nld_mosfet.cpp
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*
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* Formulas in here based on the following Sources:
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*
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* https://www.imperial.ac.uk/pls/portallive/docs/1/7292573.PDF
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* http://www3.imperial.ac.uk/pls/portallive/docs/1/56133736.PDF
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* https://people.rit.edu/lffeee/SPICE_MOSFET_Model_Intro.pdf
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* https://people.rit.edu/lffeee/SPICE.pdf
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* http://web.mit.edu/course/6/6.012/SPR98/www/lectures/S98_Lecture10.pdf
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* http://homepages.rpi.edu/~sawyes/Models_review.pdf
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* http://jaco.ec.t.kanazawa-u.ac.jp/edu/mix/pdf/3.pdf
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*
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* Farid N. Naim, Circuit Simulation (Wiley-IEEE Press, 2010).
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* Stefan Jahn, Michael Margraf, Vincent Habchi and Raimund Jacob, "Qucs Technical Papers" (2007)
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*
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*/
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#include "netlist/solver/nld_solver.h"
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#include "netlist/nl_setup.h"
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#include "nlid_twoterm.h"
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#include <cmath>
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#define BODY_CONNECTED_TO_SOURCE (1)
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namespace netlist
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{
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namespace analog
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{
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using constants = plib::constants<nl_double>;
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// -----------------------------------------------------------------------------
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// nld_FET - Base classes
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// -----------------------------------------------------------------------------
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/*! Class representing the nmos/pmos model paramers.
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*
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* This is the model representation of the nmos model.
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*
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* Netlist has an additional parameter caller CAPMOD:
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*
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* CAPMOD=0: Capacitance model disabled
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* CAPMOD=2: Meyer capacitance model
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*
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* Typically, SPICE uses the following parameters. A "Y" in the first
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* column indicates that the parameter is actually used in netlist.
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*
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* | NL? |Name | Description|Units |Default |Example |
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* |:---:|------|-----------------------------------------------------------------------|-------|---------:|----------------:|
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* | Y |Vto | Zero-bias threshold voltage | V | 0 | 1 |
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* | Y |Kp | Transconductance parameter | A/V² | 0.00002 | 0.00003 |
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* | Y |Gamma | Bulk threshold parameter | V^½ | 0 | 0.37 |
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* | Y |Phi | Surface inversion potential | V | 0.6 | 0.65 |
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* | Y |Lambda| Channel-length modulation (level 1 and 2 only) | 1/V | 0 | 0.02 |
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* | |Rd | Drain ohmic resistance |W|0|1|
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* | |Rs | Source ohmic resistance |W|0|1|
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* | |Cbd | Zero-bias B-D junction capacitance |F|0|20f|
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* | |Cbs | Zero-bias B-S junction capacitance |F|0|20f|
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* | Y |Is | Bulk junction saturation current |A|0.00000000000001|1E-015|
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* | Y |N | Bulk diode emission coefficient |-|1|*
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* | |Pb | Bulk junction potential |V|0.8|0.87|8|
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* | Y |Cgso | Gate-source overlap capacitance per meter channel width |F/m|0|0.00000000004|
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* | Y |Cgdo | Gate-drain overlap capacitance per meter channel width |F/m|0|0.00000000004|*
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* | Y |Cgbo | Gate-bulk overlap capacitance per meter channel width |F/m|0|0.0000000002|*
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* | |Rsh | Drain and source diffusion sheet resistance |W|0|10|*
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* | |Cj | Zero-bias bulk junction bottom capacitance per square meter of junction area|F/m²|0|0.0002|*
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* | |Mj | Bulk junction bottom grading coefficient |-|0.5|0.5|*
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* | |Cjsw | Zero-bias bulk junction sidewall capacitance per meter of junction perimeter|F/m|0|1p|*
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* | |Mjsw | Bulk junction sidewall grading coefficient |-|.50 level 1 .33 level 2,3||
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* | |Js | Bulk junction saturation current per square-meter of junction area|A/m|0|0.00000001|
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* | Y |Tox | Oxide thickness |m|0.0000001|0.0000001|
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* | Y |Nsub | Substrate doping |1/cm³|0|4000000000000000|
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* | |Nss | Surface state density |1/cm²|0|10000000000|
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* | |Nfs | Fast surface state |1/cm²|0|10000000000|*
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* | |TPG | Type of gate material: +1 opp. to substrate -1 same as substrate 0 Al gate|-|1|
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* | |Xj | Metallurgical junction depth |m|0|1µ|*
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* | Y |Ld | Lateral diffusion |m|0|0.8µ|
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* | Y |Uo | Surface mobility |cm²/V/s|600|700|
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* | |Ucrit | Critical field for mobility degradation (level 2 only) |V/cm|10000|10000|
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* | |Uexp | Critical field exponent in mobility degradation (level 2 only) |-|0|0.1|
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* | |Utra | Transverse field coefficient (level 2 only) |-|0|0.3|*
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* | |Vmax | Maximum carrier drift velocity (levels 2 & 3 only) |m/s|0|50000|
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* | |Neff | Total channel-charge exponent (level 2 only) |-|1|5|
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* | |Kf | Flicker noise coefficient |-|0|1E-026|
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* | |Af | Flicker noise exponent |-|1|1.2|
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* | |Fc | Coefficient for forward-bias depletion capacitance formula |-|0.5|
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* | |Delta | Width effect on threshold voltage(levels 2 and 3) |-|0|1|
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* | |Theta | Mobility modulation (level 3 only) |-|0|0.1|
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* | |Eta | Static feedback (level 3 only) |-|0|1|
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* | |Kappa | Saturation field (level 3 only) |0.2|0.5|
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* | |Tnom | Parameter measurement temperature |ºC|27|50||
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* | Y |L | Length scaling |-|100e-6||
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* | Y |W | Width scaling |-|100e-6||
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* */
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class fet_model_t : public param_model_t
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{
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public:
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fet_model_t(device_t &device, const pstring &name, const pstring &val)
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: param_model_t(device, name, val)
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, m_VTO(*this, "VTO")
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, m_N(*this, "N")
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, m_ISS(*this, "IS") // Haven't seen a model using ISS / ISD
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, m_ISD(*this, "IS")
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, m_LD(*this, "LD")
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, m_L(*this, "L")
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, m_W(*this, "W")
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, m_TOX(*this, "TOX")
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, m_KP(*this, "KP")
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, m_UO(*this, "UO")
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, m_PHI(*this, "PHI")
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, m_NSUB(*this, "NSUB")
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, m_GAMMA(*this, "GAMMA")
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, m_LAMBDA(*this, "LAMBDA")
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, m_RD(*this, "RD")
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, m_RS(*this, "RS")
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, m_CGSO(*this, "CGSO")
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, m_CGDO(*this, "CGDO")
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, m_CGBO(*this, "CGBO")
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, m_CAPMOD(*this, "CAPMOD")
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{}
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value_t m_VTO; //!< Threshold voltage [V]
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value_t m_N; //!< Bulk diode emission coefficient
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value_t m_ISS; //!< Body diode saturation current
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value_t m_ISD; //!< Body diode saturation current
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value_t m_LD; //!< Lateral diffusion [m]
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value_t m_L; //!< Length scaling
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value_t m_W; //!< Width scaling
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value_t m_TOX; //!< Oxide thickness
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value_t m_KP; //!< Transconductance parameter [A/V²]
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value_t m_UO; //!< Surface mobility [cm²/V/s]
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value_t m_PHI; //!< Surface inversion potential [V]
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value_t m_NSUB; //!< Substrate doping [1/cm³]
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value_t m_GAMMA; //!< Bulk threshold parameter [V^½]
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value_t m_LAMBDA; //!< Channel-length modulation [1/V]
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value_t m_RD; //!< Drain ohmic resistance
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value_t m_RS; //!< Source ohmic resistance
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value_t m_CGSO; //!< Gate-source overlap capacitance per meter channel width
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value_t m_CGDO; //!< Gate-drain overlap capacitance per meter channel width
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value_t m_CGBO; //!< Gate-bulk overlap capacitance per meter channel width
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value_base_t<int> m_CAPMOD; //!< Capacitance model (0=no model 2=Meyer)
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};
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// Have a common start for mosfets
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NETLIB_OBJECT(FET)
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{
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public:
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enum q_type {
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FET_NMOS,
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FET_PMOS
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};
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NETLIB_CONSTRUCTOR(FET)
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, m_model(*this, "MODEL", "NMOS")
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, m_qtype(FET_NMOS)
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{
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}
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NETLIB_IS_DYNAMIC(true)
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//NETLIB_RESETI();
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NETLIB_UPDATEI() { }
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q_type qtype() const { return m_qtype; }
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bool is_qtype(q_type atype) const { return m_qtype == atype; }
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void set_qtype(q_type atype) { m_qtype = atype; }
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protected:
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fet_model_t m_model;
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private:
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q_type m_qtype;
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};
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// -----------------------------------------------------------------------------
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// nld_QBJT_EB
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// -----------------------------------------------------------------------------
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NETLIB_OBJECT_DERIVED(MOSFET, FET)
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{
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public:
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NETLIB_CONSTRUCTOR_DERIVED(MOSFET, FET)
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, m_DG(*this, "m_DG", true)
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, m_SG(*this, "m_SG", true)
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, m_SD(*this, "m_SD", true)
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, m_D_BD(*this, "m_D_BD")
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#if (!BODY_CONNECTED_TO_SOURCE)
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, m_D_BS(*this, "m_D_BS")
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#endif
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, m_cap_gb(*this, "m_cap_gb")
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, m_cap_gs(*this, "m_cap_gs")
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, m_cap_gd(*this, "m_cap_gd")
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, m_phi(0.0)
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, m_gamma(0.0)
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, m_vto(0.0)
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, m_beta(0.0)
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, m_lambda(0.0)
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, m_Leff(0.0)
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, m_CoxWL(0.0)
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, m_polarity(qtype() == FET_NMOS ? 1.0 : -1.0)
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, m_Cgb(0.0)
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, m_Cgs(0.0)
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, m_Cgd(0.0)
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, m_capmod(2)
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, m_Vgs(*this, "m_Vgs", 0.0)
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, m_Vgd(*this, "m_Vgd", 0.0)
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{
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register_subalias("S", m_SG.m_P); // Source
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register_subalias("G", m_SG.m_N); // Gate
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register_subalias("D", m_DG.m_P); // Drain
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connect(m_SG.m_P, m_SD.m_P);
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connect(m_SG.m_N, m_DG.m_N);
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connect(m_DG.m_P, m_SD.m_N);
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set_qtype((m_model.type() == "NMOS_DEFAULT") ? FET_NMOS : FET_PMOS);
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m_polarity = qtype() == FET_NMOS ? 1.0 : -1.0;
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m_capmod = m_model.m_CAPMOD;
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// printf("capmod %d %g %g\n", m_capmod, (double)m_model.m_VTO, m_polarity);
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nl_assert_always(m_capmod == 0 || m_capmod == 2, "Error: CAPMODEL invalid value for " + m_model.name());
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/*
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* From http://ltwiki.org/LTspiceHelp/LTspiceHelp/M_MOSFET.htm :
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*
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* VTO, KP, LAMBDA, PHI and GAMMA. These parameters are computed
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* if the process parameters(NSUB, TOX,...) are given, but
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* user-specified values always override.
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*
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* But couldn't find a formula for lambda anywhere
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*
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*/
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m_lambda = m_model.m_LAMBDA; // FIXME: m_lambda only set once
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// calculate effective channel length
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m_Leff = m_model.m_L - 2 * m_model.m_LD;
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nl_assert_always(m_Leff > 0.0, "Effective Lateral diffusion would be negative for model " + m_model.name());
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nl_double Cox = (m_model.m_TOX > 0.0) ? (constants::eps_SiO2() * constants::eps_0() / m_model.m_TOX) : 0.0;
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// calculate DC transconductance coefficient
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if (m_model.m_KP > 0)
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m_beta = m_model.m_KP * m_model.m_W / m_Leff;
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else if (Cox > 0 && m_model.m_UO > 0)
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m_beta = m_model.m_UO * 1e-4 * Cox * m_model.m_W / m_Leff;
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else
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m_beta = 2e-5 * m_model.m_W / m_Leff;
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//FIXME::UT can disappear
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const double Vt = constants::T0() * constants::k_b() / constants::Q_e();
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// calculate surface potential if not given
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if (m_model.m_PHI > 0.0)
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m_phi = m_model.m_PHI;
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else if (m_model.m_NSUB > 0.0)
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{
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nl_assert_always(m_model.m_NSUB * 1e6 >= constants::NiSi(), "Error calculating phi for model " + m_model.name());
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m_phi = 2 * Vt * std::log (m_model.m_NSUB * 1e6 / constants::NiSi());
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}
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else
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m_phi = 0.6;
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// calculate bulk threshold if not given
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if (m_model.m_GAMMA > 0.0)
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m_gamma = m_model.m_GAMMA;
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else
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{
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if (Cox > 0.0 && m_model.m_NSUB > 0)
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m_gamma = std::sqrt (2.0 * constants::Q_e() * constants::eps_Si() * constants::eps_0() * m_model.m_NSUB * 1e6) / Cox;
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else
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m_gamma = 0.0;
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}
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m_vto = m_model.m_VTO;
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nl_assert_always(m_vto != 0.0, "Threshold voltage not specified for " + m_model.name());
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/* FIXME: VTO if missing may be calculated from TPG, NSS and temperature. Usually models
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* specify VTO so skip this here.
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*/
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m_CoxWL = Cox * m_model.m_W * m_Leff;
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//printf("Cox: %g\n", m_Cox);
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}
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NETLIB_IS_TIMESTEP(true || m_capmod != 0)
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NETLIB_TIMESTEPI()
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{
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if (m_capmod != 0)
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{
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//const nl_double Ugd = -m_DG.deltaV() * m_polarity; // Gate - Drain
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//const nl_double Ugs = -m_SG.deltaV() * m_polarity; // Gate - Source
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const nl_double Ugd = m_Vgd; // Gate - Drain
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const nl_double Ugs = m_Vgs; // Gate - Source
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const nl_double Ubs = 0.0; // Bulk - Source == 0 if connected
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const nl_double Ugb = Ugs - Ubs;
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m_cap_gb.timestep(m_Cgb, Ugb, step);
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m_cap_gs.timestep(m_Cgs, Ugs, step);
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m_cap_gd.timestep(m_Cgd, Ugd, step);
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}
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}
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protected:
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NETLIB_RESETI()
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{
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NETLIB_NAME(FET)::reset();
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// Bulk diodes
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m_D_BD.set_param(m_model.m_ISD, m_model.m_N, exec().gmin(), constants::T0());
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#if (!BODY_CONNECTED_TO_SOURCE)
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m_D_BS.set_param(m_model.m_ISS, m_model.m_N, exec().gmin(), constants::T0());
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#endif
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}
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NETLIB_UPDATEI();
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NETLIB_UPDATE_PARAMI();
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NETLIB_UPDATE_TERMINALSI();
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private:
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nld_twoterm m_DG;
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nld_twoterm m_SG;
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nld_twoterm m_SD;
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generic_diode<diode_e::MOS> m_D_BD;
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#if (!BODY_CONNECTED_TO_SOURCE)
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generic_diode<diode_e::MOS> m_D_BS;
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#endif
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generic_capacitor<capacitor_e::VARIABLE_CAPACITY> m_cap_gb;
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generic_capacitor<capacitor_e::VARIABLE_CAPACITY> m_cap_gs;
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generic_capacitor<capacitor_e::VARIABLE_CAPACITY> m_cap_gd;
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nl_double m_phi;
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nl_double m_gamma;
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nl_double m_vto;
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nl_double m_beta;
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nl_double m_lambda;
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/* used in capacitance calculation */
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nl_double m_Leff;
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nl_double m_CoxWL;
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nl_double m_polarity;
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/* capacitance values */
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nl_double m_Cgb;
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nl_double m_Cgs;
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nl_double m_Cgd;
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int m_capmod;
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state_var<nl_double> m_Vgs;
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state_var<nl_double> m_Vgd;
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void set_cap(generic_capacitor<capacitor_e::VARIABLE_CAPACITY> cap,
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nl_double capval, nl_double V,
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nl_double &g11, nl_double &g12, nl_double &g21, nl_double &g22,
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nl_double &I1, nl_double &I2)
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{
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const nl_double I = cap.Ieq(capval, V) * m_polarity;
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const nl_double G = cap.G(capval);
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g11 += G; g12 -= G; g21 -= G; g22 += G;
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I1 -= I; I2 += I;
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//printf("Cap: %g\n", capval);
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}
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void calculate_caps(nl_double Vgs, nl_double Vgd, nl_double Vth,
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nl_double &Cgs, nl_double &Cgd, nl_double &Cgb)
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{
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nl_double Vctrl = Vgs - Vth * m_polarity;
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// Cut off - now further differentiated into 3 different formulas
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// Accumulation
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if (Vctrl <= -m_phi)
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{
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Cgb = m_CoxWL;
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Cgs = 0.0;
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Cgd = 0.0;
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}
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else if (Vctrl <= -m_phi / 2.0)
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{
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Cgb = -Vctrl * m_CoxWL / m_phi;
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Cgs = 0.0;
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Cgd = 0.0;
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}
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// Depletion
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else if (Vctrl <= 0)
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{
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Cgb = -Vctrl * m_CoxWL / m_phi;
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Cgs = Vctrl * m_CoxWL * (4.0 / 3.0) / m_phi + (2.0 / 3.0) * m_CoxWL;
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Cgd = 0.0;
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}
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else
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{
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const nl_double Vdsat = Vctrl;
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const nl_double Vds = Vgs - Vgd;
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// saturation
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if (Vdsat <= Vds)
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{
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Cgb = 0;
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Cgs = (2.0 / 3.0) * m_CoxWL;
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Cgd = 0;
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}
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else
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{
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// linear
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const nl_double Sqr1 = std::pow(Vdsat - Vds, 2);
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const nl_double Sqr2 = std::pow(2.0 * Vdsat - Vds, 2);
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Cgb = 0;
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Cgs = m_CoxWL * (1.0 - Sqr1 / Sqr2) * (2.0 / 3.0);
|
|
Cgd = m_CoxWL * (1.0 - Vdsat * Vdsat / Sqr2) * (2.0 / 3.0);
|
|
}
|
|
}
|
|
}
|
|
};
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|
|
|
// ----------------------------------------------------------------------------------------
|
|
// MOSFET
|
|
// ----------------------------------------------------------------------------------------
|
|
|
|
NETLIB_UPDATE(MOSFET)
|
|
{
|
|
if (!m_SG.m_P.net().isRailNet())
|
|
m_SG.m_P.solve_now(); // Basis
|
|
else if (!m_SG.m_N.net().isRailNet())
|
|
m_SG.m_N.solve_now(); // Emitter
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|
else
|
|
m_DG.m_N.solve_now(); // Collector
|
|
}
|
|
|
|
NETLIB_UPDATE_TERMINALS(MOSFET)
|
|
{
|
|
nl_double Vgd = -m_DG.deltaV() * m_polarity; // Gate - Drain
|
|
nl_double Vgs = -m_SG.deltaV() * m_polarity; // Gate - Source
|
|
|
|
// limit step sizes
|
|
|
|
const nl_double k = 3.5; // see "Circuit Simulation", page 185
|
|
nl_double d = (Vgs - m_Vgs);
|
|
Vgs = m_Vgs + 1.0/k * (d < 0 ? -1.0 : 1.0) * std::log1p(k * std::abs(d));
|
|
d = (Vgd - m_Vgd);
|
|
Vgd = m_Vgd + 1.0/k * (d < 0 ? -1.0 : 1.0) * std::log1p(k * std::abs(d));
|
|
|
|
m_Vgs = Vgs;
|
|
m_Vgd = Vgd;
|
|
|
|
const nl_double Vbs = 0.0; // Bulk - Source == 0 if connected
|
|
//const nl_double Vbd = m_SD.deltaV() * m_polarity; // Bulk - Drain = Source - Drain
|
|
const nl_double Vds = Vgs - Vgd;
|
|
const nl_double Vbd = -Vds; // Bulk - Drain = Source - Drain
|
|
|
|
#if (!BODY_CONNECTED_TO_SOURCE)
|
|
m_D_BS.update_diode(Vbs);
|
|
#endif
|
|
m_D_BD.update_diode(Vbd);
|
|
|
|
// Are we in forward mode ?
|
|
// in backward mode, just swap source and drain
|
|
const bool is_forward = Vds >= 0;
|
|
|
|
// calculate Vth
|
|
const nl_double Vbulk = is_forward ? Vbs : Vbd;
|
|
const nl_double phi_m_Vbulk = (m_phi > Vbulk) ? std::sqrt(m_phi - Vbulk) : 0.0;
|
|
const nl_double Vth = m_vto * m_polarity + m_gamma * (phi_m_Vbulk - std::sqrt(m_phi));
|
|
|
|
const nl_double Vctrl = (is_forward ? Vgs : Vgd) - Vth;
|
|
|
|
nl_double Ids, gm, gds, gmb;
|
|
const nl_double absVds = std::abs(Vds);
|
|
|
|
if (Vctrl <= 0.0)
|
|
{
|
|
// cutoff region
|
|
Ids = 0.0;
|
|
gm = 0.0;
|
|
gds = 0.0;
|
|
gmb = 0.0;
|
|
}
|
|
else
|
|
{
|
|
const nl_double beta = m_beta * (1.0 + m_lambda * absVds);
|
|
if (Vctrl <= absVds)
|
|
{
|
|
// saturation region
|
|
Ids = beta * Vctrl * Vctrl / 2.0;
|
|
gm = beta * Vctrl;
|
|
gds = m_lambda * m_beta * Vctrl * Vctrl / 2.0;
|
|
}
|
|
else
|
|
{
|
|
// linear region
|
|
Ids = beta * absVds * (Vctrl - absVds / 2);
|
|
gm = beta * absVds;
|
|
gds = beta * (Vctrl - absVds) + m_lambda * m_beta * absVds * (Vctrl - absVds / 2.0);
|
|
}
|
|
|
|
// backgate transconductance
|
|
const nl_double bgtc = (phi_m_Vbulk != 0.0) ? (m_gamma / phi_m_Vbulk / 2.0) : 0.0;
|
|
gmb = gm * bgtc;
|
|
}
|
|
|
|
// FIXME: these are needed to compute capacitance
|
|
// nl_double Udsat = pol * std::max (Utst, 0.0);
|
|
// Uon = pol * Vth;
|
|
|
|
// compute bulk diode equivalent currents
|
|
|
|
const nl_double IeqBD = m_D_BD.Ieq();
|
|
const nl_double gbd = m_D_BD.G();
|
|
|
|
#if (!BODY_CONNECTED_TO_SOURCE)
|
|
const nl_double IeqBS = m_D_BS.Ieq();
|
|
const nl_double gbs = m_D_BS.G();
|
|
#else
|
|
const nl_double IeqBS = 0.0;
|
|
const nl_double gbs = 0.0;
|
|
#endif
|
|
// exchange controlling nodes if necessary
|
|
const nl_double gsource = is_forward ? (gm + gmb) : 0;
|
|
const nl_double gdrain = is_forward ? 0.0 : (gm + gmb);
|
|
|
|
const nl_double IeqDS = (is_forward) ?
|
|
Ids - gm * Vgs - gmb * Vbs - gds * Vds
|
|
: -Ids - gm * Vgd - gmb * Vbd - gds * Vds;
|
|
|
|
// IG = 0
|
|
nl_double IG = 0.0;
|
|
nl_double ID = (+IeqBD - IeqDS) * m_polarity;
|
|
nl_double IS = (+IeqBS + IeqDS) * m_polarity;
|
|
nl_double IB = (-IeqBD - IeqBS) * m_polarity;
|
|
|
|
nl_double gGG = 0.0;
|
|
nl_double gGD = 0.0;
|
|
nl_double gGS = 0.0;
|
|
nl_double gGB = 0.0;
|
|
|
|
nl_double gDG = gm;
|
|
nl_double gDD = gds + gbd - gdrain;
|
|
const nl_double gDS = -gds - gsource;
|
|
const nl_double gDB = gmb - gbd;
|
|
|
|
nl_double gSG = -gm;
|
|
const nl_double gSD = -gds + gdrain;
|
|
nl_double gSS = gbs + gds + gsource;
|
|
const nl_double gSB = -gbs - gmb;
|
|
|
|
nl_double gBG = 0.0;
|
|
const nl_double gBD = -gbd;
|
|
const nl_double gBS = -gbs;
|
|
nl_double gBB = gbs + gbd;
|
|
|
|
if (m_capmod != 0)
|
|
{
|
|
const nl_double Vgb = Vgs - Vbs;
|
|
|
|
if (is_forward)
|
|
calculate_caps(Vgs, Vgd, Vth, m_Cgs, m_Cgd, m_Cgb);
|
|
else
|
|
calculate_caps(Vgd, Vgs, Vth, m_Cgd, m_Cgs, m_Cgb);
|
|
|
|
set_cap(m_cap_gb, m_Cgb + m_model.m_CGBO * m_Leff, Vgb, gGG, gGB, gBG, gBB, IG, IB);
|
|
set_cap(m_cap_gs, m_Cgs + m_model.m_CGSO * m_model.m_W, Vgs, gGG, gGS, gSG, gSS, IG, IS);
|
|
set_cap(m_cap_gd, m_Cgd + m_model.m_CGDO * m_model.m_W, Vgd, gGG, gGD, gDG, gDD, IG, ID);
|
|
}
|
|
|
|
// Source connected to body, Diode S-B shorted!
|
|
const nl_double gSSBB = gSS + gBB + gBS + gSB;
|
|
|
|
// S G
|
|
m_SG.set_mat( gSSBB, gSG + gBG, +(IS + IB), // S
|
|
gGS + gGB, gGG, IG ); // G
|
|
// D G
|
|
m_DG.set_mat( gDD, gDG, +ID, // D
|
|
gGD, 0.0, 0.0 ); // G
|
|
// S D
|
|
m_SD.set_mat( 0.0, gSD + gBD, 0.0, // S
|
|
gDS + gDB, 0.0, 0.0); // D
|
|
}
|
|
|
|
NETLIB_UPDATE_PARAM(MOSFET)
|
|
{
|
|
}
|
|
|
|
} // namespace analog
|
|
|
|
namespace devices {
|
|
NETLIB_DEVICE_IMPL_NS(analog, MOSFET, "MOSFET", "MODEL")
|
|
} // namespace devices
|
|
|
|
} // namespace netlist
|