mame/regtests/jedutil/eqns/WinCUPL/gal16v8/gal16v8_registered_mode.pld
Kevin Eshbach 4a69cf6ba0
jedutil updates: [keshbach]
* Initial support for viewing the logic equations of the PLS100, 82S100, PLS101 and 82S101.
* Initial support for viewing the logic equations of the PLS100, 82S100,
PLS101 and 82S101.
* Added support to view the the logic equations of the PALCE22V10 device
* Improved the documentation on the Magix game and the undumped PAL's (security fuses blown)
* Added PAL22V10 as another device that is equivalent to ythe PALCE22V10 device.
* Added initial registration test for the PALCE22V10/PAL22V10 devices
* Adding PAL22V10 combinatorial regression test data.
* Updated jedutil with a new command that will take a jed file and list the devices that the jed file could represent
* Initial work on supporting the GAL20V8 device.
* Adding an initial regression test for the GAL20V8.
* Tweaked the function to print text to handle the end of line character.
* Fixed some mis-configurations of the GAL20V8 device.
* Added regression tests for the GAL20V8 device.
* Fixed the output of the GAL20V8 when viewing a jed in simple mode to properly display outputs as also being inputs for certain pins
* Fixed the output of a GAL16V8 device in Simple Mode to mark relevant output pins as providing feedback as documented in the datasheet.
* Corrected the output feedback state when in simple mode for the GAL16V8 and GAL20V8 devices.
2020-05-19 20:42:50 -04:00

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Name GAL16V8 Registered Mode Test ;
PartNo 00 ;
Date 5/1/2020 ;
Revision 01 ;
Designer MAME ;
Company MAME ;
Assembly None ;
Location ;
Device G16V8A ;
/* Registered Mode Test */
/* Input Pins */
PIN 2 = [I2] ;
PIN 3 = [I3] ;
PIN 4 = [I4] ;
PIN 5 = [I5] ;
PIN 6 = [I6] ;
PIN 7 = [I7] ;
PIN 8 = [I8] ;
PIN 9 = [I9] ;
PIN 13 = [I13] ;
PIN 17 = [I17] ;
PIN 18 = [I18] ;
/* Output Pins */
PINNODE 12 = [RF12] ;
PINNODE 14 = [O14] ;
PINNODE 15 = [RF15] ;
PINNODE 16 = [O16] ;
PINNODE 19 = [RF19] ;
/* Logic Equations */
!RF12.D = I3 & I5 & !O16 #
I7 & I9 #
I13 & O16 & I17 #
I8 & O14 & !I17 #
!I8 & !O14 #
!I2 & !I3 & !I4 #
!I5 & !I7 #
I2 & I4 & I6 & !O16 ;
O14 = I2 #
I3 #
I4 #
I5 #
I6 #
I7 #
I8 ;
O14.oe = I9 & RF12 & I13 & I17 & I18 ;
RF15.D = !I3 & !I5 #
!I7 & !I9 #
!I13 & !I17 #
!I2 & !I4 & I13 #
I4 & !RF12 & I18 #
!I2 & !I4 & !I6 #
!I8 & !O14 & I17 #
I3 & RF12 & O14 ;
!O16 = RF12 & I17 & !I18 #
!I13 & !O14 #
I6 & I7 & I8 & I9 #
!I2 & !I3 & !I4 & !I5 #
I2 & I3 & I4 & I5 & I13 & !I17 #
!RF12 & I13 & O14 #
!I6 & !I7 & !I8 & !I9 ;
O16.oe = !RF12 & O14 & !RF15 & RF19 ;
!RF19.D = !I3 & !O14 #
!I5 & !I7 & !O16 #
!I9 & RF15 #
!I13 & !RF15 #
!O14 & I17 #
I2 & I4 & I6 & O16 #
I8 & I9 & O14 #
O14 & RF15 ;