mirror of
https://github.com/holub/mame
synced 2025-05-30 09:33:05 +03:00
50b692dd24
Screen update function is now per screen device (it was before but was attached to machine driver) MCFG_VIDEO_UPDATE -> MCFG_SCREEN_UPDATE MCFG_VIDEO_EOF -> MCFG_SCREEN_EOF EOF is now executed for all screens, so for all existing it is defined just for one screen. This part will be updated in future. Note that there are now screen_update and screen_eof virtual functions for "modern" drivers which are called same as they did before. All drivers are updated and in places where update function was separated per screen I did name separate function. This change will enable us to put screen definition fully into device.
405 lines
13 KiB
C
405 lines
13 KiB
C
/*******************************************************************************************
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86 Lions (c) 1985 Aristocrat
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driver by Chris Hardy,Angelo Salese & Roberto Fresca
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NOTES:
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- 2 graphics ROMS by each R, G, B.
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- 6 bit buffer, goes to 2 resistors each to 3 transistors... 32 colors.
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- CRTC is using 4 pixels by memory address.
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- Xtal and crtc CLK are accurate.
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- Seems to be 1 DSW bank tied to VIA, and another to ay8910.
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- Maybe this is "Aristocrat Mark-III" HW?
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TODO:
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- Understand inputs / via mapping properly;
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- Finish the mc6845 conversion;
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Changes 02/06/2009 - Palindrome
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- Fixed VIA address map to 5000 - 0x501f ( now generates required FIRQ_LINE timer interrupt,
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call attendant msg no longer displayed)
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*******************************************************************************************/
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#define MAIN_CLOCK XTAL_12MHz /* guess */
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#include "emu.h"
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#include "cpu/m6809/m6809.h"
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#include "video/mc6845.h"
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#include "sound/ay8910.h"
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#include "machine/6522via.h"
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class _86lions_state : public driver_device
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{
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public:
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_86lions_state(running_machine &machine, const driver_device_config_base &config)
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: driver_device(machine, config) { }
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UINT8 *lions_vram;
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};
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static VIDEO_START(lions)
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{
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}
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static SCREEN_UPDATE(lions)
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{
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_86lions_state *state = screen->machine->driver_data<_86lions_state>();
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const gfx_element *gfx = screen->machine->gfx[0];
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int count = 0;
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int y,x;
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for (y=0;y<27;y++)
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{
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for (x=0;x<38;x++)
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{
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int tile = state->lions_vram[count+1]|state->lions_vram[count]<<8;
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tile&=0x1ff;
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//int colour = tile>>12;
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drawgfx_opaque(bitmap,cliprect,gfx,tile,0,0,0,x*8,y*8);
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count+=2;
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}
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}
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return 0;
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}
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/**********************
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*
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* End of Video Hardware
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*
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**********************/
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static READ8_HANDLER( test_r )
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{
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return space->machine->rand();
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}
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static ADDRESS_MAP_START( lions_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x07ff) AM_RAM AM_BASE_MEMBER(_86lions_state, lions_vram)
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AM_RANGE(0x0800, 0x0fff) AM_RAM
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AM_RANGE(0x1800, 0x1800) AM_DEVWRITE("crtc", mc6845_address_w)
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AM_RANGE(0x1801, 0x1801) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
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AM_RANGE(0x5000, 0x500f) AM_MIRROR(0x0010) AM_DEVREADWRITE_MODERN("via6522_0", via6522_device, read, write)
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AM_RANGE(0x5300, 0x5300) AM_READ(test_r)//AM_READ_PORT("IN0")
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AM_RANGE(0x5382, 0x5383) AM_DEVWRITE("aysnd", ay8910_data_address_w)
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AM_RANGE(0xe000, 0xffff) AM_ROM
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ADDRESS_MAP_END
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static INPUT_PORTS_START( lions )
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PORT_START("IN0")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("0-1") PORT_CODE(KEYCODE_1)
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("0-2") PORT_CODE(KEYCODE_2)
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("0-3") PORT_CODE(KEYCODE_3)
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("0-4") PORT_CODE(KEYCODE_4)
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("0-5") PORT_CODE(KEYCODE_5)
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("0-6") PORT_CODE(KEYCODE_6)
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("0-7") PORT_CODE(KEYCODE_7)
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("0-8") PORT_CODE(KEYCODE_8)
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PORT_START("IN1")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("1-1") PORT_CODE(KEYCODE_Q)
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("1-2") PORT_CODE(KEYCODE_W)
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("1-3") PORT_CODE(KEYCODE_E)
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("1-4") PORT_CODE(KEYCODE_R)
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("1-5") PORT_CODE(KEYCODE_T)
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("1-6") PORT_CODE(KEYCODE_Y)
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("1-7") PORT_CODE(KEYCODE_U)
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("1-8") PORT_CODE(KEYCODE_I)
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PORT_START("IN2")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("2-1") PORT_CODE(KEYCODE_A)
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("2-2") PORT_CODE(KEYCODE_S)
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("2-3") PORT_CODE(KEYCODE_D)
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("2-4") PORT_CODE(KEYCODE_F)
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("2-5") PORT_CODE(KEYCODE_G)
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("2-6") PORT_CODE(KEYCODE_H)
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("2-7") PORT_CODE(KEYCODE_J)
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("2-8") PORT_CODE(KEYCODE_K)
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PORT_START("IN3")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("3-1") PORT_CODE(KEYCODE_Z)
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("3-2") PORT_CODE(KEYCODE_X)
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("3-3") PORT_CODE(KEYCODE_C)
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("3-4") PORT_CODE(KEYCODE_V)
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("3-5") PORT_CODE(KEYCODE_B)
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("3-6") PORT_CODE(KEYCODE_N)
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("3-7") PORT_CODE(KEYCODE_M)
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("3-8") PORT_CODE(KEYCODE_L)
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// PORT_START("DSW1")
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// PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// PORT_START("DSW2")
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// PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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// PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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INPUT_PORTS_END
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static const gfx_layout layout8x8x6 =
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{
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8,8,
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RGN_FRAC(1,6),
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6,
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{ RGN_FRAC(3,6),
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RGN_FRAC(0,6),
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RGN_FRAC(4,6),
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RGN_FRAC(1,6),
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RGN_FRAC(5,6),
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RGN_FRAC(2,6)
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},
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{ STEP8(0,1) },
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{ STEP8(0,8) },
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8*8
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};
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static GFXDECODE_START( lions )
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GFXDECODE_ENTRY( "gfx1", 0, layout8x8x6, 0, 1 )
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GFXDECODE_END
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static const ay8910_interface ay8910_config =
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{
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AY8910_LEGACY_OUTPUT,
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AY8910_DEFAULT_LOADS,
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DEVCB_INPUT_PORT("IN2"), /* DSW? */
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DEVCB_INPUT_PORT("IN3"), /* DSW? */
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DEVCB_NULL,
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DEVCB_NULL
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};
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//static READ8_DEVICE_HANDLER( input_a )
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//{
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//return input_port_read(machine, "IN0");
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// return device->machine->rand();
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//return 0xff;
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//}
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//static READ8_DEVICE_HANDLER( input_b )
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//{
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//return input_port_read(machine, "IN1");
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// return device->machine->rand();
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//return 0xff;
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//}
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static READ8_DEVICE_HANDLER( input_ca1 )
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{
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// return device->machine->rand();
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return 0x00;
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}
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static READ8_DEVICE_HANDLER( input_cb1 )
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{
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// return device->machine->rand();
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return 0x00;
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}
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static READ8_DEVICE_HANDLER( input_ca2 )
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{
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// return device->machine->rand();
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return 0x00;
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}
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static READ8_DEVICE_HANDLER( input_cb2 )
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{
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// return device->machine->rand();
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return 0x00;
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}
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static WRITE8_DEVICE_HANDLER( output_a )
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{
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popmessage("VIA outa: %02X", data);
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// ...
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}
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static WRITE8_DEVICE_HANDLER( output_b )
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{
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popmessage("VIA outb: %02X", data);
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// ...
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}
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static WRITE8_DEVICE_HANDLER( output_ca1 )
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{
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// ...
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}
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static WRITE8_DEVICE_HANDLER( output_cb1 )
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{
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// ...
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}
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static WRITE8_DEVICE_HANDLER( output_ca2 )
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{
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// ...
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}
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static WRITE8_DEVICE_HANDLER( output_cb2 )
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{
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// ...
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}
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static const via6522_interface via_interface =
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{
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/*inputs : A/B */ DEVCB_INPUT_PORT("IN0"), DEVCB_INPUT_PORT("IN1"),
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/*inputs : CA/B1,CA/B2 */ DEVCB_HANDLER(input_ca1), DEVCB_HANDLER(input_cb1), DEVCB_HANDLER(input_ca2), DEVCB_HANDLER(input_cb2),
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/*outputs: A/B */ DEVCB_HANDLER(output_a), DEVCB_HANDLER(output_b),
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/*outputs: CA/B1,CA/B2 */ DEVCB_HANDLER(output_ca1), DEVCB_HANDLER(output_cb1), DEVCB_HANDLER(output_ca2), DEVCB_HANDLER(output_cb2),
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/*irq */ DEVCB_CPU_INPUT_LINE("maincpu", M6809_FIRQ_LINE)
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};
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static INTERRUPT_GEN( lions_irq )
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{
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}
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static const mc6845_interface mc6845_intf =
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{
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/* in fact is a mc6845 driving 4 pixels by memory address.
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that's why the big horizontal parameters */
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"screen", /* screen we are acting on */
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4, /* number of pixels per video memory address */
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NULL, /* before pixel update callback */
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NULL, /* row update callback */
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NULL, /* after pixel update callback */
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DEVCB_NULL, /* callback for display state changes */
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DEVCB_NULL, /* callback for cursor state changes */
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DEVCB_NULL, /* HSYNC callback */
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DEVCB_NULL, /* VSYNC callback */
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NULL /* update address callback */
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};
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/* same as Aristocrat Mark-IV HW color offset 7 */
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static PALETTE_INIT( lions )
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{
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int i;
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for (i = 0;i < machine->total_colors();i++)
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{
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int bit0,bit1,bit2,r,g,b;
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bit0 = (i >> 0) & 0x01;
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bit1 = (i >> 1) & 0x01;
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b = 0x4f * bit0 + 0xa8 * bit1;
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bit0 = (i >> 1) & 0x01;
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bit1 = (i >> 2) & 0x01;
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bit2 = (i >> 3) & 0x01;
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g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
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bit0 = (i >> 3) & 0x01;
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bit1 = (i >> 4) & 0x01;
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bit2 = (i >> 5) & 0x01;
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r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
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palette_set_color(machine, i, MAKE_RGB(r, g, b));
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}
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}
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static MACHINE_CONFIG_START( lions, _86lions_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", M6809, MAIN_CLOCK/4) /* 3 MHz.(guess) */
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MCFG_CPU_PROGRAM_MAP(lions_map)
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MCFG_CPU_VBLANK_INT("screen", lions_irq )
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_REFRESH_RATE(60)
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MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
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MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
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MCFG_SCREEN_SIZE(304, 256)
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MCFG_SCREEN_VISIBLE_AREA(0, 304-1, 0, 216-1) /* from the crtc registers... updated by crtc */
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MCFG_SCREEN_UPDATE(lions)
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MCFG_GFXDECODE(lions)
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MCFG_PALETTE_LENGTH(64)
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MCFG_PALETTE_INIT(lions)
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MCFG_VIDEO_START(lions)
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MCFG_VIA6522_ADD("via6522_0", MAIN_CLOCK/12, via_interface) /* 1 MHz.(only 1 or 2 MHz.are valid) */
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MCFG_MC6845_ADD("crtc", MC6845, MAIN_CLOCK/8, mc6845_intf) /* 1.5 MHz.(logical guess to get a decent 59.6374 Hz.) */
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MCFG_SPEAKER_STANDARD_MONO("mono")
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MCFG_SOUND_ADD("aysnd", AY8910, MAIN_CLOCK/8) /* 1.5 MHz.(guess) */
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MCFG_SOUND_CONFIG(ay8910_config)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
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MACHINE_CONFIG_END
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ROM_START( 86lions )
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ROM_REGION( 0x10000, "maincpu", 0 )
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ROM_LOAD( "lion_std.u9", 0xe000, 0x2000, CRC(994842b0) SHA1(72fc31c577ee70b07ce9a4f2e864fe113d32affe) )
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ROM_REGION( 0x6000, "gfx1", 0 )
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ROM_LOAD( "rd0.u13", 0x00000, 0x1000, CRC(38c57504) SHA1(cc3ac1df644abc4586fc9f0e88531ba146b86b48) )
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ROM_LOAD( "gn0.u10", 0x01000, 0x1000, CRC(80dce6f4) SHA1(bf953eba9cb270297b0d0efffe15b926e94dfbe7) )
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ROM_LOAD( "bl0.u8", 0x02000, 0x1000, CRC(00ef4724) SHA1(714fafd035e2befbb35c6d00df52845745e58a93) )
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ROM_LOAD( "rd1.u12", 0x03000, 0x1000, CRC(350dd017) SHA1(ba273d4231e7e4c44922898cf5a70e8b1d6e2f9d) )
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ROM_LOAD( "gn1.u11", 0x04000, 0x1000, CRC(80dce6f4) SHA1(bf953eba9cb270297b0d0efffe15b926e94dfbe7) )
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ROM_LOAD( "bl1.u9", 0x05000, 0x1000, CRC(675e164a) SHA1(99346ca70bfe673b31d71dc6b3bbc3b8f961e87f) )
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// ROM_REGION( 0x20, "proms", 0 )
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// ROM_LOAD( "prom.x", 0x00, 0x20, NO_DUMP )
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ROM_END
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GAME( 1985, 86lions, 0, lions, lions, 0, ROT0, "Aristocrat", "86 Lions", GAME_NOT_WORKING )
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