mirror of
https://github.com/holub/mame
synced 2025-05-30 17:41:47 +03:00
448 lines
12 KiB
C
448 lines
12 KiB
C
/***************************************************************************
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kc_ram.c
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KC 85 RAM modules emulation
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Supported modules:
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- M011 64KB RAM
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- M022 16KB RAM
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- M032 256KB segmented RAM
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- M034 512KB segmented RAM
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- M035 1MB segmented RAM
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- M036 128KB segmented RAM
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***************************************************************************/
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#include "emu.h"
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#include "kc_ram.h"
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/***************************************************************************
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IMPLEMENTATION
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***************************************************************************/
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//**************************************************************************
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// GLOBAL VARIABLES
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//**************************************************************************
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const device_type KC_M011 = &device_creator<kc_m011_device>;
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const device_type KC_M022 = &device_creator<kc_m022_device>;
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const device_type KC_M032 = &device_creator<kc_m032_device>;
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const device_type KC_M034 = &device_creator<kc_m034_device>;
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const device_type KC_M035 = &device_creator<kc_m035_device>;
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const device_type KC_M036 = &device_creator<kc_m036_device>;
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//**************************************************************************
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// M011 64KB RAM
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//**************************************************************************
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//-------------------------------------------------
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// kc_m011_device - constructor
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//-------------------------------------------------
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kc_m011_device::kc_m011_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: device_t(mconfig, KC_M011, "M011 64KB RAM", tag, owner, clock, "kc_m011", __FILE__),
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device_kcexp_interface( mconfig, *this )
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{
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}
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kc_m011_device::kc_m011_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
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: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
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device_kcexp_interface( mconfig, *this )
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{
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void kc_m011_device::device_start()
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{
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m_slot = dynamic_cast<kcexp_slot_device *>(owner());
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m_ram = machine().memory().region_alloc(tag(), get_ram_size(), 1, ENDIANNESS_LITTLE)->base();
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memset(m_ram, 0, get_ram_size());
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void kc_m011_device::device_reset()
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{
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m_enabled = 0;
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m_write_enabled = 0;
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m_base = 0;
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m_segment = 0;
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m_mei = 0;
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}
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/*-------------------------------------------------
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module control write
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-------------------------------------------------*/
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void kc_m011_device::control_w(UINT8 data)
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{
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if (m_mei)
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{
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m_enabled = BIT(data, 0);
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m_write_enabled = BIT(data, 1);
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m_base = (data & 0xc0) << 8;
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}
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}
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/*-------------------------------------------------
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read
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-------------------------------------------------*/
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void kc_m011_device::read(offs_t offset, UINT8 &data)
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{
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UINT32 addr = offset ^ m_base;
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if (addr < 0x10000 && m_enabled && m_mei)
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{
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data = m_ram[addr];
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// clear the MEO line for disable other modules with less priority
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m_slot->meo_w(CLEAR_LINE);
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}
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}
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/*-------------------------------------------------
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write
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-------------------------------------------------*/
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void kc_m011_device::write(offs_t offset, UINT8 data)
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{
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UINT32 addr = offset ^ m_base;
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if (addr < 0x10000 && m_enabled && m_mei)
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{
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if (m_write_enabled)
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m_ram[addr] = data;
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// clear the MEO line for disable other modules with less priority
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m_slot->meo_w(CLEAR_LINE);
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}
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}
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/*-------------------------------------------------
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MEI line write
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-------------------------------------------------*/
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WRITE_LINE_MEMBER( kc_m011_device::mei_w )
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{
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m_mei = state;
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// update MEO line
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m_slot->meo_w(state);
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}
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//**************************************************************************
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// M022 16KB RAM
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//**************************************************************************
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//-------------------------------------------------
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// kc_m022_device - constructor
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//-------------------------------------------------
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kc_m022_device::kc_m022_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: kc_m011_device(mconfig, KC_M022, "M022 16KB RAM", tag, owner, clock, "kc_m022", __FILE__)
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{
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}
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/*-------------------------------------------------
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read
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-------------------------------------------------*/
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void kc_m022_device::read(offs_t offset, UINT8 &data)
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{
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if (offset >= m_base && offset < (m_base + 0x4000) && m_enabled && m_mei)
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{
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data = m_ram[offset - m_base];
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// clear the MEO line for disable other modules with less priority
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m_slot->meo_w(CLEAR_LINE);
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}
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}
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/*-------------------------------------------------
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write
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-------------------------------------------------*/
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void kc_m022_device::write(offs_t offset, UINT8 data)
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{
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if (offset >= m_base && offset < (m_base + 0x4000) && m_enabled && m_mei)
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{
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if (m_write_enabled)
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m_ram[offset - m_base] = data;
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// clear the MEO line for disable other modules with less priority
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m_slot->meo_w(CLEAR_LINE);
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}
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}
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//**************************************************************************
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// M032 256KB segmented RAM
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//**************************************************************************
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//-------------------------------------------------
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// kc_m032_device - constructor
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//-------------------------------------------------
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kc_m032_device::kc_m032_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: kc_m011_device(mconfig, KC_M032, "M032 256KB segmented RAM", tag, owner, clock, "kc_m032", __FILE__)
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{
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void kc_m032_device::device_reset()
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{
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kc_m011_device::device_reset();
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m_base = 0x4000;
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}
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/*-------------------------------------------------
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module control write
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-------------------------------------------------*/
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void kc_m032_device::control_w(UINT8 data)
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{
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if (m_mei)
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{
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m_enabled = BIT(data, 0);
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m_write_enabled = BIT(data, 1);
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m_segment = (data>>2) & 0x0f;
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m_base = (data & 0x80) ? 0x8000 : 0x4000;
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}
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}
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/*-------------------------------------------------
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read
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-------------------------------------------------*/
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void kc_m032_device::read(offs_t offset, UINT8 &data)
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{
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if (offset >= m_base && offset < (m_base + 0x4000) && m_enabled && m_mei)
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{
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data = m_ram[(offset - m_base) | (m_segment << 14)];
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// clear the MEO line for disable other modules with less priority
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m_slot->meo_w(CLEAR_LINE);
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}
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}
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/*-------------------------------------------------
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write
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-------------------------------------------------*/
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void kc_m032_device::write(offs_t offset, UINT8 data)
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{
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if (offset >= m_base && offset < (m_base + 0x4000) && m_enabled && m_mei)
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{
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if (m_write_enabled)
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m_ram[(offset - m_base) | (m_segment << 14)] = data;
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// clear the MEO line for disable other modules with less priority
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m_slot->meo_w(CLEAR_LINE);
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}
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}
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//**************************************************************************
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// M034 512KB segmented RAM
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//**************************************************************************
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//-------------------------------------------------
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// kc_m034_device - constructor
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//-------------------------------------------------
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kc_m034_device::kc_m034_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: kc_m011_device(mconfig, KC_M034, "M034 512KB segmented RAM", tag, owner, clock, "kc_m034", __FILE__)
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{
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void kc_m034_device::device_reset()
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{
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kc_m011_device::device_reset();
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m_base = 0x4000;
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}
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/*-------------------------------------------------
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module control write
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-------------------------------------------------*/
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void kc_m034_device::control_w(UINT8 data)
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{
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if (m_mei)
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{
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m_enabled = BIT(data, 0);
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m_write_enabled = BIT(data, 1);
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m_segment = (data>>2) & 0x1f;
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m_base = (data & 0x80) ? 0x8000 : 0x4000;
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}
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}
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/*-------------------------------------------------
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read
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-------------------------------------------------*/
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void kc_m034_device::read(offs_t offset, UINT8 &data)
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{
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if (offset >= m_base && offset < (m_base + 0x4000) && m_enabled && m_mei)
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{
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data = m_ram[(offset - m_base) | (m_segment << 14)];
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// clear the MEO line for disable other modules with less priority
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m_slot->meo_w(CLEAR_LINE);
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}
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}
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/*-------------------------------------------------
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write
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-------------------------------------------------*/
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void kc_m034_device::write(offs_t offset, UINT8 data)
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{
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if (offset >= m_base && offset < (m_base + 0x4000) && m_enabled && m_mei)
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{
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if (m_write_enabled)
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m_ram[(offset - m_base) | (m_segment << 14)] = data;
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// clear the MEO line for disable other modules with less priority
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m_slot->meo_w(CLEAR_LINE);
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}
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}
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//**************************************************************************
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// M035 1MB segmented RAM
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//**************************************************************************
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//-------------------------------------------------
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// kc_m035_device - constructor
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//-------------------------------------------------
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kc_m035_device::kc_m035_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: kc_m011_device(mconfig, KC_M035, "M035 1MB segmented RAM", tag, owner, clock, "kc_m035", __FILE__)
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{
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}
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/*-------------------------------------------------
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module control write
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-------------------------------------------------*/
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void kc_m035_device::control_w(UINT8 data)
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{
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if (m_mei)
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{
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m_enabled = BIT(data, 0);
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m_write_enabled = BIT(data, 1);
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m_segment = (data>>2) & 0x3f;
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}
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}
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/*-------------------------------------------------
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read
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-------------------------------------------------*/
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void kc_m035_device::read(offs_t offset, UINT8 &data)
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{
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if (offset >= 0x8000 && offset < 0xc000 && m_enabled & m_mei)
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{
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data = m_ram[(offset - 0x8000) | (m_segment << 14)];
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// clear the MEO line for disable other modules with less priority
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m_slot->meo_w(CLEAR_LINE);
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}
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}
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/*-------------------------------------------------
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write
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-------------------------------------------------*/
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void kc_m035_device::write(offs_t offset, UINT8 data)
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{
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if (offset >= 0x8000 && offset < 0xc000 && m_enabled && m_mei)
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{
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if (m_write_enabled)
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m_ram[(offset-0x8000) | (m_segment << 14)] = data;
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// clear the MEO line for disable other modules with less priority
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m_slot->meo_w(CLEAR_LINE);
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}
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}
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//**************************************************************************
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// M036 128KB segmented RAM
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//**************************************************************************
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//-------------------------------------------------
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// kc_m036_device - constructor
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//-------------------------------------------------
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kc_m036_device::kc_m036_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: kc_m011_device(mconfig, KC_M036, "M036 128KB segmented RAM", tag, owner, clock, "kc_m036", __FILE__)
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{
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void kc_m036_device::device_reset()
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{
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kc_m011_device::device_reset();
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m_base = 0x4000;
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}
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/*-------------------------------------------------
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module control write
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-------------------------------------------------*/
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void kc_m036_device::control_w(UINT8 data)
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{
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if (m_mei)
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{
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m_enabled = BIT(data, 0);
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m_write_enabled = BIT(data, 1);
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m_segment = (data>>2) & 0x07;
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m_base = (data & 0x80) ? 0x8000 : 0x4000;
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}
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}
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/*-------------------------------------------------
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read
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-------------------------------------------------*/
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void kc_m036_device::read(offs_t offset, UINT8 &data)
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{
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if (offset >= m_base && offset < (m_base + 0x4000) && m_enabled && m_mei)
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{
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data = m_ram[(offset - m_base) | (m_segment << 14)];
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// clear the MEO line for disable other modules with less priority
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m_slot->meo_w(CLEAR_LINE);
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}
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}
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/*-------------------------------------------------
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write
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-------------------------------------------------*/
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void kc_m036_device::write(offs_t offset, UINT8 data)
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{
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if (offset >= m_base && offset < (m_base + 0x4000) && m_enabled && m_mei)
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{
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if (m_write_enabled)
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m_ram[(offset - m_base) | (m_segment << 14)] = data;
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// clear the MEO line for disable other modules with less priority
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m_slot->meo_w(CLEAR_LINE);
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}
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}
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