516 lines
16 KiB
C++
516 lines
16 KiB
C++
// license:BSD-3-Clause
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// copyright-holders:Andrew Gardner
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/***************************************************************************
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dsp56k.c
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Core implementation for the portable DSP56k emulator.
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Written by Andrew Gardner
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****************************************************************************
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Note:
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This CPU emulator is very much a work-in-progress.
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DONE:
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1: 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
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11, , , , , , ,18, , ,
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TODO:
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X 1-6 Explore CORE naming scheme.
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- 1-9 paragraph 1 : memory access timings
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- 1-9 Data ALU arithmetic operations generally use fractional two's complement arithmetic
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(Unsigned numbers are only supported by the multiply and multiply-accumulate instruction)
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- 1-9 For fractional arithmetic, the 31-bit product is added to the 40-bit contents of A or B. No pipeline!
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- 1-10 Two types of rounding: convergent rounding and two's complement rounding. See status register bit R.
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- 1-10 Logic unit is 16-bits wide and works on MSP portion of accum register
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- 1-10 The AGU can implement three types of arithmetic: linear, modulo, and reverse carry.
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- 1-12 "Two external interrupt pins!!!"
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- 1-12 Take care of all interrupt priority (IPR) stuff!
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- 1-19 Memory WAIT states
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- 1-20 The timer's interesting!
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- 1-21 Vectored exception requests on the Host Interface!
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***************************************************************************/
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#include "emu.h"
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#include "dsp56k.h"
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#include "dsp56dsm.h"
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#include "opcode.h"
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#include "debugger.h"
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#include "dsp56def.h"
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/***************************************************************************
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COMPONENT FUNCTIONALITY
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***************************************************************************/
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/* 1-9 ALU */
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// #include "dsp56alu.h"
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/* 1-10 Address Generation Unit (AGU) */
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// #include "dsp56agu.h"
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/* 1-11 Program Control Unit (PCU) */
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#include "dsp56pcu.h"
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/* 5-1 Host Interface (HI) */
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//#include "dsp56hi.h"
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/* 4-8 Memory handlers for on-chip peripheral memory. */
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#include "dsp56mem.h"
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DEFINE_DEVICE_TYPE_NS(DSP56156, DSP56K, dsp56k_device, "dsp56156", "Motorola DSP56156")
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namespace DSP56K {
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enum
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{
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// PCU
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DSP56K_PC=1,
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DSP56K_SR,
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DSP56K_LC,
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DSP56K_LA,
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DSP56K_SP,
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DSP56K_OMR,
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// ALU
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DSP56K_X, DSP56K_Y,
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DSP56K_A, DSP56K_B,
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// AGU
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DSP56K_R0,DSP56K_R1,DSP56K_R2,DSP56K_R3,
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DSP56K_N0,DSP56K_N1,DSP56K_N2,DSP56K_N3,
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DSP56K_M0,DSP56K_M1,DSP56K_M2,DSP56K_M3,
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DSP56K_TEMP,
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DSP56K_STATUS,
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// CPU STACK
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DSP56K_ST0,
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DSP56K_ST1,
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DSP56K_ST2,
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DSP56K_ST3,
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DSP56K_ST4,
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DSP56K_ST5,
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DSP56K_ST6,
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DSP56K_ST7,
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DSP56K_ST8,
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DSP56K_ST9,
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DSP56K_ST10,
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DSP56K_ST11,
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DSP56K_ST12,
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DSP56K_ST13,
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DSP56K_ST14,
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DSP56K_ST15
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};
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/****************************************************************************
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* Internal Memory Maps
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****************************************************************************/
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void dsp56k_device::dsp56156_program_map(address_map &map)
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{
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map(0x0000, 0x07ff).ram().share("dsk56k_program_ram"); /* 1-5 */
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// AM_RANGE(0x2f00,0x2fff) AM_ROM /* 1-5 PROM reserved memory. Is this the right spot for it? */
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}
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void dsp56k_device::dsp56156_x_data_map(address_map &map)
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{
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map(0x0000, 0x07ff).ram(); /* 1-5 */
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map(0xffc0, 0xffff).rw(this, FUNC(dsp56k_device::peripheral_register_r), FUNC(dsp56k_device::peripheral_register_w)); /* 1-5 On-chip peripheral registers memory mapped in data space */
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}
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dsp56k_device::dsp56k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: cpu_device(mconfig, DSP56156, tag, owner, clock)
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, m_program_config("program", ENDIANNESS_LITTLE, 16, 16, -1, address_map_constructor(FUNC(dsp56k_device::dsp56156_program_map), this))
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, m_data_config("data", ENDIANNESS_LITTLE, 16, 16, -1, address_map_constructor(FUNC(dsp56k_device::dsp56156_x_data_map), this))
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, m_program_ram(*this, "dsk56k_program_ram")
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{
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}
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device_memory_interface::space_config_vector dsp56k_device::memory_space_config() const
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{
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return space_config_vector {
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std::make_pair(AS_PROGRAM, &m_program_config),
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std::make_pair(AS_DATA, &m_data_config)
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};
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}
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/***************************************************************************
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MEMORY ACCESSORS
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***************************************************************************/
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#define ROPCODE(pc) cpustate->direct->read_word(pc)
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/***************************************************************************
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IRQ HANDLING
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***************************************************************************/
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void dsp56k_device::execute_set_input(int irqline, int state)
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{
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//logerror("DSP56k set irq line %d %d\n", irqline, state);
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switch(irqline)
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{
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case DSP56K_IRQ_MODA:
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// TODO: 1-12 Get this triggering right
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if (irqa_trigger(&m_dsp56k_core))
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logerror("DSP56k IRQA is set to fire on the \"Negative Edge\".\n");
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if (state != CLEAR_LINE)
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m_dsp56k_core.modA_state = true;
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else
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m_dsp56k_core.modA_state = false;
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if (m_dsp56k_core.reset_state != true)
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dsp56k_add_pending_interrupt(&m_dsp56k_core, "IRQA");
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break;
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case DSP56K_IRQ_MODB:
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// TODO: 1-12 Get this triggering right
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if (irqb_trigger(&m_dsp56k_core))
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logerror("DSP56k IRQB is set to fire on the \"Negative Edge\".\n");
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if (state != CLEAR_LINE)
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m_dsp56k_core.modB_state = true;
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else
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m_dsp56k_core.modB_state = false;
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if (m_dsp56k_core.reset_state != true)
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dsp56k_add_pending_interrupt(&m_dsp56k_core, "IRQB");
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break;
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case DSP56K_IRQ_MODC:
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if (state != CLEAR_LINE)
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m_dsp56k_core.modC_state = true;
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else
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m_dsp56k_core.modC_state = false;
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// TODO : Set bus mode or whatever
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break;
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case DSP56K_IRQ_RESET:
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if (state != CLEAR_LINE)
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m_dsp56k_core.reset_state = true;
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else
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{
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/* If it changes state from asserted to cleared. Call the reset function. */
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if (m_dsp56k_core.reset_state == true)
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device_reset();
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m_dsp56k_core.reset_state = false;
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}
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// dsp56k_add_pending_interrupt("Hardware RESET");
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break;
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default:
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logerror("DSP56k setting some weird irq line : %d", irqline);
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break;
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}
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/* If the reset line isn't asserted, service interrupts */
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// TODO: Is it right to immediately service interrupts?
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//if (cpustate->reset_state != true)
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// pcu_service_interrupts();
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}
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/***************************************************************************
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INITIALIZATION AND SHUTDOWN
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***************************************************************************/
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void dsp56k_device::agu_init()
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{
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/* save states - dsp56k_agu members */
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save_item(NAME(m_dsp56k_core.AGU.r0));
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save_item(NAME(m_dsp56k_core.AGU.r1));
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save_item(NAME(m_dsp56k_core.AGU.r2));
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save_item(NAME(m_dsp56k_core.AGU.r3));
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save_item(NAME(m_dsp56k_core.AGU.n0));
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save_item(NAME(m_dsp56k_core.AGU.n1));
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save_item(NAME(m_dsp56k_core.AGU.n2));
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save_item(NAME(m_dsp56k_core.AGU.n3));
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save_item(NAME(m_dsp56k_core.AGU.m0));
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save_item(NAME(m_dsp56k_core.AGU.m1));
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save_item(NAME(m_dsp56k_core.AGU.m2));
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save_item(NAME(m_dsp56k_core.AGU.m3));
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save_item(NAME(m_dsp56k_core.AGU.temp));
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}
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void dsp56k_device::alu_init()
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{
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/* save states - dsp56k_alu members */
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save_item(NAME(m_dsp56k_core.ALU.x));
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save_item(NAME(m_dsp56k_core.ALU.y));
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save_item(NAME(m_dsp56k_core.ALU.a));
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save_item(NAME(m_dsp56k_core.ALU.b));
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}
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void dsp56k_device::device_start()
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{
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memset(&m_dsp56k_core, 0, sizeof(m_dsp56k_core));
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m_dsp56k_core.device = this;
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m_dsp56k_core.program_ram = m_program_ram;
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/* Call specific module inits */
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pcu_init(&m_dsp56k_core, this);
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agu_init();
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alu_init();
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/* HACK - You're not in bootstrap mode upon bootup */
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m_dsp56k_core.bootstrap_mode = BOOTSTRAP_OFF;
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/* Clear the irq states */
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m_dsp56k_core.modA_state = false;
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m_dsp56k_core.modB_state = false;
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m_dsp56k_core.modC_state = false;
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m_dsp56k_core.reset_state = false;
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/* save states - dsp56k_core members */
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save_item(NAME(m_dsp56k_core.modA_state));
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save_item(NAME(m_dsp56k_core.modB_state));
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save_item(NAME(m_dsp56k_core.modC_state));
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save_item(NAME(m_dsp56k_core.reset_state));
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save_item(NAME(m_dsp56k_core.bootstrap_mode));
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save_item(NAME(m_dsp56k_core.repFlag));
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save_item(NAME(m_dsp56k_core.repAddr));
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save_item(NAME(m_dsp56k_core.ppc));
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save_item(NAME(m_dsp56k_core.op));
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save_item(NAME(m_dsp56k_core.interrupt_cycles));
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/* save states - dsp56k_host_interface members */
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save_item(NAME(m_dsp56k_core.HI.icr));
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save_item(NAME(m_dsp56k_core.HI.cvr));
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save_item(NAME(m_dsp56k_core.HI.isr));
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save_item(NAME(m_dsp56k_core.HI.ivr));
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save_item(NAME(m_dsp56k_core.HI.trxh));
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save_item(NAME(m_dsp56k_core.HI.trxl));
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save_item(NAME(m_dsp56k_core.HI.bootstrap_offset));
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save_item(NAME(m_dsp56k_core.peripheral_ram));
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m_dsp56k_core.program = &space(AS_PROGRAM);
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m_dsp56k_core.direct = m_dsp56k_core.program->direct<-1>();
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m_dsp56k_core.data = &space(AS_DATA);
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state_add(DSP56K_PC, "PC", m_dsp56k_core.PCU.pc).formatstr("%04X");
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state_add(DSP56K_SR, "SR", m_dsp56k_core.PCU.sr).formatstr("%04X");
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state_add(DSP56K_LC, "LC", m_dsp56k_core.PCU.lc).formatstr("%04X");
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state_add(DSP56K_LA, "LA", m_dsp56k_core.PCU.la).formatstr("%04X");
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state_add(DSP56K_SP, "SP", m_dsp56k_core.PCU.sp).formatstr("%02X");
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state_add(DSP56K_OMR, "OMR", m_dsp56k_core.PCU.omr).formatstr("%02X");
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state_add(DSP56K_X, "X", m_dsp56k_core.ALU.x.d).mask(0xffffffff).formatstr("%9s");
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state_add(DSP56K_Y, "Y", m_dsp56k_core.ALU.y.d).mask(0xffffffff).formatstr("%9s");
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state_add(DSP56K_A, "A", m_dsp56k_core.ALU.a.q).mask(u64(0xffffffffffffffffU)).formatstr("%12s"); /* could benefit from a better mask? */
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state_add(DSP56K_B, "B", m_dsp56k_core.ALU.b.q).mask(u64(0xffffffffffffffffU)).formatstr("%12s"); /* could benefit from a better mask? */
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state_add(DSP56K_R0, "R0", m_dsp56k_core.AGU.r0).formatstr("%04X");
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state_add(DSP56K_R1, "R1", m_dsp56k_core.AGU.r1).formatstr("%04X");
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state_add(DSP56K_R2, "R2", m_dsp56k_core.AGU.r2).formatstr("%04X");
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state_add(DSP56K_R3, "R3", m_dsp56k_core.AGU.r3).formatstr("%04X");
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state_add(DSP56K_N0, "N0", m_dsp56k_core.AGU.n0).formatstr("%04X");
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state_add(DSP56K_N1, "N1", m_dsp56k_core.AGU.n1).formatstr("%04X");
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state_add(DSP56K_N2, "N2", m_dsp56k_core.AGU.n2).formatstr("%04X");
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state_add(DSP56K_N3, "N3", m_dsp56k_core.AGU.n3).formatstr("%04X");
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state_add(DSP56K_M0, "M0", m_dsp56k_core.AGU.m0).formatstr("%04X");
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state_add(DSP56K_M1, "M1", m_dsp56k_core.AGU.m1).formatstr("%04X");
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state_add(DSP56K_M2, "M2", m_dsp56k_core.AGU.m2).formatstr("%04X");
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state_add(DSP56K_M3, "M3", m_dsp56k_core.AGU.m3).formatstr("%04X");
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state_add(DSP56K_TEMP, "TMP", m_dsp56k_core.AGU.temp).formatstr("%04X").noshow();
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//state_add(DSP56K_STATUS, "STS", STATUS).formatstr("%02X");
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state_add(DSP56K_ST0, "ST0", m_dsp56k_core.PCU.ss[0].d).formatstr("%08X");
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state_add(DSP56K_ST1, "ST1", m_dsp56k_core.PCU.ss[1].d).formatstr("%08X");
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state_add(DSP56K_ST2, "ST2", m_dsp56k_core.PCU.ss[2].d).formatstr("%08X");
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state_add(DSP56K_ST3, "ST3", m_dsp56k_core.PCU.ss[3].d).formatstr("%08X");
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state_add(DSP56K_ST4, "ST4", m_dsp56k_core.PCU.ss[4].d).formatstr("%08X");
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state_add(DSP56K_ST5, "ST5", m_dsp56k_core.PCU.ss[5].d).formatstr("%08X");
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state_add(DSP56K_ST6, "ST6", m_dsp56k_core.PCU.ss[6].d).formatstr("%08X");
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state_add(DSP56K_ST7, "ST7", m_dsp56k_core.PCU.ss[7].d).formatstr("%08X");
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state_add(DSP56K_ST8, "ST8", m_dsp56k_core.PCU.ss[8].d).formatstr("%08X");
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state_add(DSP56K_ST9, "ST9", m_dsp56k_core.PCU.ss[9].d).formatstr("%08X");
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state_add(DSP56K_ST10, "ST10", m_dsp56k_core.PCU.ss[10].d).formatstr("%08X");
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state_add(DSP56K_ST11, "ST11", m_dsp56k_core.PCU.ss[11].d).formatstr("%08X");
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state_add(DSP56K_ST12, "ST12", m_dsp56k_core.PCU.ss[12].d).formatstr("%08X");
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state_add(DSP56K_ST13, "ST13", m_dsp56k_core.PCU.ss[13].d).formatstr("%08X");
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state_add(DSP56K_ST14, "ST14", m_dsp56k_core.PCU.ss[14].d).formatstr("%08X");
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state_add(DSP56K_ST15, "ST15", m_dsp56k_core.PCU.ss[15].d).formatstr("%08X");
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state_add(STATE_GENPC, "GENPC", m_dsp56k_core.PCU.pc).noshow();
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state_add(STATE_GENPCBASE, "CURPC", m_dsp56k_core.ppc).noshow();
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state_add(STATE_GENSP, "GENSP", m_dsp56k_core.PCU.sp).noshow();
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state_add(STATE_GENFLAGS, "GENFLAGS", m_dsp56k_core.PCU.sr).formatstr("%14s").noshow();
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set_icountptr(m_dsp56k_core.icount);
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}
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void dsp56k_device::state_string_export(const device_state_entry &entry, std::string &str) const
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{
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const dsp56k_core *cpustate = &m_dsp56k_core;
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switch (entry.index())
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{
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case STATE_GENFLAGS:
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str = string_format("%s%s %s%s%s%s%s%s%s%s %s%s",
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/* Status Register */
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LF_bit(cpustate) ? "L" : ".",
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FV_bit(cpustate) ? "F" : ".",
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S_bit(cpustate) ? "S" : ".",
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L_bit(cpustate) ? "L" : ".",
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E_bit(cpustate) ? "E" : ".",
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U_bit(cpustate) ? "U" : ".",
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N_bit(cpustate) ? "N" : ".",
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Z_bit(cpustate) ? "Z" : ".",
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V_bit(cpustate) ? "V" : ".",
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C_bit(cpustate) ? "C" : ".",
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/* Stack Pointer */
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UF_bit(cpustate) ? "U" : ".",
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SE_bit(cpustate) ? "S" : ".");
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break;
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case DSP56K_X:
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str = string_format("%04x %04x", X1, X0);
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break;
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case DSP56K_Y:
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str = string_format("%04x %04x", Y1, Y0);
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break;
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case DSP56K_A:
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str = string_format("%02x %04x %04x", A2, A1, A0);
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break;
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case DSP56K_B:
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str = string_format("%02x %04x %04x", B2, B1, B0);
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break;
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}
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}
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/***************************************************************************
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RESET BEHAVIOR
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***************************************************************************/
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static void agu_reset(dsp56k_core* cpustate)
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{
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/* FM.4-3 */
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R0 = 0x0000;
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R1 = 0x0000;
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R2 = 0x0000;
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R3 = 0x0000;
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N0 = 0x0000;
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N1 = 0x0000;
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N2 = 0x0000;
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N3 = 0x0000;
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|
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M0 = 0xffff;
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M1 = 0xffff;
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M2 = 0xffff;
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M3 = 0xffff;
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|
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TEMP = 0x0000;
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}
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|
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static void alu_reset(dsp56k_core* cpustate)
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|
{
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X = 0x00000000;
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Y = 0x00000000;
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A = 0x0000000000;
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B = 0x0000000000;
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}
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|
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void dsp56k_device::device_reset()
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|
{
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logerror("Dsp56k reset\n");
|
|
|
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m_dsp56k_core.interrupt_cycles = 0;
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|
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|
m_dsp56k_core.repFlag = 0;
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m_dsp56k_core.repAddr = 0x0000;
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|
|
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pcu_reset(&m_dsp56k_core);
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mem_reset(&m_dsp56k_core);
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agu_reset(&m_dsp56k_core);
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alu_reset(&m_dsp56k_core);
|
|
|
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m_dsp56k_core.ppc = m_dsp56k_core.PCU.pc;
|
|
|
|
/* HACK - Put a jump to 0x0000 at 0x0000 - this keeps the CPU locked to the instruction at address 0x0000 */
|
|
m_dsp56k_core.program->write_word(0x0000, 0x0124);
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|
}
|
|
|
|
|
|
|
|
/***************************************************************************
|
|
CORE INCLUDE
|
|
***************************************************************************/
|
|
#include "dsp56ops.hxx"
|
|
|
|
|
|
/***************************************************************************
|
|
CORE EXECUTION LOOP
|
|
***************************************************************************/
|
|
// Execute a single opcode and return how many cycles it took.
|
|
static size_t execute_one_new(dsp56k_core* cpustate)
|
|
{
|
|
// For MAME
|
|
cpustate->ppc = PC;
|
|
if (cpustate->device->machine().debug_flags & DEBUG_FLAG_CALL_HOOK) // FIXME: if this was a member, the helper would work
|
|
cpustate->device->debug()->instruction_hook(PC);
|
|
|
|
cpustate->op = ROPCODE(PC);
|
|
uint16_t w0 = ROPCODE(PC);
|
|
uint16_t w1 = ROPCODE(PC + 1);
|
|
|
|
Opcode op(w0, w1);
|
|
op.evaluate(cpustate);
|
|
PC += op.evalSize(); // Special size function needed to handle jmps, etc.
|
|
|
|
// TODO: Currently all operations take up 4 cycles (inst->cycles()).
|
|
return 4;
|
|
}
|
|
|
|
void dsp56k_device::execute_run()
|
|
{
|
|
/* If reset line is asserted, do nothing */
|
|
if (m_dsp56k_core.reset_state)
|
|
{
|
|
m_dsp56k_core.icount = 0;
|
|
return;
|
|
}
|
|
|
|
/* HACK - if you're in bootstrap mode, simply pretend you ate up all your cycles waiting for data. */
|
|
if (m_dsp56k_core.bootstrap_mode != BOOTSTRAP_OFF)
|
|
{
|
|
m_dsp56k_core.icount = 0;
|
|
return;
|
|
}
|
|
|
|
//m_dsp56k_core.icount -= m_dsp56k_core.interrupt_cycles;
|
|
//m_dsp56k_core.interrupt_cycles = 0;
|
|
|
|
while(m_dsp56k_core.icount > 0)
|
|
{
|
|
execute_one(&m_dsp56k_core);
|
|
if (0) m_dsp56k_core.icount -= execute_one_new(&m_dsp56k_core);
|
|
pcu_service_interrupts(&m_dsp56k_core); // TODO: Is it incorrect to service after each instruction?
|
|
}
|
|
}
|
|
|
|
|
|
std::unique_ptr<util::disasm_interface> dsp56k_device::create_disassembler()
|
|
{
|
|
return std::make_unique<dsp56k_disassembler>();
|
|
}
|
|
|
|
} // namespace DSP56K
|