mirror of
https://github.com/holub/mame
synced 2025-06-05 04:16:28 +03:00
621ac620ae
device_memory_interface::space() assert against NULL and return a reference, and pushed references throughout all address space usage in the system. Added a has_space() method to check for those rare case when it is ambiguous. [Aaron Giles] Also reinstated the generic space and added fatal error handlers if anyone tries to actually read/write from it.
676 lines
17 KiB
C
676 lines
17 KiB
C
/***************************************************************************
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Sage II
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For memory map look at :
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http://www.thebattles.net/sage/img/SDT.pdf (pages 14-)
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06/12/2009 Skeleton driver.
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****************************************************************************/
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/*
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TODO:
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- floppy loading
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- PROM test fails
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- i8251 test fails on boot
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001BD8: move.b D6, $c071.w
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001BDC: moveq #$e, D7
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001BDE: dbra D7, $1bde
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001BE2: btst #$2, $c073.w
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001BE8: bne $1bec
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- TMS9914 IEEE-488 controller
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- board 2 (4x 2651 USART)
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- Winchester controller
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*/
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#include "includes/sage2.h"
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//**************************************************************************
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// MEMORY MANAGEMENT UNIT
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//**************************************************************************
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//-------------------------------------------------
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// mmu_r -
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//-------------------------------------------------
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READ8_MEMBER( sage2_state::mmu_r )
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{
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UINT8 data = 0xff;
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if (m_reset || (offset >= 0xfe0000))
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{
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data = memregion(M68000_TAG)->base()[offset & 0x1fff];
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}
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else if (offset < 0x080000)
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{
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data = m_ram->pointer()[offset];
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}
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return data;
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}
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//-------------------------------------------------
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// mmu_w -
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//-------------------------------------------------
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WRITE8_MEMBER( sage2_state::mmu_w )
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{
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if (offset < 0x080000)
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{
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m_ram->pointer()[offset] = data;
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}
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}
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//**************************************************************************
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// ADDRESS MAPS
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//**************************************************************************
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//-------------------------------------------------
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// ADDRESS_MAP( sage2_mem )
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//-------------------------------------------------
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static ADDRESS_MAP_START( sage2_mem, AS_PROGRAM, 16, sage2_state )
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x000000, 0xfeffff) AM_READWRITE8(mmu_r, mmu_w, 0xffff)
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AM_RANGE(0xffc000, 0xffc007) AM_DEVREADWRITE8_LEGACY(I8253_1_TAG, pit8253_r, pit8253_w, 0x00ff)
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// AM_RANGE(0xffc010, 0xffc01f) AM_DEVREADWRITE8(TMS9914_TAG, tms9914_device, read, write, 0x00ff)
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AM_RANGE(0xffc020, 0xffc027) AM_DEVREADWRITE8(I8255A_0_TAG, i8255_device, read, write, 0x00ff) // i8255, DIPs + Floppy ctrl port
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AM_RANGE(0xffc030, 0xffc031) AM_DEVREADWRITE8(I8251_1_TAG, i8251_device, data_r, data_w, 0x00ff)
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AM_RANGE(0xffc032, 0xffc033) AM_DEVREADWRITE8(I8251_1_TAG, i8251_device, status_r, control_w, 0x00ff)
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AM_RANGE(0xffc040, 0xffc043) AM_DEVREADWRITE8_LEGACY(I8259_TAG, pic8259_r, pic8259_w, 0x00ff)
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AM_RANGE(0xffc050, 0xffc051) AM_DEVREAD8_LEGACY(UPD765_TAG, upd765_status_r, 0x00ff)
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AM_RANGE(0xffc052, 0xffc053) AM_DEVREADWRITE8_LEGACY(UPD765_TAG, upd765_data_r, upd765_data_w, 0x00ff)
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AM_RANGE(0xffc060, 0xffc067) AM_DEVREADWRITE8(I8255A_0_TAG, i8255_device, read, write, 0x00ff) // i8255, Printer
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AM_RANGE(0xffc070, 0xffc071) AM_DEVREAD8(I8251_0_TAG, i8251_device, data_r, 0x00ff) AM_DEVWRITE8(TERMINAL_TAG, generic_terminal_device, write, 0x00ff)
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// AM_RANGE(0xffc070, 0xffc071) AM_DEVREADWRITE8(I8251_0_TAG, i8251_device, data_r, data_w, 0x00ff)
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AM_RANGE(0xffc072, 0xffc073) AM_DEVREADWRITE8(I8251_0_TAG, i8251_device, status_r, control_w, 0x00ff)
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AM_RANGE(0xffc080, 0xffc087) AM_MIRROR(0x78) AM_DEVREADWRITE8_LEGACY(I8253_0_TAG, pit8253_r, pit8253_w, 0x00ff)
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// AM_RANGE(0xffc400, 0xffc407) AM_DEVREADWRITE8(S2651_0_TAG, s2651_device, read, write, 0x00ff)
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// AM_RANGE(0xffc440, 0xffc447) AM_DEVREADWRITE8(S2651_1_TAG, s2651_device, read, write, 0x00ff)
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// AM_RANGE(0xffc480, 0xffc487) AM_DEVREADWRITE8(S2651_2_TAG, s2651_device, read, write, 0x00ff)
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// AM_RANGE(0xffc4c0, 0xffc4c7) AM_DEVREADWRITE8(S2651_3_TAG, s2651_device, read, write, 0x00ff)
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// AM_RANGE(0xffc500, 0xffc7ff) // Winchester drive ports
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ADDRESS_MAP_END
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//**************************************************************************
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// INPUT PORTS
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//**************************************************************************
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//-------------------------------------------------
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// INPUT_PORTS( sage2 )
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//-------------------------------------------------
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static INPUT_PORTS_START( sage2 )
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PORT_START("J7")
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PORT_DIPNAME( 0x07, 0x07, "Terminal Baud Rate" ) PORT_DIPLOCATION("J7:1,2,3")
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PORT_DIPSETTING( 0x07, "19200" )
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PORT_DIPSETTING( 0x06, "9600" )
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PORT_DIPSETTING( 0x05, "4800" )
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PORT_DIPSETTING( 0x04, "2400" )
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PORT_DIPSETTING( 0x03, "1200" )
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PORT_DIPSETTING( 0x02, "600" )
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PORT_DIPSETTING( 0x01, "300" )
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PORT_DIPSETTING( 0x00, "Reserved (19200)" )
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PORT_DIPNAME( 0x08, 0x08, "Parity Control" ) PORT_DIPLOCATION("J7:4")
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PORT_DIPSETTING( 0x08, "Even Parity" )
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PORT_DIPSETTING( 0x00, "Disabled" )
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PORT_DIPNAME( 0x30, 0x20, "Boot Device" ) PORT_DIPLOCATION("J7:5,6")
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PORT_DIPSETTING( 0x30, "Debugger" )
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PORT_DIPSETTING( 0x20, "Floppy Drive 0" )
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PORT_DIPSETTING( 0x10, "Winchester" )
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PORT_DIPSETTING( 0x00, "Reserved (Debugger)" )
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PORT_DIPNAME( 0x40, 0x40, "Floppy Configuration" ) PORT_DIPLOCATION("J7:7")
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PORT_DIPSETTING( 0x40, "96 TPI" )
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PORT_DIPSETTING( 0x00, "48 TPI" )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Service_Mode ) ) PORT_DIPLOCATION("J7:8")
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_START("J6")
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PORT_DIPNAME( 0x1f, 0x07, "IEEE-488 Bus Address" ) PORT_DIPLOCATION("J6:1,2,3,4,5")
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PORT_DIPSETTING( 0x00, "0" )
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PORT_DIPSETTING( 0x01, "1" )
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PORT_DIPSETTING( 0x02, "2" )
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PORT_DIPSETTING( 0x03, "3" )
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PORT_DIPSETTING( 0x04, "4" )
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PORT_DIPSETTING( 0x05, "5" )
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PORT_DIPSETTING( 0x06, "6" )
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PORT_DIPSETTING( 0x07, "7" )
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PORT_DIPSETTING( 0x08, "8" )
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PORT_DIPSETTING( 0x09, "9" )
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PORT_DIPSETTING( 0x0a, "10" )
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PORT_DIPSETTING( 0x0b, "11" )
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PORT_DIPSETTING( 0x0c, "12" )
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PORT_DIPSETTING( 0x0d, "13" )
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PORT_DIPSETTING( 0x0e, "14" )
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PORT_DIPSETTING( 0x0f, "15" )
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PORT_DIPSETTING( 0x10, "16" )
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PORT_DIPSETTING( 0x11, "17" )
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PORT_DIPSETTING( 0x12, "18" )
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PORT_DIPSETTING( 0x13, "19" )
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PORT_DIPSETTING( 0x14, "20" )
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PORT_DIPSETTING( 0x15, "21" )
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PORT_DIPSETTING( 0x16, "22" )
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PORT_DIPSETTING( 0x17, "23" )
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PORT_DIPSETTING( 0x18, "24" )
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PORT_DIPSETTING( 0x19, "25" )
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PORT_DIPSETTING( 0x1a, "26" )
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PORT_DIPSETTING( 0x1b, "27" )
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PORT_DIPSETTING( 0x1c, "28" )
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PORT_DIPSETTING( 0x1d, "29" )
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PORT_DIPSETTING( 0x1e, "30" )
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PORT_DIPSETTING( 0x1f, "31" )
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PORT_DIPNAME( 0x20, 0x00, "IEEE-488 TALK" ) PORT_DIPLOCATION("J6:6")
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PORT_DIPSETTING( 0x00, "Disabled" )
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PORT_DIPSETTING( 0x20, "Enabled" )
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PORT_DIPNAME( 0x40, 0x00, "IEEE-488 LISTEN" ) PORT_DIPLOCATION("J6:7")
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PORT_DIPSETTING( 0x00, "Disabled" )
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PORT_DIPSETTING( 0x40, "Enabled" )
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PORT_DIPNAME( 0x80, 0x00, "IEEE-488 Consecutive Adresses" ) PORT_DIPLOCATION("J6:8")
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PORT_DIPSETTING( 0x00, "1" )
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PORT_DIPSETTING( 0x80, "2" )
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INPUT_PORTS_END
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//**************************************************************************
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// DEVICE CONFIGURATION
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//**************************************************************************
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//-------------------------------------------------
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// I8255A_INTERFACE( ppi0_intf )
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//-------------------------------------------------
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/*
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IR0 U74 OUT2
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IR1 RX2I+
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IR2 TX1I+
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IR3 TX2I+
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IR4 MI-
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IR5 CNI+
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IR6 U74 OUT0
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IR7 SI+
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*/
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static const struct pic8259_interface pic_intf =
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{
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DEVCB_CPU_INPUT_LINE(M68000_TAG, M68K_IRQ_1),
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DEVCB_LINE_VCC,
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DEVCB_NULL
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};
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//-------------------------------------------------
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// I8255A_INTERFACE( ppi0_intf )
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//-------------------------------------------------
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WRITE8_MEMBER( sage2_state::ppi0_pc_w )
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{
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/*
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bit signal
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PC0 TC+
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PC1 RDY+
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PC2 FDIE+
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PC3 SL0-
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PC4 SL1-
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PC5 MOT-
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PC6 PCRMP-
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PC7 FRES+
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*/
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// floppy terminal count
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upd765_tc_w(m_fdc, BIT(data, 0));
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// floppy ready
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upd765_ready_w(m_fdc, BIT(data, 1));
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// floppy interrupt enable
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m_fdie = BIT(data, 2);
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update_fdc_int();
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// drive select
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m_sl0 = BIT(data, 3);
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m_sl1 = BIT(data, 4);
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// floppy motor
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floppy_mon_w(m_floppy0, BIT(data, 5));
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floppy_mon_w(m_floppy1, BIT(data, 5));
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// FDC reset
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upd765_reset_w(m_fdc, BIT(data, 7));
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}
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static I8255A_INTERFACE( ppi0_intf )
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{
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DEVCB_INPUT_PORT("J7"),
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DEVCB_NULL,
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DEVCB_INPUT_PORT("J6"),
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_DRIVER_MEMBER(sage2_state, ppi0_pc_w)
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};
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//-------------------------------------------------
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// I8255A_INTERFACE( ppi1_intf )
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//-------------------------------------------------
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READ8_MEMBER( sage2_state::ppi1_pb_r )
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{
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/*
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bit signal
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PB0 FDI+
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PB1 WP+
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PB2 RG-
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PB3 CD-
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PB4 BUSY
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PB5 PAPER
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PB6 SEL
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PB7 FAULT-
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*/
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UINT8 data = 0;
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// floppy interrupt
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data = upd765_int_r(m_fdc);
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// floppy write protected
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if (!m_sl0) data |= floppy_wpt_r(m_floppy0) << 1;
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if (!m_sl1) data |= floppy_wpt_r(m_floppy1) << 1;
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// RS-232 ring indicator
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// RS-232 carrier detect
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// centronics
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data |= m_centronics->busy_r() << 4;
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data |= m_centronics->pe_r() << 5;
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data |= m_centronics->vcc_r() << 6;
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data |= m_centronics->fault_r() << 7;
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return data;
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}
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WRITE8_MEMBER( sage2_state::ppi1_pc_w )
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{
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/*
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bit signal
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PC0 PRES-
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PC1 U8 SC+
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PC2 SI+
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PC3 LEDR+
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PC4 STROBE-
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PC5 PRIME-
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PC6 U38 CL-
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PC7 RMI-
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*/
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if (!BIT(data, 0))
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{
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// clear parity error interrupt
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m_maincpu->set_input_line(M68K_IRQ_7, CLEAR_LINE);
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}
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// s? interrupt
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pic8259_ir7_w(m_pic, BIT(data, 2));
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// processor LED
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output_set_led_value(0, BIT(data, 3));
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// centronics
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m_centronics->strobe_w(BIT(data, 4));
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m_centronics->init_prime_w(BIT(data, 5));
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if (!BIT(data, 6))
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{
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// clear ACK interrupt
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pic8259_ir5_w(m_pic, CLEAR_LINE);
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}
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if (!BIT(data, 7))
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{
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// clear modem interrupt
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pic8259_ir4_w(m_pic, CLEAR_LINE);
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}
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}
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static I8255A_INTERFACE( ppi1_intf )
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{
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DEVCB_NULL,
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DEVCB_DEVICE_MEMBER(CENTRONICS_TAG, centronics_device, write),
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DEVCB_DRIVER_MEMBER(sage2_state, ppi1_pb_r),
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_DRIVER_MEMBER(sage2_state, ppi1_pc_w)
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};
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//-------------------------------------------------
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// pit8253_config pit0_intf
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//-------------------------------------------------
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static const struct pit8253_config pit0_intf =
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{
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{
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{
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0, // from U75 OUT0
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DEVCB_LINE_VCC,
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DEVCB_DEVICE_LINE(I8259_TAG, pic8259_ir6_w)
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}, {
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XTAL_16MHz/2/125,
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DEVCB_LINE_VCC,
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DEVCB_DEVICE_LINE(I8253_0_TAG, pit8253_clk2_w)
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}, {
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0, // from OUT2
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DEVCB_LINE_VCC,
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DEVCB_DEVICE_LINE(I8259_TAG, pic8259_ir0_w)
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}
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}
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};
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//-------------------------------------------------
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// pit8253_config pit1_intf
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//-------------------------------------------------
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WRITE_LINE_MEMBER( sage2_state::br1_w )
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{
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m_usart0->transmit_clock();
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m_usart0->receive_clock();
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}
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WRITE_LINE_MEMBER( sage2_state::br2_w )
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{
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m_usart1->transmit_clock();
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m_usart1->receive_clock();
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}
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static const struct pit8253_config pit1_intf =
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{
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{
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{
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XTAL_16MHz/2/125,
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DEVCB_LINE_VCC,
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DEVCB_DEVICE_LINE(I8253_0_TAG, pit8253_clk0_w)
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}, {
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XTAL_16MHz/2/13,
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DEVCB_LINE_VCC,
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DEVCB_DRIVER_LINE_MEMBER(sage2_state, br1_w)
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}, {
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XTAL_16MHz/2/13,
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DEVCB_LINE_VCC,
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DEVCB_DRIVER_LINE_MEMBER(sage2_state, br2_w)
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}
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}
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};
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//-------------------------------------------------
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// i8251_interface usart0_intf
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//-------------------------------------------------
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static const i8251_interface usart0_intf =
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{
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DEVCB_NULL, //DEVCB_DEVICE_LINE(TERMINAL_TAG, terminal_serial_r),
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DEVCB_NULL, //DEVCB_DEVICE_LINE(TERMINAL_TAG, terminal_serial_w),
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_CPU_INPUT_LINE(M68000_TAG, M68K_IRQ_5),
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DEVCB_DEVICE_LINE(I8259_TAG, pic8259_ir2_w),
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DEVCB_NULL,
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DEVCB_NULL
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};
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//-------------------------------------------------
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// i8251_interface usart1_intf
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//-------------------------------------------------
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static const i8251_interface usart1_intf =
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{
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_DEVICE_LINE(I8259_TAG, pic8259_ir1_w),
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DEVCB_DEVICE_LINE(I8259_TAG, pic8259_ir3_w),
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DEVCB_NULL,
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DEVCB_NULL
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};
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//-------------------------------------------------
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// upd765_interface fdc_intf
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//-------------------------------------------------
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static const floppy_interface floppy_intf =
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{
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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FLOPPY_STANDARD_5_25_DSDD,
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LEGACY_FLOPPY_OPTIONS_NAME(default),
|
|
"floppy_5_25",
|
|
NULL
|
|
};
|
|
|
|
void sage2_state::update_fdc_int()
|
|
{
|
|
m_maincpu->set_input_line(M68K_IRQ_6, m_fdie & m_fdc_int);
|
|
}
|
|
|
|
WRITE_LINE_MEMBER( sage2_state::fdc_int_w )
|
|
{
|
|
m_fdc_int = state;
|
|
update_fdc_int();
|
|
}
|
|
|
|
static UPD765_GET_IMAGE( fdc_get_image )
|
|
{
|
|
sage2_state *state = device->machine().driver_data<sage2_state>();
|
|
|
|
if (!state->m_sl0) return state->m_floppy0;
|
|
if (!state->m_sl1) return state->m_floppy1;
|
|
|
|
return NULL;
|
|
}
|
|
|
|
static const upd765_interface fdc_intf =
|
|
{
|
|
DEVCB_DRIVER_LINE_MEMBER(sage2_state, fdc_int_w),
|
|
DEVCB_NULL,
|
|
fdc_get_image,
|
|
UPD765_RDY_PIN_NOT_CONNECTED,
|
|
{ FLOPPY_0, FLOPPY_1, NULL, NULL }
|
|
};
|
|
|
|
|
|
//-------------------------------------------------
|
|
// centronics_interface centronics_intf
|
|
//-------------------------------------------------
|
|
|
|
WRITE_LINE_MEMBER( sage2_state::ack_w )
|
|
{
|
|
if (!state)
|
|
{
|
|
pic8259_ir5_w(m_pic, ASSERT_LINE);
|
|
}
|
|
}
|
|
|
|
static const centronics_interface centronics_intf =
|
|
{
|
|
DEVCB_DRIVER_LINE_MEMBER(sage2_state, ack_w),
|
|
DEVCB_NULL,
|
|
DEVCB_NULL
|
|
};
|
|
|
|
|
|
//-------------------------------------------------
|
|
// IEEE488_INTERFACE( ieee488_intf )
|
|
//-------------------------------------------------
|
|
|
|
static IEEE488_INTERFACE( ieee488_intf )
|
|
{
|
|
DEVCB_NULL,
|
|
DEVCB_NULL,
|
|
DEVCB_NULL,
|
|
DEVCB_NULL,
|
|
DEVCB_NULL,
|
|
DEVCB_NULL,
|
|
DEVCB_NULL,
|
|
DEVCB_NULL
|
|
};
|
|
|
|
|
|
//-------------------------------------------------
|
|
// GENERIC_TERMINAL_INTERFACE( terminal_intf )
|
|
//-------------------------------------------------
|
|
|
|
WRITE8_MEMBER( sage2_state::kbd_put )
|
|
{
|
|
m_usart0->receive_character(data);
|
|
}
|
|
|
|
static GENERIC_TERMINAL_INTERFACE( terminal_intf )
|
|
{
|
|
DEVCB_DRIVER_MEMBER(sage2_state, kbd_put)
|
|
};
|
|
|
|
|
|
|
|
//**************************************************************************
|
|
// MACHINE INITIALIZATION
|
|
//**************************************************************************
|
|
|
|
//-------------------------------------------------
|
|
// MACHINE_RESET( sage2 )
|
|
//-------------------------------------------------
|
|
|
|
void sage2_state::machine_reset()
|
|
{
|
|
m_reset = 1;
|
|
}
|
|
|
|
|
|
|
|
//**************************************************************************
|
|
// MACHINE DRIVERS
|
|
//**************************************************************************
|
|
|
|
//-------------------------------------------------
|
|
// MACHINE_CONFIG( sage2 )
|
|
//-------------------------------------------------
|
|
|
|
static MACHINE_CONFIG_START( sage2, sage2_state )
|
|
// basic machine hardware
|
|
MCFG_CPU_ADD(M68000_TAG, M68000, XTAL_16MHz/2)
|
|
MCFG_CPU_PROGRAM_MAP(sage2_mem)
|
|
|
|
// video hardware
|
|
MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
|
|
|
|
// devices
|
|
MCFG_PIC8259_ADD(I8259_TAG, pic_intf)
|
|
MCFG_I8255A_ADD(I8255A_0_TAG, ppi0_intf)
|
|
MCFG_I8255A_ADD(I8255A_1_TAG, ppi1_intf)
|
|
MCFG_PIT8253_ADD(I8253_0_TAG, pit0_intf)
|
|
MCFG_PIT8253_ADD(I8253_1_TAG, pit1_intf)
|
|
MCFG_I8251_ADD(I8251_0_TAG, usart0_intf)
|
|
MCFG_I8251_ADD(I8251_1_TAG, usart1_intf)
|
|
MCFG_UPD765A_ADD(UPD765_TAG, fdc_intf)
|
|
MCFG_CENTRONICS_PRINTER_ADD(CENTRONICS_TAG, centronics_intf)
|
|
MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(floppy_intf)
|
|
MCFG_IEEE488_BUS_ADD(ieee488_intf)
|
|
|
|
// internal ram
|
|
MCFG_RAM_ADD(RAM_TAG)
|
|
MCFG_RAM_DEFAULT_SIZE("512K")
|
|
|
|
// software list
|
|
MCFG_SOFTWARE_LIST_ADD("flop_list", "sage2")
|
|
MACHINE_CONFIG_END
|
|
|
|
|
|
|
|
//**************************************************************************
|
|
// ROMS
|
|
//**************************************************************************
|
|
|
|
//-------------------------------------------------
|
|
// ROM( sage2 )
|
|
//-------------------------------------------------
|
|
|
|
ROM_START( sage2 )
|
|
ROM_REGION( 0x2000, M68000_TAG, 0 )
|
|
ROM_LOAD16_BYTE( "sage2.u18", 0x0000, 0x1000, CRC(ca9b312d) SHA1(99436a6d166aa5280c3b2d28355c4d20528fe48c) )
|
|
ROM_LOAD16_BYTE( "sage2.u17", 0x0001, 0x1000, CRC(27e25045) SHA1(041cd9d4617473d089f31f18cbb375046c3b61bb) )
|
|
ROM_END
|
|
|
|
|
|
|
|
//**************************************************************************
|
|
// DRIVER INITIALIZATION
|
|
//**************************************************************************
|
|
|
|
//-------------------------------------------------
|
|
// DRIVER_INIT( sage2 )
|
|
//-------------------------------------------------
|
|
|
|
DIRECT_UPDATE_MEMBER(sage2_state::sage2_direct_update_handler)
|
|
{
|
|
if (m_reset && address >= 0xfe0000)
|
|
{
|
|
m_reset = 0;
|
|
}
|
|
|
|
return address;
|
|
}
|
|
|
|
DRIVER_INIT_MEMBER(sage2_state,sage2)
|
|
{
|
|
address_space &program = machine().device<cpu_device>(M68000_TAG)->space(AS_PROGRAM);
|
|
program.set_direct_update_handler(direct_update_delegate(FUNC(sage2_state::sage2_direct_update_handler), this));
|
|
|
|
// patch out i8251 test
|
|
machine().root_device().memregion(M68000_TAG)->base()[0x1be8] = 0xd6;
|
|
machine().root_device().memregion(M68000_TAG)->base()[0x1be9] = 0x4e;
|
|
}
|
|
|
|
|
|
|
|
//**************************************************************************
|
|
// SYSTEM DRIVERS
|
|
//**************************************************************************
|
|
|
|
// YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS
|
|
COMP( 1982, sage2, 0, 0, sage2, sage2, sage2_state, sage2, "Sage Technology", "Sage II", GAME_NOT_WORKING | GAME_NO_SOUND )
|