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https://github.com/holub/mame
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6d5941e085
Instead, they are identified by the region they were loaded in. This generally means one disk per region. get_disk_handle() now takes a region name in place of an index. Updated all callers to do this. The SCSI modules in particular posed a challenge to make this work, so watch out for potential bugs there. Changed the IDE interfaces to default to choosing the region with the same tag as the device for its master disk (assuming no slave). Added support for specifying explicit master/slave disk regions as part of the configuration, though slave disks are still not supported yet. Change the laserdisc interface to no longer require a disk number or a custom sound device. Both are now assumed to be tagged the same as the laserdisc device. Updated all drivers accordingly.
914 lines
18 KiB
C
914 lines
18 KiB
C
/* LSI Logic LSI53C810A PCI to SCSI I/O Processor */
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#include "driver.h"
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#include "deprecat.h"
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#include "53c810.h"
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#define DMA_MAX_ICOUNT 512 /* Maximum number of DMA Scripts opcodes to run */
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#define DASM_OPCODES 0
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static SCSIInstance *devices[8]; /* SCSI IDs 0-7 */
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static const struct LSI53C810interface *intf;
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static UINT8 last_id;
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static struct {
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UINT8 scntl0;
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UINT8 scntl1;
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UINT8 scntl2;
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UINT8 scntl3;
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UINT8 scid;
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UINT8 socl;
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UINT8 istat;
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UINT8 dstat;
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UINT8 sstat0;
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UINT8 sstat1;
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UINT8 sstat2;
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UINT8 dien;
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UINT8 dcntl;
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UINT8 dmode;
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UINT32 temp;
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UINT32 dsa;
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UINT32 dsp;
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UINT32 dsps;
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UINT32 dcmd;
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UINT8 sien0;
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UINT8 sien1;
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UINT8 stime0;
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UINT8 respid;
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UINT8 stest1;
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UINT8 scratch_a[4];
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UINT8 scratch_b[4];
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int dma_icount;
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int halted;
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int carry;
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UINT32 (* fetch)(UINT32 dsp);
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void (* irq_callback)(running_machine *machine);
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void (* dma_callback)(UINT32, UINT32, int, int);
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} lsi810;
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static void (* dma_opcode[256])(void);
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INLINE UINT32 FETCH(void)
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{
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UINT32 r = intf->fetch(lsi810.dsp);
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lsi810.dsp += 4;
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return r;
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}
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#ifdef UNUSED_FUNCTION
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static UINT32 sign_extend24(UINT32 val)
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{
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if (val & 0x00800000)
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val |= 0xFF000000;
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else
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val &= ~0xFF000000;
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return val;
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}
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#endif
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static void dmaop_invalid(void)
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{
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fatalerror("LSI53C810: Invalid SCRIPTS DMA opcode %08X at %08X", lsi810.dcmd, lsi810.dsp);
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}
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static void dmaop_move_memory(void)
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{
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UINT32 src = FETCH();
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UINT32 dst = FETCH();
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int count;
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count = lsi810.dcmd & 0xffffff;
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if(intf->dma_callback != NULL) {
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intf->dma_callback(src, dst, count, 1);
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}
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}
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static void dmaop_interrupt(void)
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{
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if(lsi810.dcmd & 0x100000) {
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fatalerror("LSI53C810: INTFLY opcode not implemented");
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}
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lsi810.dsps = FETCH();
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lsi810.istat |= 0x1; /* DMA interrupt pending */
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lsi810.dstat |= 0x4; /* SIR (SCRIPTS Interrupt Instruction Received) */
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if(intf->irq_callback != NULL) {
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intf->irq_callback(Machine, 1);
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}
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lsi810.dma_icount = 0;
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lsi810.halted = 1;
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}
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static void dmaop_block_move(void)
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{
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UINT32 address;
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UINT32 count;
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INT32 dsps;
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address = FETCH();
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count = lsi810.dcmd & 0x00ffffff;
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// normal indirect
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if (lsi810.dcmd & 0x20000000)
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address = intf->fetch(address);
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// table indirect
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if (lsi810.dcmd & 0x10000000)
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{
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dsps = (INT32)address&0xffffff;
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// sign extend
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if (dsps & 0x00800000)
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{
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dsps |= 0xff000000;
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}
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logerror("table offset: %x, DSA = %x\n", dsps, lsi810.dsa);
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dsps += lsi810.dsa;
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logerror("Loading from table at %x\n", dsps);
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count = lsi810.fetch(dsps);
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address = lsi810.fetch(dsps+4);
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}
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logerror("block move: address %x count %x phase %x\n", address, count, (lsi810.dcmd>>24)&7);
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if (lsi810.scntl0 & 0x01)
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{
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/* target mode */
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fatalerror("LSI53C810: dmaop_block_move not implemented in target mode");
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}
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else
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{
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/* initiator mode */
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logerror("53c810: block_move not actually implemented\n");
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}
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}
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static void dmaop_select(void)
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{
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UINT32 operand;
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operand = FETCH();
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if (lsi810.scntl0 & 0x01)
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{
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/* target mode */
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logerror("LSI53C810: reselect ID #%d\n", (lsi810.dcmd >> 16) & 0x07);
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}
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else
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{
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/* initiator mode */
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logerror("53c810: SELECT: our ID %d, target ID %d\n", lsi810.scid&7, (lsi810.dcmd>>16)&7);
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lsi810.sstat1 &= ~0x07; // clear current bus phase
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if (lsi810.dcmd & 0x01000000) // select with ATN
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{
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mame_printf_debug("53c810: want select with ATN, setting message phase\n");
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lsi810.sstat1 |= 0x7; // ATN means we want message in phase
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}
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}
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}
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static void dmaop_wait_disconnect(void)
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{
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UINT32 operand;
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operand = FETCH();
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if (lsi810.scntl0 & 0x01)
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{
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/* target mode */
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fatalerror("LSI53C810: dmaop_wait_disconnect not implemented in target mode");
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}
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else
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{
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/* initiator mode */
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fatalerror("LSI53C810: dmaop_wait_disconnect not implemented");
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}
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}
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static void dmaop_wait_reselect(void)
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{
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UINT32 operand;
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operand = FETCH();
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if (lsi810.scntl0 & 0x01)
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{
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/* target mode */
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fatalerror("LSI53C810: dmaop_wait_reselect not implemented in target mode");
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}
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else
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{
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/* initiator mode */
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fatalerror("LSI53C810: dmaop_wait_reselect not implemented");
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}
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}
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static void dmaop_set(void)
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{
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UINT32 operand;
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operand = FETCH();
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/* initiator mode */
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if (lsi810.dcmd & 0x8)
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{
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// set ATN in SOCL
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lsi810.socl |= 0x08;
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}
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if (lsi810.dcmd & 0x40)
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{
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// set ACK in SOCL
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lsi810.socl |= 0x40;
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}
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if (lsi810.dcmd & 0x200)
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{
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// set target mode
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lsi810.scntl0 |= 0x01;
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}
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if (lsi810.dcmd & 0x400)
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{
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// set carry in ALU
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lsi810.carry = 1;
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}
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}
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static void dmaop_clear(void)
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{
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UINT32 operand;
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operand = FETCH();
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/* initiator mode */
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if (lsi810.dcmd & 0x8)
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{
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// clear ATN in SOCL
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lsi810.socl &= ~0x08;
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}
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if (lsi810.dcmd & 0x40)
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{
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// clear ACK in SOCL
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lsi810.socl &= ~0x40;
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}
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if (lsi810.dcmd & 0x200)
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{
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// clear target mode
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lsi810.scntl0 &= ~0x01;
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}
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if (lsi810.dcmd & 0x400)
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{
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// clear carry in ALU
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lsi810.carry = 0;
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}
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}
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static void dmaop_move_from_sfbr(void)
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{
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fatalerror("LSI53C810: dmaop_move_from_sfbr not implemented in target mode");
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}
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static void dmaop_move_to_sfbr(void)
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{
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fatalerror("LSI53C810: dmaop_move_to_sfbr not implemented");
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}
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static void dmaop_read_modify_write(void)
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{
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fatalerror("LSI53C810: dmaop_read_modify_write not implemented");
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}
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static int scripts_compute_branch(void)
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{
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int dtest, ptest, wanted, passed;
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// |jump if true
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// 878b0000 ||compare data
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// 1000 0111 1000 1011 0000 0000 0000 0000
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// | |rel ||wait valid phase
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// | |compare phase
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// |desired phase: message in
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if (lsi810.dcmd & 0x00200000)
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{
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fatalerror("LSI53C810: jump with carry test not implemented");
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}
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if (lsi810.dcmd & 0x00100000)
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{
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fatalerror("LSI53C810: jump with interrupt on the fly not implemented");
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}
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// set desired result to take jump
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wanted = (lsi810.dcmd & 0x00080000) ? 1 : 0;
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// default to passing the tests in case they're disabled
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dtest = ptest = wanted;
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// phase test?
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if (lsi810.dcmd & 0x00020000)
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{
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logerror("53c810: phase test. current: %x. target: %x\n", lsi810.sstat1 & 7, (lsi810.dcmd>>24)&7);
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// do the phases match?
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if (((lsi810.dcmd>>24)&7) == (lsi810.sstat1 & 7))
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{
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ptest = 1;
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}
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else
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{
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ptest = 0;
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}
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}
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// data test?
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if (lsi810.dcmd & 0x00040000)
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{
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logerror("53c810: data test. target: %x [not yet implemented]\n", lsi810.dcmd&0xff);
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}
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// if all conditions go, take the jump
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passed = 0;
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if ((ptest == dtest) && (dtest == wanted))
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{
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passed = 1;
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}
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logerror("53c810: phase test %d data test %d wanted %d => pass %d\n", ptest, dtest, wanted, passed);
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return passed;
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}
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static UINT32 scripts_get_jump_dest(void)
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{
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INT32 dsps;
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UINT32 dest;
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dsps = FETCH();
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/* relative or absolute addressing? */
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if (lsi810.dcmd & 0x00800000)
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{
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// sign-extend the 24-bit value
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if (dsps & 0x00800000)
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{
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dsps |= 0xff000000;
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}
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logerror("dsps = %x, dsp = %x\n", dsps, lsi810.dsp);
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dsps += lsi810.dsp;
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}
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dest = (UINT32)dsps;
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logerror("cur DSP %x, dest %x\n", lsi810.dsp, dest);
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return dest;
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}
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static void dmaop_jump(void)
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{
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if (scripts_compute_branch())
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{
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lsi810.dsp = scripts_get_jump_dest();
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}
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else
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{
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FETCH(); // skip operand to continue on
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}
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}
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static void dmaop_call(void)
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{
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if (scripts_compute_branch())
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{
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// save return address
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lsi810.temp = lsi810.dsp;
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// and go
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lsi810.dsp = scripts_get_jump_dest();
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}
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else
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{
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FETCH(); // skip operand to continue on
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}
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}
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static void dmaop_return(void)
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{
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// is this correct? return only happens if the condition is true?
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if (scripts_compute_branch())
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{
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// restore return address
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lsi810.dsp = lsi810.temp;
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}
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else
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{
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FETCH(); // skip operand to continue on
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}
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}
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static void dmaop_store(void)
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{
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fatalerror("LSI53C810: dmaop_store not implemented");
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}
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static void dmaop_load(void)
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{
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fatalerror("LSI53C810: dmaop_load not implemented");
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}
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static void dma_exec(void)
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{
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lsi810.dma_icount = DMA_MAX_ICOUNT;
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while(lsi810.dma_icount > 0)
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{
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int op;
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if (DASM_OPCODES)
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{
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char buf[256];
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lsi53c810_dasm(buf, lsi810.dsp);
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logerror("0x%08X: %s\n", lsi810.dsp, buf);
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}
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lsi810.dcmd = FETCH();
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op = (lsi810.dcmd >> 24) & 0xff;
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dma_opcode[op]();
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lsi810.dma_icount--;
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}
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}
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READ8_HANDLER( lsi53c810_reg_r )
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{
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logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, activecpu_get_pc());
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switch(offset)
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{
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case 0x00: /* SCNTL0 */
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return lsi810.scntl0;
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case 0x01: /* SCNTL1 */
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return lsi810.scntl1;
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case 0x02: /* SCNTL2 */
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return lsi810.scntl2;
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case 0x03: /* SCNTL3 */
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return lsi810.scntl3;
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case 0x04: /* SCID */
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return lsi810.scid;
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case 0x09: /* SOCL */
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return lsi810.socl;
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case 0x0c: /* DSTAT */
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return lsi810.dstat;
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case 0x0d: /* SSTAT0 */
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return lsi810.sstat0;
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case 0x0e: /* SSTAT1 */
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return lsi810.sstat1;
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case 0x0f: /* SSTAT2 */
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return lsi810.sstat2;
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case 0x10: /* DSA [7-0] */
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return lsi810.dsa & 0xff;
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case 0x11: /* DSA [15-8] */
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return (lsi810.dsa >> 8) & 0xff;
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case 0x12: /* DSA [23-16] */
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return (lsi810.dsa >> 16) & 0xff;
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case 0x13: /* DSA [31-24] */
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return (lsi810.dsa >> 24) & 0xff;
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case 0x14: /* ISTAT */
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// clear the interrupt on service
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if(intf->irq_callback != NULL)
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{
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intf->irq_callback(machine, 0);
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}
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return lsi810.istat;
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case 0x2c: /* DSP [7-0] */
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return lsi810.dsp & 0xff;
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case 0x2d: /* DSP [15-8] */
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return (lsi810.dsp >> 8) & 0xff;
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case 0x2e: /* DSP [23-16] */
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return (lsi810.dsp >> 16) & 0xff;
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case 0x2f: /* DSP [31-24] */
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return (lsi810.dsp >> 24) & 0xff;
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case 0x34: /* SCRATCH A */
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case 0x35:
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case 0x36:
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case 0x37:
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return lsi810.scratch_a[offset % 4];
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case 0x39: /* DIEN */
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return lsi810.dien;
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case 0x3b: /* DCNTL */
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return lsi810.dcntl;
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case 0x40: /* SIEN0 */
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return lsi810.sien0;
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case 0x41: /* SIEN1 */
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return lsi810.sien1;
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case 0x48: /* STIME0 */
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return lsi810.stime0;
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case 0x4a: /* RESPID */
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return lsi810.respid;
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case 0x4d: /* STEST1 */
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return lsi810.stest1;
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case 0x5c: /* SCRATCH B */
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case 0x5d:
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case 0x5e:
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case 0x5f:
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return lsi810.scratch_b[offset % 4];
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default:
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fatalerror("LSI53C810: reg_r: Unknown reg %02X", offset);
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}
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return 0;
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}
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WRITE8_HANDLER( lsi53c810_reg_w )
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{
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logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, activecpu_get_pc());
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switch(offset)
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{
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case 0x00: /* SCNTL0 */
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lsi810.scntl0 = data;
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break;
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case 0x01: /* SCNTL1 */
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lsi810.scntl1 = data;
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break;
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case 0x02: /* SCNTL2 */
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lsi810.scntl2 = data;
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break;
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case 0x03: /* SCNTL3 */
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lsi810.scntl3 = data;
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break;
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case 0x04: /* SCID */
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lsi810.scid = data;
|
|
break;
|
|
case 0x09: /* SOCL */
|
|
lsi810.socl = data;
|
|
break;
|
|
case 0x0d: /* SSTAT0 */
|
|
lsi810.sstat0 = data;
|
|
break;
|
|
case 0x0e: /* SSTAT1 */
|
|
lsi810.sstat1 = data;
|
|
break;
|
|
case 0x0f: /* SSTAT2 */
|
|
lsi810.sstat2 = data;
|
|
break;
|
|
case 0x10: /* DSA [7-0] */
|
|
lsi810.dsa &= 0xffffff00;
|
|
lsi810.dsa |= data;
|
|
break;
|
|
case 0x11: /* DSA [15-8] */
|
|
lsi810.dsa &= 0xffff00ff;
|
|
lsi810.dsa |= data << 8;
|
|
break;
|
|
case 0x12: /* DSA [23-16] */
|
|
lsi810.dsa &= 0xff00ffff;
|
|
lsi810.dsa |= data << 16;
|
|
break;
|
|
case 0x13: /* DSA [31-24] */
|
|
lsi810.dsa &= 0x00ffffff;
|
|
lsi810.dsa |= data << 24;
|
|
break;
|
|
case 0x14: /* ISTAT */
|
|
lsi810.istat = data;
|
|
break;
|
|
case 0x2c: /* DSP [7-0] */
|
|
lsi810.dsp &= 0xffffff00;
|
|
lsi810.dsp |= data;
|
|
break;
|
|
case 0x2d: /* DSP [15-8] */
|
|
lsi810.dsp &= 0xffff00ff;
|
|
lsi810.dsp |= data << 8;
|
|
break;
|
|
case 0x2e: /* DSP [23-16] */
|
|
lsi810.dsp &= 0xff00ffff;
|
|
lsi810.dsp |= data << 16;
|
|
break;
|
|
case 0x2f: /* DSP [31-24] */
|
|
lsi810.dsp &= 0x00ffffff;
|
|
lsi810.dsp |= data << 24;
|
|
lsi810.halted = 0;
|
|
if((lsi810.dmode & 0x1) == 0 && !lsi810.halted) {
|
|
dma_exec();
|
|
}
|
|
break;
|
|
case 0x34: /* SCRATCH A */
|
|
case 0x35:
|
|
case 0x36:
|
|
case 0x37:
|
|
lsi810.scratch_a[offset % 4] = data;
|
|
break;
|
|
case 0x38: /* DMODE */
|
|
lsi810.dmode = data;
|
|
break;
|
|
case 0x39: /* DIEN */
|
|
lsi810.dien = data;
|
|
break;
|
|
case 0x3b: /* DCNTL */
|
|
lsi810.dcntl = data;
|
|
|
|
if(lsi810.dcntl & 0x14 && !lsi810.halted) /* single-step & start DMA */
|
|
{
|
|
int op;
|
|
lsi810.dcmd = FETCH();
|
|
op = (lsi810.dcmd >> 24) & 0xff;
|
|
dma_opcode[op]();
|
|
|
|
lsi810.istat |= 0x3; /* DMA interrupt pending */
|
|
lsi810.dstat |= 0x8; /* SSI (Single Step Interrupt) */
|
|
if(intf->irq_callback != NULL) {
|
|
intf->irq_callback(machine, 1);
|
|
}
|
|
}
|
|
else if(lsi810.dcntl & 0x04 && !lsi810.halted) /* manual start DMA */
|
|
{
|
|
dma_exec();
|
|
}
|
|
break;
|
|
case 0x40: /* SIEN0 */
|
|
lsi810.sien0 = data;
|
|
break;
|
|
case 0x41: /* SIEN1 */
|
|
lsi810.sien1 = data;
|
|
break;
|
|
case 0x48: /* STIME0 */
|
|
lsi810.stime0 = data;
|
|
break;
|
|
case 0x4a: /* RESPID */
|
|
lsi810.respid = data;
|
|
break;
|
|
case 0x4d: /* STEST1 */
|
|
lsi810.stest1 = data;
|
|
break;
|
|
case 0x5c: /* SCRATCH B */
|
|
case 0x5d:
|
|
case 0x5e:
|
|
case 0x5f:
|
|
lsi810.scratch_b[offset % 4] = data;
|
|
break;
|
|
|
|
default:
|
|
fatalerror("LSI53C810: reg_w: Unknown reg %02X, %02X", offset, data);
|
|
}
|
|
}
|
|
|
|
static void add_opcode(UINT8 op, UINT8 mask, void (* handler)(void))
|
|
{
|
|
int i;
|
|
for(i=0; i < 256; i++) {
|
|
if((i & mask) == op) {
|
|
dma_opcode[i] = handler;
|
|
}
|
|
}
|
|
}
|
|
|
|
extern void lsi53c810_init(const struct LSI53C810interface *interface)
|
|
{
|
|
int i;
|
|
|
|
// save interface pointer for later
|
|
intf = interface;
|
|
|
|
memset(&lsi810, 0, sizeof(lsi810));
|
|
for(i = 0; i < 256; i++)
|
|
{
|
|
dma_opcode[i] = dmaop_invalid;
|
|
}
|
|
|
|
add_opcode(0x00, 0xc0, dmaop_block_move);
|
|
add_opcode(0x40, 0xf8, dmaop_select);
|
|
add_opcode(0x48, 0xf8, dmaop_wait_disconnect);
|
|
add_opcode(0x50, 0xf8, dmaop_wait_reselect);
|
|
add_opcode(0x58, 0xf8, dmaop_set);
|
|
add_opcode(0x60, 0xf8, dmaop_clear);
|
|
add_opcode(0x68, 0xf8, dmaop_move_from_sfbr);
|
|
add_opcode(0x70, 0xf8, dmaop_move_to_sfbr);
|
|
add_opcode(0x78, 0xf8, dmaop_read_modify_write);
|
|
add_opcode(0x80, 0xf8, dmaop_jump);
|
|
add_opcode(0x88, 0xf8, dmaop_call);
|
|
add_opcode(0x90, 0xf8, dmaop_return);
|
|
add_opcode(0x98, 0xf8, dmaop_interrupt);
|
|
add_opcode(0xc0, 0xfe, dmaop_move_memory);
|
|
add_opcode(0xe0, 0xed, dmaop_store);
|
|
add_opcode(0xe1, 0xed, dmaop_load);
|
|
|
|
memset(devices, 0, sizeof(devices));
|
|
|
|
// try to open the devices
|
|
for (i = 0; i < interface->scsidevs->devs_present; i++)
|
|
{
|
|
SCSIAllocInstance( interface->scsidevs->devices[i].scsiClass, &devices[interface->scsidevs->devices[i].scsiID], interface->scsidevs->devices[i].diskregion );
|
|
}
|
|
}
|
|
|
|
extern void lsi53c810_exit(const struct LSI53C810interface *interface)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < interface->scsidevs->devs_present; i++)
|
|
{
|
|
SCSIDeleteInstance( devices[interface->scsidevs->devices[i].scsiID] );
|
|
}
|
|
}
|
|
|
|
void lsi53c810_read_data(int bytes, UINT8 *pData)
|
|
{
|
|
if (devices[last_id])
|
|
{
|
|
SCSIReadData( devices[last_id], pData, bytes);
|
|
}
|
|
else
|
|
{
|
|
logerror("lsi53c810: read unknown device SCSI ID %d\n", last_id);
|
|
}
|
|
}
|
|
|
|
void lsi53c810_write_data(int bytes, UINT8 *pData)
|
|
{
|
|
if (devices[last_id])
|
|
{
|
|
SCSIWriteData( devices[last_id], pData, bytes );
|
|
}
|
|
else
|
|
{
|
|
logerror("lsi53c810: write to unknown device SCSI ID %d\n", last_id);
|
|
}
|
|
}
|
|
|
|
void *lsi53c810_get_device(int id)
|
|
{
|
|
void *ret;
|
|
|
|
if (devices[id])
|
|
{
|
|
logerror("lsi53c810: fetching dev pointer for SCSI ID %d\n", id);
|
|
SCSIGetDevice( devices[id], &ret );
|
|
|
|
return ret;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
/*************************************
|
|
*
|
|
* Disassembler
|
|
*
|
|
*************************************/
|
|
|
|
static UINT32 lsi53c810_dasm_fetch(UINT32 pc)
|
|
{
|
|
return intf->fetch(pc);
|
|
}
|
|
|
|
unsigned lsi53c810_dasm(char *buf, UINT32 pc)
|
|
{
|
|
unsigned result = 0;
|
|
const char *op_mnemonic = NULL;
|
|
UINT32 op = lsi53c810_dasm_fetch(pc);
|
|
UINT32 dest;
|
|
int i;
|
|
|
|
static const char *const phases[] =
|
|
{
|
|
"DATA_OUT", "DATA_IN", "CMD", "STATUS",
|
|
"RESERVED_OUT??", "RESERVED_IN??", "MSG_OUT", "MSG_IN"
|
|
};
|
|
|
|
if ((op & 0xF8000000) == 0x40000000)
|
|
{
|
|
/* SELECT */
|
|
dest = lsi53c810_dasm_fetch(pc + 4);
|
|
|
|
buf += sprintf(buf, "SELECT%s %d, 0x%08X",
|
|
(op & 0x01000000) ? " ATN" : "",
|
|
(op >> 16) & 0x07,
|
|
dest);
|
|
|
|
result = 8;
|
|
}
|
|
else if (((op & 0xF8000000) == 0x58000000)
|
|
| ((op & 0xF8000000) == 0x60000000))
|
|
{
|
|
static const struct
|
|
{
|
|
UINT32 flag;
|
|
const char *text;
|
|
} flags[] =
|
|
{
|
|
{ 0x00000008, "ATN" },
|
|
{ 0x00000040, "ACK" },
|
|
{ 0x00000200, "TARGET" },
|
|
{ 0x00000400, "CARRY" }
|
|
};
|
|
int need_cojunction = FALSE;
|
|
|
|
/* SET/CLEAR */
|
|
switch(op & 0xF8000000)
|
|
{
|
|
case 0x58000000: op_mnemonic = "SET"; break;
|
|
case 0x60000000: op_mnemonic = "CLEAR"; break;
|
|
}
|
|
|
|
buf += sprintf(buf, "%s ", op_mnemonic);
|
|
need_cojunction = FALSE;
|
|
|
|
for (i = 0; i < sizeof(flags) / sizeof(flags[0]); i++)
|
|
{
|
|
if (op & flags[i].flag)
|
|
{
|
|
if (need_cojunction)
|
|
buf += sprintf(buf, " AND ");
|
|
else
|
|
need_cojunction = TRUE;
|
|
buf += sprintf(buf, "%s", flags[i].text);
|
|
}
|
|
}
|
|
}
|
|
else if (((op & 0xF8000000) == 0x80000000)
|
|
| ((op & 0xF8000000) == 0x88000000)
|
|
| ((op & 0xF8000000) == 0x98000000))
|
|
{
|
|
/* JUMP/CALL/INT */
|
|
switch(op & 0xF8000000)
|
|
{
|
|
case 0x80000000: op_mnemonic = "JUMP"; break;
|
|
case 0x88000000: op_mnemonic = "CALL"; break;
|
|
case 0x98000000: op_mnemonic = "INT"; break;
|
|
}
|
|
|
|
dest = lsi53c810_dasm_fetch(pc + 4);
|
|
|
|
if (op & 0x00800000)
|
|
{
|
|
/* relative */
|
|
if (dest & 0x00800000)
|
|
dest |= 0xFF000000;
|
|
else
|
|
dest &= 0x00FFFFFF;
|
|
dest = (pc + 8) + dest;
|
|
buf += sprintf(buf, "%s REL(0x%08X)", op_mnemonic, dest);
|
|
}
|
|
else
|
|
{
|
|
/* absolute */
|
|
buf += sprintf(buf, "%s 0x%08X", op_mnemonic, dest);
|
|
}
|
|
|
|
switch(op & 0x000B0000)
|
|
{
|
|
case 0x00000000:
|
|
buf += sprintf(buf, ", NOT??");
|
|
break;
|
|
|
|
case 0x00080000:
|
|
break;
|
|
|
|
case 0x00020000:
|
|
case 0x00030000:
|
|
case 0x000A0000:
|
|
case 0x000B0000:
|
|
buf += sprintf(buf, ", %s%s %s",
|
|
(op & 0x00010000) ? "WHEN" : "IF",
|
|
(op & 0x00080000) ? "" : " NOT",
|
|
phases[(op >> 24) & 0x07]);
|
|
break;
|
|
|
|
default:
|
|
fatalerror("unknown op 0x%08X", op);
|
|
break;
|
|
}
|
|
result = 8;
|
|
}
|
|
else if ((op & 0xE0000000) == 0x00000000)
|
|
{
|
|
/* MOVE FROM */
|
|
dest = lsi53c810_dasm_fetch(pc + 4);
|
|
|
|
buf += sprintf(buf, "MOVE FROM 0x%08X, WHEN %s",
|
|
dest, phases[(op >> 24) & 0x07]);
|
|
|
|
result = 8;
|
|
}
|
|
else if ((op & 0xE0000000) == 0x20000000)
|
|
{
|
|
/* MOVE PTR */
|
|
dest = lsi53c810_dasm_fetch(pc + 4);
|
|
|
|
buf += sprintf(buf, "MOVE 0x%08X, PTR 0x%08X, WHEN %s",
|
|
(op & 0x00FFFFFF), dest, phases[(op >> 24) & 0x07]);
|
|
|
|
result = 8;
|
|
}
|
|
else
|
|
{
|
|
fatalerror("unknown op 0x%08X", op);
|
|
}
|
|
return result;
|
|
}
|
|
|