mirror of
https://github.com/holub/mame
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123 lines
3.1 KiB
C++
123 lines
3.1 KiB
C++
// license:BSD-3-Clause
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// copyright-holders:Barry Rodewald
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/*
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* nsc810.h
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*
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* Created on: 10/03/2014
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*/
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#ifndef MAME_MACHINE_NSC810_H
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#define MAME_MACHINE_NSC810_H
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#pragma once
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class nsc810_device : public device_t
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{
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public:
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// construction/destruction
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nsc810_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t clk0, uint32_t clk1)
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: nsc810_device(mconfig, tag, owner, clock)
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{
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set_timer0_clock(clk0);
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set_timer1_clock(clk1);
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}
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nsc810_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const XTAL &clk0, const XTAL &clk1)
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: nsc810_device(mconfig, tag, owner, clock)
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{
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set_timer0_clock(clk0.value());
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set_timer1_clock(clk1.value());
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}
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nsc810_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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auto portA_read_callback() { return m_portA_r.bind(); }
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auto portB_read_callback() { return m_portB_r.bind(); }
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auto portC_read_callback() { return m_portC_r.bind(); }
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auto portA_write_callback() { return m_portA_w.bind(); }
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auto portB_write_callback() { return m_portB_w.bind(); }
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auto portC_write_callback() { return m_portC_w.bind(); }
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auto timer0_callback() { return m_timer0_out.bind(); }
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auto timer1_callback() { return m_timer1_out.bind(); }
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void set_timer0_clock(uint32_t clk) { m_timer0_clock = clk; }
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void set_timer0_clock(const XTAL &clk) { set_timer0_clock(clk.value()); }
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void set_timer1_clock(uint32_t clk) { m_timer1_clock = clk; }
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void set_timer1_clock(const XTAL &clk) { set_timer1_clock(clk.value()); }
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DECLARE_READ8_MEMBER(read);
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DECLARE_WRITE8_MEMBER(write);
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protected:
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
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private:
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uint8_t m_portA_latch;
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uint8_t m_portB_latch;
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uint8_t m_portC_latch;
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uint8_t m_ddrA;
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uint8_t m_ddrB;
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uint8_t m_ddrC;
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uint8_t m_mode;
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emu_timer* m_timer0;
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emu_timer* m_timer1;
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uint8_t m_timer0_mode;
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uint8_t m_timer1_mode;
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uint16_t m_timer0_counter;
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uint16_t m_timer1_counter;
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uint16_t m_timer0_base;
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uint16_t m_timer1_base;
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bool m_timer0_running;
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bool m_timer1_running;
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uint32_t m_timer0_clock;
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uint32_t m_timer1_clock;
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bool m_ramselect;
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devcb_read8 m_portA_r;
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devcb_read8 m_portB_r;
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devcb_read8 m_portC_r;
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devcb_write8 m_portA_w;
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devcb_write8 m_portB_w;
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devcb_write8 m_portC_w;
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devcb_write_line m_timer0_out;
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devcb_write_line m_timer1_out;
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static constexpr device_timer_id TIMER0_CLOCK = 0;
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static constexpr device_timer_id TIMER1_CLOCK = 1;
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enum
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{
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REG_PORTA = 0x00,
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REG_PORTB,
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REG_PORTC,
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REG_DDRA = 0x04,
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REG_DDRB,
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REG_DDRC,
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REG_MODE_DEF,
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REG_PORTA_BITCLR,
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REG_PORTB_BITCLR,
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REG_PORTC_BITCLR,
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REG_PORTA_BITSET = 0x0c,
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REG_PORTB_BITSET,
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REG_PORTC_BITSET,
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REG_TIMER0_LOW = 0x10,
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REG_TIMER0_HIGH,
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REG_TIMER1_LOW,
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REG_TIMER1_HIGH,
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REG_TIMER0_STOP,
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REG_TIMER0_START,
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REG_TIMER1_STOP,
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REG_TIMER1_START,
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REG_MODE_TIMER0,
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REG_MODE_TIMER1
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};
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};
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// device type definition
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DECLARE_DEVICE_TYPE(NSC810, nsc810_device)
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#endif // MAME_MACHINE_NSC810_H
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