mirror of
https://github.com/holub/mame
synced 2025-04-17 22:13:04 +03:00
778 lines
32 KiB
C++
778 lines
32 KiB
C++
// license:BSD-3-Clause
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// copyright-holders:Pierpaolo Prazzoli
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#ifndef MAME_CPU_E132XS_E132XS_H
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#define MAME_CPU_E132XS_E132XS_H
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#pragma once
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#include "32xsdasm.h"
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#include "cpu/drcfe.h"
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#include "cpu/drcuml.h"
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#include "cpu/drcumlsh.h"
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#include <utility>
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/*
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A note about clock multipliers and dividers:
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E1-16[T] and E1-32[T] accept a straight clock
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E1-16X[T|N] and E1-32X[T|N] accept a clock and multiply it
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internally by 4; in the emulator, you MUST specify 4 * XTAL
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to achieve the correct speed
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E1-16XS[R] and E1-32XS[R] accept a clock and multiply it
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internally by 8; in the emulator, you MUST specify 8 * XTAL
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to achieve the correct speed
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*/
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/***************************************************************************
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CONSTANTS
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***************************************************************************/
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#define E132XS_STRICT_VERIFY 0x0001 /* verify all instructions */
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#define E132XS_LOG_DRC_REGS (0)
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#define E132XS_LOG_INTERPRETER_REGS (0)
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#define E132XS_COUNT_INSTRUCTIONS (0)
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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class e132xs_frontend;
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// ======================> hyperstone_device
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enum
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{
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E132XS_PC = 1,
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E132XS_SR,
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E132XS_FER,
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E132XS_G3,
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E132XS_G4,
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E132XS_G5,
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E132XS_G6,
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E132XS_G7,
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E132XS_G8,
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E132XS_G9,
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E132XS_G10,
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E132XS_G11,
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E132XS_G12,
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E132XS_G13,
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E132XS_G14,
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E132XS_G15,
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E132XS_G16,
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E132XS_G17,
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E132XS_SP,
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E132XS_UB,
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E132XS_BCR,
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E132XS_TPR,
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E132XS_TCR,
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E132XS_TR,
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E132XS_WCR,
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E132XS_ISR,
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E132XS_FCR,
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E132XS_MCR,
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E132XS_G28,
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E132XS_G29,
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E132XS_G30,
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E132XS_G31,
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E132XS_CL0, E132XS_CL1, E132XS_CL2, E132XS_CL3,
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E132XS_CL4, E132XS_CL5, E132XS_CL6, E132XS_CL7,
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E132XS_CL8, E132XS_CL9, E132XS_CL10, E132XS_CL11,
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E132XS_CL12, E132XS_CL13, E132XS_CL14, E132XS_CL15,
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E132XS_L0, E132XS_L1, E132XS_L2, E132XS_L3,
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E132XS_L4, E132XS_L5, E132XS_L6, E132XS_L7,
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E132XS_L8, E132XS_L9, E132XS_L10, E132XS_L11,
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E132XS_L12, E132XS_L13, E132XS_L14, E132XS_L15,
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E132XS_L16, E132XS_L17, E132XS_L18, E132XS_L19,
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E132XS_L20, E132XS_L21, E132XS_L22, E132XS_L23,
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E132XS_L24, E132XS_L25, E132XS_L26, E132XS_L27,
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E132XS_L28, E132XS_L29, E132XS_L30, E132XS_L31,
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E132XS_L32, E132XS_L33, E132XS_L34, E132XS_L35,
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E132XS_L36, E132XS_L37, E132XS_L38, E132XS_L39,
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E132XS_L40, E132XS_L41, E132XS_L42, E132XS_L43,
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E132XS_L44, E132XS_L45, E132XS_L46, E132XS_L47,
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E132XS_L48, E132XS_L49, E132XS_L50, E132XS_L51,
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E132XS_L52, E132XS_L53, E132XS_L54, E132XS_L55,
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E132XS_L56, E132XS_L57, E132XS_L58, E132XS_L59,
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E132XS_L60, E132XS_L61, E132XS_L62, E132XS_L63
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};
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// Used by core CPU interface
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class hyperstone_device : public cpu_device, public hyperstone_disassembler::config
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{
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friend class e132xs_frontend;
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public:
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// configuration
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void set_single_instruction_mode(bool val) { m_single_instruction_mode = val; }
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virtual ~hyperstone_device() override;
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protected:
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// exit codes
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enum : int
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{
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EXECUTE_OUT_OF_CYCLES = 0,
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EXECUTE_MISSING_CODE = 1,
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EXECUTE_UNMAPPED_CODE = 2,
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EXECUTE_RESET_CACHE = 3
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};
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struct internal_hyperstone_state
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{
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// CPU registers
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uint32_t global_regs[32];
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uint32_t local_regs[64];
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uint8_t fl_lut[16];
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/* internal stuff */
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uint32_t trap_entry; // entry point to get trap address
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uint8_t clock_scale_mask;
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uint8_t clck_scale;
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uint32_t clock_cycles_1;
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uint32_t clock_cycles_2;
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uint32_t clock_cycles_3;
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uint32_t clock_cycles_4;
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uint32_t clock_cycles_6;
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uint32_t clock_cycles_36;
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uint64_t tr_base_cycles;
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uint32_t tr_base_value;
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uint32_t tr_result;
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uint32_t tr_clocks_per_tick;
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uint32_t timer_int_pending;
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uint64_t numcycles;
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uint32_t delay_pc;
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uint32_t delay_slot;
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uint32_t delay_slot_taken;
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int32_t intblock;
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uint32_t arg0;
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uint32_t arg1;
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// other internal state
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int icount;
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};
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enum reg_bank
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{
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LOCAL = 0,
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GLOBAL = 1
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};
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enum imm_size
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{
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SIMM = 0,
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LIMM = 1
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};
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enum shift_type
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{
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N_LO = 0,
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N_HI = 1
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};
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enum sign_mode
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{
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IS_UNSIGNED = 0,
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IS_SIGNED = 1
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};
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enum branch_condition
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{
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COND_V = 0,
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COND_Z = 1,
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COND_C = 2,
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COND_CZ = 3,
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COND_N = 4,
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COND_NZ = 5
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};
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enum condition_set
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{
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IS_CLEAR = 0,
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IS_SET = 1
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};
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enum trap_exception_or_int
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{
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IS_TRAP = 0,
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IS_INT = 1,
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IS_EXCEPTION = 2
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};
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enum is_timer
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{
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NO_TIMER = 0,
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IS_TIMER = 1
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};
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// construction/destruction
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hyperstone_device(
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const machine_config &mconfig,
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const char *tag,
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device_t *owner,
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uint32_t clock,
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const device_type type,
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uint32_t prg_data_width,
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uint32_t io_data_width,
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address_map_constructor internal_map);
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// device_t implementation
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virtual void device_start() override ATTR_COLD;
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virtual void device_reset() override ATTR_COLD;
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virtual void device_stop() override ATTR_COLD;
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// device_execute_interface implementation
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virtual uint32_t execute_min_cycles() const noexcept override;
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virtual uint32_t execute_max_cycles() const noexcept override;
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virtual void execute_run() override;
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virtual void execute_set_input(int inputnum, int state) override;
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// device_memory_interface implementation
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virtual space_config_vector memory_space_config() const override;
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// device_disasm_interface implementation
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virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
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virtual bool get_h() const override;
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// device_state_interface implementation
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virtual void state_import(const device_state_entry &entry) override;
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virtual void state_export(const device_state_entry &entry) override;
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virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
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#if E132XS_LOG_DRC_REGS || E132XS_LOG_INTERPRETER_REGS
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void dump_registers();
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#endif
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void update_timer_prescale();
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void compute_tr();
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void adjust_timer_interrupt();
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void update_bus_control();
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void update_memory_control();
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void e116_16k_iram_map(address_map &map) ATTR_COLD;
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void e116_4k_iram_map(address_map &map) ATTR_COLD;
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void e116_8k_iram_map(address_map &map) ATTR_COLD;
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void e132_16k_iram_map(address_map &map) ATTR_COLD;
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void e132_4k_iram_map(address_map &map) ATTR_COLD;
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void e132_8k_iram_map(address_map &map) ATTR_COLD;
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static uint32_t imm_length(uint16_t op);
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// address spaces
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const address_space_config m_program_config;
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const address_space_config m_io_config;
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address_space *m_program;
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memory_access<32, 1, 0, ENDIANNESS_BIG>::cache m_cache16;
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memory_access<32, 2, 0, ENDIANNESS_BIG>::cache m_cache32;
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std::function<u16 (offs_t)> m_pr16;
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std::function<const void * (offs_t)> m_prptr;
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address_space *m_io;
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uint16_t m_op; // opcode
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/* core state */
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internal_hyperstone_state *m_core;
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int32_t m_instruction_length;
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bool m_instruction_length_valid;
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emu_timer *m_timer;
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static const uint32_t s_trap_entries[8];
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static const int32_t s_immediate_values[16];
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uint32_t m_op_counts[256];
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uint32_t get_trap_addr(uint8_t trapno);
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private:
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// internal functions
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template <hyperstone_device::is_timer TIMER> void check_interrupts();
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void set_global_register(uint8_t code, uint32_t val);
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void set_local_register(uint8_t code, uint32_t val);
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uint32_t get_global_register(uint8_t code);
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// words interpreted as pairs of signed half-words (HS)
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static int get_lhs(uint32_t val) { return int16_t(val & 0xffff); }
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static int get_rhs(uint32_t val) { return int16_t(val >> 16); }
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uint32_t get_emu_code_addr(uint8_t num);
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int32_t get_instruction_length(uint16_t op);
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TIMER_CALLBACK_MEMBER(timer_callback);
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uint32_t decode_const();
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uint32_t decode_immediate_s();
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void ignore_immediate_s();
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int32_t decode_pcrel();
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void ignore_pcrel();
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void hyperstone_br();
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void execute_trap(uint8_t trapno);
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void execute_int(uint32_t addr);
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void execute_exception(uint8_t trapno);
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void execute_software();
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template <reg_bank DstGlobal> uint64_t get_double_word(uint8_t dst_code, uint8_t dstf_code) const;
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template <reg_bank DstGlobal> void set_double_word(uint8_t dst_code, uint8_t dstf_code, uint64_t val);
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_chk();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_movd();
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template <reg_bank DstGlobal, reg_bank SrcGlobal, sign_mode SIGNED> void hyperstone_divsu();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_xm();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_mask();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_sum();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_sums();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_cmp();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_mov();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_add();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_adds();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_cmpb();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_subc();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_sub();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_subs();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_addc();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_neg();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_negs();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_and();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_andn();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_or();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_xor();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_not();
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template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_cmpi();
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template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_movi();
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template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_addi();
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template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_addsi();
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template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_cmpbi();
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template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_andni();
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template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_ori();
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template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_xori();
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template <shift_type HiN> void hyperstone_shrdi();
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void hyperstone_shrd();
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void hyperstone_shr();
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template <shift_type HiN, reg_bank DstGlobal> void hyperstone_shri();
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template <shift_type HiN> void hyperstone_sardi();
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void hyperstone_sard();
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void hyperstone_sar();
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template <shift_type HiN, reg_bank DstGlobal> void hyperstone_sari();
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template <shift_type HiN> void hyperstone_shldi();
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void hyperstone_shld();
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void hyperstone_shl();
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template <shift_type HiN, reg_bank DstGlobal> void hyperstone_shli();
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void hyperstone_testlz();
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void hyperstone_rol();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_ldxx1();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_ldxx2();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_stxx1();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_stxx2();
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template <reg_bank DstGlobal, reg_bank SrcGlobal, sign_mode SIGNED> void hyperstone_mulsu();
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template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_mul();
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template <shift_type HiN, reg_bank DstGlobal> void hyperstone_set();
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template <reg_bank SrcGlobal> void hyperstone_ldwr();
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template <reg_bank SrcGlobal> void hyperstone_lddr();
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template <reg_bank SrcGlobal> void hyperstone_ldwp();
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template <reg_bank SrcGlobal> void hyperstone_lddp();
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template <reg_bank SrcGlobal> void hyperstone_stwr();
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template <reg_bank SrcGlobal> void hyperstone_stdr();
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template <reg_bank SrcGlobal> void hyperstone_stwp();
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template <reg_bank SrcGlobal> void hyperstone_stdp();
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template <branch_condition Condition, condition_set CondSet> void hyperstone_b();
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template <branch_condition Condition, condition_set CondSet> void hyperstone_db();
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void hyperstone_dbr();
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void hyperstone_frame();
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template <hyperstone_device::reg_bank SrcGlobal> void hyperstone_call();
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void hyperstone_trap();
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void hyperstone_extend();
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void hyperstone_reserved();
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void hyperstone_do();
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#if E132XS_LOG_DRC_REGS || E132XS_LOG_INTERPRETER_REGS
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FILE *m_trace_log;
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#endif
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drc_cache m_cache;
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std::unique_ptr<drcuml_state> m_drcuml;
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std::unique_ptr<e132xs_frontend> m_drcfe;
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uint32_t m_drcoptions;
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bool m_single_instruction_mode;
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uint8_t m_cache_dirty;
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uml::code_handle *m_entry;
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uml::code_handle *m_nocode;
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uml::code_handle *m_interrupt_checks;
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uml::code_handle *m_out_of_cycles;
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uml::code_handle *m_delay_taken[4];
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uml::code_handle *m_mem_read8;
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uml::code_handle *m_mem_write8;
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uml::code_handle *m_mem_read16;
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uml::code_handle *m_mem_write16;
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uml::code_handle *m_mem_read32;
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uml::code_handle *m_mem_write32;
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uml::code_handle *m_io_read32;
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uml::code_handle *m_io_write32;
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uml::code_handle *m_exception;
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uint32_t m_debug_local_regs[16];
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bool m_enable_drc;
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/* internal compiler state */
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struct compiler_state;
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struct c_funcs;
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void execute_run_drc();
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void flush_drc_cache();
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void code_flush_cache();
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void code_compile_block(uint8_t mode, offs_t pc);
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//void load_fast_iregs(drcuml_block &block);
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//void save_fast_iregs(drcuml_block &block);
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void static_generate_helpers(drcuml_block &block, uml::code_label &label);
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void static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, uml::code_handle *&handleptr);
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void static_generate_exception(drcuml_block &block, uml::code_label &label);
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void static_generate_interrupt_checks(drcuml_block &block, uml::code_label &label);
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void generate_interrupt_checks(drcuml_block &block, uml::code_label &labelnum, bool with_timer, int take_int, int take_timer);
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void generate_branch(drcuml_block &block, compiler_state &compiler, uml::parameter mode, uml::parameter targetpc, const opcode_desc *desc);
|
|
void generate_update_cycles(drcuml_block &block);
|
|
void generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
|
|
void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op);
|
|
bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
|
|
void generate_get_trap_addr(drcuml_block &block, uml::code_label &label, uml::parameter trapno);
|
|
uint32_t generate_get_const(const opcode_desc *desc);
|
|
uint32_t generate_get_immediate_s(const opcode_desc *desc);
|
|
uint32_t generate_get_pcrel(const opcode_desc *desc);
|
|
std::pair<uint16_t, uint32_t> generate_get_d_code_dis(const opcode_desc *opcode);
|
|
|
|
void generate_get_global_register_high(drcuml_block &block, compiler_state &compiler, uint32_t code, uml::parameter dst);
|
|
void generate_set_global_register_low(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t dst_code, uml::parameter src);
|
|
void generate_set_global_register_high(drcuml_block &block, compiler_state &compiler, uint32_t dst_code, uml::parameter src);
|
|
|
|
void generate_load_operand(drcuml_block &block, compiler_state &compiler, reg_bank global, uint32_t code, uml::parameter dst, uml::parameter localidx);
|
|
void generate_load_src_addsub(drcuml_block &block, compiler_state &compiler, reg_bank global, uint32_t code, uml::parameter dst, uml::parameter localidx, uml::parameter sr);
|
|
uml::parameter generate_load_address_ad(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, reg_bank global, uint32_t code, uml::parameter dst, uml::parameter localidx);
|
|
void generate_load_address_ns(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, reg_bank global, uint32_t code, uml::parameter dst, uml::parameter localidx, uint16_t d_code, uint32_t dis);
|
|
void generate_load_address_rp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t code, uml::parameter dst, uml::parameter localidx, uint32_t dis);
|
|
void generate_add_dis(drcuml_block &block, compiler_state &compiler, uml::parameter dst, uml::parameter base, uint32_t dis, unsigned alignment);
|
|
void generate_set_register(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, reg_bank global, uint32_t code, uml::parameter src, uml::parameter localidx, bool calcidx);
|
|
void generate_set_dst(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, reg_bank global, uint32_t code, uml::parameter src, uml::parameter localidx, bool calcidx);
|
|
void generate_update_flags_addsub(drcuml_block &block, compiler_state &compiler, uml::parameter sr);
|
|
void generate_update_flags_addsubc(drcuml_block &block, compiler_state &compiler, uml::parameter sr);
|
|
void generate_update_flags_addsubs(drcuml_block &block, compiler_state &compiler, uml::parameter sr);
|
|
void generate_update_flags_cmp(drcuml_block &block, compiler_state &compiler, uml::parameter sr);
|
|
void generate_update_nz(drcuml_block &block, compiler_state &compiler, uml::parameter sr);
|
|
void generate_update_nz_d(drcuml_block &block, compiler_state &compiler, uml::parameter sr);
|
|
|
|
template <trap_exception_or_int TYPE> void generate_trap_exception_or_int(drcuml_block &block, uml::code_label &label, uml::parameter trapno);
|
|
void generate_software(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
|
|
void generate_raise_exception(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t trapno, uml::parameter sr);
|
|
void generate_raise_exception(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t trapno);
|
|
void generate_exception_on_overflow(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uml::parameter sr);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal, typename T> void generate_logic_op(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, T &&body);
|
|
template <reg_bank DstGlobal, typename T> void generate_logic_op_imm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t dst_code, T &&body);
|
|
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_chk(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_movd(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal, sign_mode SIGNED> void generate_divsu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_xm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_mask(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_sum(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_sums(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_cmp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_mov(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_add(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_adds(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_cmpb(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_subc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_sub(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_subs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_addc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_neg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_negs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_and(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_andn(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_or(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_xor(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_not(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, imm_size ImmLong> void generate_cmpi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, imm_size ImmLong> void generate_movi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, imm_size ImmLong> void generate_addi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, imm_size ImmLong> void generate_addsi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, imm_size ImmLong> void generate_cmpbi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, imm_size ImmLong> void generate_andni(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, imm_size ImmLong> void generate_ori(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, imm_size ImmLong> void generate_xori(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <shift_type HiN> void generate_shrdi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
void generate_shrd(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
void generate_shr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <shift_type HiN, reg_bank DstGlobal> void generate_shri(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <shift_type HiN> void generate_sardi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
void generate_sard(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
void generate_sar(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <shift_type HiN, reg_bank DstGlobal> void generate_sari(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <shift_type HiN> void generate_shldi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
void generate_shld(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
void generate_shl(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <shift_type HiN, reg_bank DstGlobal> void generate_shli(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
void generate_testlz(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
void generate_rol(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_ldxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_ldxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_stxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_stxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal, sign_mode SIGNED> void generate_mulsu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_mul(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
|
|
template <shift_type HiN, reg_bank DstGlobal> void generate_set(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
|
|
template <reg_bank SrcGlobal> void generate_ldwr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank SrcGlobal> void generate_lddr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank SrcGlobal> void generate_ldwp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank SrcGlobal> void generate_lddp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
|
|
template <reg_bank SrcGlobal> void generate_stwr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank SrcGlobal> void generate_stdr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank SrcGlobal> void generate_stwp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <reg_bank SrcGlobal> void generate_stdp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
|
|
template <branch_condition Condition, condition_set CondSet> void generate_b(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
void generate_br(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <branch_condition Condition, condition_set CondSet> void generate_db(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
void generate_dbr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
|
|
void generate_frame(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
template <hyperstone_device::reg_bank SrcGlobal> void generate_call(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
|
|
void generate_trap_op(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
void generate_extend(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
|
|
void generate_reserved(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
void generate_do(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
|
|
};
|
|
|
|
// device type definition
|
|
DECLARE_DEVICE_TYPE(E116T, e116t_device)
|
|
DECLARE_DEVICE_TYPE(E116XT, e116xt_device)
|
|
DECLARE_DEVICE_TYPE(E116XS, e116xs_device)
|
|
DECLARE_DEVICE_TYPE(E116XSR, e116xsr_device)
|
|
DECLARE_DEVICE_TYPE(E132N, e132n_device)
|
|
DECLARE_DEVICE_TYPE(E132T, e132t_device)
|
|
DECLARE_DEVICE_TYPE(E132XN, e132xn_device)
|
|
DECLARE_DEVICE_TYPE(E132XT, e132xt_device)
|
|
DECLARE_DEVICE_TYPE(E132XS, e132xs_device)
|
|
DECLARE_DEVICE_TYPE(E132XSR, e132xsr_device)
|
|
DECLARE_DEVICE_TYPE(GMS30C2116, gms30c2116_device)
|
|
DECLARE_DEVICE_TYPE(GMS30C2132, gms30c2132_device)
|
|
DECLARE_DEVICE_TYPE(GMS30C2216, gms30c2216_device)
|
|
DECLARE_DEVICE_TYPE(GMS30C2232, gms30c2232_device)
|
|
|
|
|
|
// ======================> e116t_device
|
|
|
|
class e116t_device : public hyperstone_device
|
|
{
|
|
public:
|
|
// construction/destruction
|
|
e116t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
|
|
|
protected:
|
|
virtual void device_start() override ATTR_COLD;
|
|
};
|
|
|
|
|
|
// ======================> e116xt_device
|
|
|
|
class e116xt_device : public hyperstone_device
|
|
{
|
|
public:
|
|
// construction/destruction
|
|
e116xt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
|
|
|
protected:
|
|
virtual void device_start() override ATTR_COLD;
|
|
};
|
|
|
|
|
|
// ======================> e116xs_device
|
|
|
|
class e116xs_device : public hyperstone_device
|
|
{
|
|
public:
|
|
// construction/destruction
|
|
e116xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
|
|
|
protected:
|
|
virtual void device_start() override ATTR_COLD;
|
|
};
|
|
|
|
|
|
// ======================> e116xsr_device
|
|
|
|
class e116xsr_device : public hyperstone_device
|
|
{
|
|
public:
|
|
// construction/destruction
|
|
e116xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
|
|
|
protected:
|
|
virtual void device_start() override ATTR_COLD;
|
|
};
|
|
|
|
|
|
// ======================> e132n_device
|
|
|
|
class e132n_device : public hyperstone_device
|
|
{
|
|
public:
|
|
// construction/destruction
|
|
e132n_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
|
|
|
protected:
|
|
virtual void device_start() override ATTR_COLD;
|
|
};
|
|
|
|
|
|
// ======================> e132t_device
|
|
|
|
class e132t_device : public hyperstone_device
|
|
{
|
|
public:
|
|
// construction/destruction
|
|
e132t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
|
|
|
protected:
|
|
virtual void device_start() override ATTR_COLD;
|
|
};
|
|
|
|
|
|
// ======================> e132xn_device
|
|
|
|
class e132xn_device : public hyperstone_device
|
|
{
|
|
public:
|
|
// construction/destruction
|
|
e132xn_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
|
|
|
protected:
|
|
virtual void device_start() override ATTR_COLD;
|
|
};
|
|
|
|
|
|
// ======================> e132xt_device
|
|
|
|
class e132xt_device : public hyperstone_device
|
|
{
|
|
public:
|
|
// construction/destruction
|
|
e132xt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
|
|
|
protected:
|
|
virtual void device_start() override ATTR_COLD;
|
|
};
|
|
|
|
|
|
// ======================> e132xs_device
|
|
|
|
class e132xs_device : public hyperstone_device
|
|
{
|
|
public:
|
|
// construction/destruction
|
|
e132xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
|
|
|
protected:
|
|
virtual void device_start() override ATTR_COLD;
|
|
};
|
|
|
|
|
|
// ======================> e132xsr_device
|
|
|
|
class e132xsr_device : public hyperstone_device
|
|
{
|
|
public:
|
|
// construction/destruction
|
|
e132xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
|
|
|
protected:
|
|
virtual void device_start() override ATTR_COLD;
|
|
};
|
|
|
|
|
|
// ======================> gms30c2116_device
|
|
|
|
class gms30c2116_device : public hyperstone_device
|
|
{
|
|
public:
|
|
// construction/destruction
|
|
gms30c2116_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
|
|
|
protected:
|
|
virtual void device_start() override ATTR_COLD;
|
|
};
|
|
|
|
|
|
// ======================> gms30c2132_device
|
|
|
|
class gms30c2132_device : public hyperstone_device
|
|
{
|
|
public:
|
|
// construction/destruction
|
|
gms30c2132_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
|
|
|
protected:
|
|
virtual void device_start() override ATTR_COLD;
|
|
};
|
|
|
|
|
|
// ======================> gms30c2216_device
|
|
|
|
class gms30c2216_device : public hyperstone_device
|
|
{
|
|
public:
|
|
// construction/destruction
|
|
gms30c2216_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
|
|
|
protected:
|
|
virtual void device_start() override ATTR_COLD;
|
|
};
|
|
|
|
|
|
// ======================> gms30c2232_device
|
|
|
|
class gms30c2232_device : public hyperstone_device
|
|
{
|
|
public:
|
|
// construction/destruction
|
|
gms30c2232_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
|
|
|
protected:
|
|
virtual void device_start() override ATTR_COLD;
|
|
};
|
|
|
|
|
|
#endif // MAME_CPU_E132XS_E132XS_H
|