mirror of
https://github.com/holub/mame
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7fa10acca6
(wip) netlist as well, but still have to implement three more devices until work can really start. [Couriersud]
161 lines
9.3 KiB
C
161 lines
9.3 KiB
C
// license:GPL-2.0+
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// copyright-holders:Couriersud
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/***************************************************************************
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netlib.c
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Discrete netlist implementation.
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****************************************************************************
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Couriersud reserves the right to license the code under a less restrictive
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license going forward.
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Copyright Nicola Salmoria and the MAME team
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All rights reserved.
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Redistribution and use of this code or any derivative works are permitted
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provided that the following conditions are met:
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* Redistributions may not be sold, nor may they be used in a commercial
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product or activity.
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* Redistributions that are modified from the original source must include the
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complete source code, including the source code for all components used by a
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binary built from the modified sources. However, as a special exception, the
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source code distributed need not include anything that is normally distributed
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(in either source or binary form) with the major components (compiler, kernel,
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and so on) of the operating system on which the executable runs, unless that
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component itself accompanies the executable.
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* Redistributions must reproduce the above copyright notice, this list of
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conditions and the following disclaimer in the documentation and/or other
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materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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****************************************************************************/
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#include "net_lib.h"
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#include "nld_system.h"
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#include "../nl_factory.h"
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NETLIST_START(diode_models)
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NET_MODEL(".model 1N914 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)")
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NET_MODEL(".model 1N4148 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)")
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NETLIST_END()
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NETLIST_START(bjt_models)
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NET_MODEL(".MODEL BC237B NPN(IS=1.8E-14 ISE=5.0E-14 ISC=1.72E-13 XTI=3 BF=400 BR=35.5 IKF=0.14 IKR=0.03 XTB=1.5 VAF=80 VAR=12.5 VJE=0.58 VJC=0.54 RE=0.6 RC=0.25 RB=0.56 CJE=13E-12 CJC=4E-12 XCJC=0.75 FC=0.5 NF=0.9955 NR=1.005 NE=1.46 NC=1.27 MJE=0.33 MJC=0.33 TF=0.64E-9 TR=50.72E-9 EG=1.11 KF=0 AF=1 VCEO=45V ICRATING=100M MFG=ZETEX)")
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NET_MODEL(".model BC556B PNP(IS=3.83E-14 NF=1.008 ISE=1.22E-14 NE=1.528 BF=344.4 IKF=0.08039 VAF=21.11 NR=1.005 ISC=2.85E-13 NC=1.28 BR=14.84 IKR=0.047 VAR=32.02 RB=1 IRB=1.00E-06 RBM=1 RE=0.6202 RC=0.5713 XTB=0 EG=1.11 XTI=3 CJE=1.23E-11 VJE=0.6106 MJE=0.378 TF=5.60E-10 XTF=3.414 VTF=5.23 ITF=0.1483 PTF=0 CJC=1.08E-11 VJC=0.1022 MJC=0.3563 XCJC=0.6288 TR=1.00E-32 CJS=0 VJS=0.75 MJS=0.333 FC=0.8027 Vceo=65 Icrating=100m mfg=Philips)")
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NET_MODEL(".model 2SA1015 PNP(Is=295.1E-18 Xti=3 Eg=1.11 Vaf=100 Bf=110 Xtb=1.5 Br=10.45 Rc=15 Cjc=66.2p Mjc=1.054 Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n Tf=1.661n VCEO=45V ICrating=150M MFG=Toshiba)")
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NET_MODEL(".model 2SC1815 NPN(Is=2.04f Xti=3 Eg=1.11 Vaf=6 Bf=400 Ikf=20m Xtb=1.5 Br=3.377 Rc=1 Cjc=1p Mjc=.3333 Vjc=.75 Fc=.5 Cje=25p Mje=.3333 Vje=.75 Tr=450n Tf=20n Itf=0 Vtf=0 Xtf=0 VCEO=45V ICrating=150M MFG=Toshiba)")
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NETLIST_END()
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#define xstr(s) # s
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#define ENTRY1(_nic, _name, _defparam) factory.register_device<_nic>( # _name, xstr(_nic), _defparam );
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#define ENTRY(_nic, _name, _defparam) ENTRY1(NETLIB_NAME(_nic), _name, _defparam)
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void nl_initialize_factory(netlist_factory_t &factory)
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{
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ENTRY(R, RES, "R")
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ENTRY(POT, POT, "R")
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ENTRY(C, CAP, "C")
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ENTRY(D, DIODE, "model")
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ENTRY(VCVS, VCVS, "-") // FIXME: STD parameters ?
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ENTRY(VCCS, VCCS, "-")
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ENTRY(CCCS, CCCS, "-")
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ENTRY(dummy_input, DUMMY_INPUT, "-")
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ENTRY(frontier, FRONTIER, "+I,Q")
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ENTRY(QBJT_EB, QBJT_EB, "model")
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ENTRY(QBJT_switch, QBJT_SW, "model")
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ENTRY(ttl_input, TTL_INPUT, "IN")
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ENTRY(analog_input, ANALOG_INPUT, "IN")
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ENTRY(log, LOG, "+I")
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ENTRY(logD, LOGD, "+I,I2")
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ENTRY(clock, CLOCK, "FREQ")
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ENTRY(mainclock, MAINCLOCK, "FREQ")
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ENTRY(solver, SOLVER, "FREQ")
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ENTRY(gnd, GND, "-")
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ENTRY(switch2, SWITCH2, "-")
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ENTRY(nicRSFF, NETDEV_RSFF, "+S,R")
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ENTRY(nicDelay, NETDEV_DELAY, "-")
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ENTRY(4020, CD_4020, "+IP,RESET,VDD,VSS")
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//ENTRY(4066, CD_4066, "+A,B")
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ENTRY(7400, TTL_7400_NAND, "+A,B")
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ENTRY(7402, TTL_7402_NOR, "+A,B")
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ENTRY(7404, TTL_7404_INVERT, "+A")
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ENTRY(7408, TTL_7408_AND, "+A,B")
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ENTRY(7410, TTL_7410_NAND, "+A,B,C")
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ENTRY(7411, TTL_7411_AND, "+A,B,C")
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ENTRY(7420, TTL_7420_NAND, "+A,B,C,D")
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ENTRY(7425, TTL_7425_NOR, "+A,B,C,D")
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ENTRY(7427, TTL_7427_NOR, "+A,B,C")
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ENTRY(7430, TTL_7430_NAND, "+A,B,C,D,E,F,G,H")
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ENTRY(7432, TTL_7432_OR, "+A,B")
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ENTRY(7437, TTL_7437_NAND, "+A,B")
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ENTRY(7450, TTL_7450_ANDORINVERT, "+A,B,C,D")
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ENTRY(7486, TTL_7486_XOR, "+A,B")
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ENTRY(7448, TTL_7448, "+A,B,C,D,LTQ,BIQ,RBIQ")
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ENTRY(7474, TTL_7474, "+CLK,D,CLRQ,PREQ")
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ENTRY(7483, TTL_7483, "+A1,A2,A3,A4,B1,B2,B3,B4,C0")
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ENTRY(7490, TTL_7490, "+A,B,R1,R2,R91,R92")
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ENTRY(7493, TTL_7493, "+CLKA,CLKB,R1,R2")
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ENTRY(74107, TTL_74107, "+CLK,J,K,CLRQ")
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ENTRY(74107A, TTL_74107A, "+CLK,J,K,CLRQ")
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ENTRY(74123, TTL_74123, "-")
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ENTRY(74153, TTL_74153, "+C0,C1,C2,C3,A,B,G")
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ENTRY(74192, TTL_74192, "-")
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ENTRY(74193, TTL_74193, "-")
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ENTRY(SN74LS629, SN74LS629, "CAP")
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ENTRY(9310, TTL_9310, "-")
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ENTRY(9312, TTL_9312, "-")
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ENTRY(9316, TTL_9316, "+CLK,ENP,ENT,CLRQ,LOADQ,A,B,C,D")
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ENTRY(NE555, NE555, "-")
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ENTRY(r2r_dac, R2R_DAC, "+VIN,R,N")
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ENTRY(4020_dip, CD_4020_DIP, "-")
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ENTRY(4066_dip, CD_4066_DIP, "-")
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ENTRY(7400_dip, TTL_7400_DIP, "-")
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ENTRY(7402_dip, TTL_7402_DIP, "-")
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ENTRY(7404_dip, TTL_7404_DIP, "-")
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ENTRY(7408_dip, TTL_7408_DIP, "-")
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ENTRY(7410_dip, TTL_7410_DIP, "-")
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ENTRY(7411_dip, TTL_7411_DIP, "-")
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ENTRY(7420_dip, TTL_7420_DIP, "-")
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ENTRY(7425_dip, TTL_7425_DIP, "-")
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ENTRY(7427_dip, TTL_7427_DIP, "-")
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ENTRY(7430_dip, TTL_7430_DIP, "-")
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ENTRY(7432_dip, TTL_7432_DIP, "-")
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ENTRY(7437_dip, TTL_7437_DIP, "-")
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ENTRY(7448_dip, TTL_7448_DIP, "-")
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ENTRY(7450_dip, TTL_7450_DIP, "-")
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ENTRY(7474_dip, TTL_7474_DIP, "-")
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ENTRY(7483_dip, TTL_7483_DIP, "-")
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ENTRY(7486_dip, TTL_7486_DIP, "-")
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ENTRY(7490_dip, TTL_7490_DIP, "-")
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ENTRY(7493_dip, TTL_7493_DIP, "-")
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ENTRY(74107_dip, TTL_74107_DIP, "-")
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ENTRY(74123_dip, TTL_74123_DIP, "-")
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ENTRY(74153_dip, TTL_74153_DIP, "-")
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ENTRY(74192_dip, TTL_74192_DIP, "-")
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ENTRY(74193_dip, TTL_74193_DIP, "-")
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ENTRY(9602_dip, TTL_9602_DIP, "-")
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ENTRY(9310_dip, TTL_9310_DIP, "-")
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ENTRY(9312_dip, TTL_9312_DIP, "-")
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ENTRY(9316_dip, TTL_9316_DIP, "-")
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ENTRY(SN74LS629_dip, SN74LS629_DIP, "1.CAP1,2.CAP2")
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ENTRY(NE555_dip, NE555_DIP, "-")
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}
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