mirror of
https://github.com/holub/mame
synced 2025-10-04 16:34:53 +03:00
9694ec54c9
- converted NL_MAX_LINK_RESOLVE_LOOPS into a netlist parameter. - Reduced potential bit-rot. - nltool -v --version now displays values of all compile time defines. There are still far too many compile time defines. However, most of them ensure and test future scalability.
459 lines
11 KiB
C++
459 lines
11 KiB
C++
// license:GPL-2.0+
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// copyright-holders:Couriersud
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/*
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* nlid_system.h
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*
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* netlist devices defined in the core
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*
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* This file contains internal headers
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*/
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#ifndef NLID_SYSTEM_H_
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#define NLID_SYSTEM_H_
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#include "netlist/analog/nlid_twoterm.h"
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#include "netlist/nl_base.h"
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#include "netlist/nl_setup.h"
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#include "plib/putil.h"
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namespace netlist
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{
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namespace devices
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{
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// -----------------------------------------------------------------------------
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// netlistparams
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// -----------------------------------------------------------------------------
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NETLIB_OBJECT(netlistparams)
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{
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NETLIB_CONSTRUCTOR(netlistparams)
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, m_use_deactivate(*this, "USE_DEACTIVATE", false)
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, m_startup_strategy(*this, "STARTUP_STRATEGY", 1)
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, m_mos_capmodel(*this, "DEFAULT_MOS_CAPMODEL", 2)
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, m_max_link_loops(*this, "MAX_LINK_RESOLVE_LOOPS", 100)
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{
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}
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NETLIB_UPDATEI() { }
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//NETLIB_RESETI() { }
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//NETLIB_UPDATE_PARAMI() { }
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public:
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param_logic_t m_use_deactivate;
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param_num_t<unsigned> m_startup_strategy;
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param_num_t<unsigned> m_mos_capmodel;
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//! How many times do we try to resolve links (connections)
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param_num_t<unsigned> m_max_link_loops;
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};
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// -----------------------------------------------------------------------------
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// mainclock
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// -----------------------------------------------------------------------------
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NETLIB_OBJECT(mainclock)
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{
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NETLIB_CONSTRUCTOR(mainclock)
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, m_Q(*this, "Q")
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, m_freq(*this, "FREQ", 7159000.0 * 5)
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{
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m_inc = netlist_time::from_double(1.0 / (m_freq()*2.0));
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}
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NETLIB_RESETI()
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{
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m_Q.net().set_next_scheduled_time(netlist_time::zero());
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}
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NETLIB_UPDATE_PARAMI()
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{
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m_inc = netlist_time::from_double(1.0 / (m_freq()*2.0));
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}
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NETLIB_UPDATEI()
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{
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logic_net_t &net = m_Q.net();
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// this is only called during setup ...
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net.toggle_new_Q();
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net.set_next_scheduled_time(exec().time() + m_inc);
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}
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public:
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logic_output_t m_Q;
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netlist_time m_inc;
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private:
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param_double_t m_freq;
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};
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// -----------------------------------------------------------------------------
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// clock
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// -----------------------------------------------------------------------------
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NETLIB_OBJECT(clock)
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{
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NETLIB_CONSTRUCTOR(clock)
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, m_feedback(*this, "FB")
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, m_Q(*this, "Q")
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, m_freq(*this, "FREQ", 7159000.0 * 5.0)
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{
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m_inc = netlist_time::from_double(1.0 / (m_freq()*2.0));
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connect(m_feedback, m_Q);
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}
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//NETLIB_RESETI();
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NETLIB_UPDATE_PARAMI()
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{
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m_inc = netlist_time::from_double(1.0 / (m_freq() * 2.0));
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}
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NETLIB_UPDATEI()
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{
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m_Q.push(!m_feedback(), m_inc);
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}
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private:
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logic_input_t m_feedback;
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logic_output_t m_Q;
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param_double_t m_freq;
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netlist_time m_inc;
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};
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// -----------------------------------------------------------------------------
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// varclock
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// -----------------------------------------------------------------------------
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NETLIB_OBJECT(varclock)
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{
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NETLIB_CONSTRUCTOR(varclock)
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, m_feedback(*this, "FB")
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, m_Q(*this, "Q")
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, m_func(*this,"FUNC", "")
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, m_compiled(this->name() + ".FUNCC", this, this->state().run_state_manager())
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, m_funcparam({0.0})
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{
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if (m_func() != "")
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m_compiled.compile(std::vector<pstring>({{"T"}}), m_func());
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connect(m_feedback, m_Q);
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}
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//NETLIB_RESETI();
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//NETLIB_UPDATE_PARAMI()
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NETLIB_UPDATEI()
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{
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m_funcparam[0] = exec().time().as_double();
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const netlist_time m_inc = netlist_time::from_double(m_compiled.evaluate(m_funcparam));
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m_Q.push(!m_feedback(), m_inc);
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}
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private:
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logic_input_t m_feedback;
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logic_output_t m_Q;
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param_str_t m_func;
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plib::pfunction m_compiled;
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std::vector<double> m_funcparam;
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};
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// -----------------------------------------------------------------------------
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// extclock
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// -----------------------------------------------------------------------------
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NETLIB_OBJECT(extclock)
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{
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NETLIB_CONSTRUCTOR(extclock)
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, m_freq(*this, "FREQ", 7159000.0 * 5.0)
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, m_pattern(*this, "PATTERN", "1,1")
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, m_offset(*this, "OFFSET", 0.0)
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, m_feedback(*this, "FB")
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, m_Q(*this, "Q")
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, m_cnt(*this, "m_cnt", 0)
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, m_off(*this, "m_off", netlist_time::zero())
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{
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m_inc[0] = netlist_time::from_double(1.0 / (m_freq() * 2.0));
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connect(m_feedback, m_Q);
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{
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netlist_time base = netlist_time::from_double(1.0 / (m_freq()*2.0));
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std::vector<pstring> pat(plib::psplit(m_pattern(),","));
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m_off = netlist_time::from_double(m_offset());
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std::array<std::int64_t, 32> pati = { 0 };
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m_size = static_cast<std::uint8_t>(pat.size());
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netlist_time::mult_type total = 0;
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for (unsigned i=0; i<m_size; i++)
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{
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// FIXME: use pstonum_ne
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//pati[i] = plib::pstonum<decltype(pati[i])>(pat[i]);
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pati[i] = plib::pstonum<std::int64_t, true>(pat[i]);
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total += pati[i];
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}
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netlist_time ttotal = netlist_time::zero();
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auto sm1 = static_cast<uint8_t>(m_size - 1);
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for (unsigned i=0; i < sm1; i++)
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{
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m_inc[i] = base * pati[i];
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ttotal += m_inc[i];
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}
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m_inc[sm1] = base * total - ttotal;
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}
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}
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NETLIB_UPDATEI();
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NETLIB_RESETI();
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//NETLIB_UPDATE_PARAMI();
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NETLIB_HANDLERI(clk2);
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NETLIB_HANDLERI(clk2_pow2);
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private:
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param_double_t m_freq;
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param_str_t m_pattern;
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param_double_t m_offset;
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logic_input_t m_feedback;
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logic_output_t m_Q;
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state_var_u8 m_cnt;
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std::uint8_t m_size;
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state_var<netlist_time> m_off;
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std::array<netlist_time, 32> m_inc;
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};
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// -----------------------------------------------------------------------------
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// Special support devices ...
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// -----------------------------------------------------------------------------
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NETLIB_OBJECT(logic_input)
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{
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NETLIB_CONSTRUCTOR(logic_input)
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, m_Q(*this, "Q")
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, m_IN(*this, "IN", false)
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/* make sure we get the family first */
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, m_FAMILY(*this, "FAMILY", "FAMILY(TYPE=TTL)")
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{
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set_logic_family(setup().family_from_model(m_FAMILY()));
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m_Q.set_logic_family(this->logic_family());
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}
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NETLIB_UPDATEI() { }
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NETLIB_RESETI() { m_Q.initial(0); }
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NETLIB_UPDATE_PARAMI() { m_Q.push(m_IN() & 1, netlist_time::from_nsec(1)); }
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private:
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logic_output_t m_Q;
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param_logic_t m_IN;
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param_model_t m_FAMILY;
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};
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NETLIB_OBJECT(analog_input)
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{
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NETLIB_CONSTRUCTOR(analog_input)
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, m_Q(*this, "Q")
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, m_IN(*this, "IN", 0.0)
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{
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}
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NETLIB_UPDATEI() { }
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NETLIB_RESETI() { m_Q.initial(0.0); }
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NETLIB_UPDATE_PARAMI() { m_Q.push(m_IN()); }
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private:
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analog_output_t m_Q;
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param_double_t m_IN;
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};
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// -----------------------------------------------------------------------------
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// nld_gnd
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// -----------------------------------------------------------------------------
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NETLIB_OBJECT(gnd)
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{
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NETLIB_CONSTRUCTOR(gnd)
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, m_Q(*this, "Q")
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{
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}
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NETLIB_UPDATEI()
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{
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m_Q.push(0.0);
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}
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NETLIB_RESETI() { }
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protected:
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analog_output_t m_Q;
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};
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// -----------------------------------------------------------------------------
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// nld_dummy_input
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// -----------------------------------------------------------------------------
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NETLIB_OBJECT_DERIVED(dummy_input, base_dummy)
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{
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public:
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NETLIB_CONSTRUCTOR_DERIVED(dummy_input, base_dummy)
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, m_I(*this, "I")
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{
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}
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protected:
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NETLIB_RESETI() { }
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NETLIB_UPDATEI() { }
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private:
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analog_input_t m_I;
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};
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// -----------------------------------------------------------------------------
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// nld_frontier
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// -----------------------------------------------------------------------------
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NETLIB_OBJECT_DERIVED(frontier, base_dummy)
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{
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public:
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NETLIB_CONSTRUCTOR_DERIVED(frontier, base_dummy)
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, m_RIN(*this, "m_RIN", true)
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, m_ROUT(*this, "m_ROUT", true)
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, m_I(*this, "_I")
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, m_Q(*this, "_Q")
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, m_p_RIN(*this, "RIN", 1.0e6)
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, m_p_ROUT(*this, "ROUT", 50.0)
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{
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register_subalias("I", m_RIN.m_P);
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register_subalias("G", m_RIN.m_N);
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connect(m_I, m_RIN.m_P);
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register_subalias("_OP", m_ROUT.m_P);
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register_subalias("Q", m_ROUT.m_N);
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connect(m_Q, m_ROUT.m_P);
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}
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NETLIB_RESETI()
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{
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m_RIN.set_G_V_I(1.0 / m_p_RIN(),0,0);
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m_ROUT.set_G_V_I(1.0 / m_p_ROUT(),0,0);
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}
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NETLIB_UPDATEI()
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{
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m_Q.push(m_I());
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}
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private:
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analog::NETLIB_NAME(twoterm) m_RIN;
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/* Fixme: only works if the device is time-stepped - need to rework */
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analog::NETLIB_NAME(twoterm) m_ROUT;
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analog_input_t m_I;
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analog_output_t m_Q;
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param_double_t m_p_RIN;
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param_double_t m_p_ROUT;
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};
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/* -----------------------------------------------------------------------------
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* nld_function
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*
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* FIXME: Currently a proof of concept to get congo bongo working
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* ----------------------------------------------------------------------------- */
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NETLIB_OBJECT(function)
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{
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NETLIB_CONSTRUCTOR(function)
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, m_N(*this, "N", 1)
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, m_func(*this, "FUNC", "A0")
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, m_Q(*this, "Q")
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, m_compiled(this->name() + ".FUNCC", this, this->state().run_state_manager())
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{
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std::vector<pstring> inps;
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for (int i=0; i < m_N(); i++)
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{
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pstring n = plib::pfmt("A{1}")(i);
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m_I.push_back(pool().make_poolptr<analog_input_t>(*this, n));
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inps.push_back(n);
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m_vals.push_back(0.0);
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}
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m_compiled.compile(inps, m_func());
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}
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protected:
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NETLIB_RESETI();
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NETLIB_UPDATEI();
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private:
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param_int_t m_N;
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param_str_t m_func;
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analog_output_t m_Q;
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std::vector<pool_owned_ptr<analog_input_t>> m_I;
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std::vector<double> m_vals;
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plib::pfunction m_compiled;
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};
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// -----------------------------------------------------------------------------
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// nld_res_sw
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// -----------------------------------------------------------------------------
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NETLIB_OBJECT(res_sw)
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{
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public:
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NETLIB_CONSTRUCTOR(res_sw)
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, m_R(*this, "_R")
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, m_I(*this, "I")
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, m_RON(*this, "RON", 1.0)
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, m_ROFF(*this, "ROFF", 1.0E20)
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, m_last_state(*this, "m_last_state", 0)
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{
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register_subalias("1", m_R.m_P);
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register_subalias("2", m_R.m_N);
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}
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NETLIB_RESETI();
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//NETLIB_UPDATE_PARAMI();
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NETLIB_UPDATEI();
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analog::NETLIB_SUB(R_base) m_R;
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logic_input_t m_I;
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param_double_t m_RON;
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param_double_t m_ROFF;
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private:
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state_var<netlist_sig_t> m_last_state;
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};
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// -----------------------------------------------------------------------------
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// power pins - not a device, but a helper
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// -----------------------------------------------------------------------------
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class nld_power_pins
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{
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public:
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nld_power_pins(device_t &owner, const char *sVCC = "VCC", const char *sGND = "GND")
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{
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if (owner.setup().is_validation())
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{
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m_GND = plib::make_unique<analog_input_t>(owner, sGND);
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m_VCC = plib::make_unique<analog_input_t>(owner, sVCC);
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}
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else
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{
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owner.create_and_register_subdevice(sPowerDevRes, m_RVG);
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owner.register_subalias(sVCC, "_RVG.1");
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owner.register_subalias(sGND, "_RVG.2");
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}
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}
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NETLIB_SUBXX(analog, R) m_RVG; // dummy resistor between VCC and GND
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private:
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plib::unique_ptr<analog_input_t> m_VCC; // only used during validation
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plib::unique_ptr<analog_input_t> m_GND; // only used during validation
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};
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} //namespace devices
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} // namespace netlist
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#endif /* NLD_SYSTEM_H_ */
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