mirror of
https://github.com/holub/mame
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90f110f261
I'm purposefully leaving /src/emu/bus/cbmiec/c1541.c's kernal.bin as it is, as this particular spelling mistake was originally made by Robert Russell, therefore is canon. See http://en.wikipedia.org/wiki/KERNAL for details. I'm also leaving /src/emu/machine/nscsi_bus.c's RECIEVE as I don't want to break anything, but it's worth someone looking into. I renamed some variables in /src/mame/drivers/sfbonus.c, /src/mame/video/tia.c and /src/mame/video/tia.h, so if anyone wants to verify I didn't break anything, that would be nice.
190 lines
4.7 KiB
C++
190 lines
4.7 KiB
C++
/***************************************************************************
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dsp16.h
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WE|AT&T DSP16 series emulator.
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***************************************************************************/
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#pragma once
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#ifndef __DSP16_H__
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#define __DSP16_H__
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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// ======================> dsp16_device
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class dsp16_device : public cpu_device
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{
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public:
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// construction/destruction
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dsp16_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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// public interfaces
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protected:
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// device-level overrides
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virtual void device_start();
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virtual void device_reset();
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// device_execute_interface overrides
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virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const { return (clocks + 2 - 1) / 2; } // internal /2 divider
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virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const { return (cycles * 2); } // internal /2 divider
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virtual UINT32 execute_min_cycles() const;
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virtual UINT32 execute_max_cycles() const;
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virtual UINT32 execute_input_lines() const;
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virtual void execute_run();
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virtual void execute_set_input(int inputnum, int state);
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// device_memory_interface overrides
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
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// device_state_interface overrides
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virtual void state_string_export(const device_state_entry &entry, astring &string);
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// device_disasm_interface overrides
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virtual UINT32 disasm_min_opcode_bytes() const;
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virtual UINT32 disasm_max_opcode_bytes() const;
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
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// address spaces
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const address_space_config m_program_config;
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const address_space_config m_data_config;
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// CPU registers
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// ROM Address Arithmetic Unit (XAAU) (page 2-4)
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UINT16 m_i; // 12 bits
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UINT16 m_pc;
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UINT16 m_pt;
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UINT16 m_pr;
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UINT16 m_pi;
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// RAM Address Arithmetic Unit (YAAU) (page 2-6)
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UINT16 m_j; // Signed
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UINT16 m_k; // Signed
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UINT16 m_rb;
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UINT16 m_re;
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UINT16 m_r0;
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UINT16 m_r1;
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UINT16 m_r2;
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UINT16 m_r3;
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// Data Arithmetic Unit (DAU) (page 2-6)
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UINT16 m_x;
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UINT32 m_y;
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UINT32 m_p;
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UINT64 m_a0; // 36 bits
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UINT64 m_a1; // 36 bits
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UINT8 m_auc; // 6 bits
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UINT16 m_psw;
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UINT8 m_c0;
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UINT8 m_c1;
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UINT8 m_c2;
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// Serial and parallel interfaces (TODO: More here (page 2-13))
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UINT16 m_sioc;
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UINT16 m_srta;
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UINT16 m_sdx;
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UINT16 m_pioc;
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UINT16 m_pdx0; // pdx0 & pdx1 refer to the same physical register (page 6-1)
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UINT16 m_pdx1; // but we keep them separate for logic's sake.
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// internal stuff
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UINT16 m_ppc;
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// This CPU core handles the cache as more of a loop than 15 separate memory elements.
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// It's a bit of a hack, but it's easier this way (for now).
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UINT16 m_cacheStart;
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UINT16 m_cacheEnd;
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UINT16 m_cacheRedoNextPC;
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UINT16 m_cacheIterations;
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static const UINT16 CACHE_INVALID = 0xffff;
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// memory access
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inline UINT32 data_read(const UINT16& addr);
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inline void data_write(const UINT16& addr, const UINT16& data);
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inline UINT32 opcode_read(const UINT8 pcOffset=0);
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// address spaces
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address_space* m_program;
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address_space* m_data;
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direct_read_data* m_direct;
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// other internal states
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int m_icount;
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// operations
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void execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance);
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// table decoders
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void* registerFromRImmediateField(const UINT8& R);
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void* registerFromRTable(const UINT8& R);
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UINT16* registerFromYFieldUpper(const UINT8& Y);
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// execution
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void executeF1Field(const UINT8& F1, const UINT8& D, const UINT8& S);
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void executeYFieldPost(const UINT8& Y);
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void executeZFieldPartOne(const UINT8& Z, UINT16* rN);
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void executeZFieldPartTwo(const UINT8& Z, UINT16* rN);
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// helpers
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void* addressYL();
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void writeRegister(void* reg, const UINT16& value);
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bool conditionTest(const UINT8& CON);
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// flags
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bool lmi();
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bool leq();
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bool llv();
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bool lmv();
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};
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// device type definition
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extern const device_type DSP16;
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/***************************************************************************
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REGISTER ENUMERATION
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***************************************************************************/
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enum
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{
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DSP16_I, // ROM Address Arithmetic Unit (XAAU)
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DSP16_PC,
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DSP16_PT,
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DSP16_PR,
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DSP16_PI,
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DSP16_J, // RAM Address Arithmetic Unit (YAAU)
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DSP16_K,
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DSP16_RB,
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DSP16_RE,
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DSP16_R0,
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DSP16_R1,
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DSP16_R2,
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DSP16_R3,
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DSP16_X, // Data Arithmetic Unit (DAU)
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DSP16_Y,
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DSP16_P,
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DSP16_A0,
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DSP16_A1,
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DSP16_AUC,
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DSP16_PSW,
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DSP16_C0,
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DSP16_C1,
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DSP16_C2,
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DSP16_SIOC,
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DSP16_SRTA,
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DSP16_SDX,
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DSP16_PIOC,
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DSP16_PDX0,
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DSP16_PDX1
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};
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#endif /* __DSP16_H__ */
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