mirror of
https://github.com/holub/mame
synced 2025-06-04 11:56:28 +03:00
107 lines
3.4 KiB
C
107 lines
3.4 KiB
C
/***************************************************************************
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Powertran Cortex
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20/04/2012 Skeleton driver.
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ftp://ftp.whtech.com/Powertran Cortex/
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http://www.powertrancortex.com/index.html
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Uses Texas Instruments parts and similar to other TI computers.
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It was designed by TI engineers, so it may perhaps be a clone
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of another TI or the Geneve.
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Video chip is TMS9928 or TMS9929.
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64K RAM.
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I saw somewhere that the roms are copied into ram at startup.
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****************************************************************************/
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#include "emu.h"
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#include "cpu/tms9900/tms9900l.h"
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class cortex_state : public driver_device
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{
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public:
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cortex_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag) { }
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virtual void machine_reset();
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virtual void video_start();
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UINT32 screen_update_cortex(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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};
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static ADDRESS_MAP_START( cortex_mem, AS_PROGRAM, 8, cortex_state )
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000, 0x5fff) AM_ROM
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AM_RANGE(0x6000, 0xffff) AM_RAM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( cortex_io, AS_IO, 8, cortex_state )
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_END
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/* Input ports */
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static INPUT_PORTS_START( cortex )
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INPUT_PORTS_END
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void cortex_state::machine_reset()
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{
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}
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void cortex_state::video_start()
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{
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}
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UINT32 cortex_state::screen_update_cortex(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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return 0;
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}
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static const struct tms9995reset_param cortex_processor_config =
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{
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0, /* disable automatic wait state generation */
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0, /* no IDLE callback */
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0 /* no MP9537 mask */
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};
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static MACHINE_CONFIG_START( cortex, cortex_state )
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/* basic machine hardware */
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/* TMS9995 CPU @ 12.0 MHz */
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MCFG_CPU_ADD("maincpu", TMS9995L, 12000000)
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MCFG_CPU_CONFIG(cortex_processor_config)
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MCFG_CPU_PROGRAM_MAP(cortex_mem)
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MCFG_CPU_IO_MAP(cortex_io)
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_REFRESH_RATE(50)
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MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
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MCFG_SCREEN_SIZE(640, 480)
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MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 480-1)
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MCFG_SCREEN_UPDATE_DRIVER(cortex_state, screen_update_cortex)
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MCFG_PALETTE_LENGTH(2)
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MCFG_PALETTE_INIT(black_and_white)
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MACHINE_CONFIG_END
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/* ROM definition */
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ROM_START( cortex )
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ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
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ROM_SYSTEM_BIOS(0, "basic", "Cortex Bios")
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ROMX_LOAD( "cortex_ic47.bin", 0x0000, 0x2000, CRC(bdb8c7bd) SHA1(340829dcb7a65f2e830fd5aff82a312e3ed7918f), ROM_BIOS(1))
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ROMX_LOAD( "cortex_ic46.bin", 0x2000, 0x2000, CRC(4de459ea) SHA1(00a42fe556d4ffe1f85b2ce369f544b07fbd06d9), ROM_BIOS(1))
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ROMX_LOAD( "cortex_ic45.bin", 0x4000, 0x2000, CRC(b0c9b6e8) SHA1(4e20c3f0b7546b803da4805cd3b8616f96c3d923), ROM_BIOS(1))
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ROM_SYSTEM_BIOS(1, "forth", "FIG-Forth")
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ROMX_LOAD( "forth_ic47.bin", 0x0000, 0x2000, CRC(999034be) SHA1(0dcc7404c38aa0ae913101eb0aa98da82104b5d4), ROM_BIOS(2))
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ROMX_LOAD( "forth_ic46.bin", 0x2000, 0x2000, CRC(8eca54cc) SHA1(0f1680e941ef60bb9bde9a4b843b78f30dff3202), ROM_BIOS(2))
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ROM_END
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/* Driver */
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/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
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COMP( 1982, cortex, 0, 0, cortex, cortex, driver_device, 0, "Powertran Cybernetics", "Cortex", GAME_NOT_WORKING | GAME_NO_SOUND)
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