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calls on the device object. Regex used: state_save_register_device_item( *)\(( *)([^,]+), *([^,]+),( *)([^ )]+)( *)\) \3->save_item\1\(\2NAME\(\6\),\5\4\7\) state_save_register_device_item_array( *)\(( *)([^,]+), *([^,]+),( *)([^ )]+)( *)\) \3->save_item\1\(\2NAME\(\6\),\5\4\7\) state_save_register_device_item_2d_array( *)\(( *)([^,]+), *([^,]+),( *)([^ )]+)( *)\) \3->save_item\1\(\2NAME\(\6\),\5\4\7\) state_save_register_device_item_bitmap( *)\(( *)([^,]+), *([^,]+),( *)([^ )]+)( *)\) \3->save_item\1\(\2NAME\(\*\6\),\5\4\7\) state_save_register_device_item_pointer( *)\(( *)([^,]+), *([^,]+),( *)([^,]+), *([^ )]+)( *)\) \3->save_pointer\1\(\2NAME\(\6\),\5\7,\5\4\8\) this->save_ save_ (save_item[^;]+), *0( *)\); \1\2\); (save_pointer[^;]+), *0( *)\); \1\2\);
671 lines
15 KiB
C
671 lines
15 KiB
C
/*********************************************************************
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8255ppi.c
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Intel 8255 PPI I/O chip
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NOTE: When port is input, then data present on the ports
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outputs is 0xff
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The 8255 PPI has three basic modes:
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Mode 0: Basic Input/Output
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Mode 1: Strobed Input/Output
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Mode 2: Strobed Bi-directional Bus
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Control Word:
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bit 7 - Mode set flag (1=active)
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bit 6-5 - Group A Mode selection
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00 - Mode 0
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01 - Mode 1
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1x - Mode 2
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bit 4 - Port A direction (1=input 0=output)
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bit 3 - Port C upper direction (1=input 0=output)
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bit 2 - Group B Mode selection
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0 - Mode 0
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1 - Mode 1
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bit 1 - Port B direction (1=input 0=output)
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bit 0 - Port C lower direction (1=input 0=output)
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Port A and Port C upper are in group A, and Port B and Port C lower
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are in group B
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Mode 0: Basic Input/Output
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In Mode 0, each of the ports (A, B and C) operate as independent
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ports for whom direction can be set independently.
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Port C Usage In Mode 0:
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bits 7-4 Input/Output A (direction specified by ctrl bit 3)
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bits 3-0 Input/Output B (direction specified by ctrl bit 0)
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Mode 1: Strobed Input/Output
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In Mode 1, Port A and Port B use their resepective parts of Port C to
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either generate or accept handshaking signals. The STB (strobe) input
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"loads" data into the port, and the IBF (input buffer full) output is
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then asserted, and the INTR (interrupt request) output is triggered if
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interrupts are enabled. Bits 7-6 of Port C remain usable as
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conventional IO.
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Group A Port C Usage In Mode 1:
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bits 7-6 Input/Output (direction specified by ctrl bit 3)
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bit 5 IBFa (input buffer full A) output
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bit 4 !STBa (strobe A) input
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bit 3 INTRa (interrupt request A) output
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Group B Port C Usage In Mode 1:
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bit 2 !STBb (strobe B) input
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bit 1 IBFb (input buffer full B) output
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bit 0 INTRb (interrupt request B) output
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Mode 2: Strobed Bi-directional Bus
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Mode 2 is used to implement a two way handshaking bus.
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When data is written to port A, the OBF (output buffer full) output
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will be asserted by the PPI. However, port A will not be asserted
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unless the ACK input is asserted, otherwise port A will be high
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impedence.
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The STB input and IBF output behaves similar to how it does under mode
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1. Bits 2-0 of Port C remain usable as conventional IO.
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Port C Usage In Mode 2:
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bit 7 !OBFa (output buffer full A) output
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bit 6 !ACKa (acknowledge A) input
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bit 5 IBFa (interrupt buffer full A) output
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bit 4 !STBa (strobe A) input
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bit 3 INTRa (interrupt A) output
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bit 2-0 Reserved by Group B
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KT 10/01/2000 - Added bit set/reset feature for control port
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- Added more accurate port i/o data handling
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- Added output reset when control mode is programmed
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*********************************************************************/
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#include "emu.h"
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#include "8255ppi.h"
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#include "devhelpr.h"
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//**************************************************************************
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// DEVICE CONFIGURATION
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//**************************************************************************
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GENERIC_DEVICE_CONFIG_SETUP(ppi8255, "Intel PPI8255")
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//-------------------------------------------------
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// device_config_complete - perform any
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// operations now that the configuration is
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// complete
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//-------------------------------------------------
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void ppi8255_device_config::device_config_complete()
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{
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// inherit a copy of the static data
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const ppi8255_interface *intf = reinterpret_cast<const ppi8255_interface *>(static_config());
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if (intf != NULL)
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{
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*static_cast<ppi8255_interface *>(this) = *intf;
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}
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// or initialize to defaults if none provided
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else
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{
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memset(&m_port_a_read, 0, sizeof(m_port_a_read));
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memset(&m_port_b_read, 0, sizeof(m_port_b_read));
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memset(&m_port_c_read, 0, sizeof(m_port_c_read));
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memset(&m_port_a_write, 0, sizeof(m_port_a_write));
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memset(&m_port_b_write, 0, sizeof(m_port_b_write));
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memset(&m_port_c_write, 0, sizeof(m_port_c_write));
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}
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}
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//**************************************************************************
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// LIVE DEVICE
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//**************************************************************************
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const device_type PPI8255 = ppi8255_device_config::static_alloc_device_config;
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//-------------------------------------------------
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// ppi8255_device - constructor
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//-------------------------------------------------
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ppi8255_device::ppi8255_device(running_machine &_machine, const ppi8255_device_config &config)
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: device_t(_machine, config),
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m_config(config)
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{
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void ppi8255_device::device_start()
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{
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devcb_resolve_read8(&m_port_read[0], &m_config.m_port_a_read, this);
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devcb_resolve_read8(&m_port_read[1], &m_config.m_port_b_read, this);
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devcb_resolve_read8(&m_port_read[2], &m_config.m_port_c_read, this);
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devcb_resolve_write8(&m_port_write[0], &m_config.m_port_a_write, this);
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devcb_resolve_write8(&m_port_write[1], &m_config.m_port_b_write, this);
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devcb_resolve_write8(&m_port_write[2], &m_config.m_port_c_write, this);
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/* register for state saving */
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save_item(NAME(m_group_a_mode));
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save_item(NAME(m_group_b_mode));
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save_item(NAME(m_port_a_dir));
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save_item(NAME(m_port_b_dir));
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save_item(NAME(m_port_ch_dir));
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save_item(NAME(m_port_cl_dir));
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save_item(NAME(m_obf_a));
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save_item(NAME(m_obf_b));
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save_item(NAME(m_ibf_a));
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save_item(NAME(m_ibf_b));
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save_item(NAME(m_inte_a));
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save_item(NAME(m_inte_b));
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save_item(NAME(m_inte_1));
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save_item(NAME(m_inte_2));
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save_item(NAME(m_in_mask));
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save_item(NAME(m_out_mask));
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save_item(NAME(m_read));
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save_item(NAME(m_latch));
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void ppi8255_device::device_reset()
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{
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m_group_a_mode = 0;
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m_group_b_mode = 0;
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m_port_a_dir = 0;
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m_port_b_dir = 0;
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m_port_ch_dir = 0;
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m_port_cl_dir = 0;
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m_obf_a = m_ibf_a = 0;
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m_obf_b = m_ibf_b = 0;
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m_inte_a = m_inte_b = m_inte_1 = m_inte_2 = 0;
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for (int i = 0; i < 3; i++)
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{
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m_in_mask[i] = m_out_mask[i] = m_read[i] = m_latch[i] = m_output[i] = 0;
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}
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set_mode(0x9b, 0); /* Mode 0, all ports set to input */
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}
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void ppi8255_device::ppi8255_get_handshake_signals(int is_read, UINT8 *result)
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{
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UINT8 handshake = 0x00;
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UINT8 mask = 0x00;
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/* group A */
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if (m_group_a_mode == 1)
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{
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if (m_port_a_dir)
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{
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handshake |= m_ibf_a ? 0x20 : 0x00;
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handshake |= (m_ibf_a && m_inte_a) ? 0x08 : 0x00;
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mask |= 0x28;
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}
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else
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{
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handshake |= m_obf_a ? 0x00 : 0x80;
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handshake |= (m_obf_a && m_inte_a) ? 0x08 : 0x00;
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mask |= 0x88;
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}
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}
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else if (m_group_a_mode == 2)
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{
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handshake |= m_obf_a ? 0x00 : 0x80;
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handshake |= m_ibf_a ? 0x20 : 0x00;
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handshake |= ((m_obf_a && m_inte_1) || (m_ibf_a && m_inte_2)) ? 0x08 : 0x00;
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mask |= 0xA8;
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}
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/* group B */
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if (m_group_b_mode == 1)
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{
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if (m_port_b_dir)
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{
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handshake |= m_ibf_b ? 0x02 : 0x00;
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handshake |= (m_ibf_b && m_inte_b) ? 0x01 : 0x00;
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mask |= 0x03;
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}
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else
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{
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handshake |= m_obf_b ? 0x00 : 0x02;
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handshake |= (m_obf_b && m_inte_b) ? 0x01 : 0x00;
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mask |= 0x03;
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}
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}
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*result &= ~mask;
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*result |= handshake & mask;
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}
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void ppi8255_device::ppi8255_input(int port, UINT8 data)
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{
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int changed = 0;
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m_read[port] = data;
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/* port C is special */
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if (port == 2)
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{
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if (((m_group_a_mode == 1) && (m_port_a_dir == 0)) || (m_group_a_mode == 2))
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{
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/* is !ACKA asserted? */
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if (m_obf_a && !(data & 0x40))
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{
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m_obf_a = 0;
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changed = 1;
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}
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}
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if (((m_group_a_mode == 1) && (m_port_a_dir == 1)) || (m_group_a_mode == 2))
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{
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/* is !STBA asserted? */
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if (!m_ibf_a && !(data & 0x10))
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{
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m_ibf_a = 1;
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changed = 1;
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}
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}
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if ((m_group_b_mode == 1) && (m_port_b_dir == 0))
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{
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/* is !ACKB asserted? */
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if (m_obf_b && !(data & 0x04))
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{
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m_obf_b = 0;
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changed = 1;
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}
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}
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if ((m_group_b_mode == 1) && (m_port_b_dir == 1))
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{
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/* is !STBB asserted? */
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if (!m_ibf_b && !(data & 0x04))
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{
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m_ibf_b = 1;
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changed = 1;
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}
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}
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if (changed)
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{
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ppi8255_write_port(2);
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}
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}
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}
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UINT8 ppi8255_device::ppi8255_read_port(int port)
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{
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UINT8 result = 0x00;
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if (m_in_mask[port])
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{
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ppi8255_input(port, devcb_call_read8(&m_port_read[port], 0));
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result |= m_read[port] & m_in_mask[port];
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}
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result |= m_latch[port] & m_out_mask[port];
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switch (port)
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{
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case 0:
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/* clear input buffer full flag */
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m_ibf_a = 0;
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break;
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case 1:
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/* clear input buffer full flag */
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m_ibf_b = 0;
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break;
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case 2:
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/* read special port 2 signals */
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ppi8255_get_handshake_signals(1, &result);
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break;
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}
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return result;
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}
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READ8_DEVICE_HANDLER_TRAMPOLINE(ppi8255, ppi8255_r)
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{
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UINT8 result = 0;
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offset %= 4;
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switch(offset)
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{
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case 0: /* Port A read */
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case 1: /* Port B read */
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case 2: /* Port C read */
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result = ppi8255_read_port(offset);
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break;
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case 3: /* Control word */
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result = m_control;
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break;
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}
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return result;
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}
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void ppi8255_device::ppi8255_write_port(int port)
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{
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UINT8 write_data = m_latch[port] & m_out_mask[port];
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write_data |= 0xFF & ~m_out_mask[port];
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/* write out special port 2 signals */
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if (port == 2)
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{
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ppi8255_get_handshake_signals(0, &write_data);
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}
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m_output[port] = write_data;
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devcb_call_write8(&m_port_write[port], 0, write_data);
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}
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WRITE8_DEVICE_HANDLER_TRAMPOLINE(ppi8255, ppi8255_w)
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{
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offset %= 4;
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switch( offset )
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{
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case 0: /* Port A write */
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case 1: /* Port B write */
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case 2: /* Port C write */
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m_latch[offset] = data;
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ppi8255_write_port(offset);
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switch(offset)
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{
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case 0:
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if (!m_port_a_dir && (m_group_a_mode != 0))
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{
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m_obf_a = 1;
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ppi8255_write_port(2);
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}
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break;
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case 1:
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if (!m_port_b_dir && (m_group_b_mode != 0))
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{
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m_obf_b = 1;
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ppi8255_write_port(2);
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}
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break;
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}
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break;
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case 3: /* Control word */
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if (data & 0x80)
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{
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set_mode(data & 0x7f, 1);
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}
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else
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{
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/* bit set/reset */
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int bit = (data >> 1) & 0x07;
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if (data & 1)
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{
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m_latch[2] |= (1 << bit); /* set bit */
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}
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else
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{
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m_latch[2] &= ~(1 << bit); /* reset bit */
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}
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if (m_group_b_mode == 1)
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{
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if (bit == 2)
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{
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m_inte_b = data & 1;
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}
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}
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if (m_group_a_mode == 1)
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{
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if (bit == 4 && m_port_a_dir)
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{
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m_inte_a = data & 1;
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}
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if (bit == 6 && !m_port_a_dir)
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{
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m_inte_a = data & 1;
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}
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}
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if (m_group_a_mode == 2)
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{
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if (bit == 4)
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{
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m_inte_2 = data & 1;
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}
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if (bit == 6)
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{
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m_inte_1 = data & 1;
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}
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}
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ppi8255_write_port(2);
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}
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break;
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}
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}
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void ppi8255_device::set_mode(int data, int call_handlers)
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{
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/* parse out mode */
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m_group_a_mode = (data >> 5) & 3;
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m_group_b_mode = (data >> 2) & 1;
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m_port_a_dir = (data >> 4) & 1;
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m_port_b_dir = (data >> 1) & 1;
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m_port_ch_dir = (data >> 3) & 1;
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m_port_cl_dir = (data >> 0) & 1;
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/* normalize group_a_mode */
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if (m_group_a_mode == 3)
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{
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m_group_a_mode = 2;
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}
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/* Port A direction */
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if (m_group_a_mode == 2)
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{
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m_in_mask[0] = 0xFF;
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m_out_mask[0] = 0xFF; /* bidirectional */
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}
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else
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{
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if (m_port_a_dir)
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{
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m_in_mask[0] = 0xFF;
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m_out_mask[0] = 0x00; /* input */
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}
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else
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{
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m_in_mask[0] = 0x00;
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m_out_mask[0] = 0xFF; /* output */
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}
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}
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/* Port B direction */
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if (m_port_b_dir)
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{
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m_in_mask[1] = 0xFF;
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m_out_mask[1] = 0x00; /* input */
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}
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else
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|
{
|
|
m_in_mask[1] = 0x00;
|
|
m_out_mask[1] = 0xFF; /* output */
|
|
}
|
|
|
|
/* Port C upper direction */
|
|
if (m_port_ch_dir)
|
|
{
|
|
m_in_mask[2] = 0xF0;
|
|
m_out_mask[2] = 0x00; /* input */
|
|
}
|
|
else
|
|
{
|
|
m_in_mask[2] = 0x00;
|
|
m_out_mask[2] = 0xF0; /* output */
|
|
}
|
|
|
|
/* Port C lower direction */
|
|
if (m_port_cl_dir)
|
|
{
|
|
m_in_mask[2] |= 0x0F; /* input */
|
|
}
|
|
else
|
|
{
|
|
m_out_mask[2] |= 0x0F; /* output */
|
|
}
|
|
|
|
/* now depending on the group modes, certain Port C lines may be replaced
|
|
* with varying control signals */
|
|
switch(m_group_a_mode)
|
|
{
|
|
case 0: /* Group A mode 0 */
|
|
/* no changes */
|
|
break;
|
|
|
|
case 1: /* Group A mode 1 */
|
|
/* bits 5-3 are reserved by Group A mode 1 */
|
|
m_in_mask[2] &= ~0x38;
|
|
m_out_mask[2] &= ~0x38;
|
|
break;
|
|
|
|
case 2: /* Group A mode 2 */
|
|
/* bits 7-3 are reserved by Group A mode 2 */
|
|
m_in_mask[2] &= ~0xF8;
|
|
m_out_mask[2] &= ~0xF8;
|
|
break;
|
|
}
|
|
|
|
switch(m_group_b_mode)
|
|
{
|
|
case 0: /* Group B mode 0 */
|
|
/* no changes */
|
|
break;
|
|
|
|
case 1: /* Group B mode 1 */
|
|
/* bits 2-0 are reserved by Group B mode 1 */
|
|
m_in_mask[2] &= ~0x07;
|
|
m_out_mask[2] &= ~0x07;
|
|
break;
|
|
}
|
|
|
|
/* KT: 25-Dec-99 - 8255 resets latches when mode set */
|
|
m_latch[0] = m_latch[1] = m_latch[2] = 0;
|
|
|
|
if (call_handlers)
|
|
{
|
|
for (int i = 0; i < 3; i++)
|
|
{
|
|
ppi8255_write_port(i);
|
|
}
|
|
}
|
|
|
|
/* reset flip-flops */
|
|
m_obf_a = m_ibf_a = 0;
|
|
m_obf_b = m_ibf_b = 0;
|
|
m_inte_a = m_inte_b = m_inte_1 = m_inte_2 = 0;
|
|
|
|
/* store control word */
|
|
m_control = data;
|
|
}
|
|
|
|
void ppi8255_set_port_a_read(device_t *device, const devcb_read8 *config)
|
|
{
|
|
downcast<ppi8255_device*>(device)->ppi8255_set_port_read(0, config);
|
|
}
|
|
|
|
void ppi8255_set_port_b_read(device_t *device, const devcb_read8 *config)
|
|
{
|
|
downcast<ppi8255_device*>(device)->ppi8255_set_port_read(1, config);
|
|
}
|
|
|
|
void ppi8255_set_port_c_read(device_t *device, const devcb_read8 *config)
|
|
{
|
|
downcast<ppi8255_device*>(device)->ppi8255_set_port_read(2, config);
|
|
}
|
|
|
|
|
|
void ppi8255_set_port_a_write(device_t *device, const devcb_write8 *config)
|
|
{
|
|
downcast<ppi8255_device*>(device)->ppi8255_set_port_write(0, config);
|
|
}
|
|
|
|
void ppi8255_set_port_b_write(device_t *device, const devcb_write8 *config)
|
|
{
|
|
downcast<ppi8255_device*>(device)->ppi8255_set_port_write(1, config);
|
|
}
|
|
|
|
void ppi8255_set_port_c_write(device_t *device, const devcb_write8 *config)
|
|
{
|
|
downcast<ppi8255_device*>(device)->ppi8255_set_port_write(2, config);
|
|
}
|
|
|
|
|
|
void ppi8255_set_port_a( device_t *device, UINT8 data )
|
|
{
|
|
downcast<ppi8255_device*>(device)->ppi8255_set_port(0, data);
|
|
}
|
|
|
|
void ppi8255_set_port_b( device_t *device, UINT8 data )
|
|
{
|
|
downcast<ppi8255_device*>(device)->ppi8255_set_port(1, data);
|
|
}
|
|
|
|
void ppi8255_set_port_c( device_t *device, UINT8 data )
|
|
{
|
|
downcast<ppi8255_device*>(device)->ppi8255_set_port(2, data);
|
|
}
|
|
|
|
|
|
UINT8 ppi8255_get_port_a( device_t *device )
|
|
{
|
|
return downcast<ppi8255_device*>(device)->ppi8255_get_port(0);
|
|
}
|
|
|
|
UINT8 ppi8255_get_port_b( device_t *device )
|
|
{
|
|
return downcast<ppi8255_device*>(device)->ppi8255_get_port(1);
|
|
}
|
|
|
|
UINT8 ppi8255_get_port_c( device_t *device )
|
|
{
|
|
return downcast<ppi8255_device*>(device)->ppi8255_get_port(2);
|
|
}
|