mirror of
https://github.com/holub/mame
synced 2025-05-19 12:18:56 +03:00
281 lines
6.9 KiB
C++
281 lines
6.9 KiB
C++
/*****************************************************************************
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*
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* includes/gamecom.h
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*
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* Tiger Game.com
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*
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* Driver by Wilbert Pol
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*
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****************************************************************************/
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#ifndef GAMECOM_H_
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#define GAMECOM_H_
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#include "emu.h"
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#include "cpu/sm8500/sm8500.h"
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#include "imagedev/cartslot.h"
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#include "rendlay.h"
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/* SM8521 register addresses */
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enum
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{
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SM8521_R0 = 0x00,
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SM8521_R1 = 0x01,
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SM8521_R2 = 0x02,
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SM8521_R3 = 0x03,
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SM8521_R4 = 0x04,
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SM8521_R5 = 0x05,
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SM8521_R6 = 0x06,
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SM8521_R7 = 0x07,
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SM8521_R8 = 0x08,
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SM8521_R9 = 0x09,
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SM8521_R10 = 0x0A,
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SM8521_R11 = 0x0B,
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SM8521_R12 = 0x0C,
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SM8521_R13 = 0x0D,
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SM8521_R14 = 0x0E,
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SM8521_R15 = 0x0F,
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SM8521_IE0 = 0x10,
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SM8521_IE1 = 0x11,
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SM8521_IR0 = 0x12,
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SM8521_IR1 = 0x13,
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SM8521_P0 = 0x14,
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SM8521_P1 = 0x15,
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SM8521_P2 = 0x16,
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SM8521_P3 = 0x17,
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SM8521_18 = 0x18, /* reserved */
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SM8521_SYS = 0x19,
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SM8521_CKC = 0x1A,
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SM8521_1B = 0x1B, /* reserved */
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SM8521_SPH = 0x1C,
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SM8521_SPL = 0x1D,
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SM8521_PS0 = 0x1E,
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SM8521_PS1 = 0x1F,
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SM8521_P0C = 0x20,
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SM8521_P1C = 0x21,
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SM8521_P2C = 0x22,
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SM8521_P3C = 0x23,
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SM8521_MMU0 = 0x24,
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SM8521_MMU1 = 0x25,
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SM8521_MMU2 = 0x26,
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SM8521_MMU3 = 0x27,
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SM8521_MMU4 = 0x28,
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SM8521_29 = 0x29, /* reserved */
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SM8521_2A = 0x2A, /* reserved */
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SM8521_URTT = 0x2B,
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SM8521_URTR = 0x2C,
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SM8521_URTS = 0x2D,
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SM8521_URTC = 0x2E,
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SM8521_2F = 0x2F, /* reserved */
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SM8521_LCDC = 0x30,
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SM8521_LCH = 0x31,
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SM8521_LCV = 0x32,
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SM8521_33 = 0x33, /* reserved */
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SM8521_DMC = 0x34,
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SM8521_DMX1 = 0x35,
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SM8521_DMY1 = 0x36,
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SM8521_DMDX = 0x37,
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SM8521_DMDY = 0x38,
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SM8521_DMX2 = 0x39,
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SM8521_DMY2 = 0x3A,
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SM8521_DMPL = 0x3B,
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SM8521_DMBR = 0x3C,
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SM8521_DMVP = 0x3D,
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SM8521_3E = 0x3E, /* reserved */
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SM8521_3F = 0x3F, /* reserved */
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SM8521_SGC = 0x40,
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SM8521_41 = 0x41, /* reserved */
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SM8521_SG0L = 0x42,
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SM8521_43 = 0x43, /* reserved */
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SM8521_SG1L = 0x44,
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SM8521_45 = 0x45, /* reserved */
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SM8521_SG0TH = 0x46,
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SM8521_SG0TL = 0x47,
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SM8521_SG1TH = 0x48,
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SM8521_SG1TL = 0x49,
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SM8521_SG2L = 0x4A,
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SM8521_4B = 0x4B, /* reserved */
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SM8521_SG2TH = 0x4C,
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SM8521_SG2TL = 0x4D,
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SM8521_SGDA = 0x4E,
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SM8521_4F = 0x4F, /* reserved */
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SM8521_TM0C = 0x50,
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SM8521_TM0D = 0x51,
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SM8521_TM1C = 0x52,
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SM8521_TM1D = 0x53,
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SM8521_CLKT = 0x54,
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SM8521_55 = 0x55, /* reserved */
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SM8521_56 = 0x56, /* reserved */
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SM8521_57 = 0x57, /* reserved */
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SM8521_58 = 0x58, /* reserved */
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SM8521_59 = 0x59, /* reserved */
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SM8521_5A = 0x5A, /* reserved */
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SM8521_5B = 0x5B, /* reserved */
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SM8521_5C = 0x5C, /* reserved */
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SM8521_5D = 0x5D, /* reserved */
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SM8521_WDT = 0x5E,
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SM8521_WDTC = 0x5F,
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SM8521_SG0W0 = 0x60,
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SM8521_SG0W1 = 0x61,
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SM8521_SG0W2 = 0x62,
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SM8521_SG0W3 = 0x63,
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SM8521_SG0W4 = 0x64,
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SM8521_SG0W5 = 0x65,
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SM8521_SG0W6 = 0x66,
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SM8521_SG0W7 = 0x67,
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SM8521_SG0W8 = 0x68,
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SM8521_SG0W9 = 0x69,
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SM8521_SG0W10 = 0x6A,
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SM8521_SG0W11 = 0x6B,
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SM8521_SG0W12 = 0x6C,
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SM8521_SG0W13 = 0x6D,
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SM8521_SG0W14 = 0x6E,
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SM8521_SG0W15 = 0x6F,
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SM8521_SG1W0 = 0x70,
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SM8521_SG1W1 = 0x71,
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SM8521_SG1W2 = 0x72,
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SM8521_SG1W3 = 0x73,
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SM8521_SG1W4 = 0x74,
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SM8521_SG1W5 = 0x75,
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SM8521_SG1W6 = 0x76,
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SM8521_SG1W7 = 0x77,
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SM8521_SG1W8 = 0x78,
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SM8521_SG1W9 = 0x79,
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SM8521_SG1W10 = 0x7A,
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SM8521_SG1W11 = 0x7B,
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SM8521_SG1W12 = 0x7C,
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SM8521_SG1W13 = 0x7D,
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SM8521_SG1W14 = 0x7E,
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SM8521_SG1W15 = 0x7F
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};
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struct GAMECOM_DMA
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{
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int enabled;
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int transfer_mode;
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int decrement_y;
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int decrement_x;
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int overwrite_mode;
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int width_x;
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int width_y;
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int width_x_count;
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int width_y_count;
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int source_x;
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int source_x_current;
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int source_y;
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int source_width;
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int dest_x;
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int dest_x_current;
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int dest_y;
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int dest_width;
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int state_count;
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int state_pixel;
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int state_limit;
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UINT8 palette[4];
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UINT8 *source_bank;
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unsigned int source_current;
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unsigned int source_line;
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unsigned int source_mask;
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UINT8 *dest_bank;
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unsigned int dest_current;
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unsigned int dest_line;
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unsigned int dest_mask;
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};
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struct GAMECOM_TIMER
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{
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int enabled;
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int state_count;
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int state_limit;
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int check_value;
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};
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struct gamecom_sound_t
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{
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UINT8 sgc;
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UINT8 sg0l;
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UINT8 sg1l;
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UINT8 sg2l;
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UINT16 sg0t;
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UINT16 sg1t;
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UINT16 sg2t;
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UINT8 sgda;
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UINT8 sg0w[16];
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UINT8 sg1w[16];
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};
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class gamecom_state : public driver_device
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{
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public:
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gamecom_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_p_nvram(*this,"p_nvram")
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, m_p_videoram(*this,"p_videoram")
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, m_bank1(*this, "bank1")
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, m_bank2(*this, "bank2")
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, m_bank3(*this, "bank3")
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, m_bank4(*this, "bank4")
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, m_region_maincpu(*this, "maincpu")
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, m_region_kernel(*this, "kernel")
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, m_io_in0(*this, "IN0")
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, m_io_in1(*this, "IN1")
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, m_io_in2(*this, "IN2")
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, m_io_styx(*this, "STYX")
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, m_io_styy(*this, "STYY")
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{ }
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required_device<cpu_device> m_maincpu;
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DECLARE_READ8_MEMBER( gamecom_internal_r );
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DECLARE_READ8_MEMBER( gamecom_pio_r );
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DECLARE_WRITE8_MEMBER( gamecom_internal_w );
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DECLARE_WRITE8_MEMBER( gamecom_pio_w );
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required_shared_ptr<UINT8> m_p_nvram;
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UINT8 *m_p_ram;
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required_shared_ptr<UINT8> m_p_videoram;
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UINT8 *m_cartridge1;
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UINT8 *m_cartridge2;
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UINT8 *m_cartridge;
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emu_timer *m_clock_timer;
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emu_timer *m_scanline_timer;
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GAMECOM_DMA m_dma;
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GAMECOM_TIMER m_timer[2];
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gamecom_sound_t m_sound;
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int m_stylus_x;
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int m_stylus_y;
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int m_scanline;
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unsigned int m_base_address;
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bitmap_ind16 m_bitmap;
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void gamecom_set_mmu(UINT8 mmu, UINT8 data);
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void handle_stylus_press(int column);
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UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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DECLARE_DRIVER_INIT(gamecom);
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virtual void machine_reset();
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virtual void video_start();
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virtual void palette_init();
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INTERRUPT_GEN_MEMBER(gamecom_interrupt);
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TIMER_CALLBACK_MEMBER(gamecom_clock_timer_callback);
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TIMER_CALLBACK_MEMBER(gamecom_scanline);
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DECLARE_WRITE8_MEMBER( gamecom_handle_dma );
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DECLARE_WRITE8_MEMBER( gamecom_update_timers );
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DECLARE_DEVICE_IMAGE_LOAD_MEMBER( gamecom_cart1 );
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DECLARE_DEVICE_IMAGE_LOAD_MEMBER( gamecom_cart2 );
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protected:
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required_memory_bank m_bank1;
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required_memory_bank m_bank2;
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required_memory_bank m_bank3;
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required_memory_bank m_bank4;
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required_memory_region m_region_maincpu;
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required_memory_region m_region_kernel;
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required_ioport m_io_in0;
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required_ioport m_io_in1;
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required_ioport m_io_in2;
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required_ioport m_io_styx;
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required_ioport m_io_styy;
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};
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#endif /* GAMECOM_H_ */
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