mirror of
https://github.com/holub/mame
synced 2025-05-28 08:33:05 +03:00
843 lines
25 KiB
C
843 lines
25 KiB
C
/*
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Nokia Elektroniikka pj
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Controller ILC 9534
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FDC-Interface ILC 9530
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Parts:
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6,144 MHz xtal (CPU clock)
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18,720 MHz xtal (pixel clock)
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16 MHz xtal (FDC clock)
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Intel I8085AP (CPU)
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Intel 8253-5P (PIT)
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Intel 8275P (CRTC)
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Intel 8212P (I/OP)
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Intel 8237A-5P (DMAC)
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NEC uPD7220C (GDC)
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NEC uPD7201P (MPSC=uart)
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NEC uPD765 (FDC)
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TMS4116-15 (16Kx4 DRAM)*4 = 32KB Video RAM for 7220
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2164-6P (64Kx1 DRAM)*8 = 64KB Work RAM
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DMA channels:
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0 CRT
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1 MPSC transmit
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2 MPSC receive
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3 FDC
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Interrupts:
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INTR MPSC INT
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RST5.5 FDC IRQ
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RST6.5 8212 INT
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RST7.5 DMA EOP
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*/
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/*
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TODO:
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- fix i8275 DMA timing (full screen is transferred in 1 burst, which kills floppy sector DMA)
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- add HRTC/VRTC output to i8275
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- NEC uPD7220 GDC
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- accurate video timing
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- floppy DRQ during RECALL = 0
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- PCB layout
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- NEC uPD7201 MPSC
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- model M7 5MB hard disk
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*/
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#include "includes/mikromik.h"
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//**************************************************************************
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// MACROS / CONSTANTS
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//**************************************************************************
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#define LOG 1
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#define MMU_IOEN 0x01
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#define MMU_RAMEN 0x02
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#define MMU_CE4 0x08
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#define MMU_CE0 0x10
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#define MMU_CE1 0x20
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#define MMU_CE2 0x40
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#define MMU_CE3 0x80
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//**************************************************************************
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// MEMORY MANAGEMENT UNIT
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//**************************************************************************
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//-------------------------------------------------
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// read -
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//-------------------------------------------------
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READ8_MEMBER( mm1_state::read )
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{
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UINT8 data = 0;
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UINT8 mmu = m_mmu_rom[(m_a8 << 8) | (offset >> 8)];
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if (mmu & MMU_IOEN)
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{
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switch ((offset >> 4) & 0x07)
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{
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case 0:
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data = m_dmac->read(space, offset & 0x0f);
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break;
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case 1:
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data = m_mpsc->cd_ba_r(space, offset & 0x03);
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break;
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case 2:
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data = m_crtc->read(space, offset & 0x01);
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break;
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case 3:
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data = pit8253_r(m_pit, space, offset & 0x03);
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break;
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case 4:
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data = m_iop->data_r(space, 0);
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break;
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case 5:
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if (BIT(offset, 0))
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{
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data = m_fdc->fifo_r(space, 0, 0xff);
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}
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else
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{
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data = m_fdc->msr_r(space, 0, 0xff);
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}
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break;
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case 7:
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data = m_hgdc->read(space, offset & 0x01);
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break;
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}
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}
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else
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{
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if (mmu & MMU_RAMEN)
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{
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data = m_ram->pointer()[offset];
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}
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else if (!(mmu & MMU_CE0))
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{
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data = memregion(I8085A_TAG)->base()[offset & 0x1fff];
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}
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else if (!(mmu & MMU_CE1))
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{
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data = memregion(I8085A_TAG)->base()[0x2000 + (offset & 0x1fff)];
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}
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}
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return data;
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}
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//-------------------------------------------------
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// write -
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//-------------------------------------------------
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WRITE8_MEMBER( mm1_state::write )
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{
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UINT8 mmu = m_mmu_rom[(m_a8 << 8) | (offset >> 8)];
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if (mmu & MMU_IOEN)
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{
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switch ((offset >> 4) & 0x07)
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{
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case 0:
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m_dmac->write(space, offset & 0x0f, data);
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break;
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case 1:
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m_mpsc->cd_ba_w(space, offset & 0x03, data);
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break;
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case 2:
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m_crtc->write(space, offset & 0x01, data);
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break;
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case 3:
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pit8253_w(m_pit, space, offset & 0x03, data);
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break;
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case 4:
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m_iop->data_w(space, 0, data);
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break;
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case 5:
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if (BIT(offset, 0))
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{
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m_fdc->fifo_w(space, 0, data, 0xff);
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}
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break;
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case 6:
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ls259_w(space, offset & 0x07, data);
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break;
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case 7:
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m_hgdc->write(space, offset & 0x01, data);
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break;
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}
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}
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else
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{
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if (mmu & MMU_RAMEN)
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{
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m_ram->pointer()[offset] = data;
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}
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}
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}
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//-------------------------------------------------
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// ls259_w -
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//-------------------------------------------------
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WRITE8_MEMBER( mm1_state::ls259_w )
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{
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int d = BIT(data, 0);
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switch (offset)
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{
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case 0: // IC24 A8
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if (LOG) logerror("IC24 A8 %u\n", d);
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m_a8 = d;
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break;
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case 1: // RECALL
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if (LOG) logerror("RECALL %u\n", d);
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m_recall = d;
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if (d) m_fdc->reset();
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break;
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case 2: // _RV28/RX21
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m_rx21 = d;
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break;
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case 3: // _TX21
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m_tx21 = d;
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break;
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case 4: // _RCL
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m_rcl = d;
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break;
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case 5: // _INTC
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m_intc = d;
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break;
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case 6: // LLEN
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if (LOG) logerror("LLEN %u\n", d);
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m_llen = d;
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break;
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case 7: // MOTOR ON
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if (LOG) logerror("MOTOR %u\n", d);
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m_floppy0->mon_w(!d);
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m_floppy1->mon_w(!d);
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break;
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}
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}
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//**************************************************************************
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// KEYBOARD
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//**************************************************************************
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//-------------------------------------------------
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// scan_keyboard -
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//-------------------------------------------------
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void mm1_state::scan_keyboard()
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{
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static const char *const keynames[] = { "ROW0", "ROW1", "ROW2", "ROW3", "ROW4", "ROW5", "ROW6", "ROW7", "ROW8", "ROW9" };
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UINT8 data = ioport(keynames[m_drive])->read();
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UINT8 special = ioport("SPECIAL")->read();
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int ctrl = BIT(special, 0);
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int shift = BIT(special, 2) & BIT(special, 1);
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UINT8 keydata = 0xff;
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if (!BIT(data, m_sense))
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{
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// get key data from PROM
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keydata = m_key_rom[(ctrl << 8) | (shift << 7) | (m_drive << 3) | (m_sense)];
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}
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if (m_keydata != keydata)
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{
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// latch key data
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m_keydata = keydata;
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if (keydata != 0xff)
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{
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// strobe in key data
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m_iop->stb_w(1);
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m_iop->stb_w(0);
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}
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}
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if (keydata == 0xff)
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{
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// increase scan counters
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m_sense++;
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if (m_sense == 8)
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{
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m_sense = 0;
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m_drive++;
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if (m_drive == 10)
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{
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m_drive = 0;
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}
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}
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}
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}
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//-------------------------------------------------
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// TIMER_DEVICE_CALLBACK_MEMBER( kbclk_tick )
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//-------------------------------------------------
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TIMER_DEVICE_CALLBACK_MEMBER(mm1_state::kbclk_tick)
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{
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scan_keyboard();
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}
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//**************************************************************************
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// ADDRESS MAPS
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//**************************************************************************
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//-------------------------------------------------
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// ADDRESS_MAP( mm1_map )
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//-------------------------------------------------
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static ADDRESS_MAP_START( mm1_map, AS_PROGRAM, 8, mm1_state )
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AM_RANGE(0x0000, 0xffff) AM_READWRITE(read, write)
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ADDRESS_MAP_END
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//**************************************************************************
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// INPUT PORTS
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//**************************************************************************
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//-------------------------------------------------
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// INPUT_PORTS( mm1 )
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//-------------------------------------------------
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static INPUT_PORTS_START( mm1 )
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PORT_START("ROW0")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!')
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('\"')
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F1") PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1))
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S')
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("TAB") PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t')
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F2") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2))
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q')
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PORT_START("ROW1")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#')
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F3") PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3))
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F4") PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4))
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')
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PORT_START("ROW2")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V')
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C')
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F5") PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5))
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F')
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R')
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F6") PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6))
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D')
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T')
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PORT_START("ROW3")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('/')
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(')
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F7") PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7))
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K')
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR(';')
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F8") PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8))
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J')
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M')
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PORT_START("ROW4")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&')
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N')
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H')
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B')
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G')
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')
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PORT_START("ROW5")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('+') PORT_CHAR('?')
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("\xC2\xB4 '") PORT_CODE(KEYCODE_EQUALS) PORT_CHAR(0x00B4) PORT_CHAR('`')
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("\xE2\x86\x96")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR(':')
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("ESC") PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC))
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('-') PORT_CHAR('_')
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(a_RING " " A_RING) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR(0x00E5) PORT_CHAR(0x00C5)
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PORT_START("ROW6")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR('<') PORT_CHAR('>')
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad .") PORT_CODE(KEYCODE_DEL_PAD)
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT))
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("RETURN") PORT_CODE(KEYCODE_ENTER) PORT_CODE(KEYCODE_ENTER_PAD) PORT_CHAR(13)
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('~') PORT_CHAR('^')
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_DOWN) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN))
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("LF")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('@') PORT_CHAR('*')
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PORT_START("ROW7")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 8") PORT_CODE(KEYCODE_8_PAD)
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 9") PORT_CODE(KEYCODE_9_PAD)
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_RIGHT) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT))
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 2") PORT_CODE(KEYCODE_2_PAD)
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 6") PORT_CODE(KEYCODE_6_PAD)
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("DEL") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 3") PORT_CODE(KEYCODE_3_PAD)
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 5") PORT_CODE(KEYCODE_5_PAD)
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PORT_START("ROW8")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("CAPS LOCK") PORT_CODE(KEYCODE_CAPSLOCK)
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 7") PORT_CODE(KEYCODE_7_PAD)
|
|
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_UP) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP))
|
|
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(a_UMLAUT " " A_UMLAUT) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(0x00E4) PORT_CHAR(0x00C4)
|
|
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 4") PORT_CODE(KEYCODE_4_PAD)
|
|
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("SPACE") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
|
|
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 1") PORT_CODE(KEYCODE_1_PAD)
|
|
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 0") PORT_CODE(KEYCODE_0_PAD)
|
|
|
|
PORT_START("ROW9")
|
|
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')')
|
|
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('=')
|
|
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F9") PORT_CODE(KEYCODE_F9) PORT_CHAR(UCHAR_MAMEKEY(F9))
|
|
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(o_UMLAUT " " O_UMLAUT) PORT_CODE(KEYCODE_COLON) PORT_CHAR(0x00F6) PORT_CHAR(0x00D6)
|
|
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')
|
|
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F10") PORT_CODE(KEYCODE_F10) PORT_CHAR(UCHAR_MAMEKEY(F10))
|
|
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L')
|
|
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
|
|
|
|
PORT_START("SPECIAL")
|
|
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("CTRL") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL))
|
|
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Left SHIFT") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
|
|
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Right SHIFT") PORT_CODE(KEYCODE_RSHIFT)
|
|
|
|
PORT_START("T5")
|
|
PORT_CONFNAME( 0x01, 0x00, "Floppy Drive Type")
|
|
PORT_CONFSETTING( 0x00, "640 KB" )
|
|
PORT_CONFSETTING( 0x01, "160/320 KB" )
|
|
INPUT_PORTS_END
|
|
|
|
|
|
|
|
//**************************************************************************
|
|
// DEVICE CONFIGURATION
|
|
//**************************************************************************
|
|
|
|
//-------------------------------------------------
|
|
// I8212_INTERFACE( iop_intf )
|
|
//-------------------------------------------------
|
|
|
|
READ8_MEMBER( mm1_state::kb_r )
|
|
{
|
|
return m_keydata;
|
|
}
|
|
|
|
static I8212_INTERFACE( iop_intf )
|
|
{
|
|
DEVCB_CPU_INPUT_LINE(I8085A_TAG, I8085_RST65_LINE),
|
|
DEVCB_DRIVER_MEMBER(mm1_state, kb_r),
|
|
DEVCB_NULL
|
|
};
|
|
|
|
|
|
//-------------------------------------------------
|
|
// I8237_INTERFACE( dmac_intf )
|
|
//-------------------------------------------------
|
|
|
|
void mm1_state::update_tc()
|
|
{
|
|
int fdc_tc = m_tc && !m_dack3;
|
|
|
|
if (m_fdc_tc != fdc_tc)
|
|
{
|
|
m_fdc_tc = fdc_tc;
|
|
m_fdc->tc_w(m_fdc_tc);
|
|
}
|
|
}
|
|
|
|
WRITE_LINE_MEMBER( mm1_state::dma_hrq_w )
|
|
{
|
|
m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
|
|
|
|
// Assert HLDA
|
|
m_dmac->hack_w(state);
|
|
}
|
|
|
|
READ8_MEMBER( mm1_state::mpsc_dack_r )
|
|
{
|
|
// clear data request
|
|
m_dmac->dreq2_w(CLEAR_LINE);
|
|
|
|
return m_mpsc->dtra_r();
|
|
}
|
|
|
|
WRITE8_MEMBER( mm1_state::mpsc_dack_w )
|
|
{
|
|
m_mpsc->hai_w(data);
|
|
|
|
// clear data request
|
|
m_dmac->dreq1_w(CLEAR_LINE);
|
|
}
|
|
|
|
WRITE_LINE_MEMBER( mm1_state::dma_eop_w )
|
|
{
|
|
m_maincpu->set_input_line(I8085_RST75_LINE, state);
|
|
|
|
m_tc = state;
|
|
update_tc();
|
|
}
|
|
|
|
WRITE_LINE_MEMBER( mm1_state::dack3_w )
|
|
{
|
|
m_dack3 = state;
|
|
update_tc();
|
|
}
|
|
|
|
static I8237_INTERFACE( dmac_intf )
|
|
{
|
|
DEVCB_DRIVER_LINE_MEMBER(mm1_state, dma_hrq_w),
|
|
DEVCB_DRIVER_LINE_MEMBER(mm1_state, dma_eop_w),
|
|
DEVCB_DRIVER_MEMBER(mm1_state, read),
|
|
DEVCB_DRIVER_MEMBER(mm1_state, write),
|
|
{ DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_MEMBER(mm1_state, mpsc_dack_r), DEVCB_DEVICE_MEMBER(UPD765_TAG, upd765_family_device, mdma_r) },
|
|
{ DEVCB_DEVICE_MEMBER(I8275_TAG, i8275_device, dack_w), DEVCB_DRIVER_MEMBER(mm1_state, mpsc_dack_w), DEVCB_NULL, DEVCB_DEVICE_MEMBER(UPD765_TAG, upd765_family_device, mdma_w) },
|
|
{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_LINE_MEMBER(mm1_state, dack3_w) }
|
|
};
|
|
|
|
|
|
//-------------------------------------------------
|
|
// pit8253_config pit_intf
|
|
//-------------------------------------------------
|
|
|
|
WRITE_LINE_MEMBER( mm1_state::itxc_w )
|
|
{
|
|
if (!m_intc)
|
|
{
|
|
m_mpsc->txca_w(state);
|
|
}
|
|
}
|
|
|
|
WRITE_LINE_MEMBER( mm1_state::irxc_w )
|
|
{
|
|
if (!m_intc)
|
|
{
|
|
m_mpsc->rxca_w(state);
|
|
}
|
|
}
|
|
|
|
WRITE_LINE_MEMBER( mm1_state::auxc_w )
|
|
{
|
|
m_mpsc->txcb_w(state);
|
|
m_mpsc->rxcb_w(state);
|
|
}
|
|
|
|
static const struct pit8253_config pit_intf =
|
|
{
|
|
{
|
|
{
|
|
XTAL_6_144MHz/2/2,
|
|
DEVCB_LINE_VCC,
|
|
DEVCB_DRIVER_LINE_MEMBER(mm1_state, itxc_w)
|
|
}, {
|
|
XTAL_6_144MHz/2/2,
|
|
DEVCB_LINE_VCC,
|
|
DEVCB_DRIVER_LINE_MEMBER(mm1_state, irxc_w)
|
|
}, {
|
|
XTAL_6_144MHz/2/2,
|
|
DEVCB_LINE_VCC,
|
|
DEVCB_DRIVER_LINE_MEMBER(mm1_state, auxc_w)
|
|
}
|
|
}
|
|
};
|
|
|
|
|
|
//-------------------------------------------------
|
|
// UPD7201_INTERFACE( mpsc_intf )
|
|
//-------------------------------------------------
|
|
|
|
WRITE_LINE_MEMBER( mm1_state::drq2_w )
|
|
{
|
|
if (state)
|
|
{
|
|
m_dmac->dreq2_w(ASSERT_LINE);
|
|
}
|
|
}
|
|
|
|
WRITE_LINE_MEMBER( mm1_state::drq1_w )
|
|
{
|
|
if (state)
|
|
{
|
|
m_dmac->dreq1_w(ASSERT_LINE);
|
|
}
|
|
}
|
|
|
|
static UPD7201_INTERFACE( mpsc_intf )
|
|
{
|
|
DEVCB_NULL, // interrupt
|
|
{
|
|
{
|
|
0, // receive clock
|
|
0, // transmit clock
|
|
DEVCB_DRIVER_LINE_MEMBER(mm1_state, drq2_w), // receive DRQ
|
|
DEVCB_DRIVER_LINE_MEMBER(mm1_state, drq1_w), // transmit DRQ
|
|
DEVCB_NULL, // receive data
|
|
DEVCB_NULL, // transmit data
|
|
DEVCB_NULL, // clear to send
|
|
DEVCB_NULL, // data carrier detect
|
|
DEVCB_NULL, // ready to send
|
|
DEVCB_NULL, // data terminal ready
|
|
DEVCB_NULL, // wait
|
|
DEVCB_NULL // sync output
|
|
}, {
|
|
0, // receive clock
|
|
0, // transmit clock
|
|
DEVCB_NULL, // receive DRQ
|
|
DEVCB_NULL, // transmit DRQ
|
|
DEVCB_NULL, // receive data
|
|
DEVCB_NULL, // transmit data
|
|
DEVCB_NULL, // clear to send
|
|
DEVCB_LINE_GND, // data carrier detect
|
|
DEVCB_NULL, // ready to send
|
|
DEVCB_NULL, // data terminal ready
|
|
DEVCB_NULL, // wait
|
|
DEVCB_NULL // sync output
|
|
}
|
|
}
|
|
};
|
|
|
|
|
|
//-------------------------------------------------
|
|
// I8085_CONFIG( i8085_intf )
|
|
//-------------------------------------------------
|
|
|
|
READ_LINE_MEMBER( mm1_state::dsra_r )
|
|
{
|
|
return 1;
|
|
}
|
|
|
|
static I8085_CONFIG( i8085_intf )
|
|
{
|
|
DEVCB_NULL, // STATUS changed callback
|
|
DEVCB_NULL, // INTE changed callback
|
|
DEVCB_DRIVER_LINE_MEMBER(mm1_state, dsra_r), // SID changed callback (I8085A only)
|
|
DEVCB_DEVICE_LINE(SPEAKER_TAG, speaker_level_w) // SOD changed callback (I8085A only)
|
|
};
|
|
|
|
|
|
//-------------------------------------------------
|
|
// upd765_interface fdc_intf
|
|
//-------------------------------------------------
|
|
|
|
FLOPPY_FORMATS_MEMBER( mm1_state::floppy_formats )
|
|
FLOPPY_MM1_FORMAT
|
|
FLOPPY_FORMATS_END
|
|
/*
|
|
FLOPPY_FORMATS_MEMBER( mm2_state::floppy_formats )
|
|
FLOPPY_MM2_FORMAT
|
|
FLOPPY_FORMATS_END
|
|
*/
|
|
static SLOT_INTERFACE_START( mm1_floppies )
|
|
SLOT_INTERFACE( "525qd", FLOPPY_525_QD )
|
|
SLOT_INTERFACE_END
|
|
|
|
void mm1_state::fdc_intrq_w(bool state)
|
|
{
|
|
m_maincpu->set_input_line(I8085_RST55_LINE, state ? ASSERT_LINE : CLEAR_LINE);
|
|
}
|
|
|
|
void mm1_state::fdc_drq_w(bool state)
|
|
{
|
|
m_dmac->dreq3_w(state);
|
|
}
|
|
|
|
|
|
//**************************************************************************
|
|
// MACHINE INITIALIZATION
|
|
//**************************************************************************
|
|
|
|
//-------------------------------------------------
|
|
// MACHINE_START( mm1 )
|
|
//-------------------------------------------------
|
|
|
|
void mm1_state::machine_start()
|
|
{
|
|
// floppy callbacks
|
|
m_fdc->setup_intrq_cb(upd765_family_device::line_cb(FUNC(mm1_state::fdc_intrq_w), this));
|
|
m_fdc->setup_drq_cb(upd765_family_device::line_cb(FUNC(mm1_state::fdc_drq_w), this));
|
|
|
|
// find memory regions
|
|
m_mmu_rom = memregion("address")->base();
|
|
m_key_rom = memregion("keyboard")->base();
|
|
|
|
// register for state saving
|
|
save_item(NAME(m_sense));
|
|
save_item(NAME(m_drive));
|
|
save_item(NAME(m_llen));
|
|
save_item(NAME(m_intc));
|
|
save_item(NAME(m_rx21));
|
|
save_item(NAME(m_tx21));
|
|
save_item(NAME(m_rcl));
|
|
save_item(NAME(m_recall));
|
|
}
|
|
|
|
|
|
//-------------------------------------------------
|
|
// MACHINE_RESET( mm1 )
|
|
//-------------------------------------------------
|
|
|
|
void mm1_state::machine_reset()
|
|
{
|
|
address_space &program = m_maincpu->space(AS_PROGRAM);
|
|
|
|
// reset LS259
|
|
for (int i = 0; i < 8; i++)
|
|
{
|
|
ls259_w(program, i, 0);
|
|
}
|
|
|
|
// reset FDC
|
|
m_fdc->reset();
|
|
}
|
|
|
|
|
|
|
|
//**************************************************************************
|
|
// MACHINE DRIVERS
|
|
//**************************************************************************
|
|
|
|
//-------------------------------------------------
|
|
// MACHINE_CONFIG( mm1 )
|
|
//-------------------------------------------------
|
|
|
|
static MACHINE_CONFIG_START( mm1, mm1_state )
|
|
// basic system hardware
|
|
MCFG_CPU_ADD(I8085A_TAG, I8085A, XTAL_6_144MHz)
|
|
MCFG_CPU_PROGRAM_MAP(mm1_map)
|
|
MCFG_CPU_CONFIG(i8085_intf)
|
|
MCFG_QUANTUM_PERFECT_CPU(I8085A_TAG)
|
|
|
|
MCFG_TIMER_DRIVER_ADD_PERIODIC("kbclk", mm1_state, kbclk_tick, attotime::from_hz(2500))
|
|
|
|
// sound hardware
|
|
MCFG_SPEAKER_STANDARD_MONO("mono")
|
|
MCFG_SOUND_ADD(SPEAKER_TAG, SPEAKER_SOUND, 0)
|
|
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
|
|
|
// peripheral hardware
|
|
MCFG_I8212_ADD(I8212_TAG, iop_intf)
|
|
MCFG_I8237_ADD(I8237_TAG, XTAL_6_144MHz/2, dmac_intf)
|
|
MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
|
|
MCFG_UPD765A_ADD(UPD765_TAG, /* XTAL_16MHz/2/2 */ true, true)
|
|
MCFG_UPD7201_ADD(UPD7201_TAG, XTAL_6_144MHz/2, mpsc_intf)
|
|
|
|
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", mm1_floppies, "525qd", 0, mm1_state::floppy_formats)
|
|
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", mm1_floppies, "525qd", 0, mm1_state::floppy_formats)
|
|
|
|
// internal ram
|
|
MCFG_RAM_ADD(RAM_TAG)
|
|
MCFG_RAM_DEFAULT_SIZE("64K")
|
|
MACHINE_CONFIG_END
|
|
|
|
|
|
//-------------------------------------------------
|
|
// MACHINE_CONFIG( mm1m6 )
|
|
//-------------------------------------------------
|
|
|
|
static MACHINE_CONFIG_DERIVED( mm1m6, mm1 )
|
|
// video hardware
|
|
MCFG_FRAGMENT_ADD(mm1m6_video)
|
|
MACHINE_CONFIG_END
|
|
|
|
|
|
//-------------------------------------------------
|
|
// MACHINE_CONFIG( mm1m7 )
|
|
//-------------------------------------------------
|
|
|
|
static MACHINE_CONFIG_DERIVED( mm1m7, mm1 )
|
|
// video hardware
|
|
MCFG_FRAGMENT_ADD(mm1m6_video)
|
|
|
|
// TODO hard disk
|
|
MACHINE_CONFIG_END
|
|
|
|
|
|
|
|
//**************************************************************************
|
|
// ROMS
|
|
//**************************************************************************
|
|
|
|
//-------------------------------------------------
|
|
// ROM( mm1m6 )
|
|
//-------------------------------------------------
|
|
|
|
ROM_START( mm1m6 )
|
|
ROM_REGION( 0x4000, I8085A_TAG, 0 ) // BIOS
|
|
ROM_LOAD( "9081b.ic2", 0x0000, 0x2000, CRC(2955feb3) SHA1(946a6b0b8fb898be3f480c04da33d7aaa781152b) )
|
|
|
|
ROM_REGION( 0x200, "address", 0 ) // address decoder
|
|
ROM_LOAD( "720793a.ic24", 0x0000, 0x0200, CRC(deea87a6) SHA1(8f19e43252c9a0b1befd02fc9d34fe1437477f3a) )
|
|
|
|
ROM_REGION( 0x200, "keyboard", 0 ) // keyboard encoder
|
|
ROM_LOAD( "mmi6349-1j.bin", 0x0000, 0x0200, CRC(4ab3bf03) SHA1(925c9ee22db13566416cdbc505c03d4116ff8d5f) )
|
|
|
|
ROM_REGION( 0x1000, "chargen", 0 ) // character generator
|
|
ROM_LOAD( "6807b.ic61", 0x0000, 0x1000, CRC(32b36220) SHA1(8fe7a181badea3f7e656dfaea21ee9e4c9baf0f1) )
|
|
ROM_END
|
|
|
|
|
|
//-------------------------------------------------
|
|
// ROM( mm1m7 )
|
|
//-------------------------------------------------
|
|
|
|
#define rom_mm1m7 rom_mm1m6
|
|
|
|
|
|
|
|
//**************************************************************************
|
|
// SYSTEM DRIVERS
|
|
//**************************************************************************
|
|
|
|
// YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS
|
|
COMP( 1981, mm1m6, 0, 0, mm1m6, mm1, driver_device, 0, "Nokia Data", "MikroMikko 1 M6", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
|
COMP( 1981, mm1m7, mm1m6, 0, mm1m7, mm1, driver_device, 0, "Nokia Data", "MikroMikko 1 M7", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|