mirror of
https://github.com/holub/mame
synced 2025-05-21 05:08:54 +03:00
601 lines
15 KiB
C
601 lines
15 KiB
C
/*******************************************************************
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R2D Tank (c) 1980 Sigma Ent. Inc.
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driver by: David Haywood & Pierpaolo Prazzoli
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from the readme
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----------------------------------------------------
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Orca board number OVG-17A
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r2d1.1c is ROM #1 at board position 1C, and so on.
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1 = 2716
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2 = 2732
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3 = 2732
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4 = 2732
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5 = 2716 Sound
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CPU = 6809
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other = HD46505SP (6845) (CRT controller)
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other = MB14282(x2)
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other = HD468458SP
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other = MB14282
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other = MB14368
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other = HD6821 (x2) (PIA)
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other = HD46802
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other = M5L8226 (x2)
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RAM = 4116 (x11)
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----------------------------------------------------
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********************************************************************/
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#include "driver.h"
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#include "machine/rescap.h"
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#include "machine/6821pia.h"
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#include "machine/74123.h"
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#include "video/mc6845.h"
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#include "cpu/m6800/m6800.h"
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#include "cpu/m6809/m6809.h"
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#include "sound/ay8910.h"
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#define LOG_AUDIO_COMM (0)
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#define MAIN_CPU_MASTER_CLOCK (11200000)
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#define PIXEL_CLOCK (MAIN_CPU_MASTER_CLOCK / 2)
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#define CRTC_CLOCK (MAIN_CPU_MASTER_CLOCK / 16)
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static UINT8 *r2dtank_videoram;
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static UINT8 *r2dtank_colorram;
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static UINT8 flipscreen;
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static UINT32 ttl74123_output;
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static UINT8 AY8910_selected;
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/*************************************
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*
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* Prototypes
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*
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*************************************/
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static WRITE8_HANDLER( flipscreen_w );
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/*************************************
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*
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* Interrupt generation
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*
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*************************************/
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static void main_cpu_irq(running_machine *machine, int state)
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{
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int combined_state = pia_get_irq_a(0) | pia_get_irq_b(0) |
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pia_get_irq_a(1) | pia_get_irq_b(1);
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cpu_set_input_line(machine->cpu[0], M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
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}
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/*************************************
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*
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* Audio system - CPU 1
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*
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*************************************/
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static READ8_HANDLER( audio_command_r )
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{
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UINT8 ret = soundlatch_r(machine, 0);
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if (LOG_AUDIO_COMM) logerror("%08X CPU#1 Audio Command Read: %x\n", safe_cpu_get_pc(machine->activecpu), ret);
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return ret;
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}
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static WRITE8_HANDLER( audio_command_w )
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{
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soundlatch_w(machine, 0, ~data);
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cpu_set_input_line(machine->cpu[1], M6800_IRQ_LINE, HOLD_LINE);
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if (LOG_AUDIO_COMM) logerror("%08X CPU#0 Audio Command Write: %x\n", safe_cpu_get_pc(machine->activecpu), data^0xff);
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}
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static READ8_HANDLER( audio_answer_r )
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{
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UINT8 ret = soundlatch2_r(machine, 0);
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if (LOG_AUDIO_COMM) logerror("%08X CPU#0 Audio Answer Read: %x\n", safe_cpu_get_pc(machine->activecpu), ret);
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return ret;
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}
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static WRITE8_HANDLER( audio_answer_w )
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{
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/* HACK - prevents lock-up, but causes game to end some in-between sreens prematurely */
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if (safe_cpu_get_pc(machine->activecpu) == 0xfb12)
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data = 0x00;
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soundlatch2_w(machine, 0, data);
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cpu_set_input_line(machine->cpu[0], M6809_IRQ_LINE, HOLD_LINE);
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if (LOG_AUDIO_COMM) logerror("%08X CPU#1 Audio Answer Write: %x\n", safe_cpu_get_pc(machine->activecpu), data);
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}
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static WRITE8_HANDLER( AY8910_select_w )
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{
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/* not sure what all the bits mean:
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D0 - ????? definetely used
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D1 - not used?
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D2 - selects ay8910 control or port
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D3 - selects ay8910 #0
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D4 - selects ay8910 #1
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D5-D7 - not used */
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AY8910_selected = data;
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if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910_select_w: %x\n", safe_cpu_get_pc(machine->activecpu), data);
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}
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static READ8_HANDLER( AY8910_port_r )
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{
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UINT8 ret = 0;
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if (AY8910_selected & 0x08)
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{
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ret = ay8910_read_port_0_r(machine, offset);
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if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #0 Port Read: %x\n", safe_cpu_get_pc(machine->activecpu), ret);}
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if (AY8910_selected & 0x10)
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{
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ret = ay8910_read_port_1_r(machine, offset);
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if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #1 Port Read: %x\n", safe_cpu_get_pc(machine->activecpu), ret);}
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return ret;
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}
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static WRITE8_HANDLER( AY8910_port_w )
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{
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if (AY8910_selected & 0x04)
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{
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if (AY8910_selected & 0x08)
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{if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #0 Control Write: %x\n", safe_cpu_get_pc(machine->activecpu), data);
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ay8910_control_port_0_w(machine, offset, data);
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}
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if (AY8910_selected & 0x10)
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{if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #1 Control Write: %x\n", safe_cpu_get_pc(machine->activecpu), data);
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ay8910_control_port_1_w(machine, offset, data);
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}
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}
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else
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{
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if (AY8910_selected & 0x08)
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{if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #0 Port Write: %x\n", safe_cpu_get_pc(machine->activecpu), data);
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ay8910_write_port_0_w(machine, offset, data);
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}
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if (AY8910_selected & 0x10)
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{if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #1 Port Write: %x\n", safe_cpu_get_pc(machine->activecpu), data);
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ay8910_write_port_1_w(machine, offset, data);
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}
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}
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}
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static const ay8910_interface ay8910_1_interface =
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{
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AY8910_LEGACY_OUTPUT,
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AY8910_DEFAULT_LOADS,
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input_port_3_r,
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NULL,
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NULL,
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NULL
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};
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static const ay8910_interface ay8910_2_interface =
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{
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AY8910_LEGACY_OUTPUT,
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AY8910_DEFAULT_LOADS,
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input_port_1_r,
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input_port_2_r,
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NULL,
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NULL
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};
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/*************************************
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*
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* 74123
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*
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* This timer is responsible for
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* delaying the PIA1's port input.
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* This delay ensures that
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* CA1 is only changed in the VBLANK
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* region, but not in HBLANK
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*
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*************************************/
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static WRITE8_DEVICE_HANDLER( ttl74123_output_changed )
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{
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pia_0_ca1_w(device->machine, 0, data);
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ttl74123_output = data;
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}
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static CUSTOM_INPUT( get_ttl74123_output )
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{
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return ttl74123_output;
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}
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static const ttl74123_config ttl74123_intf =
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{
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TTL74123_GROUNDED, /* the hook up type */
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RES_K(22), /* resistor connected to RCext */
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CAP_U(0.01), /* capacitor connected to Cext and RCext */
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1, /* A pin - driven by the CRTC */
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1, /* B pin - pulled high */
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1, /* Clear pin - pulled high */
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ttl74123_output_changed
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};
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/*************************************
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*
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* Machine start
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*
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*************************************/
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static const pia6821_interface pia_main_intf =
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{
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/*inputs : A/B,CA/B1,CA/B2 */ input_port_0_r, input_port_1_r, 0, 0, 0, 0,
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/*outputs: A/B,CA/B2 */ 0, 0, 0, flipscreen_w,
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/*irqs : A/B */ main_cpu_irq, main_cpu_irq
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};
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static const pia6821_interface pia_audio_intf =
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{
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/*inputs : A/B,CA/B1,CA/B2 */ AY8910_port_r, 0, 0, 0, 0, 0,
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/*outputs: A/B,CA/B2 */ AY8910_port_w, AY8910_select_w, 0, 0,
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/*irqs : A/B */ main_cpu_irq, main_cpu_irq
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};
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static MACHINE_START( r2dtank )
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{
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pia_config(0, &pia_main_intf);
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pia_config(1, &pia_audio_intf);
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/* setup for save states */
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state_save_register_global(flipscreen);
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state_save_register_global(ttl74123_output);
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state_save_register_global(AY8910_selected);
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}
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/*************************************
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*
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* Machine reset
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*
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*************************************/
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static MACHINE_RESET( r2dtank )
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{
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pia_reset();
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}
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/*************************************
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*
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* Video system
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*
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*************************************/
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#define NUM_PENS (8)
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static WRITE8_HANDLER( flipscreen_w )
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{
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flipscreen = !data;
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}
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static MC6845_BEGIN_UPDATE( begin_update )
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{
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/* create the pens */
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offs_t i;
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static pen_t pens[NUM_PENS];
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for (i = 0; i < NUM_PENS; i++)
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{
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pens[i] = MAKE_RGB(pal1bit(i >> 2), pal1bit(i >> 1), pal1bit(i >> 0));
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}
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return pens;
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}
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static MC6845_UPDATE_ROW( update_row )
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{
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UINT8 cx;
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pen_t *pens = (pen_t *)param;
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UINT8 x = 0;
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for (cx = 0; cx < x_count; cx++)
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{
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int i;
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UINT8 data, fore_color;
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/* the memory is hooked up to the MA, RA lines this way */
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offs_t offs = ((ma << 3) & 0x1f00) |
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((ra << 5) & 0x00e0) |
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((ma << 0) & 0x001f);
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if (flipscreen)
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offs = offs ^ 0x1fff;
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data = r2dtank_videoram[offs];
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fore_color = (r2dtank_colorram[offs] >> 5) & 0x07;
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for (i = 0; i < 8; i++)
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{
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UINT8 bit, color;
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if (flipscreen)
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{
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bit = data & 0x01;
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data = data >> 1;
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}
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else
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{
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bit = data & 0x80;
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data = data << 1;
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}
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color = bit ? fore_color : RGB_BLACK;
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*BITMAP_ADDR32(bitmap, y, x) = pens[color];
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x = x + 1;
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}
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ma = ma + 1;
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}
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}
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static MC6845_ON_DE_CHANGED( display_enable_changed )
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{
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ttl74123_a_w(devtag_get_device(device->machine, TTL74123, "74123"), 0, display_enabled);
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}
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static const mc6845_interface mc6845_intf =
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{
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"main", /* screen we are acting on */
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CRTC_CLOCK, /* the clock (pin 21) of the chip */
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8, /* number of pixels per video memory address */
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begin_update, /* before pixel update callback */
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update_row, /* row update callback */
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0, /* after pixel update callback */
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display_enable_changed, /* callback for display state changes */
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NULL, /* HSYNC callback */
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NULL /* VSYNC callback */
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};
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static VIDEO_UPDATE( r2dtank )
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{
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const device_config *mc6845 = device_list_find_by_tag(screen->machine->config->devicelist, MC6845, "crtc");
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mc6845_update(mc6845, bitmap, cliprect);
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return 0;
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}
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/*************************************
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*
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* Memory handlers
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*
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*************************************/
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static WRITE8_HANDLER( pia_comp_0_w )
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{
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pia_0_w(machine, offset, ~data);
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}
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static ADDRESS_MAP_START( r2dtank_main_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x1fff) AM_RAM AM_BASE(&r2dtank_videoram)
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AM_RANGE(0x2000, 0x3fff) AM_RAM
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AM_RANGE(0x4000, 0x5fff) AM_RAM AM_BASE(&r2dtank_colorram)
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AM_RANGE(0x6000, 0x7fff) AM_RAM
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AM_RANGE(0x8000, 0x8003) AM_READWRITE(pia_0_r, pia_comp_0_w)
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AM_RANGE(0x8004, 0x8004) AM_READWRITE(audio_answer_r, audio_command_w)
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AM_RANGE(0xb000, 0xb000) AM_DEVWRITE(MC6845, "crtc", mc6845_address_w)
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AM_RANGE(0xb001, 0xb001) AM_DEVWRITE(MC6845, "crtc", mc6845_register_w)
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AM_RANGE(0xc000, 0xc007) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
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AM_RANGE(0xc800, 0xffff) AM_ROM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( r2dtank_audio_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x007f) AM_RAM /* internal RAM */
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AM_RANGE(0xd000, 0xd003) AM_READWRITE(pia_1_r, pia_1_w)
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AM_RANGE(0xf000, 0xf000) AM_READWRITE(audio_command_r, audio_answer_w)
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AM_RANGE(0xf800, 0xffff) AM_ROM
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ADDRESS_MAP_END
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/*************************************
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*
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* Port definition
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*
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*************************************/
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static INPUT_PORTS_START( r2dtank )
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PORT_START("IN0")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
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PORT_SERVICE_NO_TOGGLE(0x04, IP_ACTIVE_LOW)
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 )
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
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PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(get_ttl74123_output, NULL)
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PORT_START("IN1")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_COCKTAIL
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_COCKTAIL
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_COCKTAIL
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_COCKTAIL
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
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PORT_START("DSWA")
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PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x00, DEF_STR( Lives ) )
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PORT_DIPSETTING( 0x00, "3" )
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PORT_DIPSETTING( 0x10, "4" )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Cabinet ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Upright ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
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PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coinage ) )
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PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
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PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
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PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
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PORT_DIPSETTING( 0xc0, DEF_STR( Free_Play ) )
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PORT_START("DSWB")
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PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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|
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
|
PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
|
|
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
|
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
|
PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
|
|
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
|
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
|
PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
|
|
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
|
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
|
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
|
|
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
|
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
|
PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
|
|
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
|
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
|
PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
|
|
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
|
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
|
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
|
|
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
|
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
|
|
|
INPUT_PORTS_END
|
|
|
|
|
|
|
|
/*************************************
|
|
*
|
|
* Machine driver
|
|
*
|
|
*************************************/
|
|
|
|
static MACHINE_DRIVER_START( r2dtank )
|
|
MDRV_CPU_ADD("main", M6809,3000000) /* ?? too fast ? */
|
|
MDRV_CPU_PROGRAM_MAP(r2dtank_main_map,0)
|
|
|
|
MDRV_CPU_ADD("audio", M6802,3000000) /* ?? */
|
|
MDRV_CPU_PROGRAM_MAP(r2dtank_audio_map,0)
|
|
|
|
MDRV_MACHINE_START(r2dtank)
|
|
MDRV_MACHINE_RESET(r2dtank)
|
|
MDRV_NVRAM_HANDLER(generic_0fill)
|
|
|
|
/* video hardware */
|
|
MDRV_VIDEO_UPDATE(r2dtank)
|
|
|
|
MDRV_SCREEN_ADD("main", RASTER)
|
|
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
|
|
MDRV_SCREEN_RAW_PARAMS(PIXEL_CLOCK, 256, 0, 256, 256, 0, 256) /* temporary, CRTC will configure screen */
|
|
|
|
MDRV_DEVICE_ADD("crtc", MC6845)
|
|
MDRV_DEVICE_CONFIG(mc6845_intf)
|
|
|
|
/* 74LS123 */
|
|
|
|
MDRV_DEVICE_ADD("74123", TTL74123)
|
|
MDRV_DEVICE_CONFIG(ttl74123_intf)
|
|
|
|
/* audio hardware */
|
|
MDRV_SPEAKER_STANDARD_MONO("mono")
|
|
|
|
MDRV_SOUND_ADD("ay1", AY8910, (4000000 / 4))
|
|
MDRV_SOUND_CONFIG(ay8910_1_interface)
|
|
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
|
|
|
MDRV_SOUND_ADD("ay2", AY8910, (4000000 / 4))
|
|
MDRV_SOUND_CONFIG(ay8910_2_interface)
|
|
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
|
|
|
MACHINE_DRIVER_END
|
|
|
|
|
|
|
|
/*************************************
|
|
*
|
|
* ROM definition
|
|
*
|
|
*************************************/
|
|
|
|
ROM_START( r2dtank )
|
|
ROM_REGION( 0x10000, "main", 0 )
|
|
ROM_LOAD( "r2d1.1c", 0xc800, 0x0800, CRC(20606a0f) SHA1(9a55e595c7ea332bdc89142338947be8a28a92a3) )
|
|
ROM_LOAD( "r2d2.1a", 0xd000, 0x1000, CRC(7561c67f) SHA1(cccc7bbd7975db340fe571a4c31c25b41b2563b8) )
|
|
ROM_LOAD( "r2d3.2c", 0xe000, 0x1000, CRC(fc53c538) SHA1(8f9a2edcf7a2cb2a8ddd084828b52f1bf45f434a) )
|
|
ROM_LOAD( "r2d4.2a", 0xf000, 0x1000, CRC(56636225) SHA1(dcfc6e29b4c51a45cfbecf6790b7d88b89af433b) )
|
|
|
|
ROM_REGION( 0x10000, "audio", 0 )
|
|
ROM_LOAD( "r2d5.7l", 0xf800, 0x0800, CRC(c49bed15) SHA1(ffa635a65c024c532bb13fb91bbd3e54923e81bf) )
|
|
ROM_END
|
|
|
|
|
|
|
|
/*************************************
|
|
*
|
|
* Game driver
|
|
*
|
|
*************************************/
|
|
|
|
GAME( 1980, r2dtank, 0, r2dtank, r2dtank, 0, ROT270, "Sigma Enterprises Inc.", "R2D Tank", GAME_SUPPORTS_SAVE)
|